| From 6ef1215b04d0c26cec47cb208f8b14c33da790cd Mon Sep 17 00:00:00 2001 |
| From: Hans de Goede <hdegoede@redhat.com> |
| Date: Tue, 20 Mar 2018 15:57:09 +0300 |
| Subject: [PATCH 0900/1795] xhci: Add Intel extended cap / otg phy mux handling |
| |
| The xHCI controller on various Intel SoCs has an extended cap mmio-range |
| which contains registers to control the muxing to the xHCI (host mode) |
| or the dwc3 (device mode) and vbus-detection for the otg usb-phy. |
| |
| Having a role-sw driver included in the xHCI code (under drivers/usb/host) |
| is not desirable. So this commit adds a simple handler for this extended |
| capability, which creates a platform device with the caps mmio region as |
| resource, this allows us to write a separate platform role-sw driver for |
| the role-switch. |
| |
| Note this commit adds a call to the new xhci_ext_cap_init() function |
| to xhci_pci_probe(), it is added here because xhci_ext_cap_init() must |
| be called only once. If in the future we also want to handle ext-caps |
| on non pci xHCI HCDs from xhci_ext_cap_init() a call to it should also |
| be added to other bus probe paths. |
| |
| Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
| Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> |
| Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> |
| Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| (cherry picked from commit fa31b3cb2ae143aa6e26974fcbe75689da60bdbe) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| drivers/usb/host/Makefile | 2 +- |
| drivers/usb/host/xhci-ext-caps.c | 90 ++++++++++++++++++++++++++++++++ |
| drivers/usb/host/xhci-ext-caps.h | 2 + |
| drivers/usb/host/xhci-pci.c | 5 ++ |
| drivers/usb/host/xhci.h | 2 + |
| 5 files changed, 100 insertions(+), 1 deletion(-) |
| create mode 100644 drivers/usb/host/xhci-ext-caps.c |
| |
| diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile |
| index e77fe32e7b35..b5a32e5e2e66 100644 |
| --- a/drivers/usb/host/Makefile |
| +++ b/drivers/usb/host/Makefile |
| @@ -11,7 +11,7 @@ fhci-y += fhci-mem.o fhci-tds.o fhci-sched.o |
| |
| fhci-$(CONFIG_FHCI_DEBUG) += fhci-dbg.o |
| |
| -xhci-hcd-y := xhci.o xhci-mem.o |
| +xhci-hcd-y := xhci.o xhci-mem.o xhci-ext-caps.o |
| xhci-hcd-y += xhci-ring.o xhci-hub.o xhci-dbg.o |
| xhci-hcd-y += xhci-trace.o |
| |
| diff --git a/drivers/usb/host/xhci-ext-caps.c b/drivers/usb/host/xhci-ext-caps.c |
| new file mode 100644 |
| index 000000000000..399113f9fc5c |
| --- /dev/null |
| +++ b/drivers/usb/host/xhci-ext-caps.c |
| @@ -0,0 +1,90 @@ |
| +// SPDX-License-Identifier: GPL-2.0 |
| +/* |
| + * XHCI extended capability handling |
| + * |
| + * Copyright (c) 2017 Hans de Goede <hdegoede@redhat.com> |
| + */ |
| + |
| +#include <linux/platform_device.h> |
| +#include "xhci.h" |
| + |
| +#define USB_SW_DRV_NAME "intel_xhci_usb_sw" |
| +#define USB_SW_RESOURCE_SIZE 0x400 |
| + |
| +static void xhci_intel_unregister_pdev(void *arg) |
| +{ |
| + platform_device_unregister(arg); |
| +} |
| + |
| +static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset) |
| +{ |
| + struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| + struct device *dev = hcd->self.controller; |
| + struct platform_device *pdev; |
| + struct resource res = { 0, }; |
| + int ret; |
| + |
| + pdev = platform_device_alloc(USB_SW_DRV_NAME, PLATFORM_DEVID_NONE); |
| + if (!pdev) { |
| + xhci_err(xhci, "couldn't allocate %s platform device\n", |
| + USB_SW_DRV_NAME); |
| + return -ENOMEM; |
| + } |
| + |
| + res.start = hcd->rsrc_start + cap_offset; |
| + res.end = res.start + USB_SW_RESOURCE_SIZE - 1; |
| + res.name = USB_SW_DRV_NAME; |
| + res.flags = IORESOURCE_MEM; |
| + |
| + ret = platform_device_add_resources(pdev, &res, 1); |
| + if (ret) { |
| + dev_err(dev, "couldn't add resources to intel_xhci_usb_sw pdev\n"); |
| + platform_device_put(pdev); |
| + return ret; |
| + } |
| + |
| + pdev->dev.parent = dev; |
| + |
| + ret = platform_device_add(pdev); |
| + if (ret) { |
| + dev_err(dev, "couldn't register intel_xhci_usb_sw pdev\n"); |
| + platform_device_put(pdev); |
| + return ret; |
| + } |
| + |
| + ret = devm_add_action_or_reset(dev, xhci_intel_unregister_pdev, pdev); |
| + if (ret) { |
| + dev_err(dev, "couldn't add unregister action for intel_xhci_usb_sw pdev\n"); |
| + return ret; |
| + } |
| + |
| + return 0; |
| +} |
| + |
| +int xhci_ext_cap_init(struct xhci_hcd *xhci) |
| +{ |
| + void __iomem *base = &xhci->cap_regs->hc_capbase; |
| + u32 offset, val; |
| + int ret; |
| + |
| + offset = xhci_find_next_ext_cap(base, 0, 0); |
| + |
| + while (offset) { |
| + val = readl(base + offset); |
| + |
| + switch (XHCI_EXT_CAPS_ID(val)) { |
| + case XHCI_EXT_CAPS_VENDOR_INTEL: |
| + if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) { |
| + ret = xhci_create_intel_xhci_sw_pdev(xhci, |
| + offset); |
| + if (ret) |
| + return ret; |
| + } |
| + break; |
| + } |
| + offset = xhci_find_next_ext_cap(base, offset, 0); |
| + } |
| + |
| + return 0; |
| +} |
| +EXPORT_SYMBOL_GPL(xhci_ext_cap_init); |
| diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h |
| index bf7316e130d3..3147f3b467af 100644 |
| --- a/drivers/usb/host/xhci-ext-caps.h |
| +++ b/drivers/usb/host/xhci-ext-caps.h |
| @@ -39,6 +39,8 @@ |
| #define XHCI_EXT_CAPS_ROUTE 5 |
| /* IDs 6-9 reserved */ |
| #define XHCI_EXT_CAPS_DEBUG 10 |
| +/* Vendor caps */ |
| +#define XHCI_EXT_CAPS_VENDOR_INTEL 192 |
| /* USB Legacy Support Capability - section 7.1.1 */ |
| #define XHCI_HC_BIOS_OWNED (1 << 16) |
| #define XHCI_HC_OS_OWNED (1 << 24) |
| diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c |
| index 93ce34bce7b5..85ffda85f8ab 100644 |
| --- a/drivers/usb/host/xhci-pci.c |
| +++ b/drivers/usb/host/xhci-pci.c |
| @@ -181,6 +181,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) |
| if (pdev->vendor == PCI_VENDOR_ID_INTEL && |
| pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) { |
| xhci->quirks |= XHCI_SSIC_PORT_UNUSED; |
| + xhci->quirks |= XHCI_INTEL_USB_ROLE_SW; |
| } |
| if (pdev->vendor == PCI_VENDOR_ID_INTEL && |
| (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || |
| @@ -314,6 +315,10 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) |
| goto dealloc_usb2_hcd; |
| } |
| |
| + retval = xhci_ext_cap_init(xhci); |
| + if (retval) |
| + goto put_usb3_hcd; |
| + |
| retval = usb_add_hcd(xhci->shared_hcd, dev->irq, |
| IRQF_SHARED); |
| if (retval) |
| diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h |
| index c09563702d2f..3c3106b11559 100644 |
| --- a/drivers/usb/host/xhci.h |
| +++ b/drivers/usb/host/xhci.h |
| @@ -1833,6 +1833,7 @@ struct xhci_hcd { |
| #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL (1 << 28) |
| #define XHCI_HW_LPM_DISABLE (1 << 29) |
| #define XHCI_SUSPEND_DELAY (1 << 30) |
| +#define XHCI_INTEL_USB_ROLE_SW (1 << 31) |
| |
| unsigned int num_active_eps; |
| unsigned int limit_active_eps; |
| @@ -2028,6 +2029,7 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks); |
| void xhci_init_driver(struct hc_driver *drv, |
| const struct xhci_driver_overrides *over); |
| int xhci_disable_slot(struct xhci_hcd *xhci, u32 slot_id); |
| +int xhci_ext_cap_init(struct xhci_hcd *xhci); |
| |
| int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup); |
| int xhci_resume(struct xhci_hcd *xhci, bool hibernated); |
| -- |
| 2.19.0 |
| |