blob: 0a530953a4e7614eeb10b306961c6d970b612a4e [file] [log] [blame]
 From bd9acdf656599e20c581685c7f0874c2a709a8c0 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 18 Dec 2017 00:35:56 +0000 Subject: [PATCH 1041/1795] drm: rcar-du: Calculate DPLLCR to be more small jitter In general, PLL has VCO (= Voltage controlled oscillator), one of the very important electronic feature called as "jitter" is related to this VCO. In academic generalism, VCO should be maximum to be more small jitter. In high frequency clock, jitter will be large impact. Thus, selecting Hi VCO is general theory. fin fvco fout fclkout in --> [1/M] --> |PD| -> [LPF] -> [VCO] -> [1/P] -+-> [1/FDPLL] -> out +-> | | | | | +-----------------[1/N]<-------------+ fclkout = fvco / P / FDPLL -- (1) In PD, it will loop until fin/M = fvco/P/N fvco = fin * P * N / M -- (2) (1) + (2) indicates fclkout = fin * N / M / FDPLL In this device, N = (n + 1), M = (m + 1), P = 2, FDPLL = (fdpll + 1). fclkout = fin * (n + 1) / (m + 1) / (fdpll + 1) This is the datasheet formula. One note here is that it should be 2kHz < fvco < 4096MHz To be smaller jitter, fvco should be maximum, in other words, N as large as possible, M as small as possible driver should select. Here, basically M=1. This patch do it. Reported-by: HIROSHI INOSE Signed-off-by: Kuninori Morimoto Reviewed-by: Laurent Pinchart [Small clarifications in comments, renamed finnm to fout] Signed-off-by: Laurent Pinchart (cherry picked from commit 0bc69592abc870f45d82e72c40e44a913d5b90c0) Signed-off-by: Simon Horman Signed-off-by: Geert Uytterhoeven --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 49 +++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 6820461f5ed1..c4420538ec85 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -125,13 +125,54 @@ static void rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc, unsigned int m; unsigned int n; - for (n = 39; n < 120; n++) { - for (m = 0; m < 4; m++) { + /* + * fin fvco fout fclkout + * in --> [1/M] --> |PD| -> [LPF] -> [VCO] -> [1/P] -+-> [1/FDPLL] -> out + * +-> | | | + * | | + * +---------------- [1/N] <------------+ + * + * fclkout = fvco / P / FDPLL -- (1) + * + * fin/M = fvco/P/N + * + * fvco = fin * P * N / M -- (2) + * + * (1) + (2) indicates + * + * fclkout = fin * N / M / FDPLL + * + * NOTES + * N : (n + 1) + * M : (m + 1) + * FDPLL : (fdpll + 1) + * P : 2 + * 2kHz < fvco < 4096MHz + * + * To minimize the jitter, + * N : as large as possible + * M : as small as possible + */ + for (m = 0; m < 4; m++) { + for (n = 119; n > 38; n--) { + /* + * This code only runs on 64-bit architectures, the + * unsigned long type can thus be used for 64-bit + * computation. It will still compile without any + * warning on 32-bit architectures. + * + * To optimize calculations, use fout instead of fvco + * to verify the VCO frequency constraint. + */ + unsigned long fout = input * (n + 1) / (m + 1); + + if (fout < 1000 || fout > 2048 * 1000 * 1000U) + continue; + for (fdpll = 1; fdpll < 32; fdpll++) { unsigned long output; - output = input * (n + 1) / (m + 1) - / (fdpll + 1); + output = fout / (fdpll + 1); if (output >= 400 * 1000 * 1000) continue; -- 2.19.0