blob: bc100548632cb5373e8493e7fd90a94c99d0deea [file] [log] [blame]
From 8339e0c29647ae0d5d85849ced8249ec2752adbd Mon Sep 17 00:00:00 2001
From: Simon Horman <horms+renesas@verge.net.au>
Date: Wed, 20 Dec 2017 13:14:44 +0100
Subject: [PATCH 1063/1795] ARM: dts: r8a7791: Reduce size of thermal registers
Reduce size of thermal registers in DT for r8a7791 (R-Car M3-W) SoC.
According to the "User's Manual: Hardware" v2.00 the registers at base
0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the case
on the r8a73a4 (R-Mobile APE6).
This should not have any runtime affect as mapping granularity is PAGE_SIZE.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 3f599906744ecc2ece7ed0418a5822348000c0e2)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 008a260f86a5..8266a9b7cafd 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -240,7 +240,7 @@
compatible = "renesas,thermal-r8a7791",
"renesas,rcar-gen2-thermal",
"renesas,rcar-thermal";
- reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
+ reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
--
2.19.0