blob: 77ffcc39a513c9f367f7fb9f2e1f3be5fd545c8f [file] [log] [blame]
From 5f6a6e20d9ede3292128135664995418117adfe2 Mon Sep 17 00:00:00 2001
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date: Fri, 9 Mar 2018 15:09:38 +0300
Subject: [PATCH 1499/1795] arm64: dts: renesas: condor: add EtherAVB pins
Add the (previously omitted) EtherAVB pin data to the Condor board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 55cda28160e1ea852955ee17464d0dccfa67fa72)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 38f11cee42dc..7af5afa41795 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -30,6 +30,9 @@
};
&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
renesas,no-ether-link;
@@ -50,6 +53,11 @@
};
&pfc {
+ avb_pins: avb {
+ groups = "avb_mdio", "avb_rgmii";
+ function = "avb";
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
--
2.19.0