blob: e230382ef8d6b2e4bb669bdb8d568ad1debdf7cf [file] [log] [blame]
From b8e6308825bf247b26d2cfe89a6510823b756b2b Mon Sep 17 00:00:00 2001
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Date: Wed, 25 Apr 2018 17:20:09 +0900
Subject: [PATCH 1510/1795] arm64: dts: renesas: r8a77990: Revise the cache
controller node
The cache controller node should not have unit-addresses and reg
properties. So, this patch removes them.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit de1eb23c6d0f08f6a2eff99afe29b08f023e392d)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 19c1f7cea913..46580290b7fb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -27,9 +27,8 @@
enable-method = "psci";
};
- L2_CA53: cache-controller@0 {
+ L2_CA53: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc 21>;
cache-unified;
cache-level = <2>;
--
2.19.0