| commit | 52040fd8e72a631dbaa39ad5506490b2d1c107f8 | [log] [tgz] |
|---|---|---|
| author | Geert Uytterhoeven <geert+renesas@glider.be> | Wed Jun 19 13:14:58 2024 +0200 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Tue Jun 25 09:36:45 2024 +0200 |
| tree | 8f3453684ed00473897b4c8f5b87bed89e363d22 | |
| parent | 1e6d4dd5a5c398dcef54e470131431fd3928b3ea [diff] |
arm64: dts: renesas: r9a07g054: Add missing hypervisor virtual timer IRQ
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>