tree ed5428820ed9831dea4bdc8f060b2c57d1d68914
parent 52040fd8e72a631dbaa39ad5506490b2d1c107f8
author Geert Uytterhoeven <geert+renesas@glider.be> 1718795714 +0200
committer Geert Uytterhoeven <geert+renesas@glider.be> 1719301005 +0200

arm64: dts: renesas: r9a08g045: Add missing hypervisor virtual timer IRQ

Add the missing fifth interrupt to the device node that represents the
ARM architected timer.  While at it, add an interrupt-names property for
clarity,

Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
v2:
  - Add Reviewed-by, Tested-by.