clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate() return value
cpg_sd_clock_round_rate() may return an unsupported clock rate for the
requested clock rate. Therefore, when cpg_sd_clock_set_rate() sets the
clock rate acquired by cpg_sd_clock_round_rate(), an error may occur.
This is not conform the clk API design.
This patch fixes that by making sure cpg_sd_clock_calc_div() considers
only the division values defined in cpg_sd_div_table.
With this fix, the cpg_sd_clock_round_rate() always return a support
Signed-off-by: Takeshi Kihara <firstname.lastname@example.org>
Fixes: 90c073e53909da85 ("clk: shmobile: r8a7795: Add SD divider support")
Signed-off-by: Geert Uytterhoeven <email@example.com>
- Use "<" instead of "<=" to use first match (doesn't matter, though,
but is more aligned with the behavior of cpg_sd_clock_calc_div()),
- Keep best_div instead of best_rate, to avoid extra
1 file changed