commit a24cd110e664396061b0a72930734bf419bf88c4
author Biju Das <biju.das.jz@bp.renesas.com> Tue Sep 09 19:07:46 2025 +0100
committer Geert Uytterhoeven <geert+renesas@glider.be> Thu Sep 11 20:17:28 2025 +0200
tree cd66ccd17dbfa31fcf69a87e554261361723453d
parent f21923f3f410f84528b5e7bdcbe4afdc6f07010c

dt-bindings: clock: renesas,r9a09g047-cpg: Add USB3.0 core clocks

Add definitions for USB3.0 core clocks in the R9A09G047 CPG DT bindings
header file.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20250909180803.140939-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

include/dt-bindings/clock/renesas,r9a09g047-cpg.h

diff --git a/include/dt-bindings/clock/renesas,r9a09g047-cpg.h b/include/dt-bindings/clock/renesas,r9a09g047-cpg.h
index a27132f..f165df8 100644
--- a/include/dt-bindings/clock/renesas,r9a09g047-cpg.h
+++ b/include/dt-bindings/clock/renesas,r9a09g047-cpg.h
@@ -20,5 +20,7 @@
 #define R9A09G047_SPI_CLK_SPI			9
 #define R9A09G047_GBETH_0_CLK_PTP_REF_I		10
 #define R9A09G047_GBETH_1_CLK_PTP_REF_I		11
+#define R9A09G047_USB3_0_REF_ALT_CLK_P		12
+#define R9A09G047_USB3_0_CLKCORE		13
 
 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */