| commit | d18a7eda6df0835383aaec84948bbe8020c1ad62 | [log] [tgz] |
|---|---|---|
| author | Chris Brandt <chris.brandt@renesas.com> | Thu Dec 15 12:00:27 2016 -0500 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Tue Dec 27 10:55:14 2016 +0100 |
| tree | 65f88fb837722e4fe54e332f07e028de868de57b | |
| parent | 9127d54bb89471592b3c8af6c6273c21db6de6a6 [diff] |
clk: renesas: mstp: Support 8-bit registers for r7s72100
The RZ/A1 is different than the other Renesas SOCs because the MSTP
registers are 8-bit instead of 32-bit and if you try writing values as
32-bit nothing happens...meaning this driver never worked for r7s72100.
Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>