commit | a115f6362cee01813c66e10e397b25f2a06aecfb | [log] [tgz] |
---|---|---|
author | ABE Hiroshige <hiroshige.abe.zc@renesas.com> | Thu Dec 14 22:50:55 2017 +0900 |
committer | Geert Uytterhoeven <geert+renesas@glider.be> | Fri Jan 05 11:14:38 2018 +0100 |
tree | 45a53ba7c8c15393cd1d2e9e2a93251f8e7f248e | |
parent | 7aff266552d6042b43d3d5a9b13f0009ef862033 [diff] |
clk: renesas: r8a7796: Add FDP clock This patch adds FDP1-0 clock to the R8A7796 SoC. Signed-off-by: ABE Hiroshige <hiroshige.abe.zc@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: s/fdp0/fdp1-0/] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>