[RFC] clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
The Clock Pulse Generator / Module Standby and Software Reset module in
R-Car H3 ES2.0 differs from ES1.x in the following areas:
- More core clocks (S0D2, S0D3, S0D6, S0D8, S0D12),
- Different parent clocks for AUDMAC, EtherAVB, FDP, SYS-DMAC, VIN,
VSPB, VSPI,
- Removal of modules CSI21, FCPF2, FCPVD3, FCPVI2, FDP1-2,
VSPD3, VSPI2.
- Addition of modules EHCI3, HS-USB-IF3, R-NANDC, USB3.0-IF3-0,
USB-DMAC3-1.
To support both ES1.x and ES2.0:
- Update the clock tables for the latest revision (ES2.0), but do not
remove clocks that only exist on earlier revisions (ES1.x),
- At runtime, detect the SoC revision using the new soc_device_match()
API, and fix up the clocks tables to match the actual SoC revision:
- NULLify core and module clocks of modules that do not exist,
- Reparent module clocks that have a different parent on ES1.x.
FIXME Confirm FDP parent clock on ES2.0.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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This saves ca. 3 KiB compared to using two sets of tables (one for ES1.x
and one for ES2.0).
1 file changed
