)]}'
{
  "commit": "02e5f74ef08d3e6afec438d571487d0d0cec3c48",
  "tree": "ef67a3baa752d10653dd20cac554257e69142021",
  "parents": [
    "0e622c4b0e02ca1946a9fadb63f00ef733e8ba28",
    "4361f5aa8bfcecbab3fc8db987482b9e08115a6a"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Sat Oct 18 07:07:14 2025 -1000"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Sat Oct 18 07:07:14 2025 -1000"
  },
  "message": "Merge tag \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm\n\nPull kvm fixes from Paolo Bonzini:\n \"ARM:\n\n   - Fix the handling of ZCR_EL2 in NV VMs\n\n   - Pick the correct translation regime when doing a PTW on the back of\n     a SEA\n\n   - Prevent userspace from injecting an event into a vcpu that isn\u0027t\n     initialised yet\n\n   - Move timer save/restore to the sysreg handling code, fixing EL2\n     timer access in the process\n\n   - Add FGT-based trapping of MDSCR_EL1 to reduce the overhead of debug\n\n   - Fix trapping configuration when the host isn\u0027t GICv3\n\n   - Improve the detection of HCR_EL2.E2H being RES1\n\n   - Drop a spurious \u0027break\u0027 statement in the S1 PTW\n\n   - Don\u0027t try to access SPE when owned by EL3\n\n  Documentation updates:\n\n   - Document the failure modes of event injection\n\n   - Document that a GICv3 guest can be created on a GICv5 host with\n     FEAT_GCIE_LEGACY\n\n  Selftest improvements:\n\n   - Add a selftest for the effective value of HCR_EL2.AMO\n\n   - Address build warning in the timer selftest when building with\n     clang\n\n   - Teach irqfd selftests about non-x86 architectures\n\n   - Add missing sysregs to the set_id_regs selftest\n\n   - Fix vcpu allocation in the vgic_lpi_stress selftest\n\n   - Correctly enable interrupts in the vgic_lpi_stress selftest\n\n  x86:\n\n   - Expand the KVM_PRE_FAULT_MEMORY selftest to add a regression test\n     for the bug fixed by commit 3ccbf6f47098 (\"KVM: x86/mmu: Return\n     -EAGAIN if userspace deletes/moves memslot during prefault\")\n\n   - Don\u0027t try to get PMU capabilities from perf when running a CPU with\n     hybrid CPUs/PMUs, as perf will rightly WARN.\n\n  guest_memfd:\n\n   - Rework KVM_CAP_GUEST_MEMFD_MMAP (newly introduced in 6.18) into a\n     more generic KVM_CAP_GUEST_MEMFD_FLAGS\n\n   - Add a guest_memfd INIT_SHARED flag and require userspace to\n     explicitly set said flag to initialize memory as SHARED,\n     irrespective of MMAP.\n\n     The behavior merged in 6.18 is that enabling mmap() implicitly\n     initializes memory as SHARED, which would result in an ABI\n     collision for x86 CoCo VMs as their memory is currently always\n     initialized PRIVATE.\n\n   - Allow mmap() on guest_memfd for x86 CoCo VMs, i.e. on VMs with\n     private memory, to enable testing such setups, i.e. to hopefully\n     flush out any other lurking ABI issues before 6.18 is officially\n     released.\n\n   - Add testcases to the guest_memfd selftest to cover guest_memfd\n     without MMAP, and host userspace accesses to mmap()\u0027d private\n     memory\"\n\n* tag \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm: (46 commits)\n  arm64: Revamp HCR_EL2.E2H RES1 detection\n  KVM: arm64: nv: Use FGT write trap of MDSCR_EL1 when available\n  KVM: arm64: Compute per-vCPU FGTs at vcpu_load()\n  KVM: arm64: selftests: Fix misleading comment about virtual timer encoding\n  KVM: arm64: selftests: Add an E2H\u003d0-specific configuration to get_reg_list\n  KVM: arm64: selftests: Make dependencies on VHE-specific registers explicit\n  KVM: arm64: Kill leftovers of ad-hoc timer userspace access\n  KVM: arm64: Fix WFxT handling of nested virt\n  KVM: arm64: Move CNT*CT_EL0 userspace accessors to generic infrastructure\n  KVM: arm64: Move CNT*_CVAL_EL0 userspace accessors to generic infrastructure\n  KVM: arm64: Move CNT*_CTL_EL0 userspace accessors to generic infrastructure\n  KVM: arm64: Add timer UAPI workaround to sysreg infrastructure\n  KVM: arm64: Make timer_set_offset() generally accessible\n  KVM: arm64: Replace timer context vcpu pointer with timer_id\n  KVM: arm64: Introduce timer_context_to_vcpu() helper\n  KVM: arm64: Hide CNTHV_*_EL2 from userspace for nVHE guests\n  Documentation: KVM: Update GICv3 docs for GICv5 hosts\n  KVM: arm64: gic-v3: Only set ICH_HCR traps for v2-on-v3 or v3 guests\n  KVM: arm64: selftests: Actually enable IRQs in vgic_lpi_stress\n  KVM: arm64: selftests: Allocate vcpus with correct size\n  ...\n",
  "tree_diff": []
}