| commit | 28ee8b0912ca2ff68c2c03ff97bf1c22634c7942 | [log] [tgz] |
|---|---|---|
| author | Sven Auhagen <Sven.Auhagen@voleatech.de> | Tue Jul 21 06:40:27 2020 +0200 |
| committer | Herbert Xu <herbert@gondor.apana.org.au> | Fri Jul 31 18:09:00 2020 +1000 |
| tree | f5d20e35e0dbc007af249cb1fc7e6af97fa36d08 | |
| parent | c6720415907f21b9c53efbe679b96c3cc9d06404 [diff] |
crypto: marvell/cesa - irq balance Balance the irqs of the marvell cesa driver over all available cpus. Currently all interrupts are handled by the first CPU. From my testing with IPSec AES 256 SHA256 on my clearfog base with 2 Cores I get a 2x speed increase: Before the patch: 26.74 Kpps With the patch: 56.11 Kpps Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>