Merge remote-tracking branch 'local/linux/master' into linux/release/2.22.52.0.4
Conflicts:
bfd/elf32-i386.c
bfd/elf64-x86-64.c
bfd/elflink.c
binutils/objcopy.c
ld/lexsup.c
ld/scripttempl/armbpabi.sc
ld/scripttempl/elf.sc
ld/scripttempl/elf64hppa.sc
ld/scripttempl/elfxtensa.sc
ld/scripttempl/mep.sc
diff --git a/ChangeLog b/ChangeLog
index 0dc7a32..41b58ce 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,21 @@
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+
+ * NEWS: Mention PowerPC VLE port.
+
+2012-05-11 Mike Frysinger <vapier@gentoo.org>
+
+ * MAINTAINERS (config/): Move to intl/ section.
+ (compile; depcomp; install-sh; missing; ylwrap): Likewise.
+
+2012-05-09 Nick Clifton <nickc@redhat.com>
+ Paul Smith <psmith@gnu.org>
+
+ PR bootstrap/50461
+ * configure.ac (mpfr-dir): When using in-tree MPFR sources
+ allow for the fact that from release v3.1.0 of MPFR the source
+ files were moved into a src sub-directory.
+ * configure: Regenerate.
+
2012-05-02 Roland McGrath <mcgrathr@google.com>
* configure.ac (ENABLE_GOLD): Consider *-*-nacl* targets ELF.
@@ -102,7 +120,7 @@
2011-09-09 Linas Vepstas <linasvepstas@gmail.com>
Ben Elliston <bje@gnu.org>
- * config.sub (hexagon, hexagon-*): New.
+ * config.sub (hexagon, hexagon-*): New.
2011-08-23 Roland McGrath <mcgrathr@google.com>
@@ -594,8 +612,8 @@
2011-03-03 Sebastian Pop <sebastian.pop@amd.com>
- * configure.ac: Adjust test of with_ppl.
- * configure: Regenerated.
+ * configure.ac: Adjust test of with_ppl.
+ * configure: Regenerated.
2011-03-02 Sebastian Pop <sebastian.pop@amd.com>
@@ -1202,11 +1220,11 @@
* lt~obsolete.m4: Likewise.
2010-01-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
- Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+ Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
PR bootstrap/42424
* configure.ac: Include libtool m4 files.
- (_LT_CHECK_OBJDIR): Call it.
+ (_LT_CHECK_OBJDIR): Call it.
(extra_mpc_mpfr_configure_flags, extra_mpc_gmp_configure_flags,
gmplibs, ppllibs, clooglibs): Use $lt_cv_objdir.
@@ -1619,8 +1637,8 @@
2009-06-03 Jerome Guitton <guitton@adacore.com>
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
- * Makefile.tpl (all): Avoid a trailing backslash.
- * Makefile.in: Regenerate.
+ * Makefile.tpl (all): Avoid a trailing backslash.
+ * Makefile.in: Regenerate.
2009-06-03 Ben Elliston <bje@au.ibm.com>
@@ -3783,7 +3801,7 @@
non-ported target libraries in noconfigdirs.
<cris-*, crisv32-*> Ditto, except for non-aout, non-elf,
non-linux-gnu. Remove libgcj_ex_libffi.
- <lang_frag loop>: Set add_this_lang=no if the language is in
+ <lang_frag loop>: Set add_this_lang=no if the language is in
unsupported_languages.
* configure: Regenerate.
@@ -5104,8 +5122,8 @@
2003-12-21 Bernardo Innocenti <bernie@develer.com>
- * configure.in (*-*-uclinux): Exclude newlib, libgloss and rda.
- * configure: Regenerated.
+ * configure.in (*-*-uclinux): Exclude newlib, libgloss and rda.
+ * configure: Regenerated.
2003-12-19 Nathanael Nerode <neroden@gcc.gnu.org>
@@ -13194,8 +13212,8 @@
Sun May 9 17:47:57 1993 Rob Savoye (rob at darkstar.cygnus.com)
- * Makefile.in: Use srcroot to find runtest rather than rootme.
- Pass RUNTESTFLAGS and EXPECT down in BASE_FLAGS_TO_PASS.
+ * Makefile.in: Use srcroot to find runtest rather than rootme.
+ Pass RUNTESTFLAGS and EXPECT down in BASE_FLAGS_TO_PASS.
Fri May 7 14:55:59 1993 Ian Lance Taylor (ian@cygnus.com)
diff --git a/MAINTAINERS b/MAINTAINERS
index 046c5ea..dd8601b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -49,7 +49,8 @@
include/
See binutils/, gdb/, sid/, gcc/, libiberty/ etc.
-intl/; config.rhost; libiberty/; libiberty's part of include/
+intl/; config.rhost; libiberty/; libiberty's part of include/;
+compile; depcomp; install-sh; missing; ylwrap; config/
gcc: http://gcc.gnu.org
Changes need to be done in tandem with the official GCC
sources or submitted to the master file maintainer and brought
@@ -104,13 +105,6 @@
Any global maintainer can approve changes to these
files and directories.
-compile; depcomp; install-sh; missing; ylwrap;
-config/
- Any global maintainer can approve changes to these
- files and directories, but they should be aware
- that they need to be kept in sync with their
- counterparts in the GCC repository.
-
modules file
If you understand the file format (or can cut-and-paste existing
entries), modify it. If it scares you, get someone who does
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index f695aef..e734796 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,435 @@
+2012-06-03 Alan Modra <amodra@gmail.com>
+
+ PR binutils/13897
+ * elf.c (elf_find_function): Cache last function sym info.
+ (_bfd_elf_maybe_function_sym): Return function size, pass in
+ section of interest.
+ * elf-bfd.h (struct elf_backend_data <maybe_function_sym>): Likewise.
+ (_bfd_elf_maybe_function_sym): Likewise.
+ * elf64-ppc.c (ppc64_elf_maybe_function_sym): Likewise.
+ (opd_entry_value): Add in_code_sec param. Revert caching code.
+ Return -1 if in_code_sec and function found in wrong section.
+ Update all calls.
+
+2012-06-01 Siddhesh Poyarekar <siddhesh@redhat.com>
+
+ * bfd-in.h (bfd_elf_bfd_from_remote_memory): Make LEN argument
+ of target_read_memory as size_t.
+ * bfd-in2.h: Regenerate.
+ * elf-bfd.h (elf_backend_bfd_from_remote_memory): Make LEN
+ argument of target_read_memory as size_t.
+ (_bfd_elf32_bfd_from_remote_memory): Likewise.
+ (_bfd_elf64_bfd_from_remote_memory): Likewise.
+ * elf.c (bfd_elf_bfd_from_remote_memory): Likewise.
+ * elfcode.h (NAME(_bfd_elf,bfd_from_remote_memory)): Likewise.
+
+2012-06-01 Alan Modra <amodra@gmail.com>
+
+ PR binutils/13897
+ * elf64-ppc.c (opd_entry_value): Rewrite cache code.
+
+2012-05-29 Tom Tromey <tromey@redhat.com>
+
+ * opncls.c (bfd_fopen): Always close fd on failure.
+ (bfd_fdopenr): Likewise.
+
+2012-05-27 Alan Modra <amodra@gmail.com>
+
+ PR ld/14170
+ * elflink.c (_bfd_elf_merge_symbol): When a symbol defined in
+ a dynamic library finds a new instance with non-default
+ visibility in a regular object, correctly handle symbols
+ already on the undefs list and undo dynamic symbol state when
+ the new symbol is hidden or internal.
+
+2012-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_create_dynamic_sections): Don't use
+ dynamic_sec_flags to create PLT .eh_frame section.
+ * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Likewise.
+
+2012-05-25 Alan Modra <amodra@gmail.com>
+
+ PR ld/13909
+ * elf-eh-frame.c (_bfd_elf_eh_frame_present): New function.
+ (_bfd_elf_maybe_strip_eh_frame_hdr): Use it here.
+ * elf-bfd.h (_bfd_elf_eh_frame_present): Declare.
+ * elflink.c (bfd_elf_size_dynamic_sections): Let the backend
+ size dynamic sections before stripping eh_frame_hdr.
+ (bfd_elf_gc_sections): Handle multiple .eh_frame sections.
+ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Drop glink_eh_frame
+ if no other .eh_frame sections exist.
+ * elf64-ppc.c (ppc64_elf_size_stubs): Likewise.
+ * elf32-i386.c (elf_i386_create_dynamic_sections): Don't size
+ or alloc plt_eh_frame here..
+ (elf_i386_size_dynamic_sections): ..do it here instead. Don't
+ specially keep sgotplt, iplt, tgotplt, sdynbss for symbols.
+ (elf_i386_finish_dynamic_sections): Check plt_eh_frame->contents
+ before writing plt offset.
+ * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't size
+ or alloc plt_eh_frame here..
+ (elf_x86_64_size_dynamic_sections): ..do it here instead.
+ (elf_x86_64_finish_dynamic_sections): Check plt_eh_frame->contents
+ before writing plt offset.
+
+2012-05-24 Alan Modra <amodra@gmail.com>
+
+ PR ld/14158
+ * elf64-ppc.c (ppc64_elf_size_stubs): Round up glink_eh_frame
+ size to output section alignment.
+ (ppc64_elf_build_stubs): Likewise, and extend last FDE to cover.
+
+2012-05-23 Alan Modra <amodra@gmail.com>
+
+ * elf-eh-frame.c (_bfd_elf_maybe_strip_eh_frame_hdr): Handle
+ BFDs with multiple .eh_frame sections.
+
+2012-05-23 Alan Modra <amodra@gmail.com>
+
+ PR ld/13909
+ * elflink.c (bfd_elf_discard_info): Don't ignore dynamic BFDs.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/13909
+ * elf32-i386.c (elf_i386_create_dynamic_sections): Revert the
+ last change.
+ * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Likewise.
+
+2012-05-22 Alan Modra <amodra@gmail.com>
+
+ * elflink.c (bfd_elf_discard_info): Look for next .eh_frame if
+ first one is zero size or discarded.
+ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Set most of
+ glink_eh_frame contents here..
+ (ppc_elf_finish_dynamic_sections): ..rather than here. Just set
+ offset to .glink.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/13909
+ * elf32-i386.c (elf_i386_create_dynamic_sections): Create PLT
+ eh_frame section if there is an input .eh_frame section.
+ * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Likewise.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/14105
+ * elf32-i386.c (elf_i386_create_dynamic_sections): Always
+ create PLT eh_frame section with SEC_LINKER_CREATED.
+ * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Likewise.
+
+2012-05-22 Alan Modra <amodra@gmail.com>
+
+ * elflink.c (bfd_elf_discard_info): Handle multiple .eh_frame
+ sections attached to a BFD.
+ * section.c (bfd_get_section_by_name): Rewrite description.
+ (bfd_get_next_section_by_name): New function.
+ * bfd-in2.h: Regenerate.
+
+2012-05-21 Andreas Schwab <schwab@linux-m68k.org>
+
+ * elf32-m68k.c (elf_m68k_grok_prstatus): New function.
+ (elf_m68k_grok_psinfo): New function.
+ (elf_backend_grok_prstatus): Define.
+ (elf_backend_grok_psinfo): Define.
+
+2012-05-19 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * elf64-mips.c (elf_backend_got_header_size): Correct definition.
+ * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Use the ELF
+ backend's GOT header size instead of hardcoding it.
+
+2012-05-19 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * elf32-vax.c (elf_vax_relocate_section)
+ <R_VAX_8, R_VAX_16, R_VAX_32>: Don't check if info->shared again.
+
+2012-05-19 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * elf32-vax.c (elf_vax_relocate_section)
+ <R_VAX_8, R_VAX_16, R_VAX_32>: Use section flags rather than
+ its name as the check for text sections.
+
+2012-05-19 Maciej W. Rozycki <macro@linux-mips.org>
+
+ * elf64-mips.c (mips_elf64_be_swap_reloc_out): Also make sure
+ the third reloc offset is the same as the first.
+
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * elf32-ppc.h (has_vle_insns, is_ppc_vle): Delete.
+ (has_tls_reloc, has_tls_get_addr_call): Move back to..
+ * elf32-ppc.c: ..here.
+ (ppc_elf_section_flags, elf_backend_section_flags): Delete.
+ (ppc_elf_modify_segment_map): Use ELF sh_flags to detect VLE sections.
+
+2012-05-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_finish_dynamic_symbol): Don't make
+ _DYNAMIC nor _GLOBAL_OFFSET_TABLE_ absolute.
+ * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise.
+
+2012-05-18 Roland McGrath <mcgrathr@google.com>
+
+ * archive.c (_bfd_generic_read_ar_hdr_mag): Fix last change so as
+ not to clobber the ar_fmag field stored in ARED->arch_header.
+
+2012-05-18 Pedro Alves <palves@redhat.com>
+
+ * mach-o.h: Don't include sysdep.h.
+
+2012-05-18 Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * bfd-in.h: Check for PACKAGE or PACKAGE_VERSION before
+ complaining about config.h not having been included.
+ * bfd-in2.h: Regenerate.
+
+2012-05-18 Andreas Schwab <schwab@linux-m68k.org>
+
+ * aclocal.m4: Regenerate.
+ * Makefile.in: Regenerate.
+
+2012-05-17 Daniel Richard G. <skunk@iskunk.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * configure.in: Add check that sysdep.h has been included before
+ any system header files.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * bfd-in.h: Generate an error if included before config.h.
+ * sysdep.h: Likewise.
+ * bfd-in2.h: Regenerate.
+ * compress.c: Remove #include "config.h".
+ * plugin.c: Likewise.
+ * elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h.
+ * elf64-hppa.c: Likewise.
+ * som.c: Likewise.
+ * xsymc.c: Likewise.
+
+2012-05-17 Maciej W. Rozycki <macro@linux-mips.org>
+ Alan Modra <amodra@gmail.com>
+
+ * elf.c (ignore_section_sym): Correct comment. Don't return
+ true for absolute section.
+ (elf_map_symbols): Move stray comment. Adjust for above change.
+ Don't discard global section symbols.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Don't make _DYNAMIC,
+ _GLOBAL_OFFSET_TABLE_ or _PROCEDURE_LINKAGE_TABLE_ absolute.
+ * elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Don't make _DYNAMIC
+ absolute.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * elf32-ppc.c (has_tls_reloc, has_tls_get_addr_call, has_vle_insns,
+ is_ppc_vle): Move to..
+ * elf32-ppc.h: ..here, making is_ppc_vle a macro.
+
+2012-05-16 Sergio Durigan Junior <sergiodj@redhat.com>
+
+ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma,
+ bfd_get_section_lma, bfd_get_section_alignment,
+ bfd_get_section_flags, bfd_get_section_userdata): Rewrite macros
+ in order to use the `bfd' argument.
+ * bfd-in2.h: Regenerate.
+ * elf-vxworks.c (elf_vxworks_finish_dynamic_entry): Pass proper `bfd'
+ as the first argument for `bfd_get_section_alignment'.
+ * elf32-arm.c (create_ifunc_sections): Likewise, for
+ `bfd_set_section_alignment'.
+ * elf32-m32r.c (m32r_elf_relocate_section): Likewise, for
+ `bfd_get_section_name'.
+ * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise.
+ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
+ (ppc_elf_relocate_section): Likewise.
+ * elf64-mmix.c (mmix_final_link_relocate): Likewise, for
+ `bfd_get_section_vma'.
+ * elf64-ppc.c (create_linkage_sections): Likewise, for
+ `bfd_set_section_alignment'.
+
+2012-05-16 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/13503
+ * reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenrate.
+ * elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to
+ R_AVR_8_HLO8.
+ (avr_reloc_map): Likewise.
+
+2012-05-16 Daniel Richard G. <skunk@iskunk.org>
+
+ PR binutils/13558
+ * bfd/aout-cris.c: Include sysdep.h before bfd.h.
+ * bfd/aout-ns32k.c: Likewise.
+ * bfd/aout-sparcle.c: Likewise.
+ * bfd/aout0.c: Likewise.
+ * bfd/bfd-in2.h: Likewise.
+ * bfd/coff-stgo32.c: Likewise.
+ * bfd/cpu-lm32.c: Likewise.
+ * bfd/cpu-microblaze.c: Likewise.
+ * bfd/cpu-score.c: Likewise.
+ * bfd/cpu-tilegx.c: Likewise.
+ * bfd/cpu-tilepro.c: Likewise.
+ * bfd/elf32-lm32.c: Likewise.
+ * bfd/elf32-microblaze.c: Likewise.
+ * bfd/elf32-score7.c: Likewise.
+ * bfd/elf32-tilepro.c: Likewise.
+ * bfd/elfxx-tilegx.c: Likewise.
+ * bfd/mach-o.h: Likewise.
+ * bfd/nlm32-ppc.c: Likewise.
+ * bfd/ns32knetbsd.c: Likewise.
+ * bfd/pef.h: Likewise.
+ * bfd/plugin.c: Likewise.
+ * bfd/stab-syms.c: Likewise.
+ * bfd/sunos.c: Likewise.
+ * bfd/syms.c: Likewise.
+ * bfd/xsym.h: Likewise.
+
+2012-05-16 Alan Modra <amodra@gmail.com>
+
+ * elflink.c: Rename flaginfo to flinfo throughout, except..
+ (bfd_elf_lookup_section_flags): ..here, rename finfo to flaginfo.
+ Formatting, style. Simplify flag match.
+
+2012-05-16 Alan Modra <amodra@gmail.com>
+
+ * dwarf2.c: Formatting.
+ (arange_add): Pass in unit rather than bfd. Update callers.
+ Ignore empty ranges. Don't ask for cleared memory.
+ (parse_comp_unit): Only set unit->base_address if processing
+ DW_TAG_compile_unit.
+ (find_debug_info): Optimise section lookup.
+ (place_sections): Use bfd_alloc for stash->adjusted_sections.
+ (find_line): Match previously parsed comp unit addresses as we
+ do for newly parsed comp units.
+
+2012-05-16 Alan Modra <amodra@gmail.com>
+
+ * archive.c (_bfd_generic_read_ar_hdr_mag): Ensure sscanf
+ stops at end of ar_size field.
+
+2012-05-16 Alan Modra <amodra@gmail.com>
+
+ PR ld/13962
+ PR ld/7023
+ * elf.c (bfd_section_from_shdr): Fail when .dynsym sh_info is
+ out of range. As a special case, fix sh_info for zero sh_size.
+ Do the same for .symtab.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+ Stephane Carrez <stcarrez@nerim.fr>
+
+ * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
+ * config.bfd: Likewise.
+ * cpu-m9s12x.c: New.
+ * cpu-m9s12xg.c: New.
+ * elf32-m68hc12.c: Add S12X and XGATE co-processor support.
+ Add option to offset S12 addresses into XGATE memory space.
+ Fix carry bug in IMM16 (IMM8 low/high) relocate.
+ * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
+ (ALL_MACHINES_CFILES): Likewise.
+ * reloc.c: Add S12X relocs.
+ * Makefile.in: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+ Catherine Moore <clm@codesourcery.com>
+
+ * bfd.c (bfd_lookup_section_flags): Add section parm.
+ * ecoff.c (bfd_debug_section): Remove flag_info initializer.
+ * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
+ (bfd_elf_lookup_section_flags): Add section parm.
+ * elf32-ppc.c (is_ppc_vle): New function.
+ (ppc_elf_modify_segment_map): New function.
+ (elf_backend_modify_segment_map): Define.
+ (has_vle_insns): New define.
+ * elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
+ * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
+ Move in logic to omit / include a section.
+ * libbfd-in.h (bfd_link_info): Add section parm.
+ (bfd_generic_lookup_section_flags): Likewise.
+ * reloc.c (bfd_generic_lookup_section_flags): Likewise.
+ * section.c (bfd_section): Move out section_flag_info.
+ (BFD_FAKE_SECTION): Remove flag_info initializer.
+ * targets.c (_bfd_lookup_section_flags): Add section parm.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+
+ * archures.c (bfd_mach_ppc_vle): New.
+ * bfd-in2.h: Regenerated.
+ * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
+ * elf32-ppc.c (split16_format_type): New enumeration.
+ (ppc_elf_vle_split16): New function.
+ (HOWTO): Add entries for R_PPC_VLE relocations.
+ (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
+ (ppc_elf_section_flags): New function.
+ (ppc_elf_lookup_section_flags): New function.
+ (ppc_elf_section_processing): New function.
+ (ppc_elf_check_relocs): Handle PPC_VLE relocations.
+ (ppc_elf_relocation_section): Likewise.
+ (elf_backend_lookup_section_flags_hook): Define.
+ (elf_backend_section_flags): Define.
+ (elf_backend_section_processing): Define.
+ * elf32-ppc.h (ppc_elf_section_processing): Declare.
+ * libbfd.h: Regenerated.
+ * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
+ BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
+ BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
+ BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
+ BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
+ BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
+ BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
+
+2012-05-11 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/13503
+ * reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
+ BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenrate.
+ * elf32-avr.c (elf_avr_howto_table): Add entries for
+ R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
+ (avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
+ R_AVR_8_HHI8.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (elf_x86_64_relocate_section): Use int in x32
+ addend overflow check.
+
+2012-05-10 DJ Delorie <dj@redhat.com>
+
+ * elf32-rx.c (rx_elf_object_p): Ignore empty segments.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (elf_x86_64_relocate_section): Display signed
+ hex number in x32 addend overflow check.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (elf_x86_64_reloc_type_class): Handle
+ R_X86_64_RELATIVE64.
+
+2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (elf_x86_64_relocate_section): Check addend
+ overflow for R_X86_64_RELATIVE64.
+
+2012-05-08 Ben Cheng <bccheng@google.com>
+
+ * elf.c: Preserve the original p_align and p_flags if they are
+ valid.
+
2012-05-07 Alan Modra <amodra@gmail.com>
* elf64-ia64-vms.c (elf64_ia64_relocate_section): Update
@@ -178,37 +610,37 @@
2012-04-24 Alan Modra <amodra@gmail.com>
PR ld/13991
- * bfd/elf-bfd.h (_bfd_elf_link_just_syms): Define as
+ * elf-bfd.h (_bfd_elf_link_just_syms): Define as
_bfd_generic_link_just_syms.
- * bfd/elflink.c (_bfd_elf_link_just_syms): Delete.
- * bfd/linker.c (_bfd_generic_link_just_syms): Set sec_info_type.
+ * elflink.c (_bfd_elf_link_just_syms): Delete.
+ * linker.c (_bfd_generic_link_just_syms): Set sec_info_type.
- * bfd/bfd-in.h (discarded_section): Renamed from elf_discarded_section.
- * bfd/section.c (SEC_INFO_TYPE_NONE, SEC_INFO_TYPE_STABS,
+ * bfd-in.h (discarded_section): Renamed from elf_discarded_section.
+ * section.c (SEC_INFO_TYPE_NONE, SEC_INFO_TYPE_STABS,
SEC_INFO_TYPE_MERGE, SEC_INFO_TYPE_EH_FRAME,
SEC_INFO_TYPE_JUST_SYMS): Renamed from corresponding ELF_INFO_TYPE.
- * bfd/elf-eh-frame.c, * bfd/elf-m10200.c, * bfd/elf-m10300.c,
- * bfd/elf.c, * bfd/elf32-arm.c, * bfd/elf32-avr.c, * bfd/elf32-bfin.c,
- * bfd/elf32-cr16.c, * bfd/elf32-cr16c.c, * bfd/elf32-cris.c,
- * bfd/elf32-crx.c, * bfd/elf32-d10v.c, * bfd/elf32-epiphany.c,
- * bfd/elf32-fr30.c, * bfd/elf32-frv.c, * bfd/elf32-h8300.c,
- * bfd/elf32-hppa.c, * bfd/elf32-i370.c, * bfd/elf32-i386.c,
- * bfd/elf32-i860.c, * bfd/elf32-ip2k.c, * bfd/elf32-iq2000.c,
- * bfd/elf32-lm32.c, * bfd/elf32-m32c.c, * bfd/elf32-m32r.c,
- * bfd/elf32-m68hc1x.c, * bfd/elf32-m68k.c, * bfd/elf32-mcore.c,
- * bfd/elf32-mep.c, * bfd/elf32-moxie.c, * bfd/elf32-msp430.c,
- * bfd/elf32-mt.c, * bfd/elf32-openrisc.c, * bfd/elf32-ppc.c,
- * bfd/elf32-rl78.c, * bfd/elf32-rx.c, * bfd/elf32-s390.c,
- * bfd/elf32-score.c, * bfd/elf32-score7.c, * bfd/elf32-sh.c,
- * bfd/elf32-spu.c, * bfd/elf32-tic6x.c, * bfd/elf32-tilepro.c,
- * bfd/elf32-v850.c, * bfd/elf32-vax.c, * bfd/elf32-xc16x.c,
- * bfd/elf32-xstormy16.c, * bfd/elf32-xtensa.c, * bfd/elf64-alpha.c,
- * bfd/elf64-hppa.c, * bfd/elf64-ia64-vms.c, * bfd/elf64-mmix.c,
- * bfd/elf64-ppc.c, * bfd/elf64-s390.c, * bfd/elf64-sh64.c,
- * bfd/elf64-x86-64.c, * bfd/elflink.c, * bfd/elfnn-ia64.c,
- * bfd/elfxx-mips.c, * bfd/elfxx-sparc.c, * bfd/elfxx-tilegx.c,
- * bfd/reloc.c: Update all references.
- * bfd/bfd-in2.h: Regenerate.
+ * elf-eh-frame.c, * elf-m10200.c, * elf-m10300.c,
+ * elf.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c,
+ * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c,
+ * elf32-crx.c, * elf32-d10v.c, * elf32-epiphany.c,
+ * elf32-fr30.c, * elf32-frv.c, * elf32-h8300.c,
+ * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c,
+ * elf32-i860.c, * elf32-ip2k.c, * elf32-iq2000.c,
+ * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c,
+ * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
+ * elf32-mep.c, * elf32-moxie.c, * elf32-msp430.c,
+ * elf32-mt.c, * elf32-openrisc.c, * elf32-ppc.c,
+ * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c,
+ * elf32-score.c, * elf32-score7.c, * elf32-sh.c,
+ * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c,
+ * elf32-v850.c, * elf32-vax.c, * elf32-xc16x.c,
+ * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
+ * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
+ * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c,
+ * elf64-x86-64.c, * elflink.c, * elfnn-ia64.c,
+ * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c,
+ * reloc.c: Update all references.
+ * bfd-in2.h: Regenerate.
2012-04-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
@@ -524,10 +956,10 @@
2012-03-09 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13817
- * bfd/elf32-i386.c (elf_i386_relocate_section): Restore
+ * elf32-i386.c (elf_i386_relocate_section): Restore
R_386_IRELATIVE.
- * * elf64-x86-64.c (elf_x86_64_relocate_section): Restore
+ * elf64-x86-64.c (elf_x86_64_relocate_section): Restore
R_X86_64_IRELATIVE.
2012-03-08 Tristan Gingold <gingold@adacore.com>
@@ -862,7 +1294,7 @@
2012-02-02 Vidya Praveen (vidya.praveen@atmel.com)
PR bfd/13410
- * bfd/elf32-avr.c (elf32_avr_relax_section): Correct the
+ * elf32-avr.c (elf32_avr_relax_section): Correct the
condition that qualifies the candidates for relaxation.
2012-02-02 Tristan Gingold <gingold@adacore.com>
@@ -976,7 +1408,7 @@
2012-01-27 Michael Eager <eager@eagercon.com>
- * bfd/elf32-microblaze.c (create_got_section):
+ * elf32-microblaze.c (create_got_section):
Reuse existing .rela.got section.
2012-01-23 Alan Modra <amodra@gmail.com>
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 0414cc7..b7271cc 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -105,6 +105,8 @@
cpu-m32r.lo \
cpu-m68hc11.lo \
cpu-m68hc12.lo \
+ cpu-m9s12x.lo \
+ cpu-m9s12xg.lo \
cpu-m68k.lo \
cpu-m88k.lo \
cpu-mcore.lo \
@@ -183,6 +185,8 @@
cpu-m32r.c \
cpu-m68hc11.c \
cpu-m68hc12.c \
+ cpu-m9s12x.c \
+ cpu-m9s12xg.c \
cpu-m68k.c \
cpu-m88k.c \
cpu-mcore.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index bf3a162..8ee6681 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -47,7 +47,8 @@
$(top_srcdir)/po/Make-in $(srcdir)/../depcomp \
$(am__bfdinclude_HEADERS_DIST)
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
-am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
+am__aclocal_m4_deps = $(top_srcdir)/../bfd/bfd.m4 \
+ $(top_srcdir)/../bfd/warning.m4 $(top_srcdir)/../config/acx.m4 \
$(top_srcdir)/../config/depstand.m4 \
$(top_srcdir)/../config/gettext-sister.m4 \
$(top_srcdir)/../config/largefile.m4 \
@@ -60,7 +61,6 @@
$(top_srcdir)/../config/stdint.m4 $(top_srcdir)/../libtool.m4 \
$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
- $(top_srcdir)/bfd.m4 $(top_srcdir)/warning.m4 \
$(top_srcdir)/acinclude.m4 $(top_srcdir)/../config/zlib.m4 \
$(top_srcdir)/configure.in
am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
@@ -404,6 +404,8 @@
cpu-m32r.lo \
cpu-m68hc11.lo \
cpu-m68hc12.lo \
+ cpu-m9s12x.lo \
+ cpu-m9s12xg.lo \
cpu-m68k.lo \
cpu-m88k.lo \
cpu-mcore.lo \
@@ -482,6 +484,8 @@
cpu-m32r.c \
cpu-m68hc11.c \
cpu-m68hc12.c \
+ cpu-m9s12x.c \
+ cpu-m9s12xg.c \
cpu-m68k.c \
cpu-m88k.c \
cpu-mcore.c \
@@ -1302,6 +1306,8 @@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68hc12.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m88k.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m9s12x.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m9s12xg.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mep.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-microblaze.Plo@am__quote@
diff --git a/bfd/aclocal.m4 b/bfd/aclocal.m4
index d9e743e..bf4ef1d 100644
--- a/bfd/aclocal.m4
+++ b/bfd/aclocal.m4
@@ -968,6 +968,8 @@
AC_SUBST([am__untar])
]) # _AM_PROG_TAR
+m4_include([../bfd/bfd.m4])
+m4_include([../bfd/warning.m4])
m4_include([../config/acx.m4])
m4_include([../config/depstand.m4])
m4_include([../config/gettext-sister.m4])
@@ -984,6 +986,4 @@
m4_include([../ltsugar.m4])
m4_include([../ltversion.m4])
m4_include([../lt~obsolete.m4])
-m4_include([bfd.m4])
-m4_include([warning.m4])
m4_include([acinclude.m4])
diff --git a/bfd/aout-cris.c b/bfd/aout-cris.c
index f1f3060..3e3d21a 100644
--- a/bfd/aout-cris.c
+++ b/bfd/aout-cris.c
@@ -1,5 +1,5 @@
/* BFD backend for CRIS a.out binaries.
- Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2009, 2012
Free Software Foundation, Inc.
Contributed by Axis Communications AB.
Written by Hans-Peter Nilsson.
@@ -66,6 +66,7 @@
#define MY(OP) CONCAT2 (cris_aout_,OP)
#define NAME(x, y) CONCAT3 (cris_aout,_32_,y)
+#include "sysdep.h"
#include "bfd.h"
/* Version 1 of the header. */
diff --git a/bfd/aout-ns32k.c b/bfd/aout-ns32k.c
index 5cf5ad4..75886bc 100644
--- a/bfd/aout-ns32k.c
+++ b/bfd/aout-ns32k.c
@@ -20,6 +20,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include "bfd.h"
#include "aout/aout64.h"
#include "ns32k.h"
diff --git a/bfd/aout-sparcle.c b/bfd/aout-sparcle.c
index afcc342..e050423 100644
--- a/bfd/aout-sparcle.c
+++ b/bfd/aout-sparcle.c
@@ -1,5 +1,5 @@
/* BFD backend for sparc little-endian aout binaries.
- Copyright 1996, 2001, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1996, 2001, 2005, 2007, 2012 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
@@ -25,6 +25,7 @@
the tokens. */
#define MY(OP) CONCAT2 (sparcle_aout_,OP)
+#include "sysdep.h"
#include "bfd.h"
#include "bfdlink.h"
#include "libaout.h"
diff --git a/bfd/aout0.c b/bfd/aout0.c
index e87af00..7cec377 100644
--- a/bfd/aout0.c
+++ b/bfd/aout0.c
@@ -1,5 +1,5 @@
/* BFD backend for SunOS style a.out with flags set to 0
- Copyright 1990, 1991, 1992, 1993, 1994, 1995, 2001, 2005, 2007
+ Copyright 1990, 1991, 1992, 1993, 1994, 1995, 2001, 2005, 2007, 2012
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -27,6 +27,7 @@
the tokens. */
#define MY(OP) CONCAT2 (aout0_big_,OP)
+#include "sysdep.h"
#include "bfd.h"
#define MY_exec_hdr_flags 0
diff --git a/bfd/archive.c b/bfd/archive.c
index fd44f54..26547ba 100644
--- a/bfd/archive.c
+++ b/bfd/archive.c
@@ -373,7 +373,7 @@
abfd = abfd->archive_next)
{
if (filename_cmp (filename, abfd->filename) == 0)
- return abfd;
+ return abfd;
}
target = NULL;
if (!arch_bfd->target_defaulted)
@@ -413,10 +413,10 @@
file_ptr origin = strtol (endp + 1, NULL, 10);
if (errno != 0)
- {
- bfd_set_error (bfd_error_malformed_archive);
- return NULL;
- }
+ {
+ bfd_set_error (bfd_error_malformed_archive);
+ return NULL;
+ }
*originp = origin;
}
else
@@ -455,6 +455,8 @@
char *allocptr = 0;
file_ptr origin = 0;
unsigned int extra_size = 0;
+ char fmag_save;
+ int scan;
if (bfd_bread (hdrp, sizeof (struct ar_hdr), abfd) != sizeof (struct ar_hdr))
{
@@ -471,7 +473,11 @@
}
errno = 0;
- if (sscanf (hdr.ar_size, "%" BFD_VMA_FMT "u", &parsed_size) != 1)
+ fmag_save = hdr.ar_fmag[0];
+ hdr.ar_fmag[0] = 0;
+ scan = sscanf (hdr.ar_size, "%" BFD_VMA_FMT "u", &parsed_size);
+ hdr.ar_fmag[0] = fmag_save;
+ if (scan != 1)
{
bfd_set_error (bfd_error_malformed_archive);
return NULL;
@@ -621,35 +627,35 @@
/* This is a proxy entry for an external file. */
if (! IS_ABSOLUTE_PATH (filename))
- {
- filename = _bfd_append_relative_path (archive, filename);
- if (filename == NULL)
- return NULL;
- }
+ {
+ filename = _bfd_append_relative_path (archive, filename);
+ if (filename == NULL)
+ return NULL;
+ }
if (new_areldata->origin > 0)
- {
- /* This proxy entry refers to an element of a nested archive.
- Locate the member of that archive and return a bfd for it. */
- bfd *ext_arch = _bfd_find_nested_archive (archive, filename);
+ {
+ /* This proxy entry refers to an element of a nested archive.
+ Locate the member of that archive and return a bfd for it. */
+ bfd *ext_arch = _bfd_find_nested_archive (archive, filename);
- if (ext_arch == NULL
- || ! bfd_check_format (ext_arch, bfd_archive))
- {
- bfd_release (archive, new_areldata);
- return NULL;
- }
- n_nfd = _bfd_get_elt_at_filepos (ext_arch, new_areldata->origin);
- if (n_nfd == NULL)
- {
- bfd_release (archive, new_areldata);
- return NULL;
- }
- n_nfd->proxy_origin = bfd_tell (archive);
- return n_nfd;
- }
+ if (ext_arch == NULL
+ || ! bfd_check_format (ext_arch, bfd_archive))
+ {
+ bfd_release (archive, new_areldata);
+ return NULL;
+ }
+ n_nfd = _bfd_get_elt_at_filepos (ext_arch, new_areldata->origin);
+ if (n_nfd == NULL)
+ {
+ bfd_release (archive, new_areldata);
+ return NULL;
+ }
+ n_nfd->proxy_origin = bfd_tell (archive);
+ return n_nfd;
+ }
/* It's not an element of a nested archive;
- open the external file as a bfd. */
+ open the external file as a bfd. */
target = NULL;
if (!archive->target_defaulted)
target = archive->xvec->name;
@@ -747,7 +753,7 @@
filestart = last_file->proxy_origin;
if (! bfd_is_thin_archive (archive))
- filestart += size;
+ filestart += size;
/* Pad to an even boundary...
Note that last_file->origin can be odd in the case of
BSD-4.4-style element with a long odd size. */
@@ -993,7 +999,7 @@
return FALSE;
ardata->symdefs = (struct carsym *) bfd_zalloc (abfd,
- carsym_size + stringsize + 1);
+ carsym_size + stringsize + 1);
if (ardata->symdefs == NULL)
return FALSE;
carsyms = ardata->symdefs;
@@ -1093,21 +1099,21 @@
else if (CONST_STRNEQ (nextname, "#1/20 "))
{
/* Mach-O has a special name for armap when the map is sorted by name.
- However because this name has a space it is slightly more difficult
- to check it. */
+ However because this name has a space it is slightly more difficult
+ to check it. */
struct ar_hdr hdr;
char extname[21];
if (bfd_bread (&hdr, sizeof (hdr), abfd) != sizeof (hdr))
- return FALSE;
+ return FALSE;
/* Read the extended name. We know its length. */
if (bfd_bread (extname, 20, abfd) != 20)
- return FALSE;
+ return FALSE;
if (bfd_seek (abfd, -(file_ptr) (sizeof (hdr) + 20), SEEK_CUR) != 0)
- return FALSE;
+ return FALSE;
if (CONST_STRNEQ (extname, "__.SYMDEF SORTED")
- || CONST_STRNEQ (extname, "__.SYMDEF"))
- return do_slurp_bsd_armap (abfd);
+ || CONST_STRNEQ (extname, "__.SYMDEF"))
+ return do_slurp_bsd_armap (abfd);
}
bfd_has_map (abfd) = FALSE;
@@ -1264,7 +1270,7 @@
amt = namedata->parsed_size;
if (amt + 1 == 0)
- goto byebye;
+ goto byebye;
bfd_ardata (abfd)->extended_names_size = amt;
bfd_ardata (abfd)->extended_names = (char *) bfd_zalloc (abfd, amt + 1);
@@ -1290,7 +1296,7 @@
trailing '/'. DOS/NT created archive often have \ in them
We'll fix all problems here.. */
{
- char *ext_names = bfd_ardata (abfd)->extended_names;
+ char *ext_names = bfd_ardata (abfd)->extended_names;
char *temp = ext_names;
char *limit = temp + namedata->parsed_size;
for (; temp < limit; ++temp)
@@ -1380,7 +1386,7 @@
the autogenerated bfd.h header...
Note - the string is returned in a static buffer. */
-
+
static const char *
adjust_relative_path (const char * path, const char * ref_path)
{
@@ -1403,7 +1409,7 @@
rpath = lrealpath (ref_path);
refp = rpath == NULL ? ref_path : rpath;
-
+
/* Remove common leading path elements. */
for (;;)
{
@@ -1429,7 +1435,7 @@
{
/* PR 12710: If the path element is "../" then instead of
inserting "../" we need to insert the name of the directory
- at the current level. */
+ at the current level. */
if (refp > ref_path + 1
&& refp[-1] == '.'
&& refp[-2] == '.')
@@ -1440,7 +1446,7 @@
/* If the lrealpath calls above succeeded then we should never
see dir_up and dir_down both being non-zero. */
-
+
len += 3 * dir_up;
if (dir_down)
@@ -1545,40 +1551,40 @@
unsigned int thislen;
if (bfd_is_thin_archive (abfd))
- {
- const char *filename = current->filename;
+ {
+ const char *filename = current->filename;
- /* If the element being added is a member of another archive
- (i.e., we are flattening), use the containing archive's name. */
- if (current->my_archive
- && ! bfd_is_thin_archive (current->my_archive))
- filename = current->my_archive->filename;
+ /* If the element being added is a member of another archive
+ (i.e., we are flattening), use the containing archive's name. */
+ if (current->my_archive
+ && ! bfd_is_thin_archive (current->my_archive))
+ filename = current->my_archive->filename;
- /* If the path is the same as the previous path seen,
- reuse it. This can happen when flattening a thin
- archive that contains other archives. */
- if (last_filename && filename_cmp (last_filename, filename) == 0)
- continue;
+ /* If the path is the same as the previous path seen,
+ reuse it. This can happen when flattening a thin
+ archive that contains other archives. */
+ if (last_filename && filename_cmp (last_filename, filename) == 0)
+ continue;
- last_filename = filename;
+ last_filename = filename;
- /* If the path is relative, adjust it relative to
- the containing archive. */
- if (! IS_ABSOLUTE_PATH (filename)
- && ! IS_ABSOLUTE_PATH (abfd->filename))
- normal = adjust_relative_path (filename, abfd->filename);
- else
- normal = filename;
+ /* If the path is relative, adjust it relative to
+ the containing archive. */
+ if (! IS_ABSOLUTE_PATH (filename)
+ && ! IS_ABSOLUTE_PATH (abfd->filename))
+ normal = adjust_relative_path (filename, abfd->filename);
+ else
+ normal = filename;
- /* In a thin archive, always store the full pathname
- in the extended name table. */
- total_namelen += strlen (normal) + 1;
+ /* In a thin archive, always store the full pathname
+ in the extended name table. */
+ total_namelen += strlen (normal) + 1;
if (trailing_slash)
/* Leave room for trailing slash. */
++total_namelen;
- continue;
- }
+ continue;
+ }
normal = normalize (current, current->filename);
if (normal == NULL)
@@ -1608,7 +1614,7 @@
&& hdr->ar_name[thislen] != ar_padchar (current)))
{
/* Must have been using extended format even though it
- didn't need to. Fix it to use normal format. */
+ didn't need to. Fix it to use normal format. */
memcpy (hdr->ar_name, normal, thislen);
if (thislen < maxname
|| (thislen == maxname && thislen < sizeof hdr->ar_name))
@@ -1640,31 +1646,31 @@
const char *filename = current->filename;
if (bfd_is_thin_archive (abfd))
- {
- /* If the element being added is a member of another archive
- (i.e., we are flattening), use the containing archive's name. */
- if (current->my_archive
- && ! bfd_is_thin_archive (current->my_archive))
- filename = current->my_archive->filename;
- /* If the path is the same as the previous path seen,
- reuse it. This can happen when flattening a thin
- archive that contains other archives.
- If the path is relative, adjust it relative to
- the containing archive. */
- if (last_filename && filename_cmp (last_filename, filename) == 0)
- normal = last_filename;
- else if (! IS_ABSOLUTE_PATH (filename)
- && ! IS_ABSOLUTE_PATH (abfd->filename))
- normal = adjust_relative_path (filename, abfd->filename);
- else
- normal = filename;
- }
+ {
+ /* If the element being added is a member of another archive
+ (i.e., we are flattening), use the containing archive's name. */
+ if (current->my_archive
+ && ! bfd_is_thin_archive (current->my_archive))
+ filename = current->my_archive->filename;
+ /* If the path is the same as the previous path seen,
+ reuse it. This can happen when flattening a thin
+ archive that contains other archives.
+ If the path is relative, adjust it relative to
+ the containing archive. */
+ if (last_filename && filename_cmp (last_filename, filename) == 0)
+ normal = last_filename;
+ else if (! IS_ABSOLUTE_PATH (filename)
+ && ! IS_ABSOLUTE_PATH (abfd->filename))
+ normal = adjust_relative_path (filename, abfd->filename);
+ else
+ normal = filename;
+ }
else
- {
- normal = normalize (current, filename);
- if (normal == NULL)
- return FALSE;
- }
+ {
+ normal = normalize (current, filename);
+ if (normal == NULL)
+ return FALSE;
+ }
thislen = strlen (normal);
if (thislen > maxname || bfd_is_thin_archive (abfd))
@@ -1675,16 +1681,16 @@
struct ar_hdr *hdr = arch_hdr (current);
if (normal == last_filename)
stroff = last_stroff;
- else
- {
+ else
+ {
strcpy (strptr, normal);
if (! trailing_slash)
- strptr[thislen] = ARFMAG[1];
+ strptr[thislen] = ARFMAG[1];
else
- {
- strptr[thislen] = '/';
- strptr[thislen + 1] = ARFMAG[1];
- }
+ {
+ strptr[thislen] = '/';
+ strptr[thislen + 1] = ARFMAG[1];
+ }
stroff = strptr - *tabloc;
last_stroff = stroff;
}
@@ -1692,19 +1698,19 @@
if (bfd_is_thin_archive (abfd) && current->origin > 0)
{
int len = snprintf (hdr->ar_name + 1, maxname - 1, "%-ld:",
- stroff);
+ stroff);
_bfd_ar_spacepad (hdr->ar_name + 1 + len, maxname - 1 - len,
- "%-ld",
- current->origin - sizeof (struct ar_hdr));
+ "%-ld",
+ current->origin - sizeof (struct ar_hdr));
}
else
- _bfd_ar_spacepad (hdr->ar_name + 1, maxname - 1, "%-ld", stroff);
- if (normal != last_filename)
- {
+ _bfd_ar_spacepad (hdr->ar_name + 1, maxname - 1, "%-ld", stroff);
+ if (normal != last_filename)
+ {
strptr += thislen + 1;
if (trailing_slash)
- ++strptr;
- last_filename = filename;
+ ++strptr;
+ last_filename = filename;
}
}
}
@@ -1717,9 +1723,9 @@
bfd_boolean
_bfd_archive_bsd44_construct_extended_name_table (bfd *abfd,
- char **tabloc,
- bfd_size_type *tablen,
- const char **name)
+ char **tabloc,
+ bfd_size_type *tablen,
+ const char **name)
{
unsigned int maxname = ar_maxnamelen (abfd);
bfd *current;
@@ -1740,16 +1746,16 @@
return FALSE;
for (len = 0; normal[len]; len++)
- if (normal[len] == ' ')
- has_space = 1;
+ if (normal[len] == ' ')
+ has_space = 1;
if (len > maxname || has_space)
{
- struct ar_hdr *hdr = arch_hdr (current);
+ struct ar_hdr *hdr = arch_hdr (current);
- len = (len + 3) & ~3;
- arch_eltdata (current)->extra_size = len;
- _bfd_ar_spacepad (hdr->ar_name, maxname, "#1/%lu", len);
+ len = (len + 3) & ~3;
+ arch_eltdata (current)->extra_size = len;
+ _bfd_ar_spacepad (hdr->ar_name, maxname, "#1/%lu", len);
}
}
@@ -1785,28 +1791,28 @@
BFD_ASSERT (padded_len == arch_eltdata (abfd)->extra_size);
if (!_bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size),
- arch_eltdata (abfd)->parsed_size + padded_len))
- return FALSE;
+ arch_eltdata (abfd)->parsed_size + padded_len))
+ return FALSE;
if (bfd_bwrite (hdr, sizeof (*hdr), archive) != sizeof (*hdr))
- return FALSE;
+ return FALSE;
if (bfd_bwrite (fullname, len, archive) != len)
- return FALSE;
+ return FALSE;
if (len & 3)
- {
- static const char pad[3] = { 0, 0, 0 };
+ {
+ static const char pad[3] = { 0, 0, 0 };
- len = 4 - (len & 3);
- if (bfd_bwrite (pad, len, archive) != len)
- return FALSE;
- }
+ len = 4 - (len & 3);
+ if (bfd_bwrite (pad, len, archive) != len)
+ return FALSE;
+ }
}
else
{
if (bfd_bwrite (hdr, sizeof (*hdr), archive) != sizeof (*hdr))
- return FALSE;
+ return FALSE;
}
return TRUE;
}
@@ -1886,7 +1892,7 @@
memset (hdr, ' ', sizeof (struct ar_hdr));
_bfd_ar_spacepad (hdr->ar_date, sizeof (hdr->ar_date), "%-12ld",
- status.st_mtime);
+ status.st_mtime);
#ifdef HPUX_LARGE_AR_IDS
/* HP has a very "special" way to handle UID/GID's with numeric values
> 99999. */
@@ -1895,7 +1901,7 @@
else
#endif
_bfd_ar_spacepad (hdr->ar_uid, sizeof (hdr->ar_uid), "%ld",
- status.st_uid);
+ status.st_uid);
#ifdef HPUX_LARGE_AR_IDS
/* HP has a very "special" way to handle UID/GID's with numeric values
> 99999. */
@@ -1904,9 +1910,9 @@
else
#endif
_bfd_ar_spacepad (hdr->ar_gid, sizeof (hdr->ar_gid), "%ld",
- status.st_gid);
+ status.st_gid);
_bfd_ar_spacepad (hdr->ar_mode, sizeof (hdr->ar_mode), "%-8lo",
- status.st_mode);
+ status.st_mode);
if (!_bfd_ar_sizepad (hdr->ar_size, sizeof (hdr->ar_size), status.st_size))
{
free (ared);
@@ -2152,8 +2158,8 @@
memcpy (hdr.ar_name, ename, strlen (ename));
/* Round size up to even number in archive header. */
if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size),
- (elength + 1) & ~(bfd_size_type) 1))
- return FALSE;
+ (elength + 1) & ~(bfd_size_type) 1))
+ return FALSE;
memcpy (hdr.ar_fmag, ARFMAG, 2);
if ((bfd_bwrite (&hdr, sizeof (struct ar_hdr), arch)
!= sizeof (struct ar_hdr))
@@ -2175,9 +2181,9 @@
/* Write ar header. */
if (!_bfd_write_ar_hdr (arch, current))
- return FALSE;
+ return FALSE;
if (bfd_is_thin_archive (arch))
- continue;
+ continue;
if (bfd_seek (current, (file_ptr) 0, SEEK_SET) != 0)
goto input_err;
@@ -2302,7 +2308,7 @@
goto error_return;
/* Now map over all the symbols, picking out the ones we
- want. */
+ want. */
for (src_count = 0; src_count < symcount; src_count++)
{
flagword flags = (syms[src_count])->flags;
@@ -2336,7 +2342,7 @@
if (map[orl_count].name == NULL)
goto error_return;
*(map[orl_count].name) = (char *) bfd_alloc (arch,
- namelen + 1);
+ namelen + 1);
if (*(map[orl_count].name) == NULL)
goto error_return;
strcpy (*(map[orl_count].name), syms[src_count]->name);
@@ -2426,7 +2432,7 @@
bfd_ardata (arch)->armap_datepos = (SARMAG
+ offsetof (struct ar_hdr, ar_date[0]));
_bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld",
- bfd_ardata (arch)->armap_timestamp);
+ bfd_ardata (arch)->armap_timestamp);
_bfd_ar_spacepad (hdr.ar_uid, sizeof (hdr.ar_uid), "%ld", uid);
_bfd_ar_spacepad (hdr.ar_gid, sizeof (hdr.ar_gid), "%ld", gid);
if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize))
@@ -2447,10 +2453,10 @@
{
do
{
- struct areltdata *ared = arch_eltdata (current);
+ struct areltdata *ared = arch_eltdata (current);
firstreal += (ared->parsed_size + ared->extra_size
- + sizeof (struct ar_hdr));
+ + sizeof (struct ar_hdr));
firstreal += firstreal % 2;
current = current->archive_next;
}
@@ -2524,7 +2530,7 @@
/* Prepare an ASCII version suitable for writing. */
memset (hdr.ar_date, ' ', sizeof (hdr.ar_date));
_bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld",
- bfd_ardata (arch)->armap_timestamp);
+ bfd_ardata (arch)->armap_timestamp);
/* Write it into the file. */
bfd_ardata (arch)->armap_datepos = (SARMAG
@@ -2588,8 +2594,8 @@
if (!_bfd_ar_sizepad (hdr.ar_size, sizeof (hdr.ar_size), mapsize))
return FALSE;
_bfd_ar_spacepad (hdr.ar_date, sizeof (hdr.ar_date), "%ld",
- ((arch->flags & BFD_DETERMINISTIC_OUTPUT) == 0
- ? time (NULL) : 0));
+ ((arch->flags & BFD_DETERMINISTIC_OUTPUT) == 0
+ ? time (NULL) : 0));
/* This, at least, is what Intel coff sets the values to. */
_bfd_ar_spacepad (hdr.ar_uid, sizeof (hdr.ar_uid), "%ld", 0);
_bfd_ar_spacepad (hdr.ar_gid, sizeof (hdr.ar_gid), "%ld", 0);
@@ -2625,12 +2631,12 @@
}
archive_member_file_ptr += sizeof (struct ar_hdr);
if (! bfd_is_thin_archive (arch))
- {
- /* Add size of this archive entry. */
- archive_member_file_ptr += arelt_size (current);
- /* Remember about the even alignment. */
- archive_member_file_ptr += archive_member_file_ptr % 2;
- }
+ {
+ /* Add size of this archive entry. */
+ archive_member_file_ptr += arelt_size (current);
+ /* Remember about the even alignment. */
+ archive_member_file_ptr += archive_member_file_ptr % 2;
+ }
current = current->archive_next;
}
diff --git a/bfd/archures.c b/bfd/archures.c
index b64e110..a23534b 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -244,6 +244,7 @@
.#define bfd_mach_ppc_e5500 5006
.#define bfd_mach_ppc_e6500 5007
.#define bfd_mach_ppc_titan 83
+.#define bfd_mach_ppc_vle 84
. bfd_arch_rs6000, {* IBM RS/6000 *}
.#define bfd_mach_rs6k 6000
.#define bfd_mach_rs6k_rs1 6001
@@ -265,6 +266,8 @@
.#define bfd_mach_m6812_default 0
.#define bfd_mach_m6812 1
.#define bfd_mach_m6812s 2
+. bfd_arch_m9s12x, {* Freescale S12X *}
+. bfd_arch_m9s12xg, {* Freescale XGATE *}
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1
.#define bfd_mach_z8002 2
@@ -534,6 +537,8 @@
extern const bfd_arch_info_type bfd_m32r_arch;
extern const bfd_arch_info_type bfd_m68hc11_arch;
extern const bfd_arch_info_type bfd_m68hc12_arch;
+extern const bfd_arch_info_type bfd_m9s12x_arch;
+extern const bfd_arch_info_type bfd_m9s12xg_arch;
extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
extern const bfd_arch_info_type bfd_mcore_arch;
@@ -617,6 +622,8 @@
&bfd_m32r_arch,
&bfd_m68hc11_arch,
&bfd_m68hc12_arch,
+ &bfd_m9s12x_arch,
+ &bfd_m9s12xg_arch,
&bfd_m68k_arch,
&bfd_m88k_arch,
&bfd_mcore_arch,
diff --git a/bfd/bfd-in.h b/bfd/bfd-in.h
index bff5f34..9617428 100644
--- a/bfd/bfd-in.h
+++ b/bfd/bfd-in.h
@@ -25,6 +25,11 @@
#ifndef __BFD_H_SEEN__
#define __BFD_H_SEEN__
+/* PR 14072: Ensure that config.h is included first. */
+#if !defined PACKAGE && !defined PACKAGE_VERSION
+#error config.h must be included before this header
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -273,18 +278,19 @@
typedef struct bfd_section *sec_ptr;
-#define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0)
-#define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0)
-#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0)
-#define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0)
+#define bfd_get_section_name(bfd, ptr) ((void) bfd, (ptr)->name)
+#define bfd_get_section_vma(bfd, ptr) ((void) bfd, (ptr)->vma)
+#define bfd_get_section_lma(bfd, ptr) ((void) bfd, (ptr)->lma)
+#define bfd_get_section_alignment(bfd, ptr) ((void) bfd, \
+ (ptr)->alignment_power)
#define bfd_section_name(bfd, ptr) ((ptr)->name)
#define bfd_section_size(bfd, ptr) ((ptr)->size)
#define bfd_get_section_size(ptr) ((ptr)->size)
#define bfd_section_vma(bfd, ptr) ((ptr)->vma)
#define bfd_section_lma(bfd, ptr) ((ptr)->lma)
#define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power)
-#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0)
-#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata)
+#define bfd_get_section_flags(bfd, ptr) ((void) bfd, (ptr)->flags)
+#define bfd_get_section_userdata(bfd, ptr) ((void) bfd, (ptr)->userdata)
#define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0)
@@ -692,7 +698,7 @@
the remote memory. */
extern bfd *bfd_elf_bfd_from_remote_memory
(bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len));
+ int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, size_t len));
extern struct bfd_section *_bfd_elf_tls_setup
(bfd *, struct bfd_link_info *);
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index fe2d74e..3429d96 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -32,6 +32,11 @@
#ifndef __BFD_H_SEEN__
#define __BFD_H_SEEN__
+/* PR 14072: Ensure that config.h is included first. */
+#if !defined PACKAGE && !defined PACKAGE_VERSION
+#error config.h must be included before this header
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -280,18 +285,19 @@
typedef struct bfd_section *sec_ptr;
-#define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0)
-#define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0)
-#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0)
-#define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0)
+#define bfd_get_section_name(bfd, ptr) ((void) bfd, (ptr)->name)
+#define bfd_get_section_vma(bfd, ptr) ((void) bfd, (ptr)->vma)
+#define bfd_get_section_lma(bfd, ptr) ((void) bfd, (ptr)->lma)
+#define bfd_get_section_alignment(bfd, ptr) ((void) bfd, \
+ (ptr)->alignment_power)
#define bfd_section_name(bfd, ptr) ((ptr)->name)
#define bfd_section_size(bfd, ptr) ((ptr)->size)
#define bfd_get_section_size(ptr) ((ptr)->size)
#define bfd_section_vma(bfd, ptr) ((ptr)->vma)
#define bfd_section_lma(bfd, ptr) ((ptr)->lma)
#define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power)
-#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0)
-#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata)
+#define bfd_get_section_flags(bfd, ptr) ((void) bfd, (ptr)->flags)
+#define bfd_get_section_userdata(bfd, ptr) ((void) bfd, (ptr)->userdata)
#define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0)
@@ -699,7 +705,7 @@
the remote memory. */
extern bfd *bfd_elf_bfd_from_remote_memory
(bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len));
+ int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, size_t len));
extern struct bfd_section *_bfd_elf_tls_setup
(bfd *, struct bfd_link_info *);
@@ -1515,9 +1521,6 @@
/* The BFD which owns the section. */
bfd *owner;
- /* INPUT_SECTION_FLAGS if specified in the linker script. */
- struct flag_info *section_flag_info;
-
/* A symbol which points at this section only. */
struct bfd_symbol *symbol;
struct bfd_symbol **symbol_ptr_ptr;
@@ -1696,9 +1699,6 @@
/* target_index, used_by_bfd, constructor_chain, owner, */ \
0, NULL, NULL, NULL, \
\
- /* flag_info, */ \
- NULL, \
- \
/* symbol, symbol_ptr_ptr, */ \
(struct bfd_symbol *) SYM, &SEC.symbol, \
\
@@ -1710,6 +1710,8 @@
asection *bfd_get_section_by_name (bfd *abfd, const char *name);
+asection *bfd_get_next_section_by_name (asection *sec);
+
asection *bfd_get_section_by_name_if
(bfd *abfd,
const char *name,
@@ -1948,6 +1950,7 @@
#define bfd_mach_ppc_e5500 5006
#define bfd_mach_ppc_e6500 5007
#define bfd_mach_ppc_titan 83
+#define bfd_mach_ppc_vle 84
bfd_arch_rs6000, /* IBM RS/6000 */
#define bfd_mach_rs6k 6000
#define bfd_mach_rs6k_rs1 6001
@@ -1969,6 +1972,8 @@
#define bfd_mach_m6812_default 0
#define bfd_mach_m6812 1
#define bfd_mach_m6812s 2
+ bfd_arch_m9s12x, /* Freescale S12X */
+ bfd_arch_m9s12xg, /* Freescale XGATE */
bfd_arch_z8k, /* Zilog Z8000 */
#define bfd_mach_z8001 1
#define bfd_mach_z8002 2
@@ -3101,6 +3106,23 @@
BFD_RELOC_PPC_EMB_RELST_HA,
BFD_RELOC_PPC_EMB_BIT_FLD,
BFD_RELOC_PPC_EMB_RELSDA,
+ BFD_RELOC_PPC_VLE_REL8,
+ BFD_RELOC_PPC_VLE_REL15,
+ BFD_RELOC_PPC_VLE_REL24,
+ BFD_RELOC_PPC_VLE_LO16A,
+ BFD_RELOC_PPC_VLE_LO16D,
+ BFD_RELOC_PPC_VLE_HI16A,
+ BFD_RELOC_PPC_VLE_HI16D,
+ BFD_RELOC_PPC_VLE_HA16A,
+ BFD_RELOC_PPC_VLE_HA16D,
+ BFD_RELOC_PPC_VLE_SDA21,
+ BFD_RELOC_PPC_VLE_SDA21_LO,
+ BFD_RELOC_PPC_VLE_SDAREL_LO16A,
+ BFD_RELOC_PPC_VLE_SDAREL_LO16D,
+ BFD_RELOC_PPC_VLE_SDAREL_HI16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HI16D,
+ BFD_RELOC_PPC_VLE_SDAREL_HA16A,
+ BFD_RELOC_PPC_VLE_SDAREL_HA16D,
BFD_RELOC_PPC64_HIGHER,
BFD_RELOC_PPC64_HIGHER_S,
BFD_RELOC_PPC64_HIGHEST,
@@ -4094,6 +4116,18 @@
instructions */
BFD_RELOC_AVR_6_ADIW,
+/* This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
+in .byte lo8(symbol) */
+ BFD_RELOC_AVR_8_LO,
+
+/* This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
+in .byte hi8(symbol) */
+ BFD_RELOC_AVR_8_HI,
+
+/* This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
+in .byte hlo8(symbol) */
+ BFD_RELOC_AVR_8_HLO,
+
/* Renesas RL78 Relocations. */
BFD_RELOC_RL78_NEG8,
BFD_RELOC_RL78_NEG16,
@@ -4528,6 +4562,32 @@
This is a 5-bit pc-relative reloc. */
BFD_RELOC_XGATE_IMM5,
+/* Motorola 68HC12 reloc.
+This is the 9 bits of a value. */
+ BFD_RELOC_M68HC12_9B,
+
+/* Motorola 68HC12 reloc.
+This is the 16 bits of a value. */
+ BFD_RELOC_M68HC12_16B,
+
+/* Motorola 68HC12/XGATE reloc.
+This is a PCREL9 branch. */
+ BFD_RELOC_M68HC12_9_PCREL,
+
+/* Motorola 68HC12/XGATE reloc.
+This is a PCREL10 branch. */
+ BFD_RELOC_M68HC12_10_PCREL,
+
+/* Motorola 68HC12/XGATE reloc.
+This is the 8 bit low part of an absolute address and immediately precedes
+a matching HI8XG part. */
+ BFD_RELOC_M68HC12_LO8XG,
+
+/* Motorola 68HC12/XGATE reloc.
+This is the 8 bit high part of an absolute address and immediately follows
+a matching LO8XG part. */
+ BFD_RELOC_M68HC12_HI8XG,
+
/* NS CR16C Relocations. */
BFD_RELOC_16C_NUM08,
BFD_RELOC_16C_NUM08_C,
@@ -5796,8 +5856,8 @@
#define bfd_gc_sections(abfd, link_info) \
BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
-#define bfd_lookup_section_flags(link_info, flag_info) \
- BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info))
+#define bfd_lookup_section_flags(link_info, flag_info, section) \
+ BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section))
#define bfd_merge_sections(abfd, link_info) \
BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
@@ -6275,8 +6335,9 @@
bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
/* Sets the bitmask of allowed and disallowed section flags. */
- void (*_bfd_lookup_section_flags) (struct bfd_link_info *,
- struct flag_info *);
+ bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *,
+ struct flag_info *,
+ asection *);
/* Attempt to merge SEC_MERGE sections. */
bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
diff --git a/bfd/bfd.c b/bfd/bfd.c
index 8ec3d6e..9cdac38 100644
--- a/bfd/bfd.c
+++ b/bfd/bfd.c
@@ -1470,8 +1470,8 @@
.#define bfd_gc_sections(abfd, link_info) \
. BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
.
-.#define bfd_lookup_section_flags(link_info, flag_info) \
-. BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info))
+.#define bfd_lookup_section_flags(link_info, flag_info, section) \
+. BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section))
.
.#define bfd_merge_sections(abfd, link_info) \
. BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
diff --git a/bfd/coff-stgo32.c b/bfd/coff-stgo32.c
index c10194e..125b0d9 100644
--- a/bfd/coff-stgo32.c
+++ b/bfd/coff-stgo32.c
@@ -1,6 +1,6 @@
/* BFD back-end for Intel 386 COFF files (DJGPP variant with a stub).
Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2005, 2006, 2007, 2009,
- 2011 Free Software Foundation, Inc.
+ 2011, 2012 Free Software Foundation, Inc.
Written by Robert Hoehne.
This file is part of BFD, the Binary File Descriptor library.
@@ -54,6 +54,7 @@
{ COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.wi"), \
COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }
+#include "sysdep.h"
#include "bfd.h"
/* At first the prototypes. */
diff --git a/bfd/compress.c b/bfd/compress.c
index a82a8bc..52c884c 100644
--- a/bfd/compress.c
+++ b/bfd/compress.c
@@ -1,5 +1,5 @@
/* Compressed section support (intended for debug sections).
- Copyright 2008, 2010, 2011
+ Copyright 2008, 2010, 2011, 2012
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -19,7 +19,6 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "config.h"
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 3f758c0..783d1f3 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -85,8 +85,8 @@
i[3-7]86) targ_archs=bfd_i386_arch ;;
i370) targ_archs=bfd_i370_arch ;;
lm32) targ_archs=bfd_lm32_arch ;;
-m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch" ;;
-m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch" ;;
+m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
+m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
microblaze*) targ_archs=bfd_microblaze_arch ;;
diff --git a/bfd/config.in b/bfd/config.in
index cb53b14..20b619d 100644
--- a/bfd/config.in
+++ b/bfd/config.in
@@ -1,5 +1,12 @@
/* config.in. Generated from configure.in by autoheader. */
+/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1
+
/* Name of host specific core header file to include in elf.c. */
#undef CORE_HEADER
diff --git a/bfd/configure b/bfd/configure
index aa51679..780c859 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -3988,7 +3988,7 @@
# Define the identity of the package.
PACKAGE=bfd
- VERSION=2.22.52.0.3
+ VERSION=2.22.52.0.4
cat >>confdefs.h <<_ACEOF
@@ -12217,6 +12217,9 @@
ac_config_headers="$ac_config_headers config.h:config.in"
+# PR 14072
+
+
if test -z "$target" ; then
as_fn_error "Unrecognized target system type; please check config.sub." "$LINENO" 5
fi
diff --git a/bfd/configure.in b/bfd/configure.in
index 1f31f39..fbdb87d 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -8,7 +8,7 @@
AC_CANONICAL_TARGET
AC_ISC_POSIX
-AM_INIT_AUTOMAKE(bfd, 2.22.52.0.3)
+AM_INIT_AUTOMAKE(bfd, 2.22.52.0.4)
dnl These must be called before LT_INIT, because it may want
dnl to call AC_CHECK_PROG.
@@ -117,6 +117,15 @@
AC_CONFIG_HEADERS(config.h:config.in)
+# PR 14072
+AH_VERBATIM([00_CONFIG_H_CHECK],
+[/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1])
+
if test -z "$target" ; then
AC_MSG_ERROR(Unrecognized target system type; please check config.sub.)
fi
diff --git a/bfd/cpu-lm32.c b/bfd/cpu-lm32.c
index 5ddce04..5222a91 100644
--- a/bfd/cpu-lm32.c
+++ b/bfd/cpu-lm32.c
@@ -1,5 +1,5 @@
/* BFD support for the Lattice Mico32 architecture.
- Copyright 2008 Free Software Foundation, Inc.
+ Copyright 2008, 2012 Free Software Foundation, Inc.
Contributed by Jon Beniston <jon@beniston.com>
This file is part of BFD, the Binary File Descriptor library.
@@ -19,8 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_lm32_arch =
diff --git a/bfd/cpu-m9s12x.c b/bfd/cpu-m9s12x.c
new file mode 100644
index 0000000..d224b83
--- /dev/null
+++ b/bfd/cpu-m9s12x.c
@@ -0,0 +1,41 @@
+/* BFD support for the Freescale 9S12X processor
+ Copyright 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_m9s12x_arch =
+{
+ 16, /* 16 bits in a word. */
+ 32, /* 16 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_m9s12x,
+ 0,
+ "m9s12x",
+ "m9s12x",
+ 4, /* Section alignment power. */
+ TRUE,
+ bfd_default_compatible,
+ bfd_default_scan,
+ bfd_arch_default_fill,
+ 0,
+};
+
diff --git a/bfd/cpu-m9s12xg.c b/bfd/cpu-m9s12xg.c
new file mode 100644
index 0000000..6958a13
--- /dev/null
+++ b/bfd/cpu-m9s12xg.c
@@ -0,0 +1,41 @@
+/* BFD support for the Freescale 9S12-XGATE co-processor
+ Copyright 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_m9s12xg_arch =
+{
+ 16, /* 16 bits in a word. */
+ 32, /* 16 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_m9s12xg,
+ 0,
+ "m9s12xg",
+ "m9s12xg",
+ 4, /* Section alignment power. */
+ TRUE,
+ bfd_default_compatible,
+ bfd_default_scan,
+ bfd_arch_default_fill,
+ 0,
+};
+
diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
index c59fa45..2cf6bc6 100644
--- a/bfd/cpu-microblaze.c
+++ b/bfd/cpu-microblaze.c
@@ -1,6 +1,6 @@
/* BFD Xilinx MicroBlaze architecture definition
- Copyright 2009 Free Software Foundation, Inc.
+ Copyright 2009, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -19,8 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_microblaze_arch =
diff --git a/bfd/cpu-powerpc.c b/bfd/cpu-powerpc.c
index 19604c3..5401235 100644
--- a/bfd/cpu-powerpc.c
+++ b/bfd/cpu-powerpc.c
@@ -376,6 +376,21 @@
&bfd_powerpc_archs[19]
},
{
+ 16, /* 16 or 32 bits in a word */
+ 32, /* 32 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_powerpc,
+ bfd_mach_ppc_vle,
+ "powerpc",
+ "powerpc:vle",
+ 3,
+ FALSE, /* not the default */
+ powerpc_compatible,
+ bfd_default_scan,
+ bfd_arch_default_fill,
+ &bfd_powerpc_archs[20]
+ },
+ {
64, /* 64 bits in a word */
64, /* 64 bits in an address */
8, /* 8 bits in a byte */
@@ -388,7 +403,7 @@
powerpc_compatible,
bfd_default_scan,
bfd_arch_default_fill,
- &bfd_powerpc_archs[20]
+ &bfd_powerpc_archs[21]
},
{
64, /* 64 bits in a word */
diff --git a/bfd/cpu-score.c b/bfd/cpu-score.c
index 7a8d7b4..329c97c 100644
--- a/bfd/cpu-score.c
+++ b/bfd/cpu-score.c
@@ -1,5 +1,5 @@
/* BFD support for the score processor
- Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ Copyright 2006, 2007, 2008, 2009, 2012 Free Software Foundation, Inc.
Contributed by
Brain.lin (brain.lin@sunplusct.com)
Mei Ligang (ligang@sunnorth.com.cn)
@@ -22,8 +22,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
/* This routine is provided two arch_infos and works out which Score
diff --git a/bfd/cpu-tilegx.c b/bfd/cpu-tilegx.c
index f98cb0c..11234ec 100644
--- a/bfd/cpu-tilegx.c
+++ b/bfd/cpu-tilegx.c
@@ -1,5 +1,5 @@
/* BFD support for the TILE-Gx processor.
- Copyright 2011 Free Software Foundation, Inc.
+ Copyright 2011, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -18,8 +18,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_tilegx32_arch =
diff --git a/bfd/cpu-tilepro.c b/bfd/cpu-tilepro.c
index 33bfab0..4066fc1 100644
--- a/bfd/cpu-tilepro.c
+++ b/bfd/cpu-tilepro.c
@@ -1,5 +1,5 @@
/* BFD support for the TILEPro processor.
- Copyright 2011 Free Software Foundation, Inc.
+ Copyright 2011, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -18,8 +18,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_tilepro_arch =
diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c
index f7d5d4a..d31b849 100644
--- a/bfd/dwarf2.c
+++ b/bfd/dwarf2.c
@@ -405,8 +405,8 @@
{
struct info_hash_table *hash_table;
- hash_table = (struct info_hash_table *)
- bfd_alloc (abfd, sizeof (struct info_hash_table));
+ hash_table = ((struct info_hash_table *)
+ bfd_alloc (abfd, sizeof (struct info_hash_table)));
if (!hash_table)
return hash_table;
@@ -503,7 +503,7 @@
if (syms)
{
*section_buffer
- = bfd_simple_get_relocated_section_contents (abfd, msec, NULL, syms);
+ = bfd_simple_get_relocated_section_contents (abfd, msec, NULL, syms);
if (! *section_buffer)
return FALSE;
}
@@ -522,7 +522,8 @@
that the client wants. Validate it here to avoid trouble later. */
if (offset != 0 && offset >= *section_size)
{
- (*_bfd_error_handler) (_("Dwarf Error: Offset (%lu) greater than or equal to %s size (%lu)."),
+ (*_bfd_error_handler) (_("Dwarf Error: Offset (%lu)"
+ " greater than or equal to %s size (%lu)."),
(long) offset, section_name, *section_size);
bfd_set_error (bfd_error_bad_value);
return FALSE;
@@ -1014,20 +1015,27 @@
/* Remember some information about each function. If the function is
inlined (DW_TAG_inlined_subroutine) it may have two additional
attributes, DW_AT_call_file and DW_AT_call_line, which specify the
- source code location where this function was inlined. */
+ source code location where this function was inlined. */
struct funcinfo
{
- struct funcinfo *prev_func; /* Pointer to previous function in list of all functions */
- struct funcinfo *caller_func; /* Pointer to function one scope higher */
- char *caller_file; /* Source location file name where caller_func inlines this func */
- int caller_line; /* Source location line number where caller_func inlines this func */
- char *file; /* Source location file name */
- int line; /* Source location line number */
+ /* Pointer to previous function in list of all functions. */
+ struct funcinfo *prev_func;
+ /* Pointer to function one scope higher. */
+ struct funcinfo *caller_func;
+ /* Source location file name where caller_func inlines this func. */
+ char *caller_file;
+ /* Source location line number where caller_func inlines this func. */
+ int caller_line;
+ /* Source location file name. */
+ char *file;
+ /* Source location line number. */
+ int line;
int tag;
char *name;
struct arange arange;
- asection *sec; /* Where the symbol is defined */
+ /* Where the symbol is defined. */
+ asection *sec;
};
struct varinfo
@@ -1248,12 +1256,16 @@
}
static bfd_boolean
-arange_add (bfd *abfd, struct arange *first_arange,
+arange_add (const struct comp_unit *unit, struct arange *first_arange,
bfd_vma low_pc, bfd_vma high_pc)
{
struct arange *arange;
- /* If the first arange is empty, use it. */
+ /* Ignore empty ranges. */
+ if (low_pc == high_pc)
+ return TRUE;
+
+ /* If the first arange is empty, use it. */
if (first_arange->high == 0)
{
first_arange->low = low_pc;
@@ -1281,7 +1293,7 @@
/* Need to allocate a new arange and insert it into the arange list.
Order isn't significant, so just insert after the first arange. */
- arange = (struct arange *) bfd_zalloc (abfd, sizeof (*arange));
+ arange = (struct arange *) bfd_alloc (unit->abfd, sizeof (*arange));
if (arange == NULL)
return FALSE;
arange->low = low_pc;
@@ -1582,15 +1594,15 @@
/* Special operand. */
adj_opcode = op_code - lh.opcode_base;
if (lh.maximum_ops_per_insn == 1)
- address += (adj_opcode / lh.line_range)
- * lh.minimum_instruction_length;
+ address += (adj_opcode / lh.line_range
+ * lh.minimum_instruction_length);
else
{
- address += ((op_index + (adj_opcode / lh.line_range))
- / lh.maximum_ops_per_insn)
- * lh.minimum_instruction_length;
- op_index = (op_index + (adj_opcode / lh.line_range))
- % lh.maximum_ops_per_insn;
+ address += ((op_index + adj_opcode / lh.line_range)
+ / lh.maximum_ops_per_insn
+ * lh.minimum_instruction_length);
+ op_index = ((op_index + adj_opcode / lh.line_range)
+ % lh.maximum_ops_per_insn);
}
line += lh.line_base + (adj_opcode % lh.line_range);
/* Append row to matrix using current values. */
@@ -1605,7 +1617,7 @@
else switch (op_code)
{
case DW_LNS_extended_op:
- exop_len = read_unsigned_leb128 (abfd, line_ptr, &bytes_read);
+ exop_len = read_unsigned_leb128 (abfd, line_ptr, &bytes_read);
line_ptr += bytes_read;
extended_op = read_1_byte (abfd, line_ptr);
line_ptr += 1;
@@ -1621,7 +1633,7 @@
low_pc = address;
if (address > high_pc)
high_pc = address;
- if (!arange_add (unit->abfd, &unit->arange, low_pc, high_pc))
+ if (!arange_add (unit, &unit->arange, low_pc, high_pc))
goto line_fail;
break;
case DW_LNE_set_address:
@@ -1659,11 +1671,12 @@
(void) read_unsigned_leb128 (abfd, line_ptr, &bytes_read);
line_ptr += bytes_read;
break;
- case DW_LNE_HP_source_file_correlation:
- line_ptr += exop_len - 1;
- break;
+ case DW_LNE_HP_source_file_correlation:
+ line_ptr += exop_len - 1;
+ break;
default:
- (*_bfd_error_handler) (_("Dwarf Error: mangled line number section."));
+ (*_bfd_error_handler)
+ (_("Dwarf Error: mangled line number section."));
bfd_set_error (bfd_error_bad_value);
line_fail:
if (filename != NULL)
@@ -1682,15 +1695,15 @@
break;
case DW_LNS_advance_pc:
if (lh.maximum_ops_per_insn == 1)
- address += lh.minimum_instruction_length
- * read_unsigned_leb128 (abfd, line_ptr,
- &bytes_read);
+ address += (lh.minimum_instruction_length
+ * read_unsigned_leb128 (abfd, line_ptr,
+ &bytes_read));
else
{
bfd_vma adjust = read_unsigned_leb128 (abfd, line_ptr,
&bytes_read);
- address = ((op_index + adjust) / lh.maximum_ops_per_insn)
- * lh.minimum_instruction_length;
+ address = ((op_index + adjust) / lh.maximum_ops_per_insn
+ * lh.minimum_instruction_length);
op_index = (op_index + adjust) % lh.maximum_ops_per_insn;
}
line_ptr += bytes_read;
@@ -1723,13 +1736,14 @@
break;
case DW_LNS_const_add_pc:
if (lh.maximum_ops_per_insn == 1)
- address += lh.minimum_instruction_length
- * ((255 - lh.opcode_base) / lh.line_range);
+ address += (lh.minimum_instruction_length
+ * ((255 - lh.opcode_base) / lh.line_range));
else
{
bfd_vma adjust = ((255 - lh.opcode_base) / lh.line_range);
- address += lh.minimum_instruction_length
- * ((op_index + adjust) / lh.maximum_ops_per_insn);
+ address += (lh.minimum_instruction_length
+ * ((op_index + adjust)
+ / lh.maximum_ops_per_insn));
op_index = (op_index + adjust) % lh.maximum_ops_per_insn;
}
break;
@@ -1855,8 +1869,9 @@
{
if (addr >= arange->low && addr < arange->high)
{
- if (!best_fit ||
- ((arange->high - arange->low) < (best_fit->arange.high - best_fit->arange.low)))
+ if (!best_fit
+ || (arange->high - arange->low
+ < best_fit->arange.high - best_fit->arange.low))
best_fit = each_func;
}
}
@@ -1904,8 +1919,8 @@
&& each_func->name
&& strcmp (name, each_func->name) == 0
&& (!best_fit
- || ((arange->high - arange->low)
- < (best_fit->arange.high - best_fit->arange.low))))
+ || (arange->high - arange->low
+ < best_fit->arange.high - best_fit->arange.low)))
best_fit = each_func;
}
}
@@ -1990,8 +2005,8 @@
abbrev = lookup_abbrev (abbrev_number, unit->abbrevs);
if (! abbrev)
{
- (*_bfd_error_handler) (_("Dwarf Error: Could not find abbrev number %u."),
- abbrev_number);
+ (*_bfd_error_handler)
+ (_("Dwarf Error: Could not find abbrev number %u."), abbrev_number);
bfd_set_error (bfd_error_bad_value);
}
else
@@ -2056,7 +2071,7 @@
base_address = high_pc;
else
{
- if (!arange_add (unit->abfd, arange,
+ if (!arange_add (unit, arange,
base_address + low_pc, base_address + high_pc))
return FALSE;
}
@@ -2082,7 +2097,7 @@
can use to set the caller_func field. */
nested_funcs_size = 32;
nested_funcs = (struct funcinfo **)
- bfd_malloc (nested_funcs_size * sizeof (struct funcinfo *));
+ bfd_malloc (nested_funcs_size * sizeof (struct funcinfo *));
if (nested_funcs == NULL)
return FALSE;
nested_funcs[nesting_level] = 0;
@@ -2286,7 +2301,7 @@
if (func && high_pc != 0)
{
- if (!arange_add (unit->abfd, &func->arange, low_pc, high_pc))
+ if (!arange_add (unit, &func->arange, low_pc, high_pc))
goto fail;
}
@@ -2300,8 +2315,8 @@
nested_funcs_size *= 2;
tmp = (struct funcinfo **)
- bfd_realloc (nested_funcs,
- (nested_funcs_size * sizeof (struct funcinfo *)));
+ bfd_realloc (nested_funcs,
+ nested_funcs_size * sizeof (struct funcinfo *));
if (tmp == NULL)
goto fail;
nested_funcs = tmp;
@@ -2362,23 +2377,29 @@
if (version != 2 && version != 3 && version != 4)
{
- (*_bfd_error_handler) (_("Dwarf Error: found dwarf version '%u', this reader only handles version 2, 3 and 4 information."), version);
+ (*_bfd_error_handler)
+ (_("Dwarf Error: found dwarf version '%u', this reader"
+ " only handles version 2, 3 and 4 information."), version);
bfd_set_error (bfd_error_bad_value);
return 0;
}
if (addr_size > sizeof (bfd_vma))
{
- (*_bfd_error_handler) (_("Dwarf Error: found address size '%u', this reader can not handle sizes greater than '%u'."),
- addr_size,
- (unsigned int) sizeof (bfd_vma));
+ (*_bfd_error_handler)
+ (_("Dwarf Error: found address size '%u', this reader"
+ " can not handle sizes greater than '%u'."),
+ addr_size,
+ (unsigned int) sizeof (bfd_vma));
bfd_set_error (bfd_error_bad_value);
return 0;
}
if (addr_size != 2 && addr_size != 4 && addr_size != 8)
{
- (*_bfd_error_handler) ("Dwarf Error: found address size '%u', this reader can only handle address sizes '2', '4' and '8'.", addr_size);
+ (*_bfd_error_handler)
+ ("Dwarf Error: found address size '%u', this reader"
+ " can only handle address sizes '2', '4' and '8'.", addr_size);
bfd_set_error (bfd_error_bad_value);
return 0;
}
@@ -2386,14 +2407,14 @@
/* Read the abbrevs for this compilation unit into a table. */
abbrevs = read_abbrevs (abfd, abbrev_offset, stash);
if (! abbrevs)
- return 0;
+ return 0;
abbrev_number = read_unsigned_leb128 (abfd, info_ptr, &bytes_read);
info_ptr += bytes_read;
if (! abbrev_number)
{
(*_bfd_error_handler) (_("Dwarf Error: Bad abbrev number: %u."),
- abbrev_number);
+ abbrev_number);
bfd_set_error (bfd_error_bad_value);
return 0;
}
@@ -2402,7 +2423,7 @@
if (! abbrev)
{
(*_bfd_error_handler) (_("Dwarf Error: Could not find abbrev number %u."),
- abbrev_number);
+ abbrev_number);
bfd_set_error (bfd_error_bad_value);
return 0;
}
@@ -2445,7 +2466,8 @@
/* If the compilation unit DIE has a DW_AT_low_pc attribute,
this is the base address to use when reading location
lists or range lists. */
- unit->base_address = low_pc;
+ if (abbrev->tag == DW_TAG_compile_unit)
+ unit->base_address = low_pc;
break;
case DW_AT_high_pc:
@@ -2482,7 +2504,7 @@
high_pc += low_pc;
if (high_pc != 0)
{
- if (!arange_add (unit->abfd, &unit->arange, low_pc, high_pc))
+ if (!arange_add (unit, &unit->arange, low_pc, high_pc))
return NULL;
}
@@ -2752,25 +2774,43 @@
find_debug_info (bfd *abfd, const struct dwarf_debug_section *debug_sections,
asection *after_sec)
{
- asection * msec;
+ asection *msec;
+ const char *look;
- msec = after_sec != NULL ? after_sec->next : abfd->sections;
-
- while (msec)
+ if (after_sec == NULL)
{
- if (strcmp (msec->name,
- debug_sections[debug_info].uncompressed_name) == 0)
+ look = debug_sections[debug_info].uncompressed_name;
+ msec = bfd_get_section_by_name (abfd, look);
+ if (msec != NULL)
return msec;
- if (debug_sections[debug_info].compressed_name != NULL
- && strcmp (msec->name,
- debug_sections[debug_info].compressed_name) == 0)
+ look = debug_sections[debug_info].compressed_name;
+ if (look != NULL)
+ {
+ msec = bfd_get_section_by_name (abfd, look);
+ if (msec != NULL)
+ return msec;
+ }
+
+ for (msec = abfd->sections; msec != NULL; msec = msec->next)
+ if (CONST_STRNEQ (msec->name, GNU_LINKONCE_INFO))
+ return msec;
+
+ return NULL;
+ }
+
+ for (msec = after_sec->next; msec != NULL; msec = msec->next)
+ {
+ look = debug_sections[debug_info].uncompressed_name;
+ if (strcmp (msec->name, look) == 0)
+ return msec;
+
+ look = debug_sections[debug_info].compressed_name;
+ if (look != NULL && strcmp (msec->name, look) == 0)
return msec;
if (CONST_STRNEQ (msec->name, GNU_LINKONCE_INFO))
return msec;
-
- msec = msec->next;
}
return NULL;
@@ -2844,7 +2884,7 @@
}
amt = i * sizeof (struct adjusted_section);
- p = (struct adjusted_section *) bfd_zalloc (abfd, amt);
+ p = (struct adjusted_section *) bfd_alloc (abfd, amt);
if (! p)
return FALSE;
@@ -2938,8 +2978,8 @@
&& addr >= arange->low
&& addr < arange->high
&& (!best_fit
- || ((arange->high - arange->low)
- < (best_fit->arange.high - best_fit->arange.low))))
+ || (arange->high - arange->low
+ < best_fit->arange.high - best_fit->arange.low)))
best_fit = each_func;
}
}
@@ -3359,6 +3399,7 @@
/* Check the previously read comp. units first. */
for (each = stash->all_comp_units; each; each = each->next_unit)
if ((symbol->flags & BSF_FUNCTION) == 0
+ || each->arange.high == 0
|| comp_unit_contains_address (each, addr))
{
found = comp_unit_find_line (each, symbol, addr, filename_ptr,
@@ -3372,7 +3413,8 @@
{
for (each = stash->all_comp_units; each; each = each->next_unit)
{
- found = (comp_unit_contains_address (each, addr)
+ found = ((each->arange.high == 0
+ || comp_unit_contains_address (each, addr))
&& comp_unit_find_nearest_line (each, addr,
filename_ptr,
functionname_ptr,
@@ -3485,7 +3527,7 @@
}
}
-done:
+ done:
if ((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
unset_sections (stash);
diff --git a/bfd/ecoff.c b/bfd/ecoff.c
index b76266d..efcb9bf 100644
--- a/bfd/ecoff.c
+++ b/bfd/ecoff.c
@@ -73,8 +73,6 @@
0, NULL, 0,
/* target_index, used_by_bfd, constructor_chain, owner, */
0, NULL, NULL, NULL,
- /* flag_info, */
- NULL,
/* symbol, */
NULL,
/* symbol_ptr_ptr, */
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index ce01796..dee0e83 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -1186,7 +1186,7 @@
see elf.c, elfcode.h. */
bfd *(*elf_backend_bfd_from_remote_memory)
(bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len));
+ int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, size_t len));
/* This function is used by `_bfd_elf_get_synthetic_symtab';
see elf.c. */
@@ -1222,10 +1222,11 @@
/* Return TRUE if type is a function symbol type. */
bfd_boolean (*is_function_type) (unsigned int type);
- /* Return TRUE if symbol may be a function. Set *CODE_SEC and *CODE_VAL
- to the function's entry point. */
- bfd_boolean (*maybe_function_sym) (const asymbol *sym,
- asection **code_sec, bfd_vma *code_off);
+ /* If the ELF symbol SYM might be a function in SEC, return the
+ function size and set *CODE_OFF to the function's entry point,
+ otherwise return zero. */
+ bfd_size_type (*maybe_function_sym) (const asymbol *sym, asection *sec,
+ bfd_vma *code_off);
/* Used to handle bad SHF_LINK_ORDER input. */
bfd_error_handler_type link_order_error_handler;
@@ -1367,6 +1368,9 @@
/* The ELF header for this section. */
Elf_Internal_Shdr this_hdr;
+ /* INPUT_SECTION_FLAGS if specified in the linker script. */
+ struct flag_info *section_flag_info;
+
/* Information about the REL and RELA reloc sections associated
with this section, if any. */
struct bfd_elf_section_reloc_data rel, rela;
@@ -1947,6 +1951,8 @@
(bfd *, struct bfd_link_info *, asection *, bfd_byte *);
extern bfd_boolean _bfd_elf_write_section_eh_frame_hdr
(bfd *, struct bfd_link_info *);
+extern bfd_boolean _bfd_elf_eh_frame_present
+ (struct bfd_link_info *);
extern bfd_boolean _bfd_elf_maybe_strip_eh_frame_hdr
(struct bfd_link_info *);
@@ -2224,13 +2230,13 @@
extern bfd_boolean _bfd_elf_is_function_type (unsigned int);
-extern bfd_boolean _bfd_elf_maybe_function_sym (const asymbol *,
- asection **, bfd_vma *);
+extern bfd_size_type _bfd_elf_maybe_function_sym (const asymbol *, asection *,
+ bfd_vma *);
extern int bfd_elf_get_default_section_type (flagword);
-extern void bfd_elf_lookup_section_flags
- (struct bfd_link_info *, struct flag_info *);
+extern bfd_boolean bfd_elf_lookup_section_flags
+ (struct bfd_link_info *, struct flag_info *, asection *);
extern Elf_Internal_Phdr * _bfd_elf_find_segment_containing_section
(bfd * abfd, asection * section);
@@ -2277,10 +2283,10 @@
extern bfd *_bfd_elf32_bfd_from_remote_memory
(bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma, bfd_byte *, int));
+ int (*target_read_memory) (bfd_vma, bfd_byte *, size_t));
extern bfd *_bfd_elf64_bfd_from_remote_memory
(bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma, bfd_byte *, int));
+ int (*target_read_memory) (bfd_vma, bfd_byte *, size_t));
extern bfd_vma bfd_elf_obj_attr_size (bfd *);
extern void bfd_elf_set_obj_attr_contents (bfd *, bfd_byte *, bfd_vma);
diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
index 8ec34ab..a75d806 100644
--- a/bfd/elf-eh-frame.c
+++ b/bfd/elf-eh-frame.c
@@ -1247,6 +1247,26 @@
return TRUE;
}
+/* Return true if there is at least one non-empty .eh_frame section in
+ input files. Can only be called after ld has mapped input to
+ output sections, and before sections are stripped. */
+bfd_boolean
+_bfd_elf_eh_frame_present (struct bfd_link_info *info)
+{
+ asection *eh = bfd_get_section_by_name (info->output_bfd, ".eh_frame");
+
+ if (eh == NULL)
+ return FALSE;
+
+ /* Count only sections which have at least a single CIE or FDE.
+ There cannot be any CIE or FDE <= 8 bytes. */
+ for (eh = eh->map_head.s; eh != NULL; eh = eh->map_head.s)
+ if (eh->size > 8)
+ return TRUE;
+
+ return FALSE;
+}
+
/* This function is called from size_dynamic_sections.
It needs to decide whether .eh_frame_hdr should be output or not,
because when the dynamic symbol table has been sized it is too late
@@ -1255,8 +1275,6 @@
bfd_boolean
_bfd_elf_maybe_strip_eh_frame_hdr (struct bfd_link_info *info)
{
- asection *o;
- bfd *abfd;
struct elf_link_hash_table *htab;
struct eh_frame_hdr_info *hdr_info;
@@ -1265,24 +1283,9 @@
if (hdr_info->hdr_sec == NULL)
return TRUE;
- if (bfd_is_abs_section (hdr_info->hdr_sec->output_section))
- {
- hdr_info->hdr_sec = NULL;
- return TRUE;
- }
-
- abfd = NULL;
- if (info->eh_frame_hdr)
- for (abfd = info->input_bfds; abfd != NULL; abfd = abfd->link_next)
- {
- /* Count only sections which have at least a single CIE or FDE.
- There cannot be any CIE or FDE <= 8 bytes. */
- o = bfd_get_section_by_name (abfd, ".eh_frame");
- if (o && o->size > 8 && !bfd_is_abs_section (o->output_section))
- break;
- }
-
- if (abfd == NULL)
+ if (bfd_is_abs_section (hdr_info->hdr_sec->output_section)
+ || !info->eh_frame_hdr
+ || !_bfd_elf_eh_frame_present (info))
{
hdr_info->hdr_sec->flags |= SEC_EXCLUDE;
hdr_info->hdr_sec = NULL;
diff --git a/bfd/elf-vxworks.c b/bfd/elf-vxworks.c
index 06edf8d..61253fa 100644
--- a/bfd/elf-vxworks.c
+++ b/bfd/elf-vxworks.c
@@ -1,5 +1,5 @@
/* VxWorks support for ELF
- Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
+ Copyright 2005, 2006, 2007, 2009, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -280,7 +280,8 @@
case DT_VX_WRS_TLS_DATA_ALIGN:
sec = bfd_get_section_by_name (output_bfd, ".tls_data");
dyn->d_un.d_val
- = (bfd_size_type)1 << bfd_get_section_alignment (abfd, sec);
+ = (bfd_size_type)1 << bfd_get_section_alignment (output_bfd,
+ sec);
break;
case DT_VX_WRS_TLS_VARS_START:
diff --git a/bfd/elf.c b/bfd/elf.c
index 7a4e922..9ba3679 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -1646,7 +1646,15 @@
if (hdr->sh_entsize != bed->s->sizeof_sym)
return FALSE;
if (hdr->sh_info * hdr->sh_entsize > hdr->sh_size)
- return FALSE;
+ {
+ if (hdr->sh_size != 0)
+ return FALSE;
+ /* Some assemblers erroneously set sh_info to one with a
+ zero sh_size. ld sees this as a global symbol count
+ of (unsigned) -1. Fix it here. */
+ hdr->sh_info = 0;
+ return TRUE;
+ }
BFD_ASSERT (elf_onesymtab (abfd) == 0);
elf_onesymtab (abfd) = shindex;
elf_tdata (abfd)->symtab_hdr = *hdr;
@@ -1699,6 +1707,16 @@
if (hdr->sh_entsize != bed->s->sizeof_sym)
return FALSE;
+ if (hdr->sh_info * hdr->sh_entsize > hdr->sh_size)
+ {
+ if (hdr->sh_size != 0)
+ return FALSE;
+ /* Some linkers erroneously set sh_info to one with a
+ zero sh_size. ld sees this as a global symbol count
+ of (unsigned) -1. Fix it here. */
+ hdr->sh_info = 0;
+ return TRUE;
+ }
BFD_ASSERT (elf_dynsymtab (abfd) == 0);
elf_dynsymtab (abfd) = shindex;
elf_tdata (abfd)->dynsymtab_hdr = *hdr;
@@ -3237,9 +3255,6 @@
return TRUE;
}
-/* Map symbol from it's internal number to the external number, moving
- all local symbols to be at the head of the list. */
-
static bfd_boolean
sym_is_global (bfd *abfd, asymbol *sym)
{
@@ -3254,7 +3269,7 @@
}
/* Don't output section symbols for sections that are not going to be
- output. */
+ output, or that are duplicates. */
static bfd_boolean
ignore_section_sym (bfd *abfd, asymbol *sym)
@@ -3262,9 +3277,13 @@
return ((sym->flags & BSF_SECTION_SYM) != 0
&& !(sym->section->owner == abfd
|| (sym->section->output_section->owner == abfd
- && sym->section->output_offset == 0)));
+ && sym->section->output_offset == 0)
+ || bfd_is_abs_section (sym->section)));
}
+/* Map symbol from it's internal number to the external number, moving
+ all local symbols to be at the head of the list. */
+
static bfd_boolean
elf_map_symbols (bfd *abfd)
{
@@ -3306,7 +3325,8 @@
if ((sym->flags & BSF_SECTION_SYM) != 0
&& sym->value == 0
- && !ignore_section_sym (abfd, sym))
+ && !ignore_section_sym (abfd, sym)
+ && !bfd_is_abs_section (sym->section))
{
asection *sec = sym->section;
@@ -3320,12 +3340,10 @@
/* Classify all of the symbols. */
for (idx = 0; idx < symcount; idx++)
{
- if (ignore_section_sym (abfd, syms[idx]))
- continue;
- if (!sym_is_global (abfd, syms[idx]))
- num_locals++;
- else
+ if (sym_is_global (abfd, syms[idx]))
num_globals++;
+ else if (!ignore_section_sym (abfd, syms[idx]))
+ num_locals++;
}
/* We will be adding a section symbol for each normal BFD section. Most
@@ -3355,12 +3373,12 @@
asymbol *sym = syms[idx];
unsigned int i;
- if (ignore_section_sym (abfd, sym))
- continue;
- if (!sym_is_global (abfd, sym))
+ if (sym_is_global (abfd, sym))
+ i = num_locals + num_globals2++;
+ else if (!ignore_section_sym (abfd, sym))
i = num_locals2++;
else
- i = num_locals + num_globals2++;
+ continue;
new_syms[i] = sym;
sym->udata.i = i + 1;
}
@@ -5042,8 +5060,14 @@
else
abort ();
p->p_memsz = p->p_filesz;
- p->p_align = 1;
- p->p_flags = (lp->p_flags & ~PF_W);
+ /* Preserve the alignment and flags if they are valid. The gold
+ linker generates RW/4 for the PT_GNU_RELRO section. It is better
+ for objcopy/strip to honor these attributes otherwise gdb will
+ choke when using separate debug files. */
+ if (!m->p_align_valid)
+ p->p_align = 1;
+ if (!m->p_flags_valid)
+ p->p_flags = (lp->p_flags & ~PF_W);
}
else
{
@@ -7494,59 +7518,74 @@
const char **filename_ptr,
const char **functionname_ptr)
{
- const char *filename;
- asymbol *func, *file;
- bfd_vma low_func;
- asymbol **p;
- /* ??? Given multiple file symbols, it is impossible to reliably
- choose the right file name for global symbols. File symbols are
- local symbols, and thus all file symbols must sort before any
- global symbols. The ELF spec may be interpreted to say that a
- file symbol must sort before other local symbols, but currently
- ld -r doesn't do this. So, for ld -r output, it is possible to
- make a better choice of file name for local symbols by ignoring
- file symbols appearing after a given local symbol. */
- enum { nothing_seen, symbol_seen, file_after_symbol_seen } state;
- const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+ static asection *last_section;
+ static asymbol *func;
+ static const char *filename;
+ static bfd_size_type func_size;
if (symbols == NULL)
return FALSE;
- filename = NULL;
- func = NULL;
- file = NULL;
- low_func = 0;
- state = nothing_seen;
-
- for (p = symbols; *p != NULL; p++)
+ if (last_section != section
+ || func == NULL
+ || offset < func->value
+ || offset >= func->value + func_size)
{
- asymbol *sym = *p;
- asection *code_sec;
- bfd_vma code_off;
+ asymbol *file;
+ bfd_vma low_func;
+ asymbol **p;
+ /* ??? Given multiple file symbols, it is impossible to reliably
+ choose the right file name for global symbols. File symbols are
+ local symbols, and thus all file symbols must sort before any
+ global symbols. The ELF spec may be interpreted to say that a
+ file symbol must sort before other local symbols, but currently
+ ld -r doesn't do this. So, for ld -r output, it is possible to
+ make a better choice of file name for local symbols by ignoring
+ file symbols appearing after a given local symbol. */
+ enum { nothing_seen, symbol_seen, file_after_symbol_seen } state;
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
- if ((sym->flags & BSF_FILE) != 0)
- {
- file = sym;
- if (state == symbol_seen)
- state = file_after_symbol_seen;
- continue;
- }
+ filename = NULL;
+ func = NULL;
+ file = NULL;
+ low_func = 0;
+ state = nothing_seen;
+ func_size = 0;
+ last_section = section;
- if (bed->maybe_function_sym (sym, &code_sec, &code_off)
- && code_sec == section
- && code_off >= low_func
- && code_off <= offset)
+ for (p = symbols; *p != NULL; p++)
{
- func = sym;
- low_func = code_off;
- filename = NULL;
- if (file != NULL
- && ((sym->flags & BSF_LOCAL) != 0
- || state != file_after_symbol_seen))
- filename = bfd_asymbol_name (file);
+ asymbol *sym = *p;
+ bfd_vma code_off;
+ bfd_size_type size;
+
+ if ((sym->flags & BSF_FILE) != 0)
+ {
+ file = sym;
+ if (state == symbol_seen)
+ state = file_after_symbol_seen;
+ continue;
+ }
+
+ size = bed->maybe_function_sym (sym, section, &code_off);
+ if (size != 0
+ && code_off <= offset
+ && (code_off > low_func
+ || (code_off == low_func
+ && size > func_size)))
+ {
+ func = sym;
+ func_size = size;
+ low_func = code_off;
+ filename = NULL;
+ if (file != NULL
+ && ((sym->flags & BSF_LOCAL) != 0
+ || state != file_after_symbol_seen))
+ filename = bfd_asymbol_name (file);
+ }
+ if (state == nothing_seen)
+ state = symbol_seen;
}
- if (state == nothing_seen)
- state = symbol_seen;
}
if (func == NULL)
@@ -9643,7 +9682,7 @@
(bfd *templ,
bfd_vma ehdr_vma,
bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma, bfd_byte *, int))
+ int (*target_read_memory) (bfd_vma, bfd_byte *, size_t))
{
return (*get_elf_backend_data (templ)->elf_backend_bfd_from_remote_memory)
(templ, ehdr_vma, loadbasep, target_read_memory);
@@ -9801,18 +9840,26 @@
|| type == STT_GNU_IFUNC);
}
-/* Return TRUE iff the ELF symbol SYM might be a function. Set *CODE_SEC
- and *CODE_OFF to the function's entry point. */
+/* If the ELF symbol SYM might be a function in SEC, return the
+ function size and set *CODE_OFF to the function's entry point,
+ otherwise return zero. */
-bfd_boolean
-_bfd_elf_maybe_function_sym (const asymbol *sym,
- asection **code_sec, bfd_vma *code_off)
+bfd_size_type
+_bfd_elf_maybe_function_sym (const asymbol *sym, asection *sec,
+ bfd_vma *code_off)
{
- if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
- | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0)
- return FALSE;
+ bfd_size_type size;
- *code_sec = sym->section;
+ if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
+ | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
+ || sym->section != sec)
+ return 0;
+
*code_off = sym->value;
- return TRUE;
+ size = 0;
+ if (!(sym->flags & BSF_SYNTHETIC))
+ size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
+ if (size == 0)
+ size = 1;
+ return size;
}
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index b3f3f0b..316b85c 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -3258,7 +3258,7 @@
s = bfd_make_section_with_flags (dynobj, ".iplt",
flags | SEC_READONLY | SEC_CODE);
if (s == NULL
- || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
+ || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
return FALSE;
htab->root.iplt = s;
}
@@ -3268,7 +3268,7 @@
s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
flags | SEC_READONLY);
if (s == NULL
- || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
+ || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
return FALSE;
htab->root.irelplt = s;
}
diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c
index bce1769..84e5379 100644
--- a/bfd/elf32-avr.c
+++ b/bfd/elf32-avr.c
@@ -517,6 +517,48 @@
0x000000ff, /* src_mask */
0x000000ff, /* dst_mask */
FALSE), /* pcrel_offset */
+ /* lo8-part to use in .byte lo8(sym). */
+ HOWTO (R_AVR_8_LO8, /* type */
+ 0, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_AVR_8_LO8", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffff, /* src_mask */
+ 0xffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+ /* hi8-part to use in .byte hi8(sym). */
+ HOWTO (R_AVR_8_HI8, /* type */
+ 8, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_AVR_8_HI8", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffff, /* src_mask */
+ 0xffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+ /* hlo8-part to use in .byte hlo8(sym). */
+ HOWTO (R_AVR_8_HLO8, /* type */
+ 16, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_AVR_8_HLO8", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffff, /* src_mask */
+ 0xffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
};
/* Map BFD reloc types to AVR ELF reloc types. */
@@ -555,7 +597,10 @@
{ BFD_RELOC_AVR_LDI, R_AVR_LDI },
{ BFD_RELOC_AVR_6, R_AVR_6 },
{ BFD_RELOC_AVR_6_ADIW, R_AVR_6_ADIW },
- { BFD_RELOC_8, R_AVR_8 }
+ { BFD_RELOC_8, R_AVR_8 },
+ { BFD_RELOC_AVR_8_LO, R_AVR_8_LO8 },
+ { BFD_RELOC_AVR_8_HI, R_AVR_8_HI8 },
+ { BFD_RELOC_AVR_8_HLO, R_AVR_8_HLO8 }
};
/* Meant to be filled one day with the wrap around address for the
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
index dab6dc9..9efd2a6 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
@@ -1029,22 +1029,17 @@
return FALSE;
if (!info->no_ld_generated_unwind_info
- && bfd_get_section_by_name (dynobj, ".eh_frame") == NULL
+ && htab->plt_eh_frame == NULL
&& htab->elf.splt != NULL)
{
- flagword flags = get_elf_backend_data (dynobj)->dynamic_sec_flags;
+ flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY
+ | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED);
htab->plt_eh_frame
- = bfd_make_section_with_flags (dynobj, ".eh_frame",
- flags | SEC_READONLY);
+ = bfd_make_section_anyway_with_flags (dynobj, ".eh_frame", flags);
if (htab->plt_eh_frame == NULL
|| !bfd_set_section_alignment (dynobj, htab->plt_eh_frame, 2))
return FALSE;
-
- htab->plt_eh_frame->size = sizeof (elf_i386_eh_frame_plt);
- htab->plt_eh_frame->contents
- = bfd_alloc (dynobj, htab->plt_eh_frame->size);
- memcpy (htab->plt_eh_frame->contents, elf_i386_eh_frame_plt,
- sizeof (elf_i386_eh_frame_plt));
}
return TRUE;
@@ -2744,7 +2739,7 @@
FALSE, FALSE, FALSE);
/* Don't allocate .got.plt section if there are no GOT nor PLT
- entries and there is no refeence to _GLOBAL_OFFSET_TABLE_. */
+ entries and there is no reference to _GLOBAL_OFFSET_TABLE_. */
if ((got == NULL
|| !got->ref_regular_nonweak)
&& (htab->elf.sgotplt->size
@@ -2760,6 +2755,14 @@
htab->elf.sgotplt->size = 0;
}
+
+ if (htab->plt_eh_frame != NULL
+ && htab->elf.splt != NULL
+ && htab->elf.splt->size != 0
+ && !bfd_is_abs_section (htab->elf.splt->output_section)
+ && _bfd_elf_eh_frame_present (info))
+ htab->plt_eh_frame->size = sizeof (elf_i386_eh_frame_plt);
+
/* We now have determined the sizes of the various dynamic sections.
Allocate memory for them. */
relocs = FALSE;
@@ -2771,12 +2774,7 @@
continue;
if (s == htab->elf.splt
- || s == htab->elf.sgot
- || s == htab->elf.sgotplt
- || s == htab->elf.iplt
- || s == htab->elf.igotplt
- || s == htab->sdynsharablebss
- || s == htab->sdynbss)
+ || s == htab->elf.sgot)
{
/* Strip this section if we don't need it; see the
comment below. */
@@ -2787,6 +2785,15 @@
if (htab->elf.hplt != NULL)
strip_section = FALSE;
}
+ else if (s == htab->elf.sgotplt
+ || s == htab->elf.iplt
+ || s == htab->elf.igotplt
+ || s == htab->plt_eh_frame
+ || s == htab->sdynsharablebss
+ || s == htab->sdynbss)
+ {
+ /* Strip these too. */
+ }
else if (CONST_STRNEQ (bfd_get_section_name (dynobj, s), ".rel"))
{
if (s->size != 0
@@ -2834,11 +2841,13 @@
}
if (htab->plt_eh_frame != NULL
- && htab->elf.splt != NULL
- && htab->elf.splt->size != 0
- && (htab->elf.splt->flags & SEC_EXCLUDE) == 0)
- bfd_put_32 (dynobj, htab->elf.splt->size,
- htab->plt_eh_frame->contents + PLT_FDE_LEN_OFFSET);
+ && htab->plt_eh_frame->contents != NULL)
+ {
+ memcpy (htab->plt_eh_frame->contents, elf_i386_eh_frame_plt,
+ sizeof (elf_i386_eh_frame_plt));
+ bfd_put_32 (dynobj, htab->elf.splt->size,
+ htab->plt_eh_frame->contents + PLT_FDE_LEN_OFFSET);
+ }
if (htab->elf.dynamic_sections_created)
{
@@ -4628,17 +4637,6 @@
bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
}
- /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
- be NULL for local symbols.
-
- On VxWorks, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it
- is relative to the ".got" section. */
- if (sym != NULL
- && (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || (!abed->is_vxworks
- && h == htab->elf.hgot)))
- sym->st_shndx = SHN_ABS;
-
return TRUE;
}
@@ -4877,7 +4875,8 @@
}
/* Adjust .eh_frame for .plt section. */
- if (htab->plt_eh_frame != NULL)
+ if (htab->plt_eh_frame != NULL
+ && htab->plt_eh_frame->contents != NULL)
{
if (htab->elf.splt != NULL
&& htab->elf.splt->size != 0
diff --git a/bfd/elf32-lm32.c b/bfd/elf32-lm32.c
index 1a3ac5d..a9a17db 100644
--- a/bfd/elf32-lm32.c
+++ b/bfd/elf32-lm32.c
@@ -19,8 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/lm32.h"
diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c
index 763c90d..730b3f5 100644
--- a/bfd/elf32-m32r.c
+++ b/bfd/elf32-m32r.c
@@ -3007,7 +3007,7 @@
const char *name;
BFD_ASSERT (sec != NULL);
- name = bfd_get_section_name (abfd, sec);
+ name = bfd_get_section_name (sec->owner, sec);
if ( strcmp (name, ".sdata") == 0
|| strcmp (name, ".sbss") == 0
diff --git a/bfd/elf32-m68hc12.c b/bfd/elf32-m68hc12.c
index 2b16641..448853d 100644
--- a/bfd/elf32-m68hc12.c
+++ b/bfd/elf32-m68hc12.c
@@ -324,11 +324,81 @@
FALSE), /* pcrel_offset */
EMPTY_HOWTO (14),
- EMPTY_HOWTO (15),
- EMPTY_HOWTO (16),
- EMPTY_HOWTO (17),
- EMPTY_HOWTO (18),
- EMPTY_HOWTO (19),
+
+ /* A 16 bit absolute relocation. */
+ HOWTO (R_M68HC12_16B, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC12_16B", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 9 bit PC-rel relocation. */
+ HOWTO (R_M68HC12_PCREL_9, /* type */
+ 1, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 10, /* bitsize (result is >>1) */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC12_PCREL_9", /* name */
+ TRUE, /* partial_inplace */
+ 0xfe00, /* src_mask */
+ 0x01ff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 10 bit PC-rel relocation. */
+ HOWTO (R_M68HC12_PCREL_10, /* type */
+ 1, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 11, /* bitsize (result is >>1) */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC12_PCREL_10", /* name */
+ TRUE, /* partial_inplace */
+ 0xfc00, /* src_mask */
+ 0x03ff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation (upper address). */
+ HOWTO (R_M68HC12_HI8XG, /* type */
+ 8, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC12_HI8XG", /* name */
+ FALSE, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 8 bit absolute relocation (lower address). */
+ HOWTO (R_M68HC12_LO8XG, /* type */
+ 8, /* rightshift */
+ 0, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_M68HC12_LO8XG", /* name */
+ FALSE, /* partial_inplace */
+ 0x00ff, /* src_mask */
+ 0x00ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
/* Mark beginning of a jump instruction (any form). */
HOWTO (R_M68HC11_RL_JUMP, /* type */
@@ -369,7 +439,8 @@
unsigned char elf_reloc_val;
};
-static const struct m68hc11_reloc_map m68hc11_reloc_map[] = {
+static const struct m68hc11_reloc_map m68hc11_reloc_map[] =
+{
{BFD_RELOC_NONE, R_M68HC11_NONE,},
{BFD_RELOC_8, R_M68HC11_8},
{BFD_RELOC_M68HC11_HI8, R_M68HC11_HI8},
@@ -389,6 +460,13 @@
{BFD_RELOC_M68HC11_RL_JUMP, R_M68HC11_RL_JUMP},
{BFD_RELOC_M68HC11_RL_GROUP, R_M68HC11_RL_GROUP},
+
+ {BFD_RELOC_M68HC12_16B, R_M68HC12_16B},
+
+ {BFD_RELOC_M68HC12_9_PCREL, R_M68HC12_PCREL_9},
+ {BFD_RELOC_M68HC12_10_PCREL, R_M68HC12_PCREL_10},
+ {BFD_RELOC_M68HC12_HI8XG, R_M68HC12_HI8XG},
+ {BFD_RELOC_M68HC12_LO8XG, R_M68HC12_LO8XG},
};
static reloc_howto_type *
diff --git a/bfd/elf32-m68hc1x.c b/bfd/elf32-m68hc1x.c
index e3a5c16..35a4bbe 100644
--- a/bfd/elf32-m68hc1x.c
+++ b/bfd/elf32-m68hc1x.c
@@ -20,8 +20,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "alloca-conf.h"
#include "sysdep.h"
+#include "alloca-conf.h"
#include "bfd.h"
#include "bfdlink.h"
#include "libbfd.h"
@@ -949,6 +949,7 @@
bfd_vma insn_page;
bfd_boolean is_far = FALSE;
struct elf_link_hash_entry *h;
+ bfd_vma val;
r_symndx = ELF32_R_SYM (rel->r_info);
r_type = ELF32_R_TYPE (rel->r_info);
@@ -1029,6 +1030,50 @@
phys_page = m68hc11_phys_page (pinfo, relocation + rel->r_addend);
switch (r_type)
{
+ case R_M68HC12_LO8XG:
+ /* This relocation is specific to XGATE IMM16 calls and will precede
+ a HI8. tc-m68hc11 only generates them in pairs.
+ Leave the relocation to the HI8XG step. */
+ r = bfd_reloc_ok;
+ r_type = R_M68HC11_NONE;
+ break;
+
+ case R_M68HC12_HI8XG:
+ /* This relocation is specific to XGATE IMM16 calls and must follow
+ a LO8XG. Does not actually check that it was a LO8XG.
+ Adjusts high and low bytes. */
+ relocation = phys_addr;
+ if ((elf_elfheader (input_bfd)->e_flags & E_M68HC11_XGATE_RAMOFFSET)
+ && (relocation >= 0x2000))
+ relocation += 0xc000; /* HARDCODED RAM offset for XGATE. */
+
+ /* Fetch 16 bit value including low byte in previous insn. */
+ val = (bfd_get_8 (input_bfd, (bfd_byte*) contents + rel->r_offset) << 8)
+ | bfd_get_8 (input_bfd, (bfd_byte*) contents + rel->r_offset - 2);
+
+ /* Add on value to preserve carry, then write zero to high byte. */
+ relocation += val;
+
+ /* Write out top byte. */
+ bfd_put_8 (input_bfd, (relocation >> 8) & 0xff,
+ (bfd_byte*) contents + rel->r_offset);
+
+ /* Write out low byte to previous instruction. */
+ bfd_put_8 (input_bfd, relocation & 0xff,
+ (bfd_byte*) contents + rel->r_offset - 2);
+
+ /* Mark as relocation completed. */
+ r = bfd_reloc_ok;
+ r_type = R_M68HC11_NONE;
+ break;
+
+ /* The HI8 and LO8 relocs are generated by %hi(expr) %lo(expr)
+ assembler directives. %hi does not support carry. */
+ case R_M68HC11_HI8:
+ case R_M68HC11_LO8:
+ relocation = phys_addr;
+ break;
+
case R_M68HC11_24:
/* Reloc used by 68HC12 call instruction. */
bfd_put_16 (input_bfd, phys_addr,
@@ -1123,10 +1168,18 @@
relocation = phys_addr;
break;
}
+
if (r_type != R_M68HC11_NONE)
- r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ {
+ if ((r_type == R_M68HC12_PCREL_9) || (r_type == R_M68HC12_PCREL_10))
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset,
- relocation, rel->r_addend);
+ relocation - 2, rel->r_addend);
+ else
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend);
+ }
if (r != bfd_reloc_ok)
{
@@ -1317,6 +1370,9 @@
else
fprintf (file, _(" [memory=flat]"));
+ if (elf_elfheader (abfd)->e_flags & E_M68HC11_XGATE_RAMOFFSET)
+ fprintf (file, _(" [XGATE RAM offsetting]"));
+
fputc ('\n', file);
return TRUE;
diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c
index 380305f..79e1659 100644
--- a/bfd/elf32-m68k.c
+++ b/bfd/elf32-m68k.c
@@ -4821,6 +4821,69 @@
return plt->vma + (i + 1) * elf_m68k_get_plt_info (plt->owner)->size;
}
+/* Support for core dump NOTE sections. */
+
+static bfd_boolean
+elf_m68k_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
+{
+ int offset;
+ size_t size;
+
+ switch (note->descsz)
+ {
+ default:
+ return FALSE;
+
+ case 154: /* Linux/m68k */
+ /* pr_cursig */
+ elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
+
+ /* pr_pid */
+ elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 22);
+
+ /* pr_reg */
+ offset = 70;
+ size = 80;
+
+ break;
+ }
+
+ /* Make a ".reg/999" section. */
+ return _bfd_elfcore_make_pseudosection (abfd, ".reg",
+ size, note->descpos + offset);
+}
+
+static bfd_boolean
+elf_m68k_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
+{
+ switch (note->descsz)
+ {
+ default:
+ return FALSE;
+
+ case 124: /* Linux/m68k elf_prpsinfo. */
+ elf_tdata (abfd)->core_pid
+ = bfd_get_32 (abfd, note->descdata + 12);
+ elf_tdata (abfd)->core_program
+ = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
+ elf_tdata (abfd)->core_command
+ = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
+ }
+
+ /* Note that for some reason, a spurious space is tacked
+ onto the end of the args in some (at least one anyway)
+ implementations, so strip it off if it exists. */
+ {
+ char *command = elf_tdata (abfd)->core_command;
+ int n = strlen (command);
+
+ if (n > 0 && command[n - 1] == ' ')
+ command[n - 1] = '\0';
+ }
+
+ return TRUE;
+}
+
#define TARGET_BIG_SYM bfd_elf32_m68k_vec
#define TARGET_BIG_NAME "elf32-m68k"
#define ELF_MACHINE_CODE EM_68K
@@ -4860,6 +4923,8 @@
#define elf_backend_reloc_type_class elf32_m68k_reloc_type_class
#define elf_backend_plt_sym_val elf_m68k_plt_sym_val
#define elf_backend_object_p elf32_m68k_object_p
+#define elf_backend_grok_prstatus elf_m68k_grok_prstatus
+#define elf_backend_grok_psinfo elf_m68k_grok_psinfo
#define elf_backend_can_gc_sections 1
#define elf_backend_can_refcount 1
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
index 9e22dee..1bb80b6 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -1,6 +1,6 @@
/* Xilinx MicroBlaze-specific support for 32-bit ELF
- Copyright 2009, 2010, 2011 Free Software Foundation, Inc.
+ Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -22,8 +22,8 @@
int dbg = 0;
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "bfdlink.h"
#include "libbfd.h"
#include "elf-bfd.h"
@@ -840,7 +840,7 @@
/* Only relocate if the symbol is defined. */
if (sec)
{
- name = bfd_get_section_name (abfd, sec);
+ name = bfd_get_section_name (sec->owner, sec);
if (strcmp (name, ".sdata2") == 0
|| strcmp (name, ".sbss2") == 0)
@@ -869,7 +869,7 @@
bfd_get_filename (input_bfd),
sym_name,
microblaze_elf_howto_table[(int) r_type]->name,
- bfd_get_section_name (abfd, sec));
+ bfd_get_section_name (sec->owner, sec));
/*bfd_set_error (bfd_error_bad_value); ??? why? */
ret = FALSE;
continue;
@@ -885,7 +885,7 @@
/* Only relocate if the symbol is defined. */
if (sec)
{
- name = bfd_get_section_name (abfd, sec);
+ name = bfd_get_section_name (sec->owner, sec);
if (strcmp (name, ".sdata") == 0
|| strcmp (name, ".sbss") == 0)
@@ -914,7 +914,7 @@
bfd_get_filename (input_bfd),
sym_name,
microblaze_elf_howto_table[(int) r_type]->name,
- bfd_get_section_name (abfd, sec));
+ bfd_get_section_name (sec->owner, sec));
/*bfd_set_error (bfd_error_bad_value); ??? why? */
ret = FALSE;
continue;
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index ddf30f220..cd52a34 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -38,12 +38,21 @@
#include "elf-vxworks.h"
#include "dwarf2.h"
+typedef enum split16_format_type
+{
+ split16a_type = 0,
+ split16d_type
+}
+split16_format_type;
+
/* RELA relocations are used here. */
static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type ppc_elf_unhandled_reloc
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
+static void ppc_elf_vle_split16
+ (bfd *, bfd_byte *, bfd_vma, bfd_vma, split16_format_type);
/* Branch prediction bit for branch taken relocs. */
#define BRANCH_PREDICT_BIT 0x200000
@@ -1392,6 +1401,262 @@
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
+ /* A relative 8 bit branch. */
+ HOWTO (R_PPC_VLE_REL8, /* type */
+ 1, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_REL8", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A relative 15 bit branch. */
+ HOWTO (R_PPC_VLE_REL15, /* type */
+ 1, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 15, /* bitsize */
+ TRUE, /* pc_relative */
+ 1, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_REL15", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfe, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A relative 24 bit branch. */
+ HOWTO (R_PPC_VLE_REL24, /* type */
+ 1, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 24, /* bitsize */
+ TRUE, /* pc_relative */
+ 1, /* bitpos */
+ complain_overflow_signed, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_REL24", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1fffffe, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* The 16 LSBS in split16a format. */
+ HOWTO (R_PPC_VLE_LO16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */ /* FIXME: Does this apply to split relocs? */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_LO16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* The 16 LSBS in split16d format. */
+ HOWTO (R_PPC_VLE_LO16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_LO16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 split16a format. */
+ HOWTO (R_PPC_VLE_HI16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HI16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 split16d format. */
+ HOWTO (R_PPC_VLE_HI16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HI16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (High Adjusted) in split16a format. */
+ HOWTO (R_PPC_VLE_HA16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HA16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (High Adjusted) in split16d format. */
+ HOWTO (R_PPC_VLE_HA16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_HA16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* This reloc does nothing. */
+ HOWTO (R_PPC_VLE_SDA21, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDA21", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* This reloc does nothing. */
+ HOWTO (R_PPC_VLE_SDA21_LO, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDA21_LO", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
+ HOWTO (R_PPC_VLE_SDAREL_LO16A,/* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_LO16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
+ /* This reloc does nothing. */
+ HOWTO (R_PPC_VLE_SDAREL_LO16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_LO16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
+ HOWTO (R_PPC_VLE_SDAREL_HI16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HI16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
+ HOWTO (R_PPC_VLE_SDAREL_HI16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HI16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
+ HOWTO (R_PPC_VLE_SDAREL_HA16A, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HA16A", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f00fff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
+ HOWTO (R_PPC_VLE_SDAREL_HA16D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_PPC_VLE_SDAREL_HA16D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0x1f07ff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
HOWTO (R_PPC_IRELATIVE, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
@@ -1628,6 +1893,35 @@
case BFD_RELOC_PPC_EMB_RELST_HA: r = R_PPC_EMB_RELST_HA; break;
case BFD_RELOC_PPC_EMB_BIT_FLD: r = R_PPC_EMB_BIT_FLD; break;
case BFD_RELOC_PPC_EMB_RELSDA: r = R_PPC_EMB_RELSDA; break;
+ case BFD_RELOC_PPC_VLE_REL8: r = R_PPC_VLE_REL8; break;
+ case BFD_RELOC_PPC_VLE_REL15: r = R_PPC_VLE_REL15; break;
+ case BFD_RELOC_PPC_VLE_REL24: r = R_PPC_VLE_REL24; break;
+ case BFD_RELOC_PPC_VLE_LO16A: r = R_PPC_VLE_LO16A; break;
+ case BFD_RELOC_PPC_VLE_LO16D: r = R_PPC_VLE_LO16D; break;
+ case BFD_RELOC_PPC_VLE_HI16A: r = R_PPC_VLE_HI16A; break;
+ case BFD_RELOC_PPC_VLE_HI16D: r = R_PPC_VLE_HI16D; break;
+ case BFD_RELOC_PPC_VLE_HA16A: r = R_PPC_VLE_HA16A; break;
+ case BFD_RELOC_PPC_VLE_HA16D: r = R_PPC_VLE_HA16D; break;
+ case BFD_RELOC_PPC_VLE_SDA21: r = R_PPC_VLE_SDA21; break;
+ case BFD_RELOC_PPC_VLE_SDA21_LO: r = R_PPC_VLE_SDA21_LO; break;
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
+ r = R_PPC_VLE_SDAREL_LO16A;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
+ r = R_PPC_VLE_SDAREL_LO16D;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
+ r = R_PPC_VLE_SDAREL_HI16A;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
+ r = R_PPC_VLE_SDAREL_HI16D;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
+ r = R_PPC_VLE_SDAREL_HA16A;
+ break;
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
+ r = R_PPC_VLE_SDAREL_HA16D;
+ break;
case BFD_RELOC_16_PCREL: r = R_PPC_REL16; break;
case BFD_RELOC_LO16_PCREL: r = R_PPC_REL16_LO; break;
case BFD_RELOC_HI16_PCREL: r = R_PPC_REL16_HI; break;
@@ -1952,6 +2246,28 @@
}
}
+static flagword
+ppc_elf_lookup_section_flags (char *flag_name)
+{
+
+ if (!strcmp (flag_name, "SHF_PPC_VLE"))
+ return SHF_PPC_VLE;
+
+ return 0;
+}
+
+/* Add the VLE flag if required. */
+
+bfd_boolean
+ppc_elf_section_processing (bfd *abfd, Elf_Internal_Shdr *shdr)
+{
+ if (bfd_get_mach (abfd) == bfd_mach_ppc_vle
+ && (shdr->sh_flags & SHF_EXECINSTR) != 0)
+ shdr->sh_flags |= SHF_PPC_VLE;
+
+ return TRUE;
+}
+
/* Return address for Ith PLT stub in section PLT, for relocation REL
or (bfd_vma) -1 if it should not be included. */
@@ -2025,6 +2341,70 @@
return ret;
}
+/* Modify the segment map for VLE executables. */
+
+bfd_boolean
+ppc_elf_modify_segment_map (bfd *abfd,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED)
+{
+ struct elf_segment_map *m, *n;
+ bfd_size_type amt;
+ unsigned int j, k;
+ bfd_boolean sect0_vle, sectj_vle;
+
+ /* At this point in the link, output sections have already been sorted by
+ LMA and assigned to segments. All that is left to do is to ensure
+ there is no mixing of VLE & non-VLE sections in a text segment.
+ If we find that case, we split the segment.
+ We maintain the original output section order. */
+
+ for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
+ {
+ if (m->count == 0)
+ continue;
+
+ sect0_vle = (elf_section_flags (m->sections[0]) & SHF_PPC_VLE) != 0;
+ for (j = 1; j < m->count; ++j)
+ {
+ sectj_vle = (elf_section_flags (m->sections[j]) & SHF_PPC_VLE) != 0;
+
+ if (sectj_vle != sect0_vle)
+ break;
+ }
+ if (j >= m->count)
+ continue;
+
+ /* sections 0..j-1 stay in this (current) segment,
+ the remainder are put in a new segment.
+ The scan resumes with the new segment. */
+
+ /* Fix the new segment. */
+ amt = sizeof (struct elf_segment_map);
+ amt += (m->count - j - 1) * sizeof (asection *);
+ n = (struct elf_segment_map *) bfd_zalloc (abfd, amt);
+ if (n == NULL)
+ return FALSE;
+
+ n->p_type = PT_LOAD;
+ n->p_flags = PF_X | PF_R;
+ if (sectj_vle)
+ n->p_flags |= PF_PPC_VLE;
+ n->count = m->count - j;
+ for (k = 0; k < n->count; ++k)
+ {
+ n->sections[k] = m->sections[j+k];
+ m->sections[j+k] = NULL;
+ }
+ n->next = m->next;
+ m->next = n;
+
+ /* Fix the current segment */
+ m->count = j;
+ }
+
+ return TRUE;
+}
+
/* Add extra PPC sections -- Note, for now, make .sbss2 and
.PPC.EMB.sbss0 a normal section, and not a bss section so
that the linker doesn't crater when trying to make more than
@@ -2732,7 +3112,7 @@
};
/* Rename some of the generic section flags to better document how they
- are used here. */
+ are used for ppc32. The flags are only valid for ppc32 elf objects. */
/* Nonzero if this section has TLS related relocations. */
#define has_tls_reloc sec_flg0
@@ -3620,10 +4000,21 @@
}
break;
+ case R_PPC_VLE_SDAREL_LO16A:
+ case R_PPC_VLE_SDAREL_LO16D:
+ case R_PPC_VLE_SDAREL_HI16A:
+ case R_PPC_VLE_SDAREL_HI16D:
+ case R_PPC_VLE_SDAREL_HA16A:
+ case R_PPC_VLE_SDAREL_HA16D:
case R_PPC_SDAREL16:
if (htab->sdata[0].sym == NULL
&& !create_sdata_sym (info, &htab->sdata[0]))
return FALSE;
+
+ if (htab->sdata[1].sym == NULL
+ && !create_sdata_sym (info, &htab->sdata[1]))
+ return FALSE;
+
if (h != NULL)
{
ppc_elf_hash_entry (h)->has_sda_refs = TRUE;
@@ -3631,6 +4022,17 @@
}
break;
+ case R_PPC_VLE_REL8:
+ case R_PPC_VLE_REL15:
+ case R_PPC_VLE_REL24:
+ case R_PPC_VLE_LO16A:
+ case R_PPC_VLE_LO16D:
+ case R_PPC_VLE_HI16A:
+ case R_PPC_VLE_HI16D:
+ case R_PPC_VLE_HA16A:
+ case R_PPC_VLE_HA16D:
+ break;
+
case R_PPC_EMB_SDA2REL:
if (info->shared)
{
@@ -3647,6 +4049,8 @@
}
break;
+ case R_PPC_VLE_SDA21_LO:
+ case R_PPC_VLE_SDA21:
case R_PPC_EMB_SDA21:
case R_PPC_EMB_RELSDA:
if (info->shared)
@@ -4244,6 +4648,24 @@
return TRUE;
}
+
+static void
+ppc_elf_vle_split16 (bfd *output_bfd, bfd_byte *contents,
+ bfd_vma offset, bfd_vma relocation,
+ split16_format_type split16_format)
+
+{
+ bfd_vma insn, top5, bottom11;
+
+ insn = bfd_get_32 (output_bfd, contents + offset);
+ top5 = relocation >> 11;
+ top5 = top5 << (split16_format == split16a_type ? 20 : 16);
+ bottom11 = relocation & 0x7ff;
+ insn |= top5;
+ insn |= bottom11;
+ bfd_put_32 (output_bfd, insn, contents + offset);
+}
+
/* Choose which PLT scheme to use, and set .plt flags appropriately.
Returns -1 on error, 0 for old PLT, 1 for new PLT. */
@@ -5822,7 +6244,8 @@
if (htab->glink != NULL
&& htab->glink->size != 0
&& htab->glink_eh_frame != NULL
- && !bfd_is_abs_section (htab->glink_eh_frame->output_section))
+ && !bfd_is_abs_section (htab->glink_eh_frame->output_section)
+ && _bfd_elf_eh_frame_present (info))
{
s = htab->glink_eh_frame;
s->size = sizeof (glink_eh_frame_cie) + 20;
@@ -5867,7 +6290,8 @@
{
/* Strip these too. */
}
- else if (CONST_STRNEQ (bfd_get_section_name (dynobj, s), ".rela"))
+ else if (CONST_STRNEQ (bfd_get_section_name (htab->elf.dynobj, s),
+ ".rela"))
{
if (s->size != 0)
{
@@ -5970,6 +6394,66 @@
}
#undef add_dynamic_entry
+ if (htab->glink_eh_frame != NULL
+ && htab->glink_eh_frame->contents != NULL)
+ {
+ unsigned char *p = htab->glink_eh_frame->contents;
+ bfd_vma val;
+
+ memcpy (p, glink_eh_frame_cie, sizeof (glink_eh_frame_cie));
+ /* CIE length (rewrite in case little-endian). */
+ bfd_put_32 (htab->elf.dynobj, sizeof (glink_eh_frame_cie) - 4, p);
+ p += sizeof (glink_eh_frame_cie);
+ /* FDE length. */
+ val = htab->glink_eh_frame->size - 4 - sizeof (glink_eh_frame_cie);
+ bfd_put_32 (htab->elf.dynobj, val, p);
+ p += 4;
+ /* CIE pointer. */
+ val = p - htab->glink_eh_frame->contents;
+ bfd_put_32 (htab->elf.dynobj, val, p);
+ p += 4;
+ /* Offset to .glink. Set later. */
+ p += 4;
+ /* .glink size. */
+ bfd_put_32 (htab->elf.dynobj, htab->glink->size, p);
+ p += 4;
+ /* Augmentation. */
+ p += 1;
+
+ if (info->shared
+ && htab->elf.dynamic_sections_created)
+ {
+ bfd_vma adv = (htab->glink->size - GLINK_PLTRESOLVE + 8) >> 2;
+ if (adv < 64)
+ *p++ = DW_CFA_advance_loc + adv;
+ else if (adv < 256)
+ {
+ *p++ = DW_CFA_advance_loc1;
+ *p++ = adv;
+ }
+ else if (adv < 65536)
+ {
+ *p++ = DW_CFA_advance_loc2;
+ bfd_put_16 (htab->elf.dynobj, adv, p);
+ p += 2;
+ }
+ else
+ {
+ *p++ = DW_CFA_advance_loc4;
+ bfd_put_32 (htab->elf.dynobj, adv, p);
+ p += 4;
+ }
+ *p++ = DW_CFA_register;
+ *p++ = 65;
+ p++;
+ *p++ = DW_CFA_advance_loc + 4;
+ *p++ = DW_CFA_restore_extended;
+ *p++ = 65;
+ }
+ BFD_ASSERT ((bfd_vma) ((p + 3 - htab->glink_eh_frame->contents) & -4)
+ == htab->glink_eh_frame->size);
+ }
+
return TRUE;
}
@@ -7613,6 +8097,9 @@
case R_PPC_UADDR16:
goto dodyn;
+ case R_PPC_VLE_REL8:
+ case R_PPC_VLE_REL15:
+ case R_PPC_VLE_REL24:
case R_PPC_REL24:
case R_PPC_REL14:
case R_PPC_REL14_BRTAKEN:
@@ -7888,8 +8375,10 @@
unresolved_reloc = TRUE;
break;
}
- BFD_ASSERT (strcmp (bfd_get_section_name (abfd, sec), ".got") == 0
- || strcmp (bfd_get_section_name (abfd, sec), ".cgot") == 0);
+ BFD_ASSERT (strcmp (bfd_get_section_name (sec->owner, sec),
+ ".got") == 0
+ || strcmp (bfd_get_section_name (sec->owner, sec),
+ ".cgot") == 0);
addend -= sec->output_section->vma + sec->output_offset + 0x8000;
break;
@@ -7939,7 +8428,7 @@
}
addend -= SYM_VAL (sda);
- name = bfd_get_section_name (abfd, sec->output_section);
+ name = bfd_get_section_name (output_bfd, sec->output_section);
if (! ((CONST_STRNEQ (name, ".sdata")
&& (name[6] == 0 || name[6] == '.'))
|| (CONST_STRNEQ (name, ".sbss")
@@ -7971,7 +8460,7 @@
}
addend -= SYM_VAL (sda);
- name = bfd_get_section_name (abfd, sec->output_section);
+ name = bfd_get_section_name (output_bfd, sec->output_section);
if (! (CONST_STRNEQ (name, ".sdata2")
|| CONST_STRNEQ (name, ".sbss2")))
{
@@ -7986,9 +8475,53 @@
}
break;
+ case R_PPC_VLE_LO16A:
+ relocation = (relocation + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16a_type);
+ continue;
+
+ case R_PPC_VLE_LO16D:
+ relocation = (relocation + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16d_type);
+ continue;
+
+ case R_PPC_VLE_HI16A:
+ relocation = ((relocation + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16a_type);
+ continue;
+
+ case R_PPC_VLE_HI16D:
+ relocation = ((relocation + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ relocation, split16d_type);
+ continue;
+
+ case R_PPC_VLE_HA16A:
+ {
+ bfd_vma value = relocation + addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ continue;
+
+ case R_PPC_VLE_HA16D:
+ {
+ bfd_vma value = relocation + addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ continue;
+
/* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
case R_PPC_EMB_SDA21:
+ case R_PPC_VLE_SDA21:
case R_PPC_EMB_RELSDA:
+ case R_PPC_VLE_SDA21_LO:
{
const char *name;
int reg;
@@ -8000,7 +8533,7 @@
break;
}
- name = bfd_get_section_name (abfd, sec->output_section);
+ name = bfd_get_section_name (output_bfd, sec->output_section);
if (((CONST_STRNEQ (name, ".sdata")
&& (name[6] == 0 || name[6] == '.'))
|| (CONST_STRNEQ (name, ".sbss")
@@ -8045,7 +8578,25 @@
addend -= SYM_VAL (sda);
}
- if (r_type == R_PPC_EMB_SDA21)
+ if (reg == 0
+ && (r_type == R_PPC_VLE_SDA21
+ || r_type == R_PPC_VLE_SDA21_LO))
+ {
+ /* Use the split20 format. */
+ bfd_vma insn, bits12to15, bits21to31;
+ bfd_vma value = (relocation + rel->r_offset) & 0xffff;
+ /* Propagate sign bit, if necessary. */
+ insn = (value & 0x8000) ? 0x70107800 : 0x70000000;
+ bits12to15 = value & 0x700;
+ bits21to31 = value & 0x7ff;
+ insn |= bits12to15;
+ insn |= bits21to31;
+ bfd_put_32 (output_bfd, insn, contents + rel->r_offset);
+ continue;
+ }
+ else if (r_type == R_PPC_EMB_SDA21
+ || r_type == R_PPC_VLE_SDA21
+ || r_type == R_PPC_VLE_SDA21_LO)
{
bfd_vma insn; /* Fill in register field. */
@@ -8056,6 +8607,107 @@
}
break;
+ case R_PPC_VLE_SDAREL_LO16A:
+ case R_PPC_VLE_SDAREL_LO16D:
+ case R_PPC_VLE_SDAREL_HI16A:
+ case R_PPC_VLE_SDAREL_HI16D:
+ case R_PPC_VLE_SDAREL_HA16A:
+ case R_PPC_VLE_SDAREL_HA16D:
+ {
+ bfd_vma value;
+ const char *name;
+ //int reg;
+ struct elf_link_hash_entry *sda = NULL;
+
+ if (sec == NULL || sec->output_section == NULL)
+ {
+ unresolved_reloc = TRUE;
+ break;
+ }
+
+ name = bfd_get_section_name (output_bfd, sec->output_section);
+ if (((CONST_STRNEQ (name, ".sdata")
+ && (name[6] == 0 || name[6] == '.'))
+ || (CONST_STRNEQ (name, ".sbss")
+ && (name[5] == 0 || name[5] == '.'))))
+ {
+ //reg = 13;
+ sda = htab->sdata[0].sym;
+ }
+ else if (CONST_STRNEQ (name, ".sdata2")
+ || CONST_STRNEQ (name, ".sbss2"))
+ {
+ //reg = 2;
+ sda = htab->sdata[1].sym;
+ }
+ else
+ {
+ (*_bfd_error_handler)
+ (_("%B: the target (%s) of a %s relocation is "
+ "in the wrong output section (%s)"),
+ input_bfd,
+ sym_name,
+ howto->name,
+ name);
+
+ bfd_set_error (bfd_error_bad_value);
+ ret = FALSE;
+ continue;
+ }
+
+ if (sda != NULL)
+ {
+ if (!is_static_defined (sda))
+ {
+ unresolved_reloc = TRUE;
+ break;
+ }
+ }
+
+ value = sda->root.u.def.section->output_section->vma
+ + sda->root.u.def.section->output_offset;
+
+ if (r_type == R_PPC_VLE_SDAREL_LO16A)
+ {
+ value = (value + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_LO16D)
+ {
+ value = (value + addend) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HI16A)
+ {
+ value = ((value + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HI16D)
+ {
+ value = ((value + addend) >> 16) & 0xffff;
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HA16A)
+ {
+ value += addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16a_type);
+ }
+ else if (r_type == R_PPC_VLE_SDAREL_HA16D)
+ {
+ value += addend;
+ value = (((value >> 16) + ((value & 0x8000) ? 1 : 0)) & 0xffff);
+ ppc_elf_vle_split16 (output_bfd, contents, rel->r_offset,
+ value, split16d_type);
+ }
+ }
+ continue;
+
/* Relocate against the beginning of the section. */
case R_PPC_SECTOFF:
case R_PPC_SECTOFF_LO:
@@ -8550,14 +9202,6 @@
fprintf (stderr, "\n");
#endif
- /* Mark some specially defined symbols as absolute. */
- if (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || (!htab->is_vxworks
- && (h == htab->elf.hgot
- || strcmp (h->root.root.string,
- "_PROCEDURE_LINKAGE_TABLE_") == 0)))
- sym->st_shndx = SHN_ABS;
-
return TRUE;
}
@@ -8992,17 +9636,10 @@
unsigned char *p = htab->glink_eh_frame->contents;
bfd_vma val;
- memcpy (p, glink_eh_frame_cie, sizeof (glink_eh_frame_cie));
- /* CIE length (rewrite in case little-endian). */
- bfd_put_32 (htab->elf.dynobj, sizeof (glink_eh_frame_cie) - 4, p);
p += sizeof (glink_eh_frame_cie);
/* FDE length. */
- val = htab->glink_eh_frame->size - 4 - sizeof (glink_eh_frame_cie);
- bfd_put_32 (htab->elf.dynobj, val, p);
p += 4;
/* CIE pointer. */
- val = p - htab->glink_eh_frame->contents;
- bfd_put_32 (htab->elf.dynobj, val, p);
p += 4;
/* Offset to .glink. */
val = (htab->glink->output_section->vma
@@ -9011,45 +9648,6 @@
+ htab->glink_eh_frame->output_offset);
val -= p - htab->glink_eh_frame->contents;
bfd_put_32 (htab->elf.dynobj, val, p);
- p += 4;
- /* .glink size. */
- bfd_put_32 (htab->elf.dynobj, htab->glink->size, p);
- p += 4;
- /* Augmentation. */
- p += 1;
-
- if (info->shared
- && htab->elf.dynamic_sections_created)
- {
- bfd_vma adv = (htab->glink->size - GLINK_PLTRESOLVE + 8) >> 2;
- if (adv < 64)
- *p++ = DW_CFA_advance_loc + adv;
- else if (adv < 256)
- {
- *p++ = DW_CFA_advance_loc1;
- *p++ = adv;
- }
- else if (adv < 65536)
- {
- *p++ = DW_CFA_advance_loc2;
- bfd_put_16 (htab->elf.dynobj, adv, p);
- p += 2;
- }
- else
- {
- *p++ = DW_CFA_advance_loc4;
- bfd_put_32 (htab->elf.dynobj, adv, p);
- p += 4;
- }
- *p++ = DW_CFA_register;
- *p++ = 65;
- p++;
- *p++ = DW_CFA_advance_loc + 4;
- *p++ = DW_CFA_restore_extended;
- *p++ = 65;
- }
- BFD_ASSERT ((bfd_vma) ((p + 3 - htab->glink_eh_frame->contents) & -4)
- == htab->glink_eh_frame->size);
if (htab->glink_eh_frame->sec_info_type == SEC_INFO_TYPE_EH_FRAME
&& !_bfd_elf_write_section_eh_frame (output_bfd, info,
@@ -9094,7 +9692,7 @@
#define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
#define bfd_elf32_bfd_relax_section ppc_elf_relax_section
#define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
+#define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
#define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
#define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
#define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
@@ -9115,6 +9713,7 @@
#define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
#define elf_backend_fake_sections ppc_elf_fake_sections
#define elf_backend_additional_program_headers ppc_elf_additional_program_headers
+#define elf_backend_modify_segment_map ppc_elf_modify_segment_map
#define elf_backend_grok_prstatus ppc_elf_grok_prstatus
#define elf_backend_grok_psinfo ppc_elf_grok_psinfo
#define elf_backend_write_core_note ppc_elf_write_core_note
@@ -9127,6 +9726,8 @@
#define elf_backend_action_discarded ppc_elf_action_discarded
#define elf_backend_init_index_section _bfd_elf_init_1_index_section
#define elf_backend_post_process_headers _bfd_elf_set_osabi
+#define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
+#define elf_backend_section_processing ppc_elf_section_processing
#include "elf32-target.h"
diff --git a/bfd/elf32-ppc.h b/bfd/elf32-ppc.h
index 4becb30..0bf973c 100644
--- a/bfd/elf32-ppc.h
+++ b/bfd/elf32-ppc.h
@@ -1,5 +1,5 @@
/* PowerPC-specific support for 64-bit ELF.
- Copyright 2003, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 2003, 2005, 2007, 2009, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -31,3 +31,6 @@
asection *ppc_elf_tls_setup (bfd *, struct bfd_link_info *, int);
bfd_boolean ppc_elf_tls_optimize (bfd *, struct bfd_link_info *);
void ppc_elf_set_sdata_syms (bfd *, struct bfd_link_info *);
+extern bfd_boolean ppc_elf_modify_segment_map (bfd *,
+ struct bfd_link_info * ATTRIBUTE_UNUSED);
+extern bfd_boolean ppc_elf_section_processing (bfd *, Elf_Internal_Shdr *);
diff --git a/bfd/elf32-rx.c b/bfd/elf32-rx.c
index e9bb0e8..23729f8 100644
--- a/bfd/elf32-rx.c
+++ b/bfd/elf32-rx.c
@@ -3060,7 +3060,8 @@
{
Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
- if (phdr[i].p_offset <= (bfd_vma) sec->sh_offset
+ if (phdr[i].p_filesz
+ && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
&& (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
{
/* Found one! The difference between the two addresses,
@@ -3084,7 +3085,8 @@
bsec = abfd->sections;
while (bsec)
{
- if (phdr[i].p_vaddr <= bsec->vma
+ if (phdr[i].p_filesz
+ && phdr[i].p_vaddr <= bsec->vma
&& bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
{
bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
diff --git a/bfd/elf32-score7.c b/bfd/elf32-score7.c
index b18991b..7ec774a 100644
--- a/bfd/elf32-score7.c
+++ b/bfd/elf32-score7.c
@@ -22,8 +22,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
#include "libiberty.h"
#include "elf-bfd.h"
diff --git a/bfd/elf32-tilepro.c b/bfd/elf32-tilepro.c
index 4ae4009..5c1dbe3 100644
--- a/bfd/elf32-tilepro.c
+++ b/bfd/elf32-tilepro.c
@@ -18,8 +18,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/tilepro.h"
diff --git a/bfd/elf32-vax.c b/bfd/elf32-vax.c
index 7564f03..014af9e 100644
--- a/bfd/elf32-vax.c
+++ b/bfd/elf32-vax.c
@@ -1691,14 +1691,12 @@
}
}
- if (!strcmp (bfd_get_section_name (input_bfd, input_section),
- ".text") != 0 ||
- (info->shared
- && ELF32_R_TYPE(outrel.r_info) != R_VAX_32
- && ELF32_R_TYPE(outrel.r_info) != R_VAX_RELATIVE
- && ELF32_R_TYPE(outrel.r_info) != R_VAX_COPY
- && ELF32_R_TYPE(outrel.r_info) != R_VAX_JMP_SLOT
- && ELF32_R_TYPE(outrel.r_info) != R_VAX_GLOB_DAT))
+ if ((input_section->flags & SEC_CODE) != 0
+ || (ELF32_R_TYPE (outrel.r_info) != R_VAX_32
+ && ELF32_R_TYPE (outrel.r_info) != R_VAX_RELATIVE
+ && ELF32_R_TYPE (outrel.r_info) != R_VAX_COPY
+ && ELF32_R_TYPE (outrel.r_info) != R_VAX_JMP_SLOT
+ && ELF32_R_TYPE (outrel.r_info) != R_VAX_GLOB_DAT))
{
if (h != NULL)
(*_bfd_error_handler)
diff --git a/bfd/elf64-hppa.c b/bfd/elf64-hppa.c
index e3de2a6..6087fe5 100644
--- a/bfd/elf64-hppa.c
+++ b/bfd/elf64-hppa.c
@@ -20,8 +20,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "alloca-conf.h"
#include "sysdep.h"
+#include "alloca-conf.h"
#include "bfd.h"
#include "libbfd.h"
#include "elf-bfd.h"
diff --git a/bfd/elf64-mips.c b/bfd/elf64-mips.c
index a835f66..e02f969 100644
--- a/bfd/elf64-mips.c
+++ b/bfd/elf64-mips.c
@@ -2708,6 +2708,7 @@
mirel.r_offset = src[0].r_offset;
BFD_ASSERT(src[0].r_offset == src[1].r_offset);
+ BFD_ASSERT(src[0].r_offset == src[2].r_offset);
mirel.r_type = ELF64_MIPS_R_TYPE (src[0].r_info);
mirel.r_sym = ELF64_R_SYM (src[0].r_info);
@@ -4125,7 +4126,7 @@
#define elf_backend_grok_prstatus elf64_mips_grok_prstatus
#define elf_backend_grok_psinfo elf64_mips_grok_psinfo
-#define elf_backend_got_header_size (4 * MIPS_RESERVED_GOTNO)
+#define elf_backend_got_header_size (8 * MIPS_RESERVED_GOTNO)
/* MIPS ELF64 can use a mixture of REL and RELA, but some Relocations
work better/work only in RELA, so we default to this. */
diff --git a/bfd/elf64-mmix.c b/bfd/elf64-mmix.c
index 24d16ad..f49f66c 100644
--- a/bfd/elf64-mmix.c
+++ b/bfd/elf64-mmix.c
@@ -1772,7 +1772,9 @@
first_global = 255;
else
{
- first_global = bfd_get_section_vma (abfd, regsec) / 8;
+ first_global
+ = bfd_get_section_vma (input_section->output_section->owner,
+ regsec) / 8;
if (strcmp (bfd_get_section_name (symsec->owner, symsec),
MMIX_REG_CONTENTS_SECTION_NAME) == 0)
{
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index e3035a0..e10e109 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -55,7 +55,7 @@
static bfd_reloc_status_type ppc64_elf_unhandled_reloc
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_vma opd_entry_value
- (asection *, bfd_vma, asection **, bfd_vma *);
+ (asection *, bfd_vma, asection **, bfd_vma *, bfd_boolean);
#define TARGET_LITTLE_SYM bfd_elf64_powerpcle_vec
#define TARGET_LITTLE_NAME "elf64-powerpcle"
@@ -2347,7 +2347,7 @@
{
bfd_vma dest = opd_entry_value (symbol->section,
symbol->value + reloc_entry->addend,
- NULL, NULL);
+ NULL, NULL, FALSE);
if (dest != (bfd_vma) -1)
reloc_entry->addend = dest - (symbol->value
+ symbol->section->output_section->vma
@@ -4245,7 +4245,7 @@
".eh_frame",
flags);
if (htab->glink_eh_frame == NULL
- || !bfd_set_section_alignment (abfd, htab->glink_eh_frame, 2))
+ || !bfd_set_section_alignment (dynobj, htab->glink_eh_frame, 2))
return FALSE;
}
@@ -5522,7 +5522,8 @@
opd_entry_value (asection *opd_sec,
bfd_vma offset,
asection **code_sec,
- bfd_vma *code_off)
+ bfd_vma *code_off,
+ bfd_boolean in_code_sec)
{
bfd *opd_bfd = opd_sec->owner;
Elf_Internal_Rela *relocs;
@@ -5533,46 +5534,39 @@
at a final linked executable with addr2line or somesuch. */
if (opd_sec->reloc_count == 0)
{
- /* PR 13897: Cache the loaded section to speed up the search. */
- static asection * buf_sec = NULL;
- static char buf[8];
- static bfd_vma buf_val = 0;
- static asection * buf_likely = NULL;
-
- if (buf_sec == opd_sec)
- {
- if (code_sec != NULL)
- * code_sec = buf_likely;
- if (code_off != NULL && buf_likely != NULL)
- * code_off = buf_val - buf_likely->vma;
- return buf_val;
- }
-
+ char buf[8];
+
if (!bfd_get_section_contents (opd_bfd, opd_sec, buf, offset, 8))
return (bfd_vma) -1;
- buf_sec = opd_sec;
- buf_val = bfd_get_64 (opd_bfd, buf);
+ val = bfd_get_64 (opd_bfd, buf);
if (code_sec != NULL)
{
- asection *sec;
+ asection *sec, *likely = NULL;
- buf_likely = NULL;
- for (sec = opd_bfd->sections; sec != NULL; sec = sec->next)
- if (sec->vma <= buf_val
- && (sec->flags & SEC_LOAD) != 0
- && (sec->flags & SEC_ALLOC) != 0)
- buf_likely = sec;
- if (buf_likely != NULL)
+ if (in_code_sec)
{
- *code_sec = buf_likely;
+ sec = *code_sec;
+ if (sec->vma <= val
+ && val < sec->vma + sec->size)
+ likely = sec;
+ else
+ val = -1;
+ }
+ else
+ for (sec = opd_bfd->sections; sec != NULL; sec = sec->next)
+ if (sec->vma <= val
+ && (sec->flags & SEC_LOAD) != 0
+ && (sec->flags & SEC_ALLOC) != 0)
+ likely = sec;
+ if (likely != NULL)
+ {
+ *code_sec = likely;
if (code_off != NULL)
- *code_off = buf_val - buf_likely->vma;
+ *code_off = val - likely->vma;
}
}
- else
- buf_likely = NULL;
- return buf_val;
+ return val;
}
BFD_ASSERT (is_ppc64_elf (opd_bfd));
@@ -5643,7 +5637,12 @@
if (code_off != NULL)
*code_off = val;
if (code_sec != NULL)
- *code_sec = sec;
+ {
+ if (in_code_sec && *code_sec != sec)
+ return -1;
+ else
+ *code_sec = sec;
+ }
if (sec != NULL && sec->output_section != NULL)
val += sec->output_section->vma + sec->output_offset;
}
@@ -5654,20 +5653,53 @@
return val;
}
-/* Return TRUE iff the ELF symbol SYM might be a function. Set *CODE_SEC
- and *CODE_OFF to the function's entry point. */
+/* If the ELF symbol SYM might be a function in SEC, return the
+ function size and set *CODE_OFF to the function's entry point,
+ otherwise return zero. */
-static bfd_boolean
-ppc64_elf_maybe_function_sym (const asymbol *sym,
- asection **code_sec, bfd_vma *code_off)
+static bfd_size_type
+ppc64_elf_maybe_function_sym (const asymbol *sym, asection *sec,
+ bfd_vma *code_off)
{
- if (_bfd_elf_maybe_function_sym (sym, code_sec, code_off))
+ bfd_size_type size;
+
+ if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
+ | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0)
+ return 0;
+
+ size = 0;
+ if (!(sym->flags & BSF_SYNTHETIC))
+ size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
+
+ if (strcmp (sym->section->name, ".opd") == 0)
{
- if (strcmp (sym->section->name, ".opd") == 0)
- opd_entry_value (sym->section, sym->value, code_sec, code_off);
- return TRUE;
+ if (opd_entry_value (sym->section, sym->value,
+ &sec, code_off, TRUE) == (bfd_vma) -1)
+ return 0;
+ /* An old ABI binary with dot-syms has a size of 24 on the .opd
+ symbol. This size has nothing to do with the code size of the
+ function, which is what we're supposed to return, but the
+ code size isn't available without looking up the dot-sym.
+ However, doing that would be a waste of time particularly
+ since elf_find_function will look at the dot-sym anyway.
+ Now, elf_find_function will keep the largest size of any
+ function sym found at the code address of interest, so return
+ 1 here to avoid it incorrectly caching a larger function size
+ for a small function. This does mean we return the wrong
+ size for a new-ABI function of size 24, but all that does is
+ disable caching for such functions. */
+ if (size == 24)
+ size = 1;
}
- return FALSE;
+ else
+ {
+ if (sym->section != sec)
+ return 0;
+ *code_off = sym->value;
+ }
+ if (size == 0)
+ size = 1;
+ return size;
}
/* Return true if symbol is defined in a regular object file. */
@@ -5747,7 +5779,7 @@
else if (get_opd_info (eh->elf.root.u.def.section) != NULL
&& opd_entry_value (eh->elf.root.u.def.section,
eh->elf.root.u.def.value,
- &sec, NULL) != (bfd_vma) -1)
+ &sec, NULL, FALSE) != (bfd_vma) -1)
sec->flags |= SEC_KEEP;
sec = eh->elf.root.u.def.section;
@@ -5798,7 +5830,7 @@
else if (get_opd_info (eh->elf.root.u.def.section) != NULL
&& opd_entry_value (eh->elf.root.u.def.section,
eh->elf.root.u.def.value,
- &code_sec, NULL) != (bfd_vma) -1)
+ &code_sec, NULL, FALSE) != (bfd_vma) -1)
code_sec->flags |= SEC_KEEP;
}
@@ -5858,7 +5890,7 @@
else if (get_opd_info (eh->elf.root.u.def.section) != NULL
&& opd_entry_value (eh->elf.root.u.def.section,
eh->elf.root.u.def.value,
- &rsec, NULL) != (bfd_vma) -1)
+ &rsec, NULL, FALSE) != (bfd_vma) -1)
eh->elf.root.u.def.section->gc_mark = 1;
else
rsec = h->root.u.def.section;
@@ -6327,7 +6359,7 @@
&& opd_entry_value (fdh->elf.root.u.def.section,
fdh->elf.root.u.def.value,
&fh->elf.root.u.def.section,
- &fh->elf.root.u.def.value) != (bfd_vma) -1)
+ &fh->elf.root.u.def.value, FALSE) != (bfd_vma) -1)
{
fh->elf.root.type = fdh->elf.root.type;
fh->elf.forced_local = 1;
@@ -10918,7 +10950,8 @@
sym_value += adjust;
}
- dest = opd_entry_value (sym_sec, sym_value, &sym_sec, NULL);
+ dest = opd_entry_value (sym_sec, sym_value,
+ &sym_sec, NULL, FALSE);
if (dest == (bfd_vma) -1)
continue;
}
@@ -11493,7 +11526,7 @@
sym_value += adjust;
}
dest = opd_entry_value (sym_sec, sym_value,
- &code_sec, &code_value);
+ &code_sec, &code_value, FALSE);
if (dest != (bfd_vma) -1)
{
destination = dest;
@@ -11662,9 +11695,9 @@
if (htab->glink_eh_frame != NULL
&& !bfd_is_abs_section (htab->glink_eh_frame->output_section)
- && (htab->glink_eh_frame->flags & SEC_EXCLUDE) == 0)
+ && htab->glink_eh_frame->output_section->size != 0)
{
- bfd_size_type size = 0;
+ size_t size = 0, align;
for (stub_sec = htab->stub_bfd->sections;
stub_sec != NULL;
@@ -11675,6 +11708,10 @@
size += 24;
if (size != 0)
size += sizeof (glink_eh_frame_cie);
+ align = 1;
+ align <<= htab->glink_eh_frame->output_section->alignment_power;
+ align -= 1;
+ size = (size + align) & ~align;
htab->glink_eh_frame->rawsize = htab->glink_eh_frame->size;
htab->glink_eh_frame->size = size;
}
@@ -11916,17 +11953,21 @@
&& htab->glink_eh_frame->size != 0)
{
bfd_vma val;
+ bfd_byte *last_fde;
+ size_t last_fde_len, size, align, pad;
p = bfd_zalloc (htab->glink_eh_frame->owner, htab->glink_eh_frame->size);
if (p == NULL)
return FALSE;
htab->glink_eh_frame->contents = p;
+ last_fde = p;
htab->glink_eh_frame->rawsize = htab->glink_eh_frame->size;
memcpy (p, glink_eh_frame_cie, sizeof (glink_eh_frame_cie));
/* CIE length (rewrite in case little-endian). */
- bfd_put_32 (htab->elf.dynobj, sizeof (glink_eh_frame_cie) - 4, p);
+ last_fde_len = sizeof (glink_eh_frame_cie) - 4;
+ bfd_put_32 (htab->elf.dynobj, last_fde_len, p);
p += sizeof (glink_eh_frame_cie);
for (stub_sec = htab->stub_bfd->sections;
@@ -11934,6 +11975,8 @@
stub_sec = stub_sec->next)
if ((stub_sec->flags & SEC_LINKER_CREATED) == 0)
{
+ last_fde = p;
+ last_fde_len = 16;
/* FDE length. */
bfd_put_32 (htab->elf.dynobj, 16, p);
p += 4;
@@ -11966,6 +12009,8 @@
}
if (htab->glink != NULL && htab->glink->size != 0)
{
+ last_fde = p;
+ last_fde_len = 20;
/* FDE length. */
bfd_put_32 (htab->elf.dynobj, 20, p);
p += 4;
@@ -12003,7 +12048,16 @@
*p++ = DW_CFA_restore_extended;
*p++ = 65;
}
- htab->glink_eh_frame->size = p - htab->glink_eh_frame->contents;
+ /* Subsume any padding into the last FDE if user .eh_frame
+ sections are aligned more than glink_eh_frame. Otherwise any
+ zero padding will be seen as a terminator. */
+ size = p - htab->glink_eh_frame->contents;
+ align = 1;
+ align <<= htab->glink_eh_frame->output_section->alignment_power;
+ align -= 1;
+ pad = ((size + align) & ~align) - size;
+ htab->glink_eh_frame->size = size + pad;
+ bfd_put_32 (htab->elf.dynobj, last_fde_len + pad, last_fde);
}
/* Build the stubs as directed by the stub hash table. */
@@ -12888,7 +12942,7 @@
bfd_vma off = (relocation + addend
- sec->output_section->vma
- sec->output_offset);
- bfd_vma dest = opd_entry_value (sec, off, NULL, NULL);
+ bfd_vma dest = opd_entry_value (sec, off, NULL, NULL, FALSE);
if (dest != (bfd_vma) -1)
{
relocation = dest;
@@ -13871,7 +13925,7 @@
ppc64_elf_finish_dynamic_symbol (bfd *output_bfd,
struct bfd_link_info *info,
struct elf_link_hash_entry *h,
- Elf_Internal_Sym *sym)
+ Elf_Internal_Sym *sym ATTRIBUTE_UNUSED)
{
struct ppc_link_hash_table *htab;
struct plt_entry *ent;
@@ -13940,10 +13994,6 @@
bfd_elf64_swap_reloca_out (output_bfd, &rela, loc);
}
- /* Mark some specially defined symbols as absolute. */
- if (strcmp (h->root.root.string, "_DYNAMIC") == 0)
- sym->st_shndx = SHN_ABS;
-
return TRUE;
}
diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c
index a5ad1df..d9cec67 100644
--- a/bfd/elf64-x86-64.c
+++ b/bfd/elf64-x86-64.c
@@ -993,24 +993,17 @@
abort ();
if (!info->no_ld_generated_unwind_info
- && bfd_get_section_by_name (dynobj, ".eh_frame") == NULL
+ && htab->plt_eh_frame == NULL
&& htab->elf.splt != NULL)
{
- const struct elf_x86_64_backend_data *const abed
- = get_elf_x86_64_backend_data (dynobj);
- flagword flags = get_elf_backend_data (dynobj)->dynamic_sec_flags;
+ flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY
+ | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED);
htab->plt_eh_frame
- = bfd_make_section_with_flags (dynobj, ".eh_frame",
- flags | SEC_READONLY);
+ = bfd_make_section_anyway_with_flags (dynobj, ".eh_frame", flags);
if (htab->plt_eh_frame == NULL
|| !bfd_set_section_alignment (dynobj, htab->plt_eh_frame, 3))
return FALSE;
-
- htab->plt_eh_frame->size = abed->eh_frame_plt_size;
- htab->plt_eh_frame->contents
- = bfd_alloc (dynobj, htab->plt_eh_frame->size);
- memcpy (htab->plt_eh_frame->contents,
- abed->eh_frame_plt, abed->eh_frame_plt_size);
}
return TRUE;
}
@@ -2815,6 +2808,17 @@
htab->elf.sgotplt->size = 0;
}
+ if (htab->plt_eh_frame != NULL
+ && htab->elf.splt != NULL
+ && htab->elf.splt->size != 0
+ && !bfd_is_abs_section (htab->elf.splt->output_section)
+ && _bfd_elf_eh_frame_present (info))
+ {
+ const struct elf_x86_64_backend_data *arch_data
+ = (const struct elf_x86_64_backend_data *) bed->arch_data;
+ htab->plt_eh_frame->size = arch_data->eh_frame_plt_size;
+ }
+
/* We now have determined the sizes of the various dynamic sections.
Allocate memory for them. */
relocs = FALSE;
@@ -2828,6 +2832,7 @@
|| s == htab->elf.sgotplt
|| s == htab->elf.iplt
|| s == htab->elf.igotplt
+ || s == htab->plt_eh_frame
|| s == htab->sdynsharablebss
|| s == htab->sdynbss)
{
@@ -2880,11 +2885,16 @@
}
if (htab->plt_eh_frame != NULL
- && htab->elf.splt != NULL
- && htab->elf.splt->size != 0
- && (htab->elf.splt->flags & SEC_EXCLUDE) == 0)
- bfd_put_32 (dynobj, htab->elf.splt->size,
- htab->plt_eh_frame->contents + PLT_FDE_LEN_OFFSET);
+ && htab->plt_eh_frame->contents != NULL)
+ {
+ const struct elf_x86_64_backend_data *arch_data
+ = (const struct elf_x86_64_backend_data *) bed->arch_data;
+
+ memcpy (htab->plt_eh_frame->contents,
+ arch_data->eh_frame_plt, htab->plt_eh_frame->size);
+ bfd_put_32 (dynobj, htab->elf.splt->size,
+ htab->plt_eh_frame->contents + PLT_FDE_LEN_OFFSET);
+ }
if (htab->elf.dynamic_sections_created)
{
@@ -3703,6 +3713,36 @@
outrel.r_info = htab->r_info (0,
R_X86_64_RELATIVE64);
outrel.r_addend = relocation + rel->r_addend;
+ /* Check addend overflow. */
+ if ((outrel.r_addend & 0x80000000)
+ != (rel->r_addend & 0x80000000))
+ {
+ const char *name;
+ int addend = rel->r_addend;
+ if (h && h->root.root.string)
+ name = h->root.root.string;
+ else
+ name = bfd_elf_sym_name (input_bfd, symtab_hdr,
+ sym, NULL);
+ if (addend < 0)
+ (*_bfd_error_handler)
+ (_("%B: addend -0x%x in relocation %s against "
+ "symbol `%s' at 0x%lx in section `%A' is "
+ "out of range"),
+ input_bfd, input_section, addend,
+ x86_64_elf_howto_table[r_type].name,
+ name, (unsigned long) rel->r_offset);
+ else
+ (*_bfd_error_handler)
+ (_("%B: addend 0x%x in relocation %s against "
+ "symbol `%s' at 0x%lx in section `%A' is "
+ "out of range"),
+ input_bfd, input_section, addend,
+ x86_64_elf_howto_table[r_type].name,
+ name, (unsigned long) rel->r_offset);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
}
else
{
@@ -4252,7 +4292,7 @@
elf_x86_64_finish_dynamic_symbol (bfd *output_bfd,
struct bfd_link_info *info,
struct elf_link_hash_entry *h,
- Elf_Internal_Sym *sym)
+ Elf_Internal_Sym *sym ATTRIBUTE_UNUSED)
{
struct elf_x86_64_link_hash_table *htab;
const struct elf_x86_64_backend_data *const abed
@@ -4497,13 +4537,6 @@
elf_append_rela (output_bfd, s, &rela);
}
- /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
- be NULL for local symbols. */
- if (sym != NULL
- && (strcmp (h->root.root.string, "_DYNAMIC") == 0
- || h == htab->elf.hgot))
- sym->st_shndx = SHN_ABS;
-
return TRUE;
}
@@ -4531,6 +4564,7 @@
switch ((int) ELF32_R_TYPE (rela->r_info))
{
case R_X86_64_RELATIVE:
+ case R_X86_64_RELATIVE64:
return reloc_class_relative;
case R_X86_64_JUMP_SLOT:
return reloc_class_plt;
@@ -4727,7 +4761,8 @@
}
/* Adjust .eh_frame for .plt section. */
- if (htab->plt_eh_frame != NULL)
+ if (htab->plt_eh_frame != NULL
+ && htab->plt_eh_frame->contents != NULL)
{
if (htab->elf.splt != NULL
&& htab->elf.splt->size != 0
diff --git a/bfd/elfcode.h b/bfd/elfcode.h
index ea83ea0..ea601d9 100644
--- a/bfd/elfcode.h
+++ b/bfd/elfcode.h
@@ -1639,7 +1639,7 @@
(bfd *templ,
bfd_vma ehdr_vma,
bfd_vma *loadbasep,
- int (*target_read_memory) (bfd_vma, bfd_byte *, int))
+ int (*target_read_memory) (bfd_vma, bfd_byte *, size_t))
{
Elf_External_Ehdr x_ehdr; /* Elf file header, external form */
Elf_Internal_Ehdr i_ehdr; /* Elf file header, internal form */
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 5feea5e..1e2c9bd 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -1255,15 +1255,15 @@
h = *sym_hash;
}
- if ((h->root.u.undef.next || info->hash->undefs_tail == &h->root)
- && bfd_is_und_section (sec))
+ /* If the old symbol was undefined before, then it will still be
+ on the undefs list. If the new symbol is undefined or
+ common, we can't make it bfd_link_hash_new here, because new
+ undefined or common symbols will be added to the undefs list
+ by _bfd_generic_link_add_one_symbol. Symbols may not be
+ added twice to the undefs list. Also, if the new symbol is
+ undefweak then we don't want to lose the strong undef. */
+ if (h->root.u.undef.next || info->hash->undefs_tail == &h->root)
{
- /* If the new symbol is undefined and the old symbol was
- also undefined before, we need to make sure
- _bfd_generic_link_add_one_symbol doesn't mess
- up the linker hash table undefs list. Since the old
- definition came from a dynamic object, it is still on the
- undefs list. */
h->root.type = bfd_link_hash_undefined;
h->root.u.undef.abfd = abfd;
}
@@ -1273,11 +1273,18 @@
h->root.u.undef.abfd = NULL;
}
- if (h->def_dynamic)
+ if (ELF_ST_VISIBILITY (sym->st_other) != STV_PROTECTED)
{
- h->def_dynamic = 0;
- h->ref_dynamic = 1;
+ /* If the new symbol is hidden or internal, completely undo
+ any dynamic link state. */
+ (*bed->elf_backend_hide_symbol) (info, h, TRUE);
+ h->forced_local = 0;
+ h->ref_dynamic = 0;
}
+ else
+ h->ref_dynamic = 1;
+ h->def_dynamic = 0;
+ h->dynamic_def = 0;
/* FIXME: Should we check type and size for protected symbol? */
h->size = 0;
h->type = 0;
@@ -5647,17 +5654,9 @@
&& ! (*bed->elf_backend_always_size_sections) (output_bfd, info))
return FALSE;
- if (! _bfd_elf_maybe_strip_eh_frame_hdr (info))
- return FALSE;
-
dynobj = elf_hash_table (info)->dynobj;
- /* If there were no dynamic objects in the link, there is nothing to
- do here. */
- if (dynobj == NULL)
- return TRUE;
-
- if (elf_hash_table (info)->dynamic_sections_created)
+ if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created)
{
struct elf_info_failed eif;
struct elf_link_hash_entry *h;
@@ -5960,11 +5959,15 @@
/* The backend must work out the sizes of all the other dynamic
sections. */
- if (bed->elf_backend_size_dynamic_sections
+ if (dynobj != NULL
+ && bed->elf_backend_size_dynamic_sections != NULL
&& ! (*bed->elf_backend_size_dynamic_sections) (output_bfd, info))
return FALSE;
- if (elf_hash_table (info)->dynamic_sections_created)
+ if (! _bfd_elf_maybe_strip_eh_frame_hdr (info))
+ return FALSE;
+
+ if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created)
{
unsigned long section_sym_count;
struct bfd_elf_version_tree *verdefs;
@@ -7471,7 +7474,7 @@
{
bfd_boolean failed;
bfd_boolean localsyms;
- struct elf_final_link_info *flaginfo;
+ struct elf_final_link_info *flinfo;
};
@@ -7548,7 +7551,7 @@
static bfd_boolean
resolve_symbol (const char *name,
bfd *input_bfd,
- struct elf_final_link_info *flaginfo,
+ struct elf_final_link_info *flinfo,
bfd_vma *result,
Elf_Internal_Sym *isymbuf,
size_t locsymcount)
@@ -7577,7 +7580,7 @@
#endif
if (candidate && strcmp (candidate, name) == 0)
{
- asection *sec = flaginfo->sections [i];
+ asection *sec = flinfo->sections [i];
*result = _bfd_elf_rel_local_sym (input_bfd, sym, &sec, 0);
*result += sec->output_offset + sec->output_section->vma;
@@ -7590,7 +7593,7 @@
}
/* Hmm, haven't found it yet. perhaps it is a global. */
- global_entry = bfd_link_hash_lookup (flaginfo->info->hash, name,
+ global_entry = bfd_link_hash_lookup (flinfo->info->hash, name,
FALSE, FALSE, TRUE);
if (!global_entry)
return FALSE;
@@ -7659,7 +7662,7 @@
eval_symbol (bfd_vma *result,
const char **symp,
bfd *input_bfd,
- struct elf_final_link_info *flaginfo,
+ struct elf_final_link_info *flinfo,
bfd_vma dot,
Elf_Internal_Sym *isymbuf,
size_t locsymcount,
@@ -7719,8 +7722,8 @@
if (symbol_is_section)
{
- if (!resolve_section (symbuf, flaginfo->output_bfd->sections, result)
- && !resolve_symbol (symbuf, input_bfd, flaginfo, result,
+ if (!resolve_section (symbuf, flinfo->output_bfd->sections, result)
+ && !resolve_symbol (symbuf, input_bfd, flinfo, result,
isymbuf, locsymcount))
{
undefined_reference ("section", symbuf);
@@ -7729,9 +7732,9 @@
}
else
{
- if (!resolve_symbol (symbuf, input_bfd, flaginfo, result,
+ if (!resolve_symbol (symbuf, input_bfd, flinfo, result,
isymbuf, locsymcount)
- && !resolve_section (symbuf, flaginfo->output_bfd->sections,
+ && !resolve_section (symbuf, flinfo->output_bfd->sections,
result))
{
undefined_reference ("symbol", symbuf);
@@ -7750,7 +7753,7 @@
if (*sym == ':') \
++sym; \
*symp = sym; \
- if (!eval_symbol (&a, symp, input_bfd, flaginfo, dot, \
+ if (!eval_symbol (&a, symp, input_bfd, flinfo, dot, \
isymbuf, locsymcount, signed_p)) \
return FALSE; \
if (signed_p) \
@@ -7767,11 +7770,11 @@
if (*sym == ':') \
++sym; \
*symp = sym; \
- if (!eval_symbol (&a, symp, input_bfd, flaginfo, dot, \
+ if (!eval_symbol (&a, symp, input_bfd, flinfo, dot, \
isymbuf, locsymcount, signed_p)) \
return FALSE; \
++*symp; \
- if (!eval_symbol (&b, symp, input_bfd, flaginfo, dot, \
+ if (!eval_symbol (&b, symp, input_bfd, flinfo, dot, \
isymbuf, locsymcount, signed_p)) \
return FALSE; \
if (signed_p) \
@@ -8369,24 +8372,24 @@
/* Flush the output symbols to the file. */
static bfd_boolean
-elf_link_flush_output_syms (struct elf_final_link_info *flaginfo,
+elf_link_flush_output_syms (struct elf_final_link_info *flinfo,
const struct elf_backend_data *bed)
{
- if (flaginfo->symbuf_count > 0)
+ if (flinfo->symbuf_count > 0)
{
Elf_Internal_Shdr *hdr;
file_ptr pos;
bfd_size_type amt;
- hdr = &elf_tdata (flaginfo->output_bfd)->symtab_hdr;
+ hdr = &elf_tdata (flinfo->output_bfd)->symtab_hdr;
pos = hdr->sh_offset + hdr->sh_size;
- amt = flaginfo->symbuf_count * bed->s->sizeof_sym;
- if (bfd_seek (flaginfo->output_bfd, pos, SEEK_SET) != 0
- || bfd_bwrite (flaginfo->symbuf, amt, flaginfo->output_bfd) != amt)
+ amt = flinfo->symbuf_count * bed->s->sizeof_sym;
+ if (bfd_seek (flinfo->output_bfd, pos, SEEK_SET) != 0
+ || bfd_bwrite (flinfo->symbuf, amt, flinfo->output_bfd) != amt)
return FALSE;
hdr->sh_size += amt;
- flaginfo->symbuf_count = 0;
+ flinfo->symbuf_count = 0;
}
return TRUE;
@@ -8395,7 +8398,7 @@
/* Add a symbol to the output symbol table. */
static int
-elf_link_output_sym (struct elf_final_link_info *flaginfo,
+elf_link_output_sym (struct elf_final_link_info *flinfo,
const char *name,
Elf_Internal_Sym *elfsym,
asection *input_sec,
@@ -8408,11 +8411,11 @@
struct elf_link_hash_entry *);
const struct elf_backend_data *bed;
- bed = get_elf_backend_data (flaginfo->output_bfd);
+ bed = get_elf_backend_data (flinfo->output_bfd);
output_symbol_hook = bed->elf_backend_link_output_symbol_hook;
if (output_symbol_hook != NULL)
{
- int ret = (*output_symbol_hook) (flaginfo->info, name, elfsym, input_sec, h);
+ int ret = (*output_symbol_hook) (flinfo->info, name, elfsym, input_sec, h);
if (ret != 1)
return ret;
}
@@ -8423,41 +8426,41 @@
elfsym->st_name = 0;
else
{
- elfsym->st_name = (unsigned long) _bfd_stringtab_add (flaginfo->symstrtab,
+ elfsym->st_name = (unsigned long) _bfd_stringtab_add (flinfo->symstrtab,
name, TRUE, FALSE);
if (elfsym->st_name == (unsigned long) -1)
return 0;
}
- if (flaginfo->symbuf_count >= flaginfo->symbuf_size)
+ if (flinfo->symbuf_count >= flinfo->symbuf_size)
{
- if (! elf_link_flush_output_syms (flaginfo, bed))
+ if (! elf_link_flush_output_syms (flinfo, bed))
return 0;
}
- dest = flaginfo->symbuf + flaginfo->symbuf_count * bed->s->sizeof_sym;
- destshndx = flaginfo->symshndxbuf;
+ dest = flinfo->symbuf + flinfo->symbuf_count * bed->s->sizeof_sym;
+ destshndx = flinfo->symshndxbuf;
if (destshndx != NULL)
{
- if (bfd_get_symcount (flaginfo->output_bfd) >= flaginfo->shndxbuf_size)
+ if (bfd_get_symcount (flinfo->output_bfd) >= flinfo->shndxbuf_size)
{
bfd_size_type amt;
- amt = flaginfo->shndxbuf_size * sizeof (Elf_External_Sym_Shndx);
+ amt = flinfo->shndxbuf_size * sizeof (Elf_External_Sym_Shndx);
destshndx = (Elf_External_Sym_Shndx *) bfd_realloc (destshndx,
amt * 2);
if (destshndx == NULL)
return 0;
- flaginfo->symshndxbuf = destshndx;
+ flinfo->symshndxbuf = destshndx;
memset ((char *) destshndx + amt, 0, amt);
- flaginfo->shndxbuf_size *= 2;
+ flinfo->shndxbuf_size *= 2;
}
- destshndx += bfd_get_symcount (flaginfo->output_bfd);
+ destshndx += bfd_get_symcount (flinfo->output_bfd);
}
- bed->s->swap_symbol_out (flaginfo->output_bfd, elfsym, dest, destshndx);
- flaginfo->symbuf_count += 1;
- bfd_get_symcount (flaginfo->output_bfd) += 1;
+ bed->s->swap_symbol_out (flinfo->output_bfd, elfsym, dest, destshndx);
+ flinfo->symbuf_count += 1;
+ bfd_get_symcount (flinfo->output_bfd) += 1;
return 1;
}
@@ -8649,7 +8652,7 @@
{
struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) bh;
struct elf_outext_info *eoinfo = (struct elf_outext_info *) data;
- struct elf_final_link_info *flaginfo = eoinfo->flaginfo;
+ struct elf_final_link_info *flinfo = eoinfo->flinfo;
bfd_boolean strip;
Elf_Internal_Sym sym;
asection *input_sec;
@@ -8676,7 +8679,7 @@
return TRUE;
}
- bed = get_elf_backend_data (flaginfo->output_bfd);
+ bed = get_elf_backend_data (flinfo->output_bfd);
if (h->root.type == bfd_link_hash_undefined)
{
@@ -8695,14 +8698,16 @@
/* If we are reporting errors for this situation then do so now. */
if (!ignore_undef
&& h->ref_dynamic
- && (!h->ref_regular || flaginfo->info->gc_sections)
- && ! elf_link_check_versioned_symbol (flaginfo->info, bed, h)
- && flaginfo->info->unresolved_syms_in_shared_libs != RM_IGNORE)
+ && (!h->ref_regular || flinfo->info->gc_sections)
+ && !elf_link_check_versioned_symbol (flinfo->info, bed, h)
+ && flinfo->info->unresolved_syms_in_shared_libs != RM_IGNORE)
{
- if (! (flaginfo->info->callbacks->undefined_symbol
- (flaginfo->info, h->root.root.string,
- h->ref_regular ? NULL : h->root.u.undef.abfd,
- NULL, 0, flaginfo->info->unresolved_syms_in_shared_libs == RM_GENERATE_ERROR)))
+ if (!(flinfo->info->callbacks->undefined_symbol
+ (flinfo->info, h->root.root.string,
+ h->ref_regular ? NULL : h->root.u.undef.abfd,
+ NULL, 0,
+ (flinfo->info->unresolved_syms_in_shared_libs
+ == RM_GENERATE_ERROR))))
{
bfd_set_error (bfd_error_bad_value);
eoinfo->failed = TRUE;
@@ -8713,14 +8718,14 @@
/* We should also warn if a forced local symbol is referenced from
shared libraries. */
- if (!flaginfo->info->relocatable
- && flaginfo->info->executable
+ if (!flinfo->info->relocatable
+ && flinfo->info->executable
&& h->forced_local
&& h->ref_dynamic
&& h->def_regular
&& !h->dynamic_def
&& !h->dynamic_weak
- && ! elf_link_check_versioned_symbol (flaginfo->info, bed, h))
+ && !elf_link_check_versioned_symbol (flinfo->info, bed, h))
{
bfd *def_bfd;
const char *msg;
@@ -8736,10 +8741,10 @@
msg = _("%B: hidden symbol `%s' in %B is referenced by DSO");
else
msg = _("%B: local symbol `%s' in %B is referenced by DSO");
- def_bfd = flaginfo->output_bfd;
+ def_bfd = flinfo->output_bfd;
if (hi->root.u.def.section != bfd_abs_section_ptr)
def_bfd = hi->root.u.def.section->owner;
- (*_bfd_error_handler) (msg, flaginfo->output_bfd, def_bfd,
+ (*_bfd_error_handler) (msg, flinfo->output_bfd, def_bfd,
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
eoinfo->failed = TRUE;
@@ -8758,15 +8763,15 @@
&& !h->def_regular
&& !h->ref_regular)
strip = TRUE;
- else if (flaginfo->info->strip == strip_all)
+ else if (flinfo->info->strip == strip_all)
strip = TRUE;
- else if (flaginfo->info->strip == strip_some
- && bfd_hash_lookup (flaginfo->info->keep_hash,
+ else if (flinfo->info->strip == strip_some
+ && bfd_hash_lookup (flinfo->info->keep_hash,
h->root.root.string, FALSE, FALSE) == NULL)
strip = TRUE;
else if ((h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
- && ((flaginfo->info->strip_discarded
+ && ((flinfo->info->strip_discarded
&& discarded_section (h->root.u.def.section))
|| (h->root.u.def.section->owner != NULL
&& (h->root.u.def.section->owner->flags & BFD_PLUGIN) != 0)))
@@ -8827,13 +8832,13 @@
if (input_sec->output_section != NULL)
{
sym.st_shndx =
- _bfd_elf_section_from_bfd_section (flaginfo->output_bfd,
+ _bfd_elf_section_from_bfd_section (flinfo->output_bfd,
input_sec->output_section);
if (sym.st_shndx == SHN_BAD)
{
(*_bfd_error_handler)
(_("%B: could not find output section %A for input section %A"),
- flaginfo->output_bfd, input_sec->output_section, input_sec);
+ flinfo->output_bfd, input_sec->output_section, input_sec);
bfd_set_error (bfd_error_nonrepresentable_section);
eoinfo->failed = TRUE;
return FALSE;
@@ -8843,18 +8848,18 @@
but in nonrelocatable files they are virtual
addresses. */
sym.st_value = h->root.u.def.value + input_sec->output_offset;
- if (! flaginfo->info->relocatable)
+ if (!flinfo->info->relocatable)
{
sym.st_value += input_sec->output_section->vma;
if (h->type == STT_TLS)
{
- asection *tls_sec = elf_hash_table (flaginfo->info)->tls_sec;
+ asection *tls_sec = elf_hash_table (flinfo->info)->tls_sec;
if (tls_sec != NULL)
sym.st_value -= tls_sec->vma;
else
{
/* The TLS section may have been garbage collected. */
- BFD_ASSERT (flaginfo->info->gc_sections
+ BFD_ASSERT (flinfo->info->gc_sections
&& !input_sec->gc_mark);
}
}
@@ -8893,17 +8898,17 @@
STT_GNU_IFUNC symbol must go through PLT. */
if ((h->type == STT_GNU_IFUNC
&& h->def_regular
- && !flaginfo->info->relocatable)
+ && !flinfo->info->relocatable)
|| ((h->dynindx != -1
|| h->forced_local)
- && ((flaginfo->info->shared
+ && ((flinfo->info->shared
&& (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak))
|| !h->forced_local)
- && elf_hash_table (flaginfo->info)->dynamic_sections_created))
+ && elf_hash_table (flinfo->info)->dynamic_sections_created))
{
if (! ((*bed->elf_backend_finish_dynamic_symbol)
- (flaginfo->output_bfd, flaginfo->info, h, &sym)))
+ (flinfo->output_bfd, flinfo->info, h, &sym)))
{
eoinfo->failed = TRUE;
return FALSE;
@@ -8946,7 +8951,7 @@
/* If a non-weak symbol with non-default visibility is not defined
locally, it is a fatal error. */
- if (! flaginfo->info->relocatable
+ if (!flinfo->info->relocatable
&& ELF_ST_VISIBILITY (sym.st_other) != STV_DEFAULT
&& ELF_ST_BIND (sym.st_info) != STB_WEAK
&& h->root.type == bfd_link_hash_undefined
@@ -8960,7 +8965,7 @@
msg = _("%B: internal symbol `%s' isn't defined");
else
msg = _("%B: hidden symbol `%s' isn't defined");
- (*_bfd_error_handler) (msg, flaginfo->output_bfd, h->root.root.string);
+ (*_bfd_error_handler) (msg, flinfo->output_bfd, h->root.root.string);
bfd_set_error (bfd_error_bad_value);
eoinfo->failed = TRUE;
return FALSE;
@@ -8969,9 +8974,9 @@
/* If this symbol should be put in the .dynsym section, then put it
there now. We already know the symbol index. We also fill in
the entry in the .hash section. */
- if (flaginfo->dynsym_sec != NULL
+ if (flinfo->dynsym_sec != NULL
&& h->dynindx != -1
- && elf_hash_table (flaginfo->info)->dynamic_sections_created)
+ && elf_hash_table (flinfo->info)->dynamic_sections_created)
{
bfd_byte *esym;
@@ -8986,22 +8991,22 @@
{
(*_bfd_error_handler)
(_("%B: No symbol version section for versioned symbol `%s'"),
- flaginfo->output_bfd, h->root.root.string);
+ flinfo->output_bfd, h->root.root.string);
eoinfo->failed = TRUE;
return FALSE;
}
}
sym.st_name = h->dynstr_index;
- esym = flaginfo->dynsym_sec->contents + h->dynindx * bed->s->sizeof_sym;
- if (! check_dynsym (flaginfo->output_bfd, &sym))
+ esym = flinfo->dynsym_sec->contents + h->dynindx * bed->s->sizeof_sym;
+ if (!check_dynsym (flinfo->output_bfd, &sym))
{
eoinfo->failed = TRUE;
return FALSE;
}
- bed->s->swap_symbol_out (flaginfo->output_bfd, &sym, esym, 0);
+ bed->s->swap_symbol_out (flinfo->output_bfd, &sym, esym, 0);
- if (flaginfo->hash_sec != NULL)
+ if (flinfo->hash_sec != NULL)
{
size_t hash_entry_size;
bfd_byte *bucketpos;
@@ -9009,21 +9014,22 @@
size_t bucketcount;
size_t bucket;
- bucketcount = elf_hash_table (flaginfo->info)->bucketcount;
+ bucketcount = elf_hash_table (flinfo->info)->bucketcount;
bucket = h->u.elf_hash_value % bucketcount;
hash_entry_size
- = elf_section_data (flaginfo->hash_sec)->this_hdr.sh_entsize;
- bucketpos = ((bfd_byte *) flaginfo->hash_sec->contents
+ = elf_section_data (flinfo->hash_sec)->this_hdr.sh_entsize;
+ bucketpos = ((bfd_byte *) flinfo->hash_sec->contents
+ (bucket + 2) * hash_entry_size);
- chain = bfd_get (8 * hash_entry_size, flaginfo->output_bfd, bucketpos);
- bfd_put (8 * hash_entry_size, flaginfo->output_bfd, h->dynindx, bucketpos);
- bfd_put (8 * hash_entry_size, flaginfo->output_bfd, chain,
- ((bfd_byte *) flaginfo->hash_sec->contents
+ chain = bfd_get (8 * hash_entry_size, flinfo->output_bfd, bucketpos);
+ bfd_put (8 * hash_entry_size, flinfo->output_bfd, h->dynindx,
+ bucketpos);
+ bfd_put (8 * hash_entry_size, flinfo->output_bfd, chain,
+ ((bfd_byte *) flinfo->hash_sec->contents
+ (bucketcount + 2 + h->dynindx) * hash_entry_size));
}
- if (flaginfo->symver_sec != NULL && flaginfo->symver_sec->contents != NULL)
+ if (flinfo->symver_sec != NULL && flinfo->symver_sec->contents != NULL)
{
Elf_Internal_Versym iversym;
Elf_External_Versym *eversym;
@@ -9041,16 +9047,16 @@
iversym.vs_vers = 1;
else
iversym.vs_vers = h->verinfo.vertree->vernum + 1;
- if (flaginfo->info->create_default_symver)
+ if (flinfo->info->create_default_symver)
iversym.vs_vers++;
}
if (h->hidden)
iversym.vs_vers |= VERSYM_HIDDEN;
- eversym = (Elf_External_Versym *) flaginfo->symver_sec->contents;
+ eversym = (Elf_External_Versym *) flinfo->symver_sec->contents;
eversym += h->dynindx;
- _bfd_elf_swap_versym_out (flaginfo->output_bfd, &iversym, eversym);
+ _bfd_elf_swap_versym_out (flinfo->output_bfd, &iversym, eversym);
}
}
@@ -9059,8 +9065,8 @@
if (strip || (input_sec->flags & SEC_EXCLUDE) != 0)
return TRUE;
- indx = bfd_get_symcount (flaginfo->output_bfd);
- ret = elf_link_output_sym (flaginfo, h->root.root.string, &sym, input_sec, h);
+ indx = bfd_get_symcount (flinfo->output_bfd);
+ ret = elf_link_output_sym (flinfo, h->root.root.string, &sym, input_sec, h);
if (ret == 0)
{
eoinfo->failed = TRUE;
@@ -9174,7 +9180,7 @@
don't have to keep them in memory. */
static bfd_boolean
-elf_link_input_bfd (struct elf_final_link_info *flaginfo, bfd *input_bfd)
+elf_link_input_bfd (struct elf_final_link_info *flinfo, bfd *input_bfd)
{
int (*relocate_section)
(bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
@@ -9195,7 +9201,7 @@
bfd_vma r_type_mask;
int r_sym_shift;
- output_bfd = flaginfo->output_bfd;
+ output_bfd = flinfo->output_bfd;
bed = get_elf_backend_data (output_bfd);
relocate_section = bed->elf_backend_relocate_section;
@@ -9222,9 +9228,9 @@
if (isymbuf == NULL && locsymcount != 0)
{
isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, locsymcount, 0,
- flaginfo->internal_syms,
- flaginfo->external_syms,
- flaginfo->locsym_shndx);
+ flinfo->internal_syms,
+ flinfo->external_syms,
+ flinfo->locsym_shndx);
if (isymbuf == NULL)
return FALSE;
}
@@ -9233,7 +9239,7 @@
SEC_MERGE sections. Write out those local symbols we know are
going into the output file. */
isymend = isymbuf + locsymcount;
- for (isym = isymbuf, pindex = flaginfo->indices, ppsection = flaginfo->sections;
+ for (isym = isymbuf, pindex = flinfo->indices, ppsection = flinfo->sections;
isym < isymend;
isym++, pindex++, ppsection++)
{
@@ -9281,7 +9287,7 @@
*ppsection = isec;
/* Don't output the first, undefined, symbol. */
- if (ppsection == flaginfo->sections)
+ if (ppsection == flinfo->sections)
continue;
if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
@@ -9294,7 +9300,7 @@
/* If we are stripping all symbols, we don't want to output this
one. */
- if (flaginfo->info->strip == strip_all)
+ if (flinfo->info->strip == strip_all)
continue;
/* If we are discarding all local symbols, we don't want to
@@ -9302,7 +9308,7 @@
file, then some of the local symbols may be required by
relocs; we output them below as we discover that they are
needed. */
- if (flaginfo->info->discard == discard_all)
+ if (flinfo->info->discard == discard_all)
continue;
/* If this symbol is defined in a section which we are
@@ -9320,12 +9326,12 @@
return FALSE;
/* See if we are discarding symbols with this name. */
- if ((flaginfo->info->strip == strip_some
- && (bfd_hash_lookup (flaginfo->info->keep_hash, name, FALSE, FALSE)
+ if ((flinfo->info->strip == strip_some
+ && (bfd_hash_lookup (flinfo->info->keep_hash, name, FALSE, FALSE)
== NULL))
- || (((flaginfo->info->discard == discard_sec_merge
- && (isec->flags & SEC_MERGE) && ! flaginfo->info->relocatable)
- || flaginfo->info->discard == discard_l)
+ || (((flinfo->info->discard == discard_sec_merge
+ && (isec->flags & SEC_MERGE) && !flinfo->info->relocatable)
+ || flinfo->info->discard == discard_l)
&& bfd_is_local_label_name (input_bfd, name)))
continue;
@@ -9345,19 +9351,19 @@
output_section. Any special sections must be set up to meet
these requirements. */
osym.st_value += isec->output_offset;
- if (! flaginfo->info->relocatable)
+ if (!flinfo->info->relocatable)
{
osym.st_value += isec->output_section->vma;
if (ELF_ST_TYPE (osym.st_info) == STT_TLS)
{
/* STT_TLS symbols are relative to PT_TLS segment base. */
- BFD_ASSERT (elf_hash_table (flaginfo->info)->tls_sec != NULL);
- osym.st_value -= elf_hash_table (flaginfo->info)->tls_sec->vma;
+ BFD_ASSERT (elf_hash_table (flinfo->info)->tls_sec != NULL);
+ osym.st_value -= elf_hash_table (flinfo->info)->tls_sec->vma;
}
}
indx = bfd_get_symcount (output_bfd);
- ret = elf_link_output_sym (flaginfo, name, &osym, isec, NULL);
+ ret = elf_link_output_sym (flinfo, name, &osym, isec, NULL);
if (ret == 0)
return FALSE;
else if (ret == 1)
@@ -9389,7 +9395,7 @@
continue;
}
- if (flaginfo->info->relocatable
+ if (flinfo->info->relocatable
&& (o->flags & (SEC_LINKER_CREATED | SEC_GROUP)) == SEC_GROUP)
{
/* Deal with the group signature symbol. */
@@ -9399,7 +9405,7 @@
if (symndx >= locsymcount
|| (elf_bad_symtab (input_bfd)
- && flaginfo->sections[symndx] == NULL))
+ && flinfo->sections[symndx] == NULL))
{
struct elf_link_hash_entry *h = sym_hashes[symndx - extsymoff];
while (h->root.type == bfd_link_hash_indirect
@@ -9412,16 +9418,16 @@
else if (ELF_ST_TYPE (isymbuf[symndx].st_info) == STT_SECTION)
{
/* We'll use the output section target_index. */
- asection *sec = flaginfo->sections[symndx]->output_section;
+ asection *sec = flinfo->sections[symndx]->output_section;
elf_section_data (osec)->this_hdr.sh_info = sec->target_index;
}
else
{
- if (flaginfo->indices[symndx] == -1)
+ if (flinfo->indices[symndx] == -1)
{
/* Otherwise output the local symbol now. */
Elf_Internal_Sym sym = isymbuf[symndx];
- asection *sec = flaginfo->sections[symndx]->output_section;
+ asection *sec = flinfo->sections[symndx]->output_section;
const char *name;
long indx;
int ret;
@@ -9440,16 +9446,16 @@
sym.st_value += o->output_offset;
indx = bfd_get_symcount (output_bfd);
- ret = elf_link_output_sym (flaginfo, name, &sym, o, NULL);
+ ret = elf_link_output_sym (flinfo, name, &sym, o, NULL);
if (ret == 0)
return FALSE;
else if (ret == 1)
- flaginfo->indices[symndx] = indx;
+ flinfo->indices[symndx] = indx;
else
abort ();
}
elf_section_data (osec)->this_hdr.sh_info
- = flaginfo->indices[symndx];
+ = flinfo->indices[symndx];
}
}
@@ -9472,7 +9478,7 @@
contents = elf_section_data (o)->this_hdr.contents;
else
{
- contents = flaginfo->contents;
+ contents = flinfo->contents;
if (! bfd_get_full_section_contents (input_bfd, o, &contents))
return FALSE;
}
@@ -9486,8 +9492,8 @@
/* Get the swapped relocs. */
internal_relocs
- = _bfd_elf_link_read_relocs (input_bfd, o, flaginfo->external_relocs,
- flaginfo->internal_relocs, FALSE);
+ = _bfd_elf_link_read_relocs (input_bfd, o, flinfo->external_relocs,
+ flinfo->internal_relocs, FALSE);
if (internal_relocs == NULL
&& o->reloc_count > 0)
return FALSE;
@@ -9540,7 +9546,7 @@
if (r_symndx >= locsymcount
|| (elf_bad_symtab (input_bfd)
- && flaginfo->sections[r_symndx] == NULL))
+ && flinfo->sections[r_symndx] == NULL))
{
h = sym_hashes[r_symndx - extsymoff];
@@ -9578,13 +9584,13 @@
Elf_Internal_Sym *sym = isymbuf + r_symndx;
s_type = ELF_ST_TYPE (sym->st_info);
- ps = &flaginfo->sections[r_symndx];
+ ps = &flinfo->sections[r_symndx];
sym_name = bfd_elf_sym_name (input_bfd, symtab_hdr,
sym, *ps);
}
if ((s_type == STT_RELC || s_type == STT_SRELC)
- && !flaginfo->info->relocatable)
+ && !flinfo->info->relocatable)
{
bfd_vma val;
bfd_vma dot = (rel->r_offset
@@ -9600,7 +9606,7 @@
(unsigned long) rel->r_info,
(unsigned long) rel->r_offset);
#endif
- if (!eval_symbol (&val, &sym_name, input_bfd, flaginfo, dot,
+ if (!eval_symbol (&val, &sym_name, input_bfd, flinfo, dot,
isymbuf, locsymcount, s_type == STT_SRELC))
return FALSE;
@@ -9618,7 +9624,7 @@
{
BFD_ASSERT (r_symndx != STN_UNDEF);
if (action_discarded & COMPLAIN)
- (*flaginfo->info->callbacks->einfo)
+ (*flinfo->info->callbacks->einfo)
(_("%X`%s' referenced in section `%A' of %B: "
"defined in discarded section `%A' of %B\n"),
sym_name, o, input_bfd, sec, sec->owner);
@@ -9634,7 +9640,7 @@
asection *kept;
kept = _bfd_elf_check_kept_section (sec,
- flaginfo->info);
+ flinfo->info);
if (kept != NULL)
{
*ps = kept;
@@ -9665,17 +9671,17 @@
corresponding to the output section, which will require
the addend to be adjusted. */
- ret = (*relocate_section) (output_bfd, flaginfo->info,
+ ret = (*relocate_section) (output_bfd, flinfo->info,
input_bfd, o, contents,
internal_relocs,
isymbuf,
- flaginfo->sections);
+ flinfo->sections);
if (!ret)
return FALSE;
if (ret == 2
- || flaginfo->info->relocatable
- || flaginfo->info->emitrelocations)
+ || flinfo->info->relocatable
+ || flinfo->info->emitrelocations)
{
Elf_Internal_Rela *irela;
Elf_Internal_Rela *irelaend, *irelamid;
@@ -9705,7 +9711,7 @@
rel_hash_list = rel_hash;
rela_hash_list = NULL;
last_offset = o->output_offset;
- if (!flaginfo->info->relocatable)
+ if (!flinfo->info->relocatable)
last_offset += o->output_section->vma;
for (next_erel = 0; irela < irelaend; irela++, next_erel++)
{
@@ -9727,7 +9733,7 @@
}
irela->r_offset = _bfd_elf_section_offset (output_bfd,
- flaginfo->info, o,
+ flinfo->info, o,
irela->r_offset);
if (irela->r_offset >= (bfd_vma) -2)
{
@@ -9745,7 +9751,7 @@
irela->r_offset += o->output_offset;
/* Relocs in an executable have to be virtual addresses. */
- if (!flaginfo->info->relocatable)
+ if (!flinfo->info->relocatable)
irela->r_offset += o->output_section->vma;
last_offset = irela->r_offset;
@@ -9756,7 +9762,7 @@
if (r_symndx >= locsymcount
|| (elf_bad_symtab (input_bfd)
- && flaginfo->sections[r_symndx] == NULL))
+ && flinfo->sections[r_symndx] == NULL))
{
struct elf_link_hash_entry *rh;
unsigned long indx;
@@ -9789,7 +9795,7 @@
*rel_hash = NULL;
sym = isymbuf[r_symndx];
- sec = flaginfo->sections[r_symndx];
+ sec = flinfo->sections[r_symndx];
if (ELF_ST_TYPE (sym.st_info) == STT_SECTION)
{
/* I suppose the backend ought to fill in the
@@ -9842,14 +9848,14 @@
}
else
{
- if (flaginfo->indices[r_symndx] == -1)
+ if (flinfo->indices[r_symndx] == -1)
{
unsigned long shlink;
const char *name;
asection *osec;
long indx;
- if (flaginfo->info->strip == strip_all)
+ if (flinfo->info->strip == strip_all)
{
/* You can't do ld -r -s. */
bfd_set_error (bfd_error_invalid_operation);
@@ -9873,32 +9879,32 @@
return FALSE;
sym.st_value += sec->output_offset;
- if (! flaginfo->info->relocatable)
+ if (!flinfo->info->relocatable)
{
sym.st_value += osec->vma;
if (ELF_ST_TYPE (sym.st_info) == STT_TLS)
{
/* STT_TLS symbols are relative to PT_TLS
segment base. */
- BFD_ASSERT (elf_hash_table (flaginfo->info)
+ BFD_ASSERT (elf_hash_table (flinfo->info)
->tls_sec != NULL);
- sym.st_value -= (elf_hash_table (flaginfo->info)
+ sym.st_value -= (elf_hash_table (flinfo->info)
->tls_sec->vma);
}
}
indx = bfd_get_symcount (output_bfd);
- ret = elf_link_output_sym (flaginfo, name, &sym, sec,
+ ret = elf_link_output_sym (flinfo, name, &sym, sec,
NULL);
if (ret == 0)
return FALSE;
else if (ret == 1)
- flaginfo->indices[r_symndx] = indx;
+ flinfo->indices[r_symndx] = indx;
else
abort ();
}
- r_symndx = flaginfo->indices[r_symndx];
+ r_symndx = flinfo->indices[r_symndx];
}
irela->r_info = ((bfd_vma) r_symndx << r_sym_shift
@@ -9933,7 +9939,7 @@
/* Write out the modified section contents. */
if (bed->elf_backend_write_section
- && (*bed->elf_backend_write_section) (output_bfd, flaginfo->info, o,
+ && (*bed->elf_backend_write_section) (output_bfd, flinfo->info, o,
contents))
{
/* Section written out. */
@@ -9943,7 +9949,7 @@
case SEC_INFO_TYPE_STABS:
if (! (_bfd_write_section_stabs
(output_bfd,
- &elf_hash_table (flaginfo->info)->stab_info,
+ &elf_hash_table (flinfo->info)->stab_info,
o, &elf_section_data (o)->sec_info, contents)))
return FALSE;
break;
@@ -9954,7 +9960,7 @@
break;
case SEC_INFO_TYPE_EH_FRAME:
{
- if (! _bfd_elf_write_section_eh_frame (output_bfd, flaginfo->info,
+ if (! _bfd_elf_write_section_eh_frame (output_bfd, flinfo->info,
o, contents))
return FALSE;
}
@@ -10331,7 +10337,7 @@
bfd_boolean dynamic;
bfd_boolean emit_relocs;
bfd *dynobj;
- struct elf_final_link_info flaginfo;
+ struct elf_final_link_info flinfo;
asection *o;
struct bfd_link_order *p;
bfd *sub;
@@ -10368,39 +10374,39 @@
emit_relocs = (info->relocatable
|| info->emitrelocations);
- flaginfo.info = info;
- flaginfo.output_bfd = abfd;
- flaginfo.symstrtab = _bfd_elf_stringtab_init ();
- if (flaginfo.symstrtab == NULL)
+ flinfo.info = info;
+ flinfo.output_bfd = abfd;
+ flinfo.symstrtab = _bfd_elf_stringtab_init ();
+ if (flinfo.symstrtab == NULL)
return FALSE;
if (! dynamic)
{
- flaginfo.dynsym_sec = NULL;
- flaginfo.hash_sec = NULL;
- flaginfo.symver_sec = NULL;
+ flinfo.dynsym_sec = NULL;
+ flinfo.hash_sec = NULL;
+ flinfo.symver_sec = NULL;
}
else
{
- flaginfo.dynsym_sec = bfd_get_section_by_name (dynobj, ".dynsym");
- flaginfo.hash_sec = bfd_get_section_by_name (dynobj, ".hash");
+ flinfo.dynsym_sec = bfd_get_section_by_name (dynobj, ".dynsym");
+ flinfo.hash_sec = bfd_get_section_by_name (dynobj, ".hash");
/* Note that dynsym_sec can be NULL (on VMS). */
- flaginfo.symver_sec = bfd_get_section_by_name (dynobj, ".gnu.version");
+ flinfo.symver_sec = bfd_get_section_by_name (dynobj, ".gnu.version");
/* Note that it is OK if symver_sec is NULL. */
}
- flaginfo.contents = NULL;
- flaginfo.external_relocs = NULL;
- flaginfo.internal_relocs = NULL;
- flaginfo.external_syms = NULL;
- flaginfo.locsym_shndx = NULL;
- flaginfo.internal_syms = NULL;
- flaginfo.indices = NULL;
- flaginfo.sections = NULL;
- flaginfo.symbuf = NULL;
- flaginfo.symshndxbuf = NULL;
- flaginfo.symbuf_count = 0;
- flaginfo.shndxbuf_size = 0;
+ flinfo.contents = NULL;
+ flinfo.external_relocs = NULL;
+ flinfo.internal_relocs = NULL;
+ flinfo.external_syms = NULL;
+ flinfo.locsym_shndx = NULL;
+ flinfo.internal_syms = NULL;
+ flinfo.indices = NULL;
+ flinfo.sections = NULL;
+ flinfo.symbuf = NULL;
+ flinfo.symshndxbuf = NULL;
+ flinfo.symbuf_count = 0;
+ flinfo.shndxbuf_size = 0;
/* The object attributes have been merged. Remove the input
sections from the link, and set the contents of the output
@@ -10628,22 +10634,22 @@
/* Allocate a buffer to hold swapped out symbols. This is to avoid
continuously seeking to the right position in the file. */
if (! info->keep_memory || max_sym_count < 20)
- flaginfo.symbuf_size = 20;
+ flinfo.symbuf_size = 20;
else
- flaginfo.symbuf_size = max_sym_count;
- amt = flaginfo.symbuf_size;
+ flinfo.symbuf_size = max_sym_count;
+ amt = flinfo.symbuf_size;
amt *= bed->s->sizeof_sym;
- flaginfo.symbuf = (bfd_byte *) bfd_malloc (amt);
- if (flaginfo.symbuf == NULL)
+ flinfo.symbuf = (bfd_byte *) bfd_malloc (amt);
+ if (flinfo.symbuf == NULL)
goto error_return;
if (elf_numsections (abfd) > (SHN_LORESERVE & 0xFFFF))
{
/* Wild guess at number of output symbols. realloc'd as needed. */
amt = 2 * max_sym_count + elf_numsections (abfd) + 1000;
- flaginfo.shndxbuf_size = amt;
+ flinfo.shndxbuf_size = amt;
amt *= sizeof (Elf_External_Sym_Shndx);
- flaginfo.symshndxbuf = (Elf_External_Sym_Shndx *) bfd_zmalloc (amt);
- if (flaginfo.symshndxbuf == NULL)
+ flinfo.symshndxbuf = (Elf_External_Sym_Shndx *) bfd_zmalloc (amt);
+ if (flinfo.symshndxbuf == NULL)
goto error_return;
}
@@ -10658,7 +10664,7 @@
elfsym.st_other = 0;
elfsym.st_shndx = SHN_UNDEF;
elfsym.st_target_internal = 0;
- if (elf_link_output_sym (&flaginfo, NULL, &elfsym, bfd_und_section_ptr,
+ if (elf_link_output_sym (&flinfo, NULL, &elfsym, bfd_und_section_ptr,
NULL) != 1)
goto error_return;
}
@@ -10685,7 +10691,7 @@
elfsym.st_shndx = i;
if (!info->relocatable)
elfsym.st_value = o->vma;
- if (elf_link_output_sym (&flaginfo, NULL, &elfsym, o, NULL) != 1)
+ if (elf_link_output_sym (&flinfo, NULL, &elfsym, o, NULL) != 1)
goto error_return;
}
}
@@ -10695,15 +10701,15 @@
files. */
if (max_contents_size != 0)
{
- flaginfo.contents = (bfd_byte *) bfd_malloc (max_contents_size);
- if (flaginfo.contents == NULL)
+ flinfo.contents = (bfd_byte *) bfd_malloc (max_contents_size);
+ if (flinfo.contents == NULL)
goto error_return;
}
if (max_external_reloc_size != 0)
{
- flaginfo.external_relocs = bfd_malloc (max_external_reloc_size);
- if (flaginfo.external_relocs == NULL)
+ flinfo.external_relocs = bfd_malloc (max_external_reloc_size);
+ if (flinfo.external_relocs == NULL)
goto error_return;
}
@@ -10711,39 +10717,39 @@
{
amt = max_internal_reloc_count * bed->s->int_rels_per_ext_rel;
amt *= sizeof (Elf_Internal_Rela);
- flaginfo.internal_relocs = (Elf_Internal_Rela *) bfd_malloc (amt);
- if (flaginfo.internal_relocs == NULL)
+ flinfo.internal_relocs = (Elf_Internal_Rela *) bfd_malloc (amt);
+ if (flinfo.internal_relocs == NULL)
goto error_return;
}
if (max_sym_count != 0)
{
amt = max_sym_count * bed->s->sizeof_sym;
- flaginfo.external_syms = (bfd_byte *) bfd_malloc (amt);
- if (flaginfo.external_syms == NULL)
+ flinfo.external_syms = (bfd_byte *) bfd_malloc (amt);
+ if (flinfo.external_syms == NULL)
goto error_return;
amt = max_sym_count * sizeof (Elf_Internal_Sym);
- flaginfo.internal_syms = (Elf_Internal_Sym *) bfd_malloc (amt);
- if (flaginfo.internal_syms == NULL)
+ flinfo.internal_syms = (Elf_Internal_Sym *) bfd_malloc (amt);
+ if (flinfo.internal_syms == NULL)
goto error_return;
amt = max_sym_count * sizeof (long);
- flaginfo.indices = (long int *) bfd_malloc (amt);
- if (flaginfo.indices == NULL)
+ flinfo.indices = (long int *) bfd_malloc (amt);
+ if (flinfo.indices == NULL)
goto error_return;
amt = max_sym_count * sizeof (asection *);
- flaginfo.sections = (asection **) bfd_malloc (amt);
- if (flaginfo.sections == NULL)
+ flinfo.sections = (asection **) bfd_malloc (amt);
+ if (flinfo.sections == NULL)
goto error_return;
}
if (max_sym_shndx_count != 0)
{
amt = max_sym_shndx_count * sizeof (Elf_External_Sym_Shndx);
- flaginfo.locsym_shndx = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
- if (flaginfo.locsym_shndx == NULL)
+ flinfo.locsym_shndx = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
+ if (flinfo.locsym_shndx == NULL)
goto error_return;
}
@@ -10817,7 +10823,7 @@
{
if (! sub->output_has_begun)
{
- if (! elf_link_input_bfd (&flaginfo, sub))
+ if (! elf_link_input_bfd (&flinfo, sub))
goto error_return;
sub->output_has_begun = TRUE;
}
@@ -10882,7 +10888,7 @@
some global symbols were, in fact, converted to become local.
FIXME: Will this work correctly with the Irix 5 linker? */
eoinfo.failed = FALSE;
- eoinfo.flaginfo = &flaginfo;
+ eoinfo.flinfo = &flinfo;
eoinfo.localsyms = TRUE;
bfd_hash_traverse (&info->hash->table, elf_link_output_extsym, &eoinfo);
if (eoinfo.failed)
@@ -10897,7 +10903,7 @@
struct elf_link_hash_entry *);
if (! ((*bed->elf_backend_output_arch_local_syms)
- (abfd, info, &flaginfo, (out_sym_func) elf_link_output_sym)))
+ (abfd, info, &flinfo, (out_sym_func) elf_link_output_sym)))
return FALSE;
}
@@ -10910,11 +10916,11 @@
symtab_hdr->sh_info = bfd_get_symcount (abfd);
if (dynamic
- && flaginfo.dynsym_sec != NULL
- && flaginfo.dynsym_sec->output_section != bfd_abs_section_ptr)
+ && flinfo.dynsym_sec != NULL
+ && flinfo.dynsym_sec->output_section != bfd_abs_section_ptr)
{
Elf_Internal_Sym sym;
- bfd_byte *dynsym = flaginfo.dynsym_sec->contents;
+ bfd_byte *dynsym = flinfo.dynsym_sec->contents;
long last_local = 0;
/* Write out the section symbols for the output sections. */
@@ -10986,14 +10992,14 @@
}
}
- elf_section_data (flaginfo.dynsym_sec->output_section)->this_hdr.sh_info =
+ elf_section_data (flinfo.dynsym_sec->output_section)->this_hdr.sh_info =
last_local + 1;
}
/* We get the global symbols from the hash table. */
eoinfo.failed = FALSE;
eoinfo.localsyms = FALSE;
- eoinfo.flaginfo = &flaginfo;
+ eoinfo.flinfo = &flinfo;
bfd_hash_traverse (&info->hash->table, elf_link_output_extsym, &eoinfo);
if (eoinfo.failed)
return FALSE;
@@ -11007,12 +11013,12 @@
struct elf_link_hash_entry *);
if (! ((*bed->elf_backend_output_arch_syms)
- (abfd, info, &flaginfo, (out_sym_func) elf_link_output_sym)))
+ (abfd, info, &flinfo, (out_sym_func) elf_link_output_sym)))
return FALSE;
}
/* Flush all symbols to the file. */
- if (! elf_link_flush_output_syms (&flaginfo, bed))
+ if (! elf_link_flush_output_syms (&flinfo, bed))
return FALSE;
/* Now we know the size of the symtab section. */
@@ -11031,7 +11037,7 @@
off, TRUE);
if (bfd_seek (abfd, symtab_shndx_hdr->sh_offset, SEEK_SET) != 0
- || (bfd_bwrite (flaginfo.symshndxbuf, amt, abfd) != amt))
+ || (bfd_bwrite (flinfo.symshndxbuf, amt, abfd) != amt))
return FALSE;
}
@@ -11043,7 +11049,7 @@
symstrtab_hdr->sh_type = SHT_STRTAB;
symstrtab_hdr->sh_flags = 0;
symstrtab_hdr->sh_addr = 0;
- symstrtab_hdr->sh_size = _bfd_stringtab_size (flaginfo.symstrtab);
+ symstrtab_hdr->sh_size = _bfd_stringtab_size (flinfo.symstrtab);
symstrtab_hdr->sh_entsize = 0;
symstrtab_hdr->sh_link = 0;
symstrtab_hdr->sh_info = 0;
@@ -11056,7 +11062,7 @@
if (bfd_get_symcount (abfd) > 0)
{
if (bfd_seek (abfd, symstrtab_hdr->sh_offset, SEEK_SET) != 0
- || ! _bfd_stringtab_emit (abfd, flaginfo.symstrtab))
+ || ! _bfd_stringtab_emit (abfd, flinfo.symstrtab))
return FALSE;
}
@@ -11350,28 +11356,28 @@
goto error_return;
}
- if (flaginfo.symstrtab != NULL)
- _bfd_stringtab_free (flaginfo.symstrtab);
- if (flaginfo.contents != NULL)
- free (flaginfo.contents);
- if (flaginfo.external_relocs != NULL)
- free (flaginfo.external_relocs);
- if (flaginfo.internal_relocs != NULL)
- free (flaginfo.internal_relocs);
- if (flaginfo.external_syms != NULL)
- free (flaginfo.external_syms);
- if (flaginfo.locsym_shndx != NULL)
- free (flaginfo.locsym_shndx);
- if (flaginfo.internal_syms != NULL)
- free (flaginfo.internal_syms);
- if (flaginfo.indices != NULL)
- free (flaginfo.indices);
- if (flaginfo.sections != NULL)
- free (flaginfo.sections);
- if (flaginfo.symbuf != NULL)
- free (flaginfo.symbuf);
- if (flaginfo.symshndxbuf != NULL)
- free (flaginfo.symshndxbuf);
+ if (flinfo.symstrtab != NULL)
+ _bfd_stringtab_free (flinfo.symstrtab);
+ if (flinfo.contents != NULL)
+ free (flinfo.contents);
+ if (flinfo.external_relocs != NULL)
+ free (flinfo.external_relocs);
+ if (flinfo.internal_relocs != NULL)
+ free (flinfo.internal_relocs);
+ if (flinfo.external_syms != NULL)
+ free (flinfo.external_syms);
+ if (flinfo.locsym_shndx != NULL)
+ free (flinfo.locsym_shndx);
+ if (flinfo.internal_syms != NULL)
+ free (flinfo.internal_syms);
+ if (flinfo.indices != NULL)
+ free (flinfo.indices);
+ if (flinfo.sections != NULL)
+ free (flinfo.sections);
+ if (flinfo.symbuf != NULL)
+ free (flinfo.symbuf);
+ if (flinfo.symshndxbuf != NULL)
+ free (flinfo.symshndxbuf);
for (o = abfd->sections; o != NULL; o = o->next)
{
struct bfd_elf_section_data *esdo = elf_section_data (o);
@@ -11396,28 +11402,28 @@
return TRUE;
error_return:
- if (flaginfo.symstrtab != NULL)
- _bfd_stringtab_free (flaginfo.symstrtab);
- if (flaginfo.contents != NULL)
- free (flaginfo.contents);
- if (flaginfo.external_relocs != NULL)
- free (flaginfo.external_relocs);
- if (flaginfo.internal_relocs != NULL)
- free (flaginfo.internal_relocs);
- if (flaginfo.external_syms != NULL)
- free (flaginfo.external_syms);
- if (flaginfo.locsym_shndx != NULL)
- free (flaginfo.locsym_shndx);
- if (flaginfo.internal_syms != NULL)
- free (flaginfo.internal_syms);
- if (flaginfo.indices != NULL)
- free (flaginfo.indices);
- if (flaginfo.sections != NULL)
- free (flaginfo.sections);
- if (flaginfo.symbuf != NULL)
- free (flaginfo.symbuf);
- if (flaginfo.symshndxbuf != NULL)
- free (flaginfo.symshndxbuf);
+ if (flinfo.symstrtab != NULL)
+ _bfd_stringtab_free (flinfo.symstrtab);
+ if (flinfo.contents != NULL)
+ free (flinfo.contents);
+ if (flinfo.external_relocs != NULL)
+ free (flinfo.external_relocs);
+ if (flinfo.internal_relocs != NULL)
+ free (flinfo.internal_relocs);
+ if (flinfo.external_syms != NULL)
+ free (flinfo.external_syms);
+ if (flinfo.locsym_shndx != NULL)
+ free (flinfo.locsym_shndx);
+ if (flinfo.internal_syms != NULL)
+ free (flinfo.internal_syms);
+ if (flinfo.indices != NULL)
+ free (flinfo.indices);
+ if (flinfo.sections != NULL)
+ free (flinfo.sections);
+ if (flinfo.symbuf != NULL)
+ free (flinfo.symbuf);
+ if (flinfo.symshndxbuf != NULL)
+ free (flinfo.symshndxbuf);
for (o = abfd->sections; o != NULL; o = o->next)
{
struct bfd_elf_section_data *esdo = elf_section_data (o);
@@ -12088,12 +12094,14 @@
struct elf_reloc_cookie cookie;
sec = bfd_get_section_by_name (sub, ".eh_frame");
- if (sec && init_reloc_cookie_for_section (&cookie, info, sec))
+ while (sec && init_reloc_cookie_for_section (&cookie, info, sec))
{
_bfd_elf_parse_eh_frame (sub, info, sec, &cookie);
- if (elf_section_data (sec)->sec_info)
+ if (elf_section_data (sec)->sec_info
+ && (sec->flags & SEC_LINKER_CREATED) == 0)
elf_eh_frame_section (sub) = sec;
fini_reloc_cookie_for_section (&cookie, sec);
+ sec = bfd_get_next_section_by_name (sec);
}
}
_bfd_elf_end_eh_frame_parsing (info);
@@ -12309,58 +12317,73 @@
{ "SHF_EXCLUDE", SHF_EXCLUDE },
};
-void
+/* Returns TRUE if the section is to be included, otherwise FALSE. */
+bfd_boolean
bfd_elf_lookup_section_flags (struct bfd_link_info *info,
- struct flag_info *flaginfo)
+ struct flag_info *flaginfo,
+ asection *section)
{
- bfd *output_bfd = info->output_bfd;
- const struct elf_backend_data *bed = get_elf_backend_data (output_bfd);
- struct flag_info_list *tf = flaginfo->flag_list;
- int with_hex = 0;
- int without_hex = 0;
+ const bfd_vma sh_flags = elf_section_flags (section);
- for (tf = flaginfo->flag_list; tf != NULL; tf = tf->next)
+ if (!flaginfo->flags_initialized)
{
- int i;
- if (bed->elf_backend_lookup_section_flags_hook)
- {
- flagword hexval =
- (*bed->elf_backend_lookup_section_flags_hook) ((char *) tf->name);
+ bfd *obfd = info->output_bfd;
+ const struct elf_backend_data *bed = get_elf_backend_data (obfd);
+ struct flag_info_list *tf = flaginfo->flag_list;
+ int with_hex = 0;
+ int without_hex = 0;
- if (hexval != 0)
- {
- if (tf->with == with_flags)
- with_hex |= hexval;
- else if (tf->with == without_flags)
- without_hex |= hexval;
- tf->valid = TRUE;
- continue;
- }
- }
- for (i = 0; i < 12; i++)
+ for (tf = flaginfo->flag_list; tf != NULL; tf = tf->next)
{
- if (!strcmp (tf->name, elf_flags_to_names[i].flag_name))
+ unsigned i;
+ flagword (*lookup) (char *);
+
+ lookup = bed->elf_backend_lookup_section_flags_hook;
+ if (lookup != NULL)
{
- if (tf->with == with_flags)
- with_hex |= elf_flags_to_names[i].flag_value;
- else if (tf->with == without_flags)
- without_hex |= elf_flags_to_names[i].flag_value;
- tf->valid = TRUE;
- continue;
+ flagword hexval = (*lookup) ((char *) tf->name);
+
+ if (hexval != 0)
+ {
+ if (tf->with == with_flags)
+ with_hex |= hexval;
+ else if (tf->with == without_flags)
+ without_hex |= hexval;
+ tf->valid = TRUE;
+ continue;
+ }
}
- }
- if (tf->valid == FALSE)
- {
- info->callbacks->einfo
+ for (i = 0; i < ARRAY_SIZE (elf_flags_to_names); ++i)
+ {
+ if (strcmp (tf->name, elf_flags_to_names[i].flag_name) == 0)
+ {
+ if (tf->with == with_flags)
+ with_hex |= elf_flags_to_names[i].flag_value;
+ else if (tf->with == without_flags)
+ without_hex |= elf_flags_to_names[i].flag_value;
+ tf->valid = TRUE;
+ break;
+ }
+ }
+ if (!tf->valid)
+ {
+ info->callbacks->einfo
(_("Unrecognized INPUT_SECTION_FLAG %s\n"), tf->name);
- return;
+ return FALSE;
+ }
}
+ flaginfo->flags_initialized = TRUE;
+ flaginfo->only_with_flags |= with_hex;
+ flaginfo->not_with_flags |= without_hex;
}
- flaginfo->flags_initialized = TRUE;
- flaginfo->only_with_flags |= with_hex;
- flaginfo->not_with_flags |= without_hex;
- return;
+ if ((flaginfo->only_with_flags & sh_flags) != flaginfo->only_with_flags)
+ return FALSE;
+
+ if ((flaginfo->not_with_flags & sh_flags) != 0)
+ return FALSE;
+
+ return TRUE;
}
struct alloc_got_off_arg {
@@ -12553,17 +12576,14 @@
bed = get_elf_backend_data (abfd);
- if ((abfd->flags & DYNAMIC) != 0)
- continue;
-
eh = NULL;
if (!info->relocatable)
{
eh = bfd_get_section_by_name (abfd, ".eh_frame");
- if (eh != NULL
- && (eh->size == 0
- || bfd_is_abs_section (eh->output_section)))
- eh = NULL;
+ while (eh != NULL
+ && (eh->size == 0
+ || bfd_is_abs_section (eh->output_section)))
+ eh = bfd_get_next_section_by_name (eh);
}
stab = bfd_get_section_by_name (abfd, ".stab");
@@ -12593,8 +12613,8 @@
fini_reloc_cookie_rels (&cookie, stab);
}
- if (eh != NULL
- && init_reloc_cookie_rels (&cookie, info, abfd, eh))
+ while (eh != NULL
+ && init_reloc_cookie_rels (&cookie, info, abfd, eh))
{
_bfd_elf_parse_eh_frame (abfd, info, eh, &cookie);
if (_bfd_elf_discard_section_eh_frame (abfd, info, eh,
@@ -12602,6 +12622,7 @@
&cookie))
ret = TRUE;
fini_reloc_cookie_rels (&cookie, eh);
+ eh = bfd_get_next_section_by_name (eh);
}
if (bed->elf_backend_discard_info != NULL
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 6dd0592..9b4ccbf 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -8665,7 +8665,8 @@
/* On non-VxWorks targets, the first two entries in .got.plt
are reserved. */
if (!htab->is_vxworks)
- htab->sgotplt->size += 2 * MIPS_ELF_GOT_SIZE (dynobj);
+ htab->sgotplt->size
+ += get_elf_backend_data (dynobj)->got_header_size;
/* On VxWorks, also allocate room for the header's
.rela.plt.unloaded entries. */
diff --git a/bfd/elfxx-tilegx.c b/bfd/elfxx-tilegx.c
index 1586f47..0d8de06 100644
--- a/bfd/elfxx-tilegx.c
+++ b/bfd/elfxx-tilegx.c
@@ -18,8 +18,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/tilegx.h"
diff --git a/bfd/libbfd-in.h b/bfd/libbfd-in.h
index 45f0b0c..baffaea 100644
--- a/bfd/libbfd-in.h
+++ b/bfd/libbfd-in.h
@@ -459,7 +459,7 @@
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
bfd_false)
#define _bfd_nolink_bfd_lookup_section_flags \
- ((void (*) (struct bfd_link_info *, struct flag_info *)) \
+ ((bfd_boolean (*) (struct bfd_link_info *, struct flag_info *, asection *)) \
bfd_0)
#define _bfd_nolink_bfd_merge_sections \
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index e4acdb0..0bd5dd2 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -464,7 +464,7 @@
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
bfd_false)
#define _bfd_nolink_bfd_lookup_section_flags \
- ((void (*) (struct bfd_link_info *, struct flag_info *)) \
+ ((bfd_boolean (*) (struct bfd_link_info *, struct flag_info *, asection *)) \
bfd_0)
#define _bfd_nolink_bfd_merge_sections \
((bfd_boolean (*) (bfd *, struct bfd_link_info *)) \
@@ -1343,6 +1343,23 @@
"BFD_RELOC_PPC_EMB_RELST_HA",
"BFD_RELOC_PPC_EMB_BIT_FLD",
"BFD_RELOC_PPC_EMB_RELSDA",
+ "BFD_RELOC_PPC_VLE_REL8",
+ "BFD_RELOC_PPC_VLE_REL15",
+ "BFD_RELOC_PPC_VLE_REL24",
+ "BFD_RELOC_PPC_VLE_LO16A",
+ "BFD_RELOC_PPC_VLE_LO16D",
+ "BFD_RELOC_PPC_VLE_HI16A",
+ "BFD_RELOC_PPC_VLE_HI16D",
+ "BFD_RELOC_PPC_VLE_HA16A",
+ "BFD_RELOC_PPC_VLE_HA16D",
+ "BFD_RELOC_PPC_VLE_SDA21",
+ "BFD_RELOC_PPC_VLE_SDA21_LO",
+ "BFD_RELOC_PPC_VLE_SDAREL_LO16A",
+ "BFD_RELOC_PPC_VLE_SDAREL_LO16D",
+ "BFD_RELOC_PPC_VLE_SDAREL_HI16A",
+ "BFD_RELOC_PPC_VLE_SDAREL_HI16D",
+ "BFD_RELOC_PPC_VLE_SDAREL_HA16A",
+ "BFD_RELOC_PPC_VLE_SDAREL_HA16D",
"BFD_RELOC_PPC64_HIGHER",
"BFD_RELOC_PPC64_HIGHER_S",
"BFD_RELOC_PPC64_HIGHEST",
@@ -1867,6 +1884,9 @@
"BFD_RELOC_AVR_LDI",
"BFD_RELOC_AVR_6",
"BFD_RELOC_AVR_6_ADIW",
+ "BFD_RELOC_AVR_8_LO",
+ "BFD_RELOC_AVR_8_HI",
+ "BFD_RELOC_AVR_8_HLO",
"BFD_RELOC_RL78_NEG8",
"BFD_RELOC_RL78_NEG16",
"BFD_RELOC_RL78_NEG24",
@@ -2105,6 +2125,12 @@
"BFD_RELOC_XGATE_IMM3",
"BFD_RELOC_XGATE_IMM4",
"BFD_RELOC_XGATE_IMM5",
+ "BFD_RELOC_M68HC12_9B",
+ "BFD_RELOC_M68HC12_16B",
+ "BFD_RELOC_M68HC12_9_PCREL",
+ "BFD_RELOC_M68HC12_10_PCREL",
+ "BFD_RELOC_M68HC12_LO8XG",
+ "BFD_RELOC_M68HC12_HI8XG",
"BFD_RELOC_16C_NUM08",
"BFD_RELOC_16C_NUM08_C",
"BFD_RELOC_16C_NUM16",
@@ -2583,8 +2609,8 @@
bfd_boolean bfd_generic_gc_sections
(bfd *, struct bfd_link_info *);
-void bfd_generic_lookup_section_flags
- (struct bfd_link_info *, struct flag_info *);
+bfd_boolean bfd_generic_lookup_section_flags
+ (struct bfd_link_info *, struct flag_info *, asection *);
bfd_boolean bfd_generic_merge_sections
(bfd *, struct bfd_link_info *);
diff --git a/bfd/nlm32-ppc.c b/bfd/nlm32-ppc.c
index b8c5852..ef5bfa9 100644
--- a/bfd/nlm32-ppc.c
+++ b/bfd/nlm32-ppc.c
@@ -1,6 +1,6 @@
/* Support for 32-bit PowerPC NLM (NetWare Loadable Module)
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2007 Free Software Foundation, Inc.
+ 2007, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -19,8 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libbfd.h"
/* The format of a PowerPC NLM changed. Define OLDFORMAT to get the
diff --git a/bfd/ns32knetbsd.c b/bfd/ns32knetbsd.c
index 6b636ae..fe0a688 100644
--- a/bfd/ns32knetbsd.c
+++ b/bfd/ns32knetbsd.c
@@ -1,6 +1,6 @@
/* BFD back-end for NetBSD/ns32k a.out-ish binaries.
Copyright 1990, 1991, 1992, 1994, 1995, 1998, 2000, 2001, 2002, 2005,
- 2007 Free Software Foundation, Inc.
+ 2007, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -46,6 +46,7 @@
for me -- IWD. */
#define MY_bfd_reloc_type_lookup ns32kaout_bfd_reloc_type_lookup
+#include "sysdep.h"
#include "bfd.h" /* To ensure following declaration is OK. */
const struct reloc_howto_struct * MY_bfd_reloc_type_lookup (bfd *, bfd_reloc_code_real_type);
diff --git a/bfd/opncls.c b/bfd/opncls.c
index 673c7f8..75d498b 100644
--- a/bfd/opncls.c
+++ b/bfd/opncls.c
@@ -1,6 +1,6 @@
/* opncls.c -- open and close a BFD.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -190,6 +190,8 @@
If <<NULL>> is returned then an error has occured. Possible errors
are <<bfd_error_no_memory>>, <<bfd_error_invalid_target>> or
<<system_call>> error.
+
+ On error, @var{fd} is always closed.
*/
bfd *
@@ -200,11 +202,17 @@
nbfd = _bfd_new_bfd ();
if (nbfd == NULL)
- return NULL;
+ {
+ if (fd != -1)
+ close (fd);
+ return NULL;
+ }
target_vec = bfd_find_target (target, nbfd);
if (target_vec == NULL)
{
+ if (fd != -1)
+ close (fd);
_bfd_delete_bfd (nbfd);
return NULL;
}
@@ -307,6 +315,8 @@
Possible errors are <<bfd_error_no_memory>>,
<<bfd_error_invalid_target>> and <<bfd_error_system_call>>.
+
+ On error, @var{fd} is closed.
*/
bfd *
@@ -323,6 +333,10 @@
fdflags = fcntl (fd, F_GETFL, NULL);
if (fdflags == -1)
{
+ int save = errno;
+
+ close (fd);
+ errno = save;
bfd_set_error (bfd_error_system_call);
return NULL;
}
diff --git a/bfd/pef.h b/bfd/pef.h
index db8d18c..d73ff37 100644
--- a/bfd/pef.h
+++ b/bfd/pef.h
@@ -19,6 +19,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include "bfd.h"
#include <stdio.h>
diff --git a/bfd/plugin.c b/bfd/plugin.c
index 9206595..1e6d82b 100644
--- a/bfd/plugin.c
+++ b/bfd/plugin.c
@@ -1,5 +1,5 @@
/* Plugin support for BFD.
- Copyright 2009, 2010, 2011
+ Copyright 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -19,7 +19,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "config.h"
+#include "sysdep.h"
#include "bfd.h"
#if BFD_SUPPORTS_PLUGINS
@@ -34,7 +34,6 @@
#endif
#include <stdarg.h>
#include "plugin-api.h"
-#include "sysdep.h"
#include "plugin.h"
#include "libbfd.h"
#include "libiberty.h"
@@ -276,12 +275,13 @@
plugin_data->nsyms = nsyms;
plugin_data->syms = syms;
+ abfd->tdata.plugin_data = plugin_data;
+
bfd_plugin_get_symbols_in_object_only (abfd);
if ((nsyms + plugin_data->object_only_nsyms) != 0)
abfd->flags |= HAS_SYMS;
- abfd->tdata.plugin_data = plugin_data;
return LDPS_OK;
}
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 29c54c8..cc4a5db 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2806,6 +2806,40 @@
ENUMX
BFD_RELOC_PPC_EMB_RELSDA
ENUMX
+ BFD_RELOC_PPC_VLE_REL8
+ENUMX
+ BFD_RELOC_PPC_VLE_REL15
+ENUMX
+ BFD_RELOC_PPC_VLE_REL24
+ENUMX
+ BFD_RELOC_PPC_VLE_LO16A
+ENUMX
+ BFD_RELOC_PPC_VLE_LO16D
+ENUMX
+ BFD_RELOC_PPC_VLE_HI16A
+ENUMX
+ BFD_RELOC_PPC_VLE_HI16D
+ENUMX
+ BFD_RELOC_PPC_VLE_HA16A
+ENUMX
+ BFD_RELOC_PPC_VLE_HA16D
+ENUMX
+ BFD_RELOC_PPC_VLE_SDA21
+ENUMX
+ BFD_RELOC_PPC_VLE_SDA21_LO
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_LO16A
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_LO16D
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HI16A
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HI16D
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HA16A
+ENUMX
+ BFD_RELOC_PPC_VLE_SDAREL_HA16D
+ENUMX
BFD_RELOC_PPC64_HIGHER
ENUMX
BFD_RELOC_PPC64_HIGHER_S
@@ -4360,6 +4394,21 @@
ENUMDOC
This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
instructions
+ENUM
+ BFD_RELOC_AVR_8_LO
+ENUMDOC
+ This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
+ in .byte lo8(symbol)
+ENUM
+ BFD_RELOC_AVR_8_HI
+ENUMDOC
+ This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
+ in .byte hi8(symbol)
+ENUM
+ BFD_RELOC_AVR_8_HLO
+ENUMDOC
+ This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
+ in .byte hlo8(symbol)
ENUM
BFD_RELOC_RL78_NEG8
@@ -5043,6 +5092,38 @@
Freescale XGATE reloc.
This is a 5-bit pc-relative reloc.
ENUM
+ BFD_RELOC_M68HC12_9B
+ENUMDOC
+ Motorola 68HC12 reloc.
+ This is the 9 bits of a value.
+ENUM
+ BFD_RELOC_M68HC12_16B
+ENUMDOC
+ Motorola 68HC12 reloc.
+ This is the 16 bits of a value.
+ENUM
+ BFD_RELOC_M68HC12_9_PCREL
+ENUMDOC
+ Motorola 68HC12/XGATE reloc.
+ This is a PCREL9 branch.
+ENUM
+ BFD_RELOC_M68HC12_10_PCREL
+ENUMDOC
+ Motorola 68HC12/XGATE reloc.
+ This is a PCREL10 branch.
+ENUM
+ BFD_RELOC_M68HC12_LO8XG
+ENUMDOC
+ Motorola 68HC12/XGATE reloc.
+ This is the 8 bit low part of an absolute address and immediately precedes
+ a matching HI8XG part.
+ENUM
+ BFD_RELOC_M68HC12_HI8XG
+ENUMDOC
+ Motorola 68HC12/XGATE reloc.
+ This is the 8 bit high part of an absolute address and immediately follows
+ a matching LO8XG part.
+ENUM
BFD_RELOC_16C_NUM08
ENUMX
BFD_RELOC_16C_NUM08_C
@@ -6334,23 +6415,26 @@
bfd_generic_lookup_section_flags
SYNOPSIS
- void bfd_generic_lookup_section_flags
- (struct bfd_link_info *, struct flag_info *);
+ bfd_boolean bfd_generic_lookup_section_flags
+ (struct bfd_link_info *, struct flag_info *, asection *);
DESCRIPTION
Provides default handling for section flags lookup
-- i.e., does nothing.
+ Returns FALSE if the section should be omitted, otherwise TRUE.
*/
-void
+bfd_boolean
bfd_generic_lookup_section_flags (struct bfd_link_info *info ATTRIBUTE_UNUSED,
- struct flag_info *flaginfo)
+ struct flag_info *flaginfo,
+ asection *section ATTRIBUTE_UNUSED)
{
if (flaginfo != NULL)
{
(*_bfd_error_handler) (_("INPUT_SECTION_FLAGS are not supported.\n"));
- return;
+ return FALSE;
}
+ return TRUE;
}
/*
diff --git a/bfd/section.c b/bfd/section.c
index 3246ab1..b48da6c 100644
--- a/bfd/section.c
+++ b/bfd/section.c
@@ -517,9 +517,6 @@
. {* The BFD which owns the section. *}
. bfd *owner;
.
-. {* INPUT_SECTION_FLAGS if specified in the linker script. *}
-. struct flag_info *section_flag_info;
-.
. {* A symbol which points at this section only. *}
. struct bfd_symbol *symbol;
. struct bfd_symbol **symbol_ptr_ptr;
@@ -698,9 +695,6 @@
. {* target_index, used_by_bfd, constructor_chain, owner, *} \
. 0, NULL, NULL, NULL, \
. \
-. {* flag_info, *} \
-. NULL, \
-. \
. {* symbol, symbol_ptr_ptr, *} \
. (struct bfd_symbol *) SYM, &SEC.symbol, \
. \
@@ -854,14 +848,8 @@
asection *bfd_get_section_by_name (bfd *abfd, const char *name);
DESCRIPTION
- Run through @var{abfd} and return the one of the
- <<asection>>s whose name matches @var{name}, otherwise <<NULL>>.
- @xref{Sections}, for more information.
-
- This should only be used in special cases; the normal way to process
- all sections of a given name is to use <<bfd_map_over_sections>> and
- <<strcmp>> on the name (or better yet, base it on the section flags
- or something else) for each section.
+ Return the most recently created section attached to @var{abfd}
+ named @var{name}. Return NULL if no such section exists.
*/
asection *
@@ -878,6 +866,41 @@
/*
FUNCTION
+ bfd_get_next_section_by_name
+
+SYNOPSIS
+ asection *bfd_get_next_section_by_name (asection *sec);
+
+DESCRIPTION
+ Given @var{sec} is a section returned by @code{bfd_get_section_by_name},
+ return the next most recently created section attached to the same
+ BFD with the same name. Return NULL if no such section exists.
+*/
+
+asection *
+bfd_get_next_section_by_name (asection *sec)
+{
+ struct section_hash_entry *sh;
+ const char *name;
+ unsigned long hash;
+
+ sh = ((struct section_hash_entry *)
+ ((char *) sec - offsetof (struct section_hash_entry, section)));
+
+ hash = sh->root.hash;
+ name = sec->name;
+ for (sh = (struct section_hash_entry *) sh->root.next;
+ sh != NULL;
+ sh = (struct section_hash_entry *) sh->root.next)
+ if (sh->root.hash == hash
+ && strcmp (sh->root.string, name) == 0)
+ return &sh->section;
+
+ return NULL;
+}
+
+/*
+FUNCTION
bfd_get_section_by_name_if
SYNOPSIS
diff --git a/bfd/som.c b/bfd/som.c
index 0726f84..efaf400 100644
--- a/bfd/som.c
+++ b/bfd/som.c
@@ -1,7 +1,7 @@
/* bfd back-end for HP PA-RISC SOM objects.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
+ 2012 Free Software Foundation, Inc.
Contributed by the Center for Software Science at the
University of Utah.
@@ -23,8 +23,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-#include "alloca-conf.h"
#include "sysdep.h"
+#include "alloca-conf.h"
#include "bfd.h"
#include "libbfd.h"
diff --git a/bfd/stab-syms.c b/bfd/stab-syms.c
index 9e9274f..8e65ddc 100644
--- a/bfd/stab-syms.c
+++ b/bfd/stab-syms.c
@@ -1,5 +1,5 @@
/* Table of stab names for the BFD library.
- Copyright 1990, 1991, 1992, 1994, 1995, 1996, 2000, 2005, 2007
+ Copyright 1990, 1991, 1992, 1994, 1995, 1996, 2000, 2005, 2007, 2012
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -20,6 +20,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include "bfd.h"
#define ARCH_SIZE 32 /* Value doesn't matter. */
diff --git a/bfd/sunos.c b/bfd/sunos.c
index 8ef25ed..bd14001 100644
--- a/bfd/sunos.c
+++ b/bfd/sunos.c
@@ -1,6 +1,6 @@
/* BFD backend for SunOS binaries.
Copyright 1990, 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2011
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2011, 2012
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -28,6 +28,7 @@
the tokens. */
#define MY(OP) CONCAT2 (sunos_big_,OP)
+#include "sysdep.h"
#include "bfd.h"
#include "bfdlink.h"
#include "libaout.h"
diff --git a/bfd/syms.c b/bfd/syms.c
index e819eae..bf5a488 100644
--- a/bfd/syms.c
+++ b/bfd/syms.c
@@ -1,6 +1,6 @@
/* Generic symbol-table support for the BFD library.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
+ 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2012
Free Software Foundation, Inc.
Written by Cygnus Support.
@@ -107,6 +107,7 @@
which has been created using <<bfd_make_empty_symbol>>. Here is an
example showing the creation of a symbol table with only one element:
+| #include "sysdep.h"
| #include "bfd.h"
| int main (void)
| {
diff --git a/bfd/sysdep.h b/bfd/sysdep.h
index 20ef56d..b4fed10 100644
--- a/bfd/sysdep.h
+++ b/bfd/sysdep.h
@@ -23,6 +23,10 @@
#ifndef BFD_SYSDEP_H
#define BFD_SYSDEP_H
+#ifdef PACKAGE
+#error sysdep.h must be included in lieu of config.h
+#endif
+
#include "config.h"
#include "ansidecl.h"
diff --git a/bfd/targets.c b/bfd/targets.c
index f94fed5..cfa91a8 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -497,8 +497,9 @@
. bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
.
. {* Sets the bitmask of allowed and disallowed section flags. *}
-. void (*_bfd_lookup_section_flags) (struct bfd_link_info *,
-. struct flag_info *);
+. bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *,
+. struct flag_info *,
+. asection *);
.
. {* Attempt to merge SEC_MERGE sections. *}
. bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
diff --git a/bfd/version.h b/bfd/version.h
index 019a78a..9a8ed6f 100644
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -1,4 +1,4 @@
-#define BFD_VERSION_DATE 20120507
+#define BFD_VERSION_DATE 20120604
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@
diff --git a/bfd/xsym.c b/bfd/xsym.c
index 0926297..e0819a9 100644
--- a/bfd/xsym.c
+++ b/bfd/xsym.c
@@ -1,6 +1,6 @@
/* xSYM symbol-file support for BFD.
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
- 2009, 2010, 2011 Free Software Foundation, Inc.
+ 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -21,8 +21,8 @@
/* xSYM is the debugging format used by CodeWarrior on Mac OS classic. */
-#include "alloca-conf.h"
#include "sysdep.h"
+#include "alloca-conf.h"
#include "xsym.h"
#include "bfd.h"
#include "libbfd.h"
diff --git a/bfd/xsym.h b/bfd/xsym.h
index 85e173a..e4a754c 100644
--- a/bfd/xsym.h
+++ b/bfd/xsym.h
@@ -1,5 +1,5 @@
/* xSYM symbol-file support for BFD.
- Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
+ Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2012
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -19,6 +19,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include "bfd.h"
#include <stdio.h>
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 64be0a1..14d720f 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,154 @@
+2012-06-01 Alan Modra <amodra@gmail.com>
+
+ * addr2line.c (translate_addresses): Truncate input addresses to
+ arch_size bits. Avoid undefined shift. Print '?' for zero line.
+
+2012-05-30 Nick Clifton <nickc@redhat.com>
+
+ * readelf.c (process_section_headers): Correct bug in previous
+ delta - display full section type in wide mode.
+
+2012-05-28 Nick Clifton <nickc@redhat.com>
+
+ * readelf.c (print_symbol): Display multibyte characters in symbol
+ names.
+ (process_section_headers): Use print_symbol.
+
+2012-05-18 Andreas Schwab <schwab@linux-m68k.org>
+
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * Makefile.in: Regenerate.
+
+2012-05-17 Daniel Richard G. <skunk@iskunk.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * configure.in: Add check that sysdep.h has been included before
+ any system header files.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * unwind-ia64.h: Include config.h.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * dwarf.c (process_debug_info): Display abbrev offset in hex.
+ (display_debug_abbrev): Show offset of abbrev.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * dwarf.c (display_debug_ranges): Don't report more than one use
+ of the same range set as an overlap.
+
+2012-05-16 Daniel Richard G. <skunk@iskunk.org>
+
+ PR binutils/13558
+ * Makefile.am (CFILES): Add syslex_wrap.c.
+ (sysinfo): Depend upon syslex_wrap.o.
+ (syslex_wrap.o): New rule.
+ (syslex.o): Delete rule.
+ * syslex_wrap.c: New file.
+ * Makefile.in: Regenerate.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * readelf.c (get_machine_name): Update m68hc12 entry.
+
+2012-05-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * objdump.c (disassemble_bytes): Print addend as signed.
+ (dump_reloc_set): Likewise.
+
+2012-05-04 Sterling Augustine <saugustine@google.com>
+ Cary Coutant <ccoutant@google.com>
+
+ * doc/binutils.texi: Add --dwarf-check option.
+ * dwarf.c (dwarf_check): New global flag.
+ (fetch_indexed_string): New function.
+ (fetch_indexed_value): New function.
+ (get_FORM_name): Add DW_FORM_GNU_str_index and DW_FORM_GNU_addr_index.
+ (decode_location_expression): Add DW_OP_GNU_addr_index.
+ (read_and_display_attr_value): Add DW_FORM_GNU_str_index,
+ DW_FORM_GNU_addr_index, DW_AT_GNU_addr_base, and DW_AT_GNU_ranges_base.
+ (get_AT_name): Add new attributes for Fission.
+ (process_debug_info): Load new debug sections for Fission.
+ (load_debug_info): Check for .debug_info.dwo section.
+ (display_loc_list, display_loc_list_dwo): New functions.
+ (display_debug_loc): Move logic to above two functions.
+ (display_debug_info): Choose abbrev section based on info section.
+ (display_debug_types): Likewise.
+ (display_trace_info): Likewise.
+ (comp_addr_base): New function.
+ (display_debug_addr): New function.
+ (display_debug_str_offsets): New function.
+ (display_debug_ranges): Allow missing range lists. Suppress
+ diagnostics if dwarf_check not set.
+ (debug_displays): Add column to select abbrev section.
+ * dwarf.h (enum dwarf_section_display_enum): Add new debug sections
+ for Fission.
+ (struct dwarf_section): Add abbrev_sec field.
+ (struct dwarf_section_display): New type.
+ (debug_info): Add addr_base, ranges_base fields.
+ (dwarf_check): New global variable.
+ * objdump.c (usage): Add --dwarf-check option.
+ (enum option_values): Add OPTION_DWARF_CHECK.
+ (long_options): Add --dwarf-check.
+ (main): Likewise.
+ * readelf.c (OPTION_DWARF_CHECK): New macro.
+ (options): Add --dwarf-check.
+ (parse_args): Likewise.
+ (process_section_headers): Use const_strneq instead of
+ streq.
+
+2012-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/14088
+ * readelf.c (dump_relocations): Always display addend as
+ signed hex number.
+
+2012-05-11 Daniel Richard G. <skunk@iskunk.org>
+
+ PR binutils/14028
+ * configure.in: Invoke ACX_HEADER_STRING.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * sysdep.h: If STRINGS_WITH_STRING is defined then include both
+ string.h and strings.h.
+
+2012-05-10 Jakub Jelinek <jakub@redhat.com>
+
+ * dwarf.c (read_and_display_attr_value): Don't look up tag from
+ abbrev for DW_FORM_ref_addr.
+
+2012-05-08 Sean Keys <skeys@ipdatasys.com>
+
+ * binutils/MAINTAINERS: Added my entry to the maintainers secion.
+
+2012-05-08 Cary Coutant <ccoutant@google.com>
+
+ * doc/binutils.texi (objcopy): Add --strip-dwo, --extract-dwo options.
+ (strip): Add --strip-dwo option.
+ * objcopy.c (enum strip_action): Add STRIP_DWO, STRIP_NONDWO.
+ (enum command_line_switch): Add OPTION_EXTRACT_DWO, OPTION_STRIP_DWO.
+ (strip_options): Add --strip-dwo option.
+ (copy_options): Add --extract-dwo, --strip-dwo options.
+ (copy_usage): Likewise.
+ (strip_usage): Add --strip-dwo option.
+ (is_dwo_section): New function.
+ (is_strip_section_1): Check for DWO sections.
+ (copy_object): Check for --strip-dwo, --extract-dwo options.
+ (copy_relocations_in_section): Discard relocations for DWO sections.
+ Discard entire relocation section when no relocations.
+ (strip_main): Add --strip-dwo option.
+ (copy_main): Add --strip-dwo, --extract-dwo options.
+
+2012-05-08 Alan Modra <amodra@gmail.com>
+
+ * Makefile.am (check_DEJAGNU): Export LC_ALL=C in place of other
+ LC and LANG environment vars.
+ * Makefile.in: Regenerate.
+
2012-05-07 Tom Tromey <tromey@redhat.com>
* dwarf.c (get_TAG_name): Use get_DW_TAG_name.
diff --git a/binutils/MAINTAINERS b/binutils/MAINTAINERS
index 8984df4..94f40e0 100644
--- a/binutils/MAINTAINERS
+++ b/binutils/MAINTAINERS
@@ -128,6 +128,7 @@
x86_64 Andreas Jaeger <aj@suse.de>
x86_64 H.J. Lu <hjl.tools@gmail.com>
XCOFF Richard Sandiford <r.sandiford@uk.ibm.com>
+ XGATE Sean Keys <skeys@ipdatasys.com>
Xtensa Sterling Augustine <augustine.sterling@gmail.com>
z80 Arnold Metselaar <arnold.metselaar@planet.nl>
z8k Christian Groessler <chris@groessler.org>
diff --git a/binutils/Makefile.am b/binutils/Makefile.am
index d57f7f8..3364bee 100644
--- a/binutils/Makefile.am
+++ b/binutils/Makefile.am
@@ -106,7 +106,7 @@
rclex.c rdcoff.c rddbg.c readelf.c rename.c \
resbin.c rescoff.c resrc.c resres.c \
size.c srconv.c stabs.c strings.c sysdump.c \
- unwind-ia64.c elfedit.c version.c \
+ syslex_wrap.c unwind-ia64.c elfedit.c version.c \
windres.c winduni.c wrstabs.c \
windmc.c mclex.c
@@ -158,7 +158,7 @@
check-DEJAGNU: site.exp
srcdir=`cd $(srcdir) && pwd`; export srcdir; \
r=`pwd`; export r; \
- LC_COLLATE=; LC_ALL=; LANG=; export LC_COLLATE LC_ALL LANG; \
+ LC_ALL=C; export LC_ALL; \
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
@@ -268,15 +268,11 @@
sysroff.h: sysinfo$(EXEEXT_FOR_BUILD) sysroff.info
./sysinfo$(EXEEXT_FOR_BUILD) -d <$(srcdir)/sysroff.info >sysroff.h
-sysinfo$(EXEEXT_FOR_BUILD): sysinfo.@OBJEXT@ syslex.@OBJEXT@
- $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ sysinfo.@OBJEXT@ syslex.@OBJEXT@
+sysinfo$(EXEEXT_FOR_BUILD): sysinfo.@OBJEXT@ syslex_wrap.@OBJEXT@
+ $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ sysinfo.@OBJEXT@ syslex_wrap.@OBJEXT@
-syslex.@OBJEXT@: syslex.c sysinfo.h config.h
- if [ -r syslex.c ]; then \
- $(CC_FOR_BUILD) -c -I. -I$(srcdir) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(NO_WERROR) syslex.c ; \
- else \
- $(CC_FOR_BUILD) -c -I. -I$(srcdir) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(NO_WERROR) $(srcdir)/syslex.c ;\
- fi
+syslex_wrap.@OBJEXT@: syslex_wrap.c syslex.c sysinfo.h config.h
+ $(CC_FOR_BUILD) -c -I. -I$(srcdir) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(NO_WERROR) $(srcdir)/syslex_wrap.c
sysinfo.@OBJEXT@: sysinfo.c
if [ -r sysinfo.c ]; then \
diff --git a/binutils/Makefile.in b/binutils/Makefile.in
index fd88edb..94331be 100644
--- a/binutils/Makefile.in
+++ b/binutils/Makefile.in
@@ -56,7 +56,7 @@
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../bfd/acinclude.m4 \
$(top_srcdir)/../config/zlib.m4 \
- $(top_srcdir)/../bfd/warning.m4 \
+ $(top_srcdir)/../bfd/warning.m4 $(top_srcdir)/../config/acx.m4 \
$(top_srcdir)/../config/depstand.m4 \
$(top_srcdir)/../config/gettext-sister.m4 \
$(top_srcdir)/../config/iconv.m4 \
@@ -476,7 +476,7 @@
rclex.c rdcoff.c rddbg.c readelf.c rename.c \
resbin.c rescoff.c resrc.c resres.c \
size.c srconv.c stabs.c strings.c sysdump.c \
- unwind-ia64.c elfedit.c version.c \
+ syslex_wrap.c unwind-ia64.c elfedit.c version.c \
windres.c winduni.c wrstabs.c \
windmc.c mclex.c
@@ -880,6 +880,7 @@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/stabs.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/strings.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sysdump.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/syslex_wrap.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/unwind-ia64.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/version.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/windmc.Po@am__quote@
@@ -1238,7 +1239,7 @@
check-DEJAGNU: site.exp
srcdir=`cd $(srcdir) && pwd`; export srcdir; \
r=`pwd`; export r; \
- LC_COLLATE=; LC_ALL=; LANG=; export LC_COLLATE LC_ALL LANG; \
+ LC_ALL=C; export LC_ALL; \
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
@@ -1284,15 +1285,11 @@
sysroff.h: sysinfo$(EXEEXT_FOR_BUILD) sysroff.info
./sysinfo$(EXEEXT_FOR_BUILD) -d <$(srcdir)/sysroff.info >sysroff.h
-sysinfo$(EXEEXT_FOR_BUILD): sysinfo.@OBJEXT@ syslex.@OBJEXT@
- $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ sysinfo.@OBJEXT@ syslex.@OBJEXT@
+sysinfo$(EXEEXT_FOR_BUILD): sysinfo.@OBJEXT@ syslex_wrap.@OBJEXT@
+ $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ sysinfo.@OBJEXT@ syslex_wrap.@OBJEXT@
-syslex.@OBJEXT@: syslex.c sysinfo.h config.h
- if [ -r syslex.c ]; then \
- $(CC_FOR_BUILD) -c -I. -I$(srcdir) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(NO_WERROR) syslex.c ; \
- else \
- $(CC_FOR_BUILD) -c -I. -I$(srcdir) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(NO_WERROR) $(srcdir)/syslex.c ;\
- fi
+syslex_wrap.@OBJEXT@: syslex_wrap.c syslex.c sysinfo.h config.h
+ $(CC_FOR_BUILD) -c -I. -I$(srcdir) $(AM_CFLAGS) $(CFLAGS_FOR_BUILD) $(NO_WERROR) $(srcdir)/syslex_wrap.c
sysinfo.@OBJEXT@: sysinfo.c
if [ -r sysinfo.c ]; then \
diff --git a/binutils/NEWS b/binutils/NEWS
index 8e9de0a..e516339 100644
--- a/binutils/NEWS
+++ b/binutils/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Add support for the VLE extension to the PowerPC architecture.
+
* Add support for x64 Windows target of the delayed-load-library.
* Add support for the Renesas RL78 architecture.
diff --git a/binutils/aclocal.m4 b/binutils/aclocal.m4
index 1ad8c31..fd838a6 100644
--- a/binutils/aclocal.m4
+++ b/binutils/aclocal.m4
@@ -991,6 +991,7 @@
m4_include([../bfd/acinclude.m4])
m4_include([../bfd/warning.m4])
+m4_include([../config/acx.m4])
m4_include([../config/depstand.m4])
m4_include([../config/gettext-sister.m4])
m4_include([../config/iconv.m4])
diff --git a/binutils/addr2line.c b/binutils/addr2line.c
index d0f4567..663da45 100644
--- a/binutils/addr2line.c
+++ b/binutils/addr2line.c
@@ -196,8 +196,6 @@
static void
translate_addresses (bfd *abfd, asection *section)
{
- const struct elf_backend_data * bed;
-
int read_stdin = (naddr == 0);
for (;;)
@@ -218,11 +216,15 @@
pc = bfd_scan_vma (*addr++, NULL, 16);
}
- if (bfd_get_flavour (abfd) == bfd_target_elf_flavour
- && (bed = get_elf_backend_data (abfd)) != NULL
- && bed->sign_extend_vma
- && (pc & (bfd_vma) 1 << (bed->s->arch_size - 1)))
- pc |= ((bfd_vma) -1) << bed->s->arch_size;
+ if (bfd_get_flavour (abfd) == bfd_target_elf_flavour)
+ {
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+ bfd_vma sign = (bfd_vma) 1 << (bed->s->arch_size - 1);
+
+ pc &= (sign << 1) - 1;
+ if (bed->sign_extend_vma)
+ pc = (pc ^ sign) - sign;
+ }
if (with_addresses)
{
@@ -290,7 +292,11 @@
filename = h + 1;
}
- printf ("%s:%u\n", filename ? filename : "??", line);
+ printf ("%s:", filename ? filename : "??");
+ if (line != 0)
+ printf ("%u\n", line);
+ else
+ printf ("?\n");
if (!unwind_inlines)
found = FALSE;
else
diff --git a/binutils/config.in b/binutils/config.in
index 735c991..3b3812c 100644
--- a/binutils/config.in
+++ b/binutils/config.in
@@ -1,5 +1,11 @@
/* config.in. Generated from configure.in by autoheader. */
+/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__)
+# error config.h must be #included before system headers
+#endif
+
/* Define to one of `_getb67', `GETB67', `getb67' for Cray-2 and Cray-YMP
systems. This function is required for `alloca.c' support on those systems.
*/
@@ -196,6 +202,9 @@
/* Define to 1 if you have the ANSI C header files. */
#undef STDC_HEADERS
+/* Define if you can safely include both <string.h> and <strings.h>. */
+#undef STRING_WITH_STRINGS
+
/* Configured target name. */
#undef TARGET
diff --git a/binutils/configure b/binutils/configure
index 6569181..98e26d0 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -11654,6 +11654,8 @@
ac_config_headers="$ac_config_headers config.h:config.in"
+
+
if test -z "$target" ; then
as_fn_error "Unrecognized target system type; please check config.sub." "$LINENO" 5
fi
@@ -12491,6 +12493,38 @@
fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether string.h and strings.h may both be included" >&5
+$as_echo_n "checking whether string.h and strings.h may both be included... " >&6; }
+if test "${gcc_cv_header_string+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <string.h>
+#include <strings.h>
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ gcc_cv_header_string=yes
+else
+ gcc_cv_header_string=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_header_string" >&5
+$as_echo "$gcc_cv_header_string" >&6; }
+if test $gcc_cv_header_string = yes; then
+
+$as_echo "#define STRING_WITH_STRINGS 1" >>confdefs.h
+
+fi
+
# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
# for constant arguments. Useless!
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for working alloca.h" >&5
diff --git a/binutils/configure.in b/binutils/configure.in
index 9ba8c77..978fb81 100644
--- a/binutils/configure.in
+++ b/binutils/configure.in
@@ -44,6 +44,13 @@
AC_CONFIG_HEADERS(config.h:config.in)
+AH_VERBATIM([00_CONFIG_H_CHECK],
+[/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__)
+# error config.h must be #included before system headers
+#endif])
+
if test -z "$target" ; then
AC_MSG_ERROR(Unrecognized target system type; please check config.sub.)
fi
@@ -91,6 +98,7 @@
AC_CHECK_HEADERS(string.h strings.h stdlib.h unistd.h fcntl.h sys/file.h limits.h locale.h sys/param.h)
AC_HEADER_SYS_WAIT
+ACX_HEADER_STRING
AC_FUNC_ALLOCA
AC_CHECK_FUNCS(sbrk utimes setmode getc_unlocked strcoll setlocale)
AC_CHECK_FUNC([mkstemp],
diff --git a/binutils/doc/Makefile.in b/binutils/doc/Makefile.in
index 3acf28a..e39ee65 100644
--- a/binutils/doc/Makefile.in
+++ b/binutils/doc/Makefile.in
@@ -44,6 +44,7 @@
$(top_srcdir)/../config/gettext-sister.m4 \
$(top_srcdir)/../config/iconv.m4 \
$(top_srcdir)/../config/largefile.m4 \
+ $(top_srcdir)/../config/lcmessage.m4 \
$(top_srcdir)/../config/lead-dot.m4 \
$(top_srcdir)/../config/lib-ld.m4 \
$(top_srcdir)/../config/lib-link.m4 \
diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
index b90d4f6..9826eb2 100644
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -1094,6 +1094,8 @@
[@option{--add-gnu-debuglink=}@var{path-to-file}]
[@option{--keep-file-symbols}]
[@option{--only-keep-debug}]
+ [@option{--strip-dwo}]
+ [@option{--extract-dwo}]
[@option{--extract-symbol}]
[@option{--writable-text}]
[@option{--readonly-text}]
@@ -1664,6 +1666,21 @@
debugging information, not multiple filenames on a one-per-object-file
basis.
+@item --strip-dwo
+Remove the contents of all DWARF .dwo sections, leaving the
+remaining debugging sections and all symbols intact.
+This option is intended for use by the compiler as part of
+the @option{-gsplit-dwarf} option, which splits debug information
+between the .o file and a separate .dwo file. The compiler
+generates all debug information in the same file, then uses
+the @option{--extract-dwo} option to copy the .dwo sections to
+the .dwo file, then the @option{--strip-dwo} option to remove
+those sections from the original .o file.
+
+@item --extract-dwo
+Extract the contents of all DWARF .dwo sections. See the
+@option{--strip-dwo} option for more information.
+
@item --file-alignment @var{num}
Specify the file alignment. Sections in the file will always begin at
file offsets which are multiples of this number. This defaults to
@@ -2181,7 +2198,8 @@
trace sections or .gdb_index.
Note: the output from the @option{=info} option can also be affected
-by the options @option{--dwarf-depth} and @option{--dwarf-start}.
+by the options @option{--dwarf-depth}, the @option{--dwarf-start} and
+the @option{--dwarf-check}.
@item --dwarf-depth=@var{n}
Limit the dump of the @code{.debug_info} section to @var{n} children.
@@ -2202,6 +2220,9 @@
This can be used in conjunction with @option{--dwarf-depth}.
+@item --dwarf-check
+Enable additional checks for consistency of Dwarf information.
+
@item -G
@itemx --stabs
@cindex stab
@@ -2680,6 +2701,7 @@
[@option{-O} @var{bfdname} |@option{--output-target=}@var{bfdname}]
[@option{-s}|@option{--strip-all}]
[@option{-S}|@option{-g}|@option{-d}|@option{--strip-debug}]
+ [@option{--strip-dwo}]
[@option{-K} @var{symbolname} |@option{--keep-symbol=}@var{symbolname}]
[@option{-N} @var{symbolname} |@option{--strip-symbol=}@var{symbolname}]
[@option{-w}|@option{--wildcard}]
@@ -2748,6 +2770,12 @@
@itemx --strip-debug
Remove debugging symbols only.
+@item --strip-dwo
+Remove the contents of all DWARF .dwo sections, leaving the
+remaining debugging sections and all symbols intact.
+See the description of this option in the @command{objcopy} section
+for more information.
+
@item --strip-unneeded
Remove all symbols that are not needed for relocation processing.
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index 856a851..072a1a7 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -66,6 +66,8 @@
int dwarf_cutoff_level = -1;
unsigned long dwarf_start_die;
+int dwarf_check = 0;
+
/* Values for do_debug_lines. */
#define FLAG_DEBUG_LINES_RAW 1
#define FLAG_DEBUG_LINES_DECODED 2
@@ -444,6 +446,64 @@
return (const char *) section->start + offset;
}
+static const char *
+fetch_indexed_string (dwarf_vma idx, dwarf_vma offset_size, int dwo)
+{
+ enum dwarf_section_display_enum str_sec_idx = dwo ? str_dwo : str;
+ enum dwarf_section_display_enum idx_sec_idx = dwo ? str_index_dwo : str_index;
+ struct dwarf_section *index_section = &debug_displays [idx_sec_idx].section;
+ struct dwarf_section *str_section = &debug_displays [str_sec_idx].section;
+ dwarf_vma index_offset = idx * offset_size;
+ dwarf_vma str_offset;
+
+ if (index_section->start == NULL)
+ return (dwo ? _("<no .debug_str_offsets.dwo section>")
+ : _("<no .debug_str_offsets section>"));
+
+ /* DWARF sections under Mach-O have non-zero addresses. */
+ index_offset -= index_section->address;
+ if (index_offset > index_section->size)
+ {
+ warn (_("DW_FORM_GNU_str_index offset too big: %s\n"),
+ dwarf_vmatoa ("x", index_offset));
+ return _("<index offset is too big>");
+ }
+
+ if (str_section->start == NULL)
+ return (dwo ? _("<no .debug_str.dwo section>")
+ : _("<no .debug_str section>"));
+
+ str_offset = byte_get (index_section->start + index_offset, offset_size);
+ str_offset -= str_section->address;
+ if (str_offset > str_section->size)
+ {
+ warn (_("DW_FORM_GNU_str_index indirect offset too big: %s\n"),
+ dwarf_vmatoa ("x", str_offset));
+ return _("<indirect index offset is too big>");
+ }
+
+ return (const char *) str_section->start + str_offset;
+}
+
+static const char *
+fetch_indexed_value (dwarf_vma offset, dwarf_vma bytes)
+{
+ struct dwarf_section *section = &debug_displays [debug_addr].section;
+
+ if (section->start == NULL)
+ return (_("<no .debug_addr section>"));
+
+ if (offset + bytes > section->size)
+ {
+ warn (_("Offset into section %s too big: %s\n"),
+ section->name, dwarf_vmatoa ("x", offset));
+ return "<offset too big>";
+ }
+
+ return dwarf_vmatoa ("x", byte_get (section->start + offset, bytes));
+}
+
+
/* FIXME: There are better and more efficient ways to handle
these structures. For now though, I just want something that
is simple to implement. */
@@ -598,7 +658,7 @@
static const char *
get_TAG_name (unsigned long tag)
{
- const char *name = get_DW_TAG_name (tag);
+ const char *name = get_DW_TAG_name ((unsigned int)tag);
if (name == NULL)
{
@@ -1120,6 +1180,11 @@
dwarf_vmatoa ("x", cu_offset + byte_get (data, 4)));
data += 4;
break;
+ case DW_OP_GNU_addr_index:
+ uvalue = read_leb128 (data, &bytes_read, 0);
+ data += bytes_read;
+ printf ("DW_OP_GNU_addr_index <0x%s>", dwarf_vmatoa ("x", uvalue));
+ break;
/* HP extensions. */
case DW_OP_HP_is_value:
@@ -1250,6 +1315,11 @@
data += bytes_read;
break;
+ case DW_FORM_GNU_str_index:
+ uvalue = read_leb128 (data, & bytes_read, 0);
+ data += bytes_read;
+ break;
+
case DW_FORM_ref_udata:
case DW_FORM_udata:
uvalue = read_leb128 (data, & bytes_read, 0);
@@ -1266,6 +1336,10 @@
offset_size, dwarf_version,
debug_info_p, do_loc,
section);
+ case DW_FORM_GNU_addr_index:
+ uvalue = read_leb128 (data, & bytes_read, 0);
+ data += bytes_read;
+ break;
}
switch (form)
@@ -1372,6 +1446,18 @@
fetch_indirect_string (uvalue));
break;
+ case DW_FORM_GNU_str_index:
+ if (!do_loc)
+ {
+ const char *suffix = strrchr (section->name, '.');
+ int dwo = (suffix && strcmp (suffix, ".dwo") == 0) ? 1 : 0;
+
+ printf (_(" (indexed string: 0x%s): %s"),
+ dwarf_vmatoa ("x", uvalue),
+ fetch_indexed_string (uvalue, offset_size, dwo));
+ }
+ break;
+
case DW_FORM_indirect:
/* Handled above. */
break;
@@ -1389,6 +1475,13 @@
data += 8;
break;
+ case DW_FORM_GNU_addr_index:
+ if (!do_loc)
+ printf (_(" (addr_index: 0x%s): %s"),
+ dwarf_vmatoa ("x", uvalue),
+ fetch_indexed_value (uvalue * pointer_size, pointer_size));
+ break;
+
default:
warn (_("Unrecognized form: %lu\n"), form);
break;
@@ -1444,6 +1537,14 @@
debug_info_p->base_address = uvalue;
break;
+ case DW_AT_GNU_addr_base:
+ debug_info_p->addr_base = uvalue;
+ break;
+
+ case DW_AT_GNU_ranges_base:
+ debug_info_p->ranges_base = uvalue;
+ break;
+
case DW_AT_ranges:
if ((dwarf_version < 4
&& (form == DW_FORM_data4 || form == DW_FORM_data8))
@@ -1716,11 +1817,17 @@
abbrev_number = read_leb128 (section->start + uvalue, NULL, 0);
printf (_("[Abbrev Number: %ld"), abbrev_number);
- for (entry = first_abbrev; entry != NULL; entry = entry->next)
- if (entry->entry == abbrev_number)
- break;
- if (entry != NULL)
- printf (" (%s)", get_TAG_name (entry->tag));
+ /* Don't look up abbrev for DW_FORM_ref_addr, as it very often will
+ use different abbrev table, and we don't track .debug_info chunks
+ yet. */
+ if (form != DW_FORM_ref_addr)
+ {
+ for (entry = first_abbrev; entry != NULL; entry = entry->next)
+ if (entry->entry == abbrev_number)
+ break;
+ if (entry != NULL)
+ printf (" (%s)", get_TAG_name (entry->tag));
+ }
printf ("]");
}
}
@@ -1861,6 +1968,10 @@
printf (_("Contents of the %s section:\n\n"), section->name);
load_debug_section (str, file);
+ load_debug_section (str_dwo, file);
+ load_debug_section (str_index, file);
+ load_debug_section (str_index_dwo, file);
+ load_debug_section (debug_addr, file);
}
load_debug_section (abbrev_sec, file);
@@ -1931,6 +2042,8 @@
debug_information [unit].offset_size = offset_size;
debug_information [unit].dwarf_version = compunit.cu_version;
debug_information [unit].base_address = 0;
+ debug_information [unit].addr_base = DEBUG_INFO_UNAVAILABLE;
+ debug_information [unit].ranges_base = DEBUG_INFO_UNAVAILABLE;
debug_information [unit].loc_offsets = NULL;
debug_information [unit].have_frame_base = NULL;
debug_information [unit].max_loc_offsets = 0;
@@ -1948,8 +2061,8 @@
dwarf_vmatoa ("x", compunit.cu_length),
offset_size == 8 ? "64-bit" : "32-bit");
printf (_(" Version: %d\n"), compunit.cu_version);
- printf (_(" Abbrev Offset: %s\n"),
- dwarf_vmatoa ("d", compunit.cu_abbrev_offset));
+ printf (_(" Abbrev Offset: 0x%s\n"),
+ dwarf_vmatoa ("x", compunit.cu_abbrev_offset));
printf (_(" Pointer Size: %d\n"), compunit.cu_pointer_size);
if (do_types)
{
@@ -2040,8 +2153,8 @@
if (num_bogus_warns < 3)
{
- warn (_("Bogus end-of-siblings marker detected at offset %lx in .debug_info section\n"),
- die_offset);
+ warn (_("Bogus end-of-siblings marker detected at offset %lx in %s section\n"),
+ die_offset, section->name);
num_bogus_warns ++;
if (num_bogus_warns == 3)
warn (_("Further warnings about bogus end-of-sibling markers suppressed\n"));
@@ -2176,6 +2289,10 @@
if (load_debug_section (info, file)
&& process_debug_info (&debug_displays [info].section, file, abbrev, 1, 0))
return num_debug_info_entries;
+ else if (load_debug_section (info_dwo, file)
+ && process_debug_info (&debug_displays [info_dwo].section, file,
+ abbrev_dwo, 1, 0))
+ return num_debug_info_entries;
num_debug_info_entries = DEBUG_INFO_UNAVAILABLE;
return 0;
@@ -3564,14 +3681,17 @@
do
{
+ unsigned char *last;
+
free_abbrevs ();
+ last = start;
start = process_abbrev_section (start, end);
if (first_abbrev == NULL)
continue;
- printf (_(" Number TAG\n"));
+ printf (_(" Number TAG (0x%lx)\n"), (long) (last - section->start));
for (entry = first_abbrev; entry; entry = entry->next)
{
@@ -3595,6 +3715,214 @@
return 1;
}
+/* Display a location list from a normal (ie, non-dwo) .debug_loc section. */
+
+static void
+display_loc_list (struct dwarf_section *section,
+ unsigned char **start_ptr,
+ int debug_info_entry,
+ unsigned long offset,
+ unsigned long base_address,
+ int has_frame_base)
+{
+ unsigned char *start = *start_ptr;
+ unsigned char *section_end = section->start + section->size;
+ unsigned long cu_offset = debug_information [debug_info_entry].cu_offset;
+ unsigned int pointer_size = debug_information [debug_info_entry].pointer_size;
+ unsigned int offset_size = debug_information [debug_info_entry].offset_size;
+ int dwarf_version = debug_information [debug_info_entry].dwarf_version;
+
+ dwarf_vma begin;
+ dwarf_vma end;
+ unsigned short length;
+ int need_frame_base;
+
+ while (1)
+ {
+ if (start + 2 * pointer_size > section_end)
+ {
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ break;
+ }
+
+ /* Note: we use sign extension here in order to be sure that we can detect
+ the -1 escape value. Sign extension into the top 32 bits of a 32-bit
+ address will not affect the values that we display since we always show
+ hex values, and always the bottom 32-bits. */
+ begin = byte_get_signed (start, pointer_size);
+ start += pointer_size;
+ end = byte_get_signed (start, pointer_size);
+ start += pointer_size;
+
+ printf (" %8.8lx ", offset);
+
+ if (begin == 0 && end == 0)
+ {
+ printf (_("<End of list>\n"));
+ break;
+ }
+
+ /* Check base address specifiers. */
+ if (begin == (dwarf_vma) -1 && end != (dwarf_vma) -1)
+ {
+ base_address = end;
+ print_dwarf_vma (begin, pointer_size);
+ print_dwarf_vma (end, pointer_size);
+ printf (_("(base address)\n"));
+ continue;
+ }
+
+ if (start + 2 > section_end)
+ {
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ break;
+ }
+
+ length = byte_get (start, 2);
+ start += 2;
+
+ if (start + length > section_end)
+ {
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ break;
+ }
+
+ print_dwarf_vma (begin + base_address, pointer_size);
+ print_dwarf_vma (end + base_address, pointer_size);
+
+ putchar ('(');
+ need_frame_base = decode_location_expression (start,
+ pointer_size,
+ offset_size,
+ dwarf_version,
+ length,
+ cu_offset, section);
+ putchar (')');
+
+ if (need_frame_base && !has_frame_base)
+ printf (_(" [without DW_AT_frame_base]"));
+
+ if (begin == end)
+ fputs (_(" (start == end)"), stdout);
+ else if (begin > end)
+ fputs (_(" (start > end)"), stdout);
+
+ putchar ('\n');
+
+ start += length;
+ }
+
+ *start_ptr = start;
+}
+
+/* Display a location list from a .dwo section. It uses address indexes rather
+ than embedded addresses. This code closely follows display_loc_list, but the
+ two are sufficiently different that combining things is very ugly. */
+
+static void
+display_loc_list_dwo (struct dwarf_section *section,
+ unsigned char **start_ptr,
+ int debug_info_entry,
+ unsigned long offset,
+ int has_frame_base)
+{
+ unsigned char *start = *start_ptr;
+ unsigned char *section_end = section->start + section->size;
+ unsigned long cu_offset = debug_information [debug_info_entry].cu_offset;
+ unsigned int pointer_size = debug_information [debug_info_entry].pointer_size;
+ unsigned int offset_size = debug_information [debug_info_entry].offset_size;
+ int dwarf_version = debug_information [debug_info_entry].dwarf_version;
+ int entry_type;
+ unsigned short length;
+ int need_frame_base;
+ dwarf_vma idx;
+ unsigned int bytes_read;
+
+ while (1)
+ {
+ printf (" %8.8lx ", offset);
+
+ if (start + 2 > section_end)
+ {
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ break;
+ }
+
+ entry_type = byte_get (start, 1);
+ start++;
+ switch (entry_type)
+ {
+ case 0: /* A terminating entry. */
+ idx = byte_get (start, 1);
+ start++;
+ *start_ptr = start;
+ if (idx == 0)
+ printf (_("<End of list>\n"));
+ else
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ return;
+ case 1: /* A base-address entry. */
+ idx = read_leb128 (start, &bytes_read, 0);
+ start += bytes_read;
+ print_dwarf_vma (idx, pointer_size);
+ printf (_("(base address index)\n"));
+ continue;
+ case 2: /* A normal entry. */
+ idx = read_leb128 (start, &bytes_read, 0);
+ start += bytes_read;
+ print_dwarf_vma (idx, pointer_size);
+ idx = read_leb128 (start, &bytes_read, 0);
+ start += bytes_read;
+ print_dwarf_vma (idx, pointer_size);
+ break;
+ default:
+ warn (_("Unknown location-list type 0x%x.\n"), entry_type);
+ *start_ptr = start;
+ return;
+ }
+
+ if (start + 2 > section_end)
+ {
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ break;
+ }
+
+ length = byte_get (start, 2);
+ start += 2;
+
+ if (start + length > section_end)
+ {
+ warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
+ offset);
+ break;
+ }
+
+ putchar ('(');
+ need_frame_base = decode_location_expression (start,
+ pointer_size,
+ offset_size,
+ dwarf_version,
+ length,
+ cu_offset, section);
+ putchar (')');
+
+ if (need_frame_base && !has_frame_base)
+ printf (_(" [without DW_AT_frame_base]"));
+
+ putchar ('\n');
+
+ start += length;
+ }
+
+ *start_ptr = start;
+}
+
/* Sort array of indexes in ascending order of loc_offsets[idx]. */
static dwarf_vma *loc_offsets;
@@ -3612,7 +3940,6 @@
display_debug_loc (struct dwarf_section *section, void *file)
{
unsigned char *start = section->start;
- unsigned char *section_end;
unsigned long bytes;
unsigned char *section_begin = start;
unsigned int num_loc_list = 0;
@@ -3625,9 +3952,13 @@
int locs_sorted = 1;
unsigned char *next;
unsigned int *array = NULL;
+ const char *suffix = strrchr (section->name, '.');
+ int is_dwo = 0;
+
+ if (suffix && strcmp (suffix, ".dwo") == 0)
+ is_dwo = 1;
bytes = section->size;
- section_end = start + bytes;
if (bytes == 0)
{
@@ -3693,27 +4024,18 @@
if (!locs_sorted)
array = (unsigned int *) xcmalloc (num_loc_list, sizeof (unsigned int));
printf (_("Contents of the %s section:\n\n"), section->name);
- printf (_(" Offset Begin End Expression\n"));
+ if (!is_dwo)
+ printf (_(" Offset Begin End Expression\n"));
+ else
+ printf (_(" Offset Begin idx End idx Expression\n"));
seen_first_offset = 0;
for (i = first; i < num_debug_info_entries; i++)
{
- dwarf_vma begin;
- dwarf_vma end;
- unsigned short length;
unsigned long offset;
- unsigned int pointer_size;
- unsigned int offset_size;
- int dwarf_version;
- unsigned long cu_offset;
unsigned long base_address;
- int need_frame_base;
int has_frame_base;
- pointer_size = debug_information [i].pointer_size;
- cu_offset = debug_information [i].cu_offset;
- offset_size = debug_information [i].offset_size;
- dwarf_version = debug_information [i].dwarf_version;
if (!locs_sorted)
{
for (k = 0; k < debug_information [i].num_loc_offsets; k++)
@@ -3759,90 +4081,17 @@
continue;
}
- while (1)
- {
- if (start + 2 * pointer_size > section_end)
- {
- warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
- offset);
- break;
- }
-
- /* Note: we use sign extension here in order to be sure that
- we can detect the -1 escape value. Sign extension into the
- top 32 bits of a 32-bit address will not affect the values
- that we display since we always show hex values, and always
- the bottom 32-bits. */
- begin = byte_get_signed (start, pointer_size);
- start += pointer_size;
- end = byte_get_signed (start, pointer_size);
- start += pointer_size;
-
- printf (" %8.8lx ", offset);
-
- if (begin == 0 && end == 0)
- {
- printf (_("<End of list>\n"));
- break;
- }
-
- /* Check base address specifiers. */
- if (begin == (dwarf_vma) -1 && end != (dwarf_vma) -1)
- {
- base_address = end;
- print_dwarf_vma (begin, pointer_size);
- print_dwarf_vma (end, pointer_size);
- printf (_("(base address)\n"));
- continue;
- }
-
- if (start + 2 > section_end)
- {
- warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
- offset);
- break;
- }
-
- length = byte_get (start, 2);
- start += 2;
-
- if (start + length > section_end)
- {
- warn (_("Location list starting at offset 0x%lx is not terminated.\n"),
- offset);
- break;
- }
-
- print_dwarf_vma (begin + base_address, pointer_size);
- print_dwarf_vma (end + base_address, pointer_size);
-
- putchar ('(');
- need_frame_base = decode_location_expression (start,
- pointer_size,
- offset_size,
- dwarf_version,
- length,
- cu_offset, section);
- putchar (')');
-
- if (need_frame_base && !has_frame_base)
- printf (_(" [without DW_AT_frame_base]"));
-
- if (begin == end)
- fputs (_(" (start == end)"), stdout);
- else if (begin > end)
- fputs (_(" (start > end)"), stdout);
-
- putchar ('\n');
-
- start += length;
- }
+ if (is_dwo)
+ display_loc_list_dwo (section, &start, i, offset, has_frame_base);
+ else
+ display_loc_list (section, &start, i, offset, base_address,
+ has_frame_base);
}
}
- if (start < section_end)
+ if (start < section->start + section->size)
warn (_("There are %ld unused bytes at the end of section %s\n"),
- (long) (section_end - start), section->name);
+ (long) (section->start + section->size - start), section->name);
putchar ('\n');
free (array);
return 1;
@@ -3909,19 +4158,19 @@
static int
display_debug_info (struct dwarf_section *section, void *file)
{
- return process_debug_info (section, file, abbrev, 0, 0);
+ return process_debug_info (section, file, section->abbrev_sec, 0, 0);
}
static int
display_debug_types (struct dwarf_section *section, void *file)
{
- return process_debug_info (section, file, abbrev, 0, 1);
+ return process_debug_info (section, file, section->abbrev_sec, 0, 1);
}
static int
display_trace_info (struct dwarf_section *section, void *file)
{
- return process_debug_info (section, file, trace_abbrev, 0, 0);
+ return process_debug_info (section, file, section->abbrev_sec, 0, 0);
}
static int
@@ -4053,6 +4302,96 @@
return 1;
}
+/* Comparison function for qsort. */
+static int
+comp_addr_base (const void * v0, const void * v1)
+{
+ debug_info * info0 = (debug_info *) v0;
+ debug_info * info1 = (debug_info *) v1;
+ return info0->addr_base - info1->addr_base;
+}
+
+/* Display the debug_addr section. */
+static int
+display_debug_addr (struct dwarf_section *section,
+ void *file)
+{
+ debug_info **debug_addr_info;
+ unsigned char *entry;
+ unsigned char *end;
+ unsigned int i;
+ unsigned int count;
+
+ if (section->size == 0)
+ {
+ printf (_("\nThe %s section is empty.\n"), section->name);
+ return 0;
+ }
+
+ if (load_debug_info (file) == 0)
+ {
+ warn (_("Unable to load/parse the .debug_info section, so cannot interpret the %s section.\n"),
+ section->name);
+ return 0;
+ }
+
+ printf (_("Contents of the %s section:\n\n"), section->name);
+
+ debug_addr_info = (debug_info **) xmalloc (num_debug_info_entries + 1
+ * sizeof (debug_info *));
+
+ count = 0;
+ for (i = 0; i < num_debug_info_entries; i++)
+ {
+ if (debug_information [i].addr_base != DEBUG_INFO_UNAVAILABLE)
+ debug_addr_info [count++] = &debug_information [i];
+ }
+
+ /* Add a sentinel to make iteration convenient. */
+ debug_addr_info [count] = (debug_info *) xmalloc (sizeof (debug_info));
+ debug_addr_info [count]->addr_base = section->size;
+
+ qsort (debug_addr_info, count, sizeof (debug_info *), comp_addr_base);
+ for (i = 0; i < count; i++)
+ {
+ unsigned int idx;
+
+ printf (_(" For compilation unit at offset 0x%s:\n"),
+ dwarf_vmatoa ("x", debug_addr_info [i]->cu_offset));
+
+ printf (_("\tIndex\tOffset\n"));
+ entry = section->start + debug_addr_info [i]->addr_base;
+ end = section->start + debug_addr_info [i + 1]->addr_base;
+ idx = 0;
+ while (entry < end)
+ {
+ dwarf_vma base = byte_get (entry, debug_addr_info [i]->pointer_size);
+ printf (_("\t%d:\t%s\n"), idx, dwarf_vmatoa ("x", base));
+ entry += debug_addr_info [i]->pointer_size;
+ idx++;
+ }
+ }
+ printf ("\n");
+
+ free (debug_addr_info);
+ return 1;
+}
+
+/* Display the .debug_str_offsets and .debug_str_offsets.dwo sections. */
+static int
+display_debug_str_offsets (struct dwarf_section *section,
+ void *file ATTRIBUTE_UNUSED)
+{
+ if (section->size == 0)
+ {
+ printf (_("\nThe %s section is empty.\n"), section->name);
+ return 0;
+ }
+ /* TODO: Dump the contents. This is made somewhat difficult by not knowing
+ what the offset size is for this section. */
+ return 1;
+}
+
/* Each debug_information[x].range_lists[y] gets this representation for
sorting purposes. */
@@ -4083,6 +4422,7 @@
void *file ATTRIBUTE_UNUSED)
{
unsigned char *start = section->start;
+ unsigned char *last_start = start;
unsigned long bytes;
unsigned char *section_begin = start;
unsigned int num_range_list, i;
@@ -4108,7 +4448,12 @@
num_range_list += debug_information [i].num_range_lists;
if (num_range_list == 0)
- error (_("No range lists in .debug_info section!\n"));
+ {
+ /* This can happen when the file was compiled with -gsplit-debug
+ which removes references to range lists from the primary .o file. */
+ printf (_("No range lists in .debug_info section.\n"));
+ return 1;
+ }
range_entries = (struct range_entry *)
xmalloc (sizeof (*range_entries) * num_range_list);
@@ -4131,7 +4476,7 @@
range_entry_compar);
/* DWARF sections under Mach-O have non-zero addresses. */
- if (range_entries[0].ranges_offset != section->address)
+ if (dwarf_check != 0 && range_entries[0].ranges_offset != section->address)
warn (_("Range lists in %s section start at 0x%lx\n"),
section->name, range_entries[0].ranges_offset);
@@ -4154,18 +4499,23 @@
next = section_begin + offset;
base_address = debug_info_p->base_address;
- if (i > 0)
+ if (dwarf_check != 0 && i > 0)
{
if (start < next)
warn (_("There is a hole [0x%lx - 0x%lx] in %s section.\n"),
(unsigned long) (start - section_begin),
(unsigned long) (next - section_begin), section->name);
else if (start > next)
- warn (_("There is an overlap [0x%lx - 0x%lx] in %s section.\n"),
- (unsigned long) (start - section_begin),
- (unsigned long) (next - section_begin), section->name);
+ {
+ if (next == last_start)
+ continue;
+ warn (_("There is an overlap [0x%lx - 0x%lx] in %s section.\n"),
+ (unsigned long) (start - section_begin),
+ (unsigned long) (next - section_begin), section->name);
+ }
}
start = next;
+ last_start = next;
while (1)
{
@@ -5636,46 +5986,69 @@
struct dwarf_section_display debug_displays[] =
{
- { { ".debug_abbrev", ".zdebug_abbrev", NULL, NULL, 0, 0 },
- display_debug_abbrev, &do_debug_abbrevs, 0 },
- { { ".debug_aranges", ".zdebug_aranges", NULL, NULL, 0, 0 },
- display_debug_aranges, &do_debug_aranges, 1 },
- { { ".debug_frame", ".zdebug_frame", NULL, NULL, 0, 0 },
- display_debug_frames, &do_debug_frames, 1 },
- { { ".debug_info", ".zdebug_info", NULL, NULL, 0, 0 },
- display_debug_info, &do_debug_info, 1 },
- { { ".debug_line", ".zdebug_line", NULL, NULL, 0, 0 },
- display_debug_lines, &do_debug_lines, 1 },
- { { ".debug_pubnames", ".zdebug_pubnames", NULL, NULL, 0, 0 },
- display_debug_pubnames, &do_debug_pubnames, 0 },
- { { ".eh_frame", "", NULL, NULL, 0, 0 },
- display_debug_frames, &do_debug_frames, 1 },
- { { ".debug_macinfo", ".zdebug_macinfo", NULL, NULL, 0, 0 },
- display_debug_macinfo, &do_debug_macinfo, 0 },
- { { ".debug_macro", ".zdebug_macro", NULL, NULL, 0, 0 },
- display_debug_macro, &do_debug_macinfo, 1 },
- { { ".debug_str", ".zdebug_str", NULL, NULL, 0, 0 },
- display_debug_str, &do_debug_str, 0 },
- { { ".debug_loc", ".zdebug_loc", NULL, NULL, 0, 0 },
- display_debug_loc, &do_debug_loc, 1 },
- { { ".debug_pubtypes", ".zdebug_pubtypes", NULL, NULL, 0, 0 },
- display_debug_pubnames, &do_debug_pubtypes, 0 },
- { { ".debug_ranges", ".zdebug_ranges", NULL, NULL, 0, 0 },
- display_debug_ranges, &do_debug_ranges, 1 },
- { { ".debug_static_func", ".zdebug_static_func", NULL, NULL, 0, 0 },
- display_debug_not_supported, NULL, 0 },
- { { ".debug_static_vars", ".zdebug_static_vars", NULL, NULL, 0, 0 },
- display_debug_not_supported, NULL, 0 },
- { { ".debug_types", ".zdebug_types", NULL, NULL, 0, 0 },
- display_debug_types, &do_debug_info, 1 },
- { { ".debug_weaknames", ".zdebug_weaknames", NULL, NULL, 0, 0 },
- display_debug_not_supported, NULL, 0 },
- { { ".gdb_index", "", NULL, NULL, 0, 0 },
+ { { ".debug_abbrev", ".zdebug_abbrev", NULL, NULL, 0, 0, abbrev },
+ display_debug_abbrev, &do_debug_abbrevs, 0 },
+ { { ".debug_aranges", ".zdebug_aranges", NULL, NULL, 0, 0, abbrev },
+ display_debug_aranges, &do_debug_aranges, 1 },
+ { { ".debug_frame", ".zdebug_frame", NULL, NULL, 0, 0, abbrev },
+ display_debug_frames, &do_debug_frames, 1 },
+ { { ".debug_info", ".zdebug_info", NULL, NULL, 0, 0, abbrev },
+ display_debug_info, &do_debug_info, 1 },
+ { { ".debug_line", ".zdebug_line", NULL, NULL, 0, 0, abbrev },
+ display_debug_lines, &do_debug_lines, 1 },
+ { { ".debug_pubnames", ".zdebug_pubnames", NULL, NULL, 0, 0, abbrev },
+ display_debug_pubnames, &do_debug_pubnames, 0 },
+ { { ".eh_frame", "", NULL, NULL, 0, 0, abbrev },
+ display_debug_frames, &do_debug_frames, 1 },
+ { { ".debug_macinfo", ".zdebug_macinfo", NULL, NULL, 0, 0, abbrev },
+ display_debug_macinfo, &do_debug_macinfo, 0 },
+ { { ".debug_macro", ".zdebug_macro", NULL, NULL, 0, 0, abbrev },
+ display_debug_macro, &do_debug_macinfo, 1 },
+ { { ".debug_str", ".zdebug_str", NULL, NULL, 0, 0, abbrev },
+ display_debug_str, &do_debug_str, 0 },
+ { { ".debug_loc", ".zdebug_loc", NULL, NULL, 0, 0, abbrev },
+ display_debug_loc, &do_debug_loc, 1 },
+ { { ".debug_pubtypes", ".zdebug_pubtypes", NULL, NULL, 0, 0, abbrev },
+ display_debug_pubnames, &do_debug_pubtypes, 0 },
+ { { ".debug_ranges", ".zdebug_ranges", NULL, NULL, 0, 0, abbrev },
+ display_debug_ranges, &do_debug_ranges, 1 },
+ { { ".debug_static_func", ".zdebug_static_func", NULL, NULL, 0, 0, abbrev },
+ display_debug_not_supported, NULL, 0 },
+ { { ".debug_static_vars", ".zdebug_static_vars", NULL, NULL, 0, 0, abbrev },
+ display_debug_not_supported, NULL, 0 },
+ { { ".debug_types", ".zdebug_types", NULL, NULL, 0, 0, abbrev },
+ display_debug_types, &do_debug_info, 1 },
+ { { ".debug_weaknames", ".zdebug_weaknames", NULL, NULL, 0, 0, abbrev },
+ display_debug_not_supported, NULL, 0 },
+ { { ".gdb_index", "", NULL, NULL, 0, 0, abbrev },
display_gdb_index, &do_gdb_index, 0 },
- { { ".trace_info", "", NULL, NULL, 0, 0 },
+ { { ".trace_info", "", NULL, NULL, 0, 0, trace_abbrev },
display_trace_info, &do_trace_info, 1 },
- { { ".trace_abbrev", "", NULL, NULL, 0, 0 },
+ { { ".trace_abbrev", "", NULL, NULL, 0, 0, abbrev },
display_debug_abbrev, &do_trace_abbrevs, 0 },
- { { ".trace_aranges", "", NULL, NULL, 0, 0 },
- display_debug_aranges, &do_trace_aranges, 0 }
+ { { ".trace_aranges", "", NULL, NULL, 0, 0, abbrev },
+ display_debug_aranges, &do_trace_aranges, 0 },
+ { { ".debug_info.dwo", ".zdebug_info.dwo", NULL, NULL, 0, 0, abbrev_dwo },
+ display_debug_info, &do_debug_info, 1 },
+ { { ".debug_abbrev.dwo", ".zdebug_abbrev.dwo", NULL, NULL, 0, 0, abbrev_dwo },
+ display_debug_abbrev, &do_debug_abbrevs, 0 },
+ { { ".debug_types.dwo", ".zdebug_types.dwo", NULL, NULL, 0, 0, abbrev_dwo },
+ display_debug_types, &do_debug_info, 1 },
+ { { ".debug_line.dwo", ".zdebug_line.dwo", NULL, NULL, 0, 0, abbrev_dwo },
+ display_debug_lines, &do_debug_lines, 1 },
+ { { ".debug_loc.dwo", ".zdebug_loc.dwo", NULL, NULL, 0, 0, abbrev_dwo },
+ display_debug_loc, &do_debug_loc, 1 },
+ { { ".debug_macro.dwo", ".zdebug_macro.dwo",NULL, NULL, 0, 0, abbrev },
+ display_debug_macro, &do_debug_macinfo, 1 },
+ { { ".debug_macinfo.dwo", ".zdebug_macinfo.dwo",NULL, NULL, 0, 0, abbrev },
+ display_debug_macinfo, &do_debug_macinfo, 0 },
+ { { ".debug_str.dwo", ".zdebug_str.dwo", NULL, NULL, 0, 0, str_dwo },
+ display_debug_str, &do_debug_str, 1 },
+ { { ".debug_str_offsets",".zdebug_str_offsets", NULL, NULL, 0, 0, abbrev },
+ display_debug_str_offsets, NULL, 0 },
+ { { ".debug_str_offsets.dwo",".zdebug_str_offsets.dwo", NULL, NULL, 0, 0,
+ abbrev },
+ display_debug_str_offsets, NULL, 0 },
+ { { ".debug_addr",".zdebug_addr", NULL, NULL, 0, 0, debug_addr },
+ display_debug_addr, NULL, 1 },
};
diff --git a/binutils/dwarf.h b/binutils/dwarf.h
index 75d93c8..84f5080 100644
--- a/binutils/dwarf.h
+++ b/binutils/dwarf.h
@@ -109,30 +109,6 @@
}
DWARF2_Internal_ARange;
-struct dwarf_section
-{
- /* A debug section has a different name when it's stored compressed
- or not. COMPRESSED_NAME and UNCOMPRESSED_NAME are the two
- possibilities. NAME is set to whichever one is used for this
- input file, as determined by load_debug_section(). */
- const char *uncompressed_name;
- const char *compressed_name;
- const char *name;
- unsigned char *start;
- dwarf_vma address;
- dwarf_size_type size;
-};
-
-/* A structure containing the name of a debug section
- and a pointer to a function that can decode it. */
-struct dwarf_section_display
-{
- struct dwarf_section section;
- int (*display) (struct dwarf_section *, void *);
- int *enabled;
- unsigned int relocate : 1;
-};
-
enum dwarf_section_display_enum
{
abbrev = 0,
@@ -156,9 +132,45 @@
trace_info,
trace_abbrev,
trace_aranges,
+ info_dwo,
+ abbrev_dwo,
+ types_dwo,
+ line_dwo,
+ loc_dwo,
+ macro_dwo,
+ macinfo_dwo,
+ str_dwo,
+ str_index,
+ str_index_dwo,
+ debug_addr,
max
};
+struct dwarf_section
+{
+ /* A debug section has a different name when it's stored compressed
+ or not. COMPRESSED_NAME and UNCOMPRESSED_NAME are the two
+ possibilities. NAME is set to whichever one is used for this
+ input file, as determined by load_debug_section(). */
+ const char *uncompressed_name;
+ const char *compressed_name;
+ const char *name;
+ unsigned char *start;
+ dwarf_vma address;
+ dwarf_size_type size;
+ enum dwarf_section_display_enum abbrev_sec;
+};
+
+/* A structure containing the name of a debug section
+ and a pointer to a function that can decode it. */
+struct dwarf_section_display
+{
+ struct dwarf_section section;
+ int (*display) (struct dwarf_section *, void *);
+ int *enabled;
+ unsigned int relocate : 1;
+};
+
extern struct dwarf_section_display debug_displays [];
/* This structure records the information that
@@ -170,6 +182,12 @@
int dwarf_version;
dwarf_vma cu_offset;
dwarf_vma base_address;
+ /* This field is filled in when reading the attribute DW_AT_GNU_addr_base and
+ is used with the form DW_AT_GNU_FORM_addr_index. */
+ dwarf_vma addr_base;
+ /* This field is filled in when reading the attribute DW_AT_GNU_ranges_base and
+ is used when calculating ranges. */
+ dwarf_vma ranges_base;
/* This is an array of offsets to the location list table. */
dwarf_vma * loc_offsets;
int * have_frame_base;
@@ -205,6 +223,8 @@
extern int dwarf_cutoff_level;
extern unsigned long dwarf_start_die;
+extern int dwarf_check;
+
extern void init_dwarf_regnames (unsigned int);
extern void init_dwarf_regnames_i386 (void);
extern void init_dwarf_regnames_x86_64 (void);
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index f56dc22..d0d112f 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -96,6 +96,8 @@
STRIP_DEBUG, /* Strip all debugger symbols. */
STRIP_UNNEEDED, /* Strip unnecessary symbols. */
STRIP_NONDEBUG, /* Strip everything but debug info. */
+ STRIP_DWO, /* Strip all DWO info. */
+ STRIP_NONDWO, /* Strip everything but DWO info. */
STRIP_ALL /* Strip all symbols. */
};
@@ -314,7 +316,9 @@
OPTION_SECTION_ALIGNMENT,
OPTION_STACK,
OPTION_INTERLEAVE_WIDTH,
- OPTION_SUBSYSTEM
+ OPTION_SUBSYSTEM,
+ OPTION_EXTRACT_DWO,
+ OPTION_STRIP_DWO
};
/* Options to handle if running as "strip". */
@@ -339,6 +343,7 @@
{"remove-section", required_argument, 0, 'R'},
{"strip-all", no_argument, 0, 's'},
{"strip-debug", no_argument, 0, 'S'},
+ {"strip-dwo", no_argument, 0, OPTION_STRIP_DWO},
{"strip-unneeded", no_argument, 0, OPTION_STRIP_UNNEEDED},
{"strip-symbol", required_argument, 0, 'N'},
{"target", required_argument, 0, 'F'},
@@ -374,6 +379,7 @@
{"discard-all", no_argument, 0, 'x'},
{"discard-locals", no_argument, 0, 'X'},
{"enable-deterministic-archives", no_argument, 0, 'D'},
+ {"extract-dwo", no_argument, 0, OPTION_EXTRACT_DWO},
{"extract-symbol", no_argument, 0, OPTION_EXTRACT_SYMBOL},
{"format", required_argument, 0, 'F'}, /* Obsolete */
{"gap-fill", required_argument, 0, OPTION_GAP_FILL},
@@ -420,6 +426,7 @@
{"srec-forceS3", no_argument, 0, OPTION_SREC_FORCES3},
{"strip-all", no_argument, 0, 'S'},
{"strip-debug", no_argument, 0, 'g'},
+ {"strip-dwo", no_argument, 0, OPTION_STRIP_DWO},
{"strip-unneeded", no_argument, 0, OPTION_STRIP_UNNEEDED},
{"strip-unneeded-symbol", required_argument, 0, OPTION_STRIP_UNNEEDED_SYMBOL},
{"strip-unneeded-symbols", required_argument, 0, OPTION_STRIP_UNNEEDED_SYMBOLS},
@@ -490,12 +497,14 @@
-R --remove-section <name> Remove section <name> from the output\n\
-S --strip-all Remove all symbol and relocation information\n\
-g --strip-debug Remove all debugging symbols & sections\n\
+ --strip-dwo Remove all DWO sections\n\
--strip-unneeded Remove all symbols not needed by relocations\n\
-N --strip-symbol <name> Do not copy symbol <name>\n\
--strip-unneeded-symbol <name>\n\
Do not copy symbol <name> unless needed by\n\
relocations\n\
--only-keep-debug Strip everything but the debug information\n\
+ --extract-dwo Copy only DWO sections\n\
--extract-symbol Remove section contents but keep symbols\n\
-K --keep-symbol <name> Do not strip symbol <name>\n\
--keep-file-symbols Do not strip file symbol(s)\n\
@@ -598,6 +607,7 @@
-R --remove-section=<name> Remove section <name> from the output\n\
-s --strip-all Remove all symbol and relocation information\n\
-g -S -d --strip-debug Remove all debugging symbols & sections\n\
+ --strip-dwo Remove all DWO sections\n\
--strip-unneeded Remove all symbols not needed by relocations\n\
--only-keep-debug Strip everything but the debug information\n\
-N --strip-symbol=<name> Do not copy symbol <name>\n\
@@ -908,6 +918,17 @@
return htab_find (htab, name) != NULL;
}
+/* Return TRUE if the section is a DWO section. */
+
+static bfd_boolean
+is_dwo_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec)
+{
+ const char *name = bfd_get_section_name (abfd, sec);
+ int len = strlen (name);
+
+ return strncmp (name + len - 4, ".dwo", 4) == 0;
+}
+
/* See if a non-group section is being removed. */
static bfd_boolean
@@ -934,10 +955,16 @@
|| convert_debugging)
return TRUE;
+ if (strip_symbols == STRIP_DWO)
+ return is_dwo_section (abfd, sec);
+
if (strip_symbols == STRIP_NONDEBUG)
return FALSE;
}
+ if (strip_symbols == STRIP_NONDWO)
+ return !is_dwo_section (abfd, sec);
+
return FALSE;
}
@@ -1825,6 +1852,8 @@
|| strip_symbols == STRIP_ALL
|| strip_symbols == STRIP_UNNEEDED
|| strip_symbols == STRIP_NONDEBUG
+ || strip_symbols == STRIP_DWO
+ || strip_symbols == STRIP_NONDWO
|| discard_locals != LOCALS_UNDEF
|| localize_hidden
|| htab_elements (strip_specific_htab) != 0
@@ -2632,8 +2661,8 @@
osection = isection->output_section;
- /* Core files do not need to be relocated. */
- if (bfd_get_format (obfd) == bfd_core)
+ /* Core files and DWO files do not need to be relocated. */
+ if (bfd_get_format (obfd) == bfd_core || strip_symbols == STRIP_NONDWO)
relsize = 0;
else
{
@@ -2654,7 +2683,10 @@
}
if (relsize == 0)
- bfd_set_reloc (obfd, osection, NULL, 0);
+ {
+ bfd_set_reloc (obfd, osection, NULL, 0);
+ osection->flags &= ~SEC_RELOC;
+ }
else
{
relpp = (arelent **) xmalloc (relsize);
@@ -2998,6 +3030,9 @@
case 'd': /* Historic BSD alias for -g. Used by early NetBSD. */
strip_symbols = STRIP_DEBUG;
break;
+ case OPTION_STRIP_DWO:
+ strip_symbols = STRIP_DWO;
+ break;
case OPTION_STRIP_UNNEEDED:
strip_symbols = STRIP_UNNEEDED;
break;
@@ -3328,6 +3363,10 @@
strip_symbols = STRIP_DEBUG;
break;
+ case OPTION_STRIP_DWO:
+ strip_symbols = STRIP_DWO;
+ break;
+
case OPTION_STRIP_UNNEEDED:
strip_symbols = STRIP_UNNEEDED;
break;
@@ -3789,6 +3828,10 @@
bfd_flags_to_set &= ~D_PAGED;
break;
+ case OPTION_EXTRACT_DWO:
+ strip_symbols = STRIP_NONDWO;
+ break;
+
case OPTION_EXTRACT_SYMBOL:
extract_symbol = TRUE;
break;
diff --git a/binutils/objdump.c b/binutils/objdump.c
index 7a51d56..b22bf8b 100644
--- a/binutils/objdump.c
+++ b/binutils/objdump.c
@@ -261,7 +261,9 @@
fprintf (stream, _("\
--dwarf-depth=N Do not display DIEs at depth N or greater\n\
--dwarf-start=N Display DIEs starting with N, at the same depth\n\
- or deeper\n\n"));
+ or deeper\n\
+ --dwarf-check Make additional dwarf internal consistency checks.\
+ \n\n"));
list_supported_targets (program_name, stream);
list_supported_architectures (program_name, stream);
@@ -292,6 +294,7 @@
OPTION_INSN_WIDTH,
OPTION_ADJUST_VMA,
OPTION_DWARF_DEPTH,
+ OPTION_DWARF_CHECK,
OPTION_DWARF_START
};
@@ -343,6 +346,7 @@
{"insn-width", required_argument, NULL, OPTION_INSN_WIDTH},
{"dwarf-depth", required_argument, 0, OPTION_DWARF_DEPTH},
{"dwarf-start", required_argument, 0, OPTION_DWARF_START},
+ {"dwarf-check", no_argument, 0, OPTION_DWARF_CHECK},
{0, no_argument, 0, 0}
};
@@ -3601,6 +3605,9 @@
suppress_bfd_header = 1;
}
break;
+ case OPTION_DWARF_CHECK:
+ dwarf_check = TRUE;
+ break;
case 'G':
dump_stab_section_info = TRUE;
seenflag = TRUE;
diff --git a/binutils/readelf.c b/binutils/readelf.c
index 31c93ed..1873f7a 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -48,6 +48,7 @@
#ifdef HAVE_ZLIB_H
#include <zlib.h>
#endif
+#include <wchar.h>
#if __GNUC__ >= 2
/* Define BFD64 here, even if our default architecture is 32 bit ELF
@@ -383,93 +384,89 @@
return 0;
}
-/* Display a symbol on stdout. Handles the display of non-printing characters.
+/* Display a symbol on stdout. Handles the display of control characters and
+ multibye characters.
- If DO_WIDE is not true then format the symbol to be at most WIDTH characters,
- truncating as necessary. If WIDTH is negative then format the string to be
- exactly - WIDTH characters, truncating or padding as necessary.
+ Display at most abs(WIDTH) characters, truncating as necessary, unless do_wide is true.
+
+ If WIDTH is negative then ensure that the output is at least (- WIDTH) characters,
+ padding as necessary.
Returns the number of emitted characters. */
static unsigned int
print_symbol (int width, const char *symbol)
{
- const char *c;
bfd_boolean extra_padding = FALSE;
- unsigned int num_printed = 0;
+ int num_printed = 0;
+ mbstate_t state;
+ int width_remaining;
- if (do_wide)
- {
- /* Set the width to a very large value. This simplifies the
- code below. */
- width = INT_MAX;
- }
- else if (width < 0)
+ if (width < 0)
{
/* Keep the width positive. This also helps. */
width = - width;
extra_padding = TRUE;
- }
+ }
- while (width)
+ if (do_wide)
+ /* Set the remaining width to a very large value.
+ This simplifies the code below. */
+ width_remaining = INT_MAX;
+ else
+ width_remaining = width;
+
+ /* Initialise the multibyte conversion state. */
+ memset (& state, 0, sizeof (state));
+
+ while (width_remaining)
{
- int len;
+ size_t n;
+ wchar_t w;
+ const char c = *symbol++;
- c = symbol;
-
- /* Look for non-printing symbols inside the symbol's name.
- This test is triggered in particular by the names generated
- by the assembler for local labels. */
- while (ISPRINT (*c))
- c++;
-
- len = c - symbol;
-
- if (len)
- {
- if (len > width)
- len = width;
-
- printf ("%.*s", len, symbol);
-
- width -= len;
- num_printed += len;
- }
-
- if (*c == 0 || width == 0)
+ if (c == 0)
break;
- /* Now display the non-printing character, if
- there is room left in which to dipslay it. */
- if ((unsigned char) *c < 32)
+ /* Do not print control characters directly as they can affect terminal
+ settings. Such characters usually appear in the names generated
+ by the assembler for local labels. */
+ if (ISCNTRL (c))
{
- if (width < 2)
+ if (width_remaining < 2)
break;
- printf ("^%c", *c + 0x40);
-
- width -= 2;
+ printf ("^%c", c + 0x40);
+ width_remaining -= 2;
num_printed += 2;
}
+ else if (ISPRINT (c))
+ {
+ putchar (c);
+ width_remaining --;
+ num_printed ++;
+ }
else
{
- if (width < 6)
- break;
+ /* Let printf do the hard work of displaying multibyte characters. */
+ printf ("%.1s", symbol - 1);
+ width_remaining --;
+ num_printed ++;
- printf ("<0x%.2x>", (unsigned char) *c);
-
- width -= 6;
- num_printed += 6;
+ /* Try to find out how many bytes made up the character that was
+ just printed. Advance the symbol pointer past the bytes that
+ were displayed. */
+ n = mbrtowc (& w, symbol - 1, MB_CUR_MAX, & state);
+ if (n != (size_t) -1 && n != (size_t) -2 && n > 0)
+ symbol += (n - 1);
}
-
- symbol = c + 1;
}
- if (extra_padding && width > 0)
+ if (extra_padding && num_printed < width)
{
/* Fill in the remaining spaces. */
- printf ("%-*s", width, " ");
- num_printed += 2;
+ printf ("%-*s", width - num_printed, " ");
+ num_printed = width;
}
return num_printed;
@@ -1389,9 +1386,13 @@
}
else if (is_rela)
{
- printf ("%*c", is_32bit_elf ?
- (do_wide ? 34 : 28) : (do_wide ? 26 : 20), ' ');
- print_vma (rels[i].r_addend, LONG_HEX);
+ bfd_signed_vma off = rels[i].r_addend;
+
+ printf ("%*c", is_32bit_elf ? 12 : 20, ' ');
+ if (off < 0)
+ printf ("-%" BFD_VMA_FMT "x", - off);
+ else
+ printf ("%" BFD_VMA_FMT "x", off);
}
if (elf_header.e_machine == EM_SPARCV9
@@ -1866,7 +1867,6 @@
case EM_IA_64: return "Intel IA-64";
case EM_MIPS_X: return "Stanford MIPS-X";
case EM_COLDFIRE: return "Motorola Coldfire";
- case EM_68HC12: return "Motorola M68HC12";
case EM_ALPHA: return "Alpha";
case EM_CYGNUS_D10V:
case EM_D10V: return "d10v";
@@ -1901,6 +1901,7 @@
case EM_ST9PLUS: return "STMicroelectronics ST9+ 8/16 bit microcontroller";
case EM_ST7: return "STMicroelectronics ST7 8-bit microcontroller";
case EM_68HC16: return "Motorola MC68HC16 Microcontroller";
+ case EM_68HC12: return "Motorola MC68HC12 Microcontroller";
case EM_68HC11: return "Motorola MC68HC11 Microcontroller";
case EM_68HC08: return "Motorola MC68HC08 Microcontroller";
case EM_68HC05: return "Motorola MC68HC05 Microcontroller";
@@ -3128,6 +3129,7 @@
#define OPTION_DYN_SYMS 513
#define OPTION_DWARF_DEPTH 514
#define OPTION_DWARF_START 515
+#define OPTION_DWARF_CHECK 516
static struct option options[] =
{
@@ -3163,6 +3165,7 @@
{"dwarf-depth", required_argument, 0, OPTION_DWARF_DEPTH},
{"dwarf-start", required_argument, 0, OPTION_DWARF_START},
+ {"dwarf-check", no_argument, 0, OPTION_DWARF_CHECK},
{"version", no_argument, 0, 'v'},
{"wide", no_argument, 0, 'W'},
@@ -3431,6 +3434,9 @@
dwarf_start_die = strtoul (optarg, & cp, 0);
}
break;
+ case OPTION_DWARF_CHECK:
+ dwarf_check = 1;
+ break;
case OPTION_DYN_SYMS:
do_dyn_syms++;
break;
@@ -4639,19 +4645,19 @@
name += sizeof (".debug_") - 1;
if (do_debugging
- || (do_debug_info && streq (name, "info"))
- || (do_debug_info && streq (name, "types"))
- || (do_debug_abbrevs && streq (name, "abbrev"))
- || (do_debug_lines && streq (name, "line"))
- || (do_debug_pubnames && streq (name, "pubnames"))
- || (do_debug_pubtypes && streq (name, "pubtypes"))
- || (do_debug_aranges && streq (name, "aranges"))
- || (do_debug_ranges && streq (name, "ranges"))
- || (do_debug_frames && streq (name, "frame"))
- || (do_debug_macinfo && streq (name, "macinfo"))
- || (do_debug_macinfo && streq (name, "macro"))
- || (do_debug_str && streq (name, "str"))
- || (do_debug_loc && streq (name, "loc"))
+ || (do_debug_info && const_strneq (name, "info"))
+ || (do_debug_info && const_strneq (name, "types"))
+ || (do_debug_abbrevs && const_strneq (name, "abbrev"))
+ || (do_debug_lines && const_strneq (name, "line"))
+ || (do_debug_pubnames && const_strneq (name, "pubnames"))
+ || (do_debug_pubtypes && const_strneq (name, "pubtypes"))
+ || (do_debug_aranges && const_strneq (name, "aranges"))
+ || (do_debug_ranges && const_strneq (name, "ranges"))
+ || (do_debug_frames && const_strneq (name, "frame"))
+ || (do_debug_macinfo && const_strneq (name, "macinfo"))
+ || (do_debug_macinfo && const_strneq (name, "macro"))
+ || (do_debug_str && const_strneq (name, "str"))
+ || (do_debug_loc && const_strneq (name, "loc"))
)
request_dump_bynumber (i, DEBUG_DUMP);
}
@@ -4732,22 +4738,20 @@
i < elf_header.e_shnum;
i++, section++)
{
+ printf (" [%2u] ", i);
if (do_section_details)
{
- printf (" [%2u] %s\n",
- i,
- SECTION_NAME (section));
- if (is_32bit_elf || do_wide)
- printf (" %-15.15s ",
- get_section_type_name (section->sh_type));
+ print_symbol (INT_MAX, SECTION_NAME (section));
+ printf ("\n ");
}
else
- printf ((do_wide ? " [%2u] %-17s %-15s "
- : " [%2u] %-17.17s %-15.15s "),
- i,
- SECTION_NAME (section),
- get_section_type_name (section->sh_type));
-
+ {
+ print_symbol (-17, SECTION_NAME (section));
+ }
+
+ printf (do_wide ? " %-15s " : " %-15.15s ",
+ get_section_type_name (section->sh_type));
+
if (is_32bit_elf)
{
const char * link_too_big = NULL;
diff --git a/binutils/sysdep.h b/binutils/sysdep.h
index 0e1d502..5164e79 100644
--- a/binutils/sysdep.h
+++ b/binutils/sysdep.h
@@ -46,6 +46,10 @@
#include <unistd.h>
#endif
+#ifdef STRING_WITH_STRINGS
+#include <string.h>
+#include <strings.h>
+#else
#ifdef HAVE_STRING_H
#include <string.h>
#else
@@ -56,6 +60,7 @@
extern char *strrchr ();
#endif
#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
diff --git a/binutils/syslex.l b/binutils/syslex.l
index abfa678..14aee73 100644
--- a/binutils/syslex.l
+++ b/binutils/syslex.l
@@ -1,7 +1,7 @@
%option noinput nounput
%{
-/* Copyright 2001, 2003, 2005, 2007, 2011 Free Software Foundation, Inc.
+/* Copyright 2001, 2003, 2005, 2007, 2011, 2012 Free Software Foundation, Inc.
This file is part of GNU Binutils.
@@ -20,7 +20,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-#include "config.h"
+/* Note: config.h is #included via syslex_wrap.c. */
+
#ifdef HAVE_STRING_H
#include <string.h>
#else
@@ -28,6 +29,7 @@
#include <strings.h>
#endif
#endif
+
#include "sysinfo.h"
#ifndef YY_NO_UNPUT
diff --git a/binutils/syslex_wrap.c b/binutils/syslex_wrap.c
new file mode 100644
index 0000000..e10b5fd
--- /dev/null
+++ b/binutils/syslex_wrap.c
@@ -0,0 +1,8 @@
+/* Wrapper source to ensure that config.h is the first header file seen by
+ the compiler. */
+
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
+
+#include "syslex.c"
diff --git a/binutils/testsuite/ChangeLog b/binutils/testsuite/ChangeLog
index 797272d..04b775e 100644
--- a/binutils/testsuite/ChangeLog
+++ b/binutils/testsuite/ChangeLog
@@ -1,3 +1,19 @@
+2012-05-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * binutils-all/hppa/objdump.exp: Expect addend as signed.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * binutils-all/objdump.W: Update.
+ * binutils-all/readelf.wa: Update.
+ * binutils-all/i386/compressed-1a.d: Update.
+ * binutils-all/x86-64/compressed-1a.d: Update.
+
+2012-05-16 Meador Inge <meadori@codesourcery.com>
+
+ * binutils-all/arm/objdump.exp:
+ STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer.
+
2012-04-12 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/13947
diff --git a/binutils/testsuite/binutils-all/arm/objdump.exp b/binutils/testsuite/binutils-all/arm/objdump.exp
index 2b78db3..321e2a9 100644
--- a/binutils/testsuite/binutils-all/arm/objdump.exp
+++ b/binutils/testsuite/binutils-all/arm/objdump.exp
@@ -80,7 +80,7 @@
set got [binutils_run $OBJDUMP "-dr $objfile $objfile"]
-set want "$objfile:\[ \]*file format.*$objfile:\[ \]*file format.*push.*add.*sub.*str.*add.*pop"
+set want "$objfile:\[ \]*file format.*$objfile:\[ \]*file format.*push.*add.*sub.*str.*add.*ldmfd"
if [regexp $want $got] then {
pass "multiple input files"
diff --git a/binutils/testsuite/binutils-all/hppa/objdump.exp b/binutils/testsuite/binutils-all/hppa/objdump.exp
index 28a8d97..c6d1640 100644
--- a/binutils/testsuite/binutils-all/hppa/objdump.exp
+++ b/binutils/testsuite/binutils-all/hppa/objdump.exp
@@ -57,9 +57,9 @@
set got [binutils_run $OBJDUMP "$OBJDUMPFLAGS -r $objfile"]
if [istarget hppa*-*-*elf*] then {
- set want "00000000 R_PARISC_DPREL21L\[ \]+is_idchar\\+0xffffffe0.*"
+ set want "00000000 R_PARISC_DPREL21L\[ \]+is_idchar-0x00000020.*"
} else {
- set want "00000000 R_DP_RELATIVE\[ \]+is_idchar\\+0xffffffe0.*"
+ set want "00000000 R_DP_RELATIVE\[ \]+is_idchar-0x00000020.*"
}
diff --git a/binutils/testsuite/binutils-all/i386/compressed-1a.d b/binutils/testsuite/binutils-all/i386/compressed-1a.d
index 3a626b4..aa0284a 100644
--- a/binutils/testsuite/binutils-all/i386/compressed-1a.d
+++ b/binutils/testsuite/binutils-all/i386/compressed-1a.d
@@ -7,7 +7,7 @@
Contents of the .[z]?debug_abbrev section:
- Number TAG
+ Number TAG \(0x0\)
1 DW_TAG_compile_unit \[has children\]
DW_AT_producer DW_FORM_strp
DW_AT_language DW_FORM_data1
@@ -30,7 +30,7 @@
Compilation Unit @ offset 0x0:
Length: 0x46 \(32-bit\)
Version: 3
- Abbrev Offset: 0
+ Abbrev Offset: 0x0
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_producer : \(indirect string, offset: 0x0\): GNU C 4.4.4
diff --git a/binutils/testsuite/binutils-all/objdump.W b/binutils/testsuite/binutils-all/objdump.W
index 5b58fb4..449372e 100644
--- a/binutils/testsuite/binutils-all/objdump.W
+++ b/binutils/testsuite/binutils-all/objdump.W
@@ -6,7 +6,7 @@
Compilation Unit @ offset 0x0:
Length: 0x4e \(32-bit\)
Version: 2
- Abbrev Offset: 0
+ Abbrev Offset: 0x0
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_stmt_list : 0x0
@@ -75,7 +75,7 @@
Contents of the .debug_abbrev section:
- Number TAG
+ Number TAG \(0x0\)
1 DW_TAG_compile_unit \[has children\]
DW_AT_stmt_list DW_FORM_data4
DW_AT_high_pc DW_FORM_addr
diff --git a/binutils/testsuite/binutils-all/readelf.wa b/binutils/testsuite/binutils-all/readelf.wa
index 63892a4..e1e158c 100644
--- a/binutils/testsuite/binutils-all/readelf.wa
+++ b/binutils/testsuite/binutils-all/readelf.wa
@@ -1,6 +1,6 @@
Contents of the .zdebug_abbrev section:
- Number TAG
+ Number TAG (0x0)
1 DW_TAG_compile_unit [has children]
DW_AT_stmt_list DW_FORM_data4
DW_AT_high_pc DW_FORM_addr
diff --git a/binutils/testsuite/binutils-all/x86-64/compressed-1a.d b/binutils/testsuite/binutils-all/x86-64/compressed-1a.d
index 4176f6d..98115af 100644
--- a/binutils/testsuite/binutils-all/x86-64/compressed-1a.d
+++ b/binutils/testsuite/binutils-all/x86-64/compressed-1a.d
@@ -7,7 +7,7 @@
Contents of the .[z]?debug_abbrev section:
- Number TAG
+ Number TAG \(0x0\)
1 DW_TAG_compile_unit \[has children\]
DW_AT_producer DW_FORM_strp
DW_AT_language DW_FORM_data1
@@ -30,7 +30,7 @@
Compilation Unit @ offset 0x0:
Length: 0x5e \(32-bit\)
Version: 3
- Abbrev Offset: 0
+ Abbrev Offset: 0x0
Pointer Size: 8
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_producer : \(indirect string, offset: 0x0\): GNU C 4.4.4
diff --git a/binutils/unwind-ia64.c b/binutils/unwind-ia64.c
index 3838235..249114f 100644
--- a/binutils/unwind-ia64.c
+++ b/binutils/unwind-ia64.c
@@ -1,6 +1,8 @@
/* unwind-ia64.c -- utility routines to dump IA-64 unwind info for readelf.
- Copyright 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
- Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
+ Copyright 2000, 2001, 2002, 2003, 2005, 2007, 2012
+ Free Software Foundation, Inc.
+
+ Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of GNU Binutils.
@@ -19,6 +21,7 @@
Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "config.h"
#include "unwind-ia64.h"
#include <stdio.h>
#include <string.h>
diff --git a/config/ChangeLog b/config/ChangeLog
index 1087ad8..42fcfce 100644
--- a/config/ChangeLog
+++ b/config/ChangeLog
@@ -1,3 +1,38 @@
+2012-05-29 Joseph Myers <joseph@codesourcery.com>
+
+ * mt-sde: Fix typos.
+ * stdint.m4: Fix typos.
+ * tcl.m4: Fix typos.
+
+2012-04-03 Tristan Gingold <gingold@adacore.com>
+
+ * mmap.m4: Use *vms* instead of vms*.
+
+2012-04-02 Tristan Gingold <gingold@adacore.com>
+
+ * math.m4 (GCC_CHECK_MATH_FUNC): Remove if-present
+ argument. Define the variable.
+
+2012-03-26 Tristan Gingold <gingold@adacore.com>
+
+ * math.m4: New file.
+
+2012-03-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * weakref.m4 (GCC_CHECK_ELF_STYLE_WEAKREF): Remove
+ alpha*-dec-osf*.
+
+2012-01-22 Douglas B Rupp <rupp@gnat.com>
+
+ * config/mh-interix: Remove as unneeded.
+ * config/picflag.m4 (i[[34567]]86-*-interix3*):
+ Change triplet to i[[34567]]86-*-interix[[3-9]]*.
+
+2012-01-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ PR bootstrap/51734
+ * picflag.m4: Remove s390 case statement.
+
2011-12-20 Andreas Schwab <schwab@linux-m68k.org>
* warnings.m4 (ACX_PROG_CC_WARNING_OPTS): Avoid leading dash in
@@ -5,6 +40,7 @@
2011-12-19 Andreas Schwab <schwab@linux-m68k.org>
+ PR bootstrap/51388
* warnings.m4 (ACX_PROG_CC_WARNING_OPTS)
(ACX_PROG_CC_WARNING_ALMOST_PEDANTIC): Run the test without the
no- prefix.
@@ -13,6 +49,14 @@
* acx.m4 (Test for GNAT): Update comment and add quotes in final test.
+2011-11-22 Iain Sandoe <iains@gcc.gnu.org>
+
+ * weakref.m4: New file.
+
+2011-11-09 Richard Henderson <rth@redhat.com>
+
+ * asmcfi.m4: New file.
+
2011-11-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* mh-interix (LIBGCC2_DEBUG_CFLAGS): Remove.
@@ -25,6 +69,15 @@
* elf.m4 (target_elf): Remove *-netware*.
+2011-07-06 Uros Bizjak <ubizjak@gmail.com>
+
+ * mt-alphaieee (GOCFLAGS_FOR_TARGET): Add -mieee.
+
+2011-06-15 Mike Stump <mikestump@comcast.net>
+
+ PR target/49461
+ * mh-darwin: Turn off -pie on darwin11 and later.
+
2011-04-20 Eric Botcazou <ebotcazou@adacore.com>
* bootstrap-lto.mk: Remove obsolete requirement.
diff --git a/config/asmcfi.m4 b/config/asmcfi.m4
new file mode 100644
index 0000000..a725aa1
--- /dev/null
+++ b/config/asmcfi.m4
@@ -0,0 +1,15 @@
+;; Cribbed from libffi
+
+AC_DEFUN([GCC_AS_CFI_PSEUDO_OP],
+[AC_CACHE_CHECK([assembler .cfi pseudo-op support],
+ gcc_cv_as_cfi_pseudo_op, [
+ gcc_cv_as_cfi_pseudo_op=unknown
+ AC_TRY_COMPILE([asm (".cfi_startproc\n\t.cfi_endproc");],,
+ [gcc_cv_as_cfi_pseudo_op=yes],
+ [gcc_cv_as_cfi_pseudo_op=no])
+ ])
+ if test "x$gcc_cv_as_cfi_pseudo_op" = xyes; then
+ AC_DEFINE(HAVE_AS_CFI_PSEUDO_OP, 1,
+ [Define if your assembler supports .cfi_* directives.])
+ fi
+])
diff --git a/config/math.m4 b/config/math.m4
new file mode 100644
index 0000000..23835f2
--- /dev/null
+++ b/config/math.m4
@@ -0,0 +1,50 @@
+dnl GCC_CHECK_LIBM
+dnl
+dnl Check whether -lm is available. This is a pre-requisite for
+dnl GCC_CHECK_MATH_FUNC so that it will link with -lm.
+AC_DEFUN([GCC_CHECK_LIBM],
+[AC_CHECK_LIB([m],[sin])])
+
+dnl GCC_CHECK_MATH_HEADERS
+dnl
+dnl Check for math.h and complex.h. This is a pre-requisite for
+dnl GCC_CHECK_MATH_FUNC so that it includes the right headers.
+dnl (Some systems, such as AIX or OpenVMS may define macro for math
+dnl functions).
+AC_DEFUN([GCC_CHECK_MATH_HEADERS],
+[AC_CHECK_HEADERS_ONCE(math.h complex.h)])
+
+dnl GCC_CHECK_MATH_FUNC([name])
+dnl
+dnl Check whether math function NAME is available on the system (by compiling
+dnl and linking a C program) and run define HAVE_name on success.
+dnl
+dnl Note that OpenVMS system insists on including complex.h before math.h
+AC_DEFUN([GCC_CHECK_MATH_FUNC],
+[
+ AC_REQUIRE([GCC_CHECK_LIBM])
+ AC_REQUIRE([GCC_CHECK_MATH_HEADERS])
+ AC_CACHE_CHECK([for $1], [gcc_cv_math_func_$1],
+ [AC_LINK_IFELSE([
+#ifdef HAVE_COMPLEX_H
+#include <complex.h>
+#endif
+#ifdef HAVE_MATH_H
+#include <math.h>
+#endif
+
+int (*ptr)() = (int (*)())$1;
+
+int
+main ()
+{
+ return 0;
+}
+],
+[gcc_cv_math_func_$1=yes],
+[gcc_cv_math_func_$1=no])])
+ if test $gcc_cv_math_func_$1 = yes; then
+ AC_DEFINE_UNQUOTED(AS_TR_CPP(HAVE_$1),[1],
+ [Define to 1 if you have the `$1' function.])
+ fi
+])
diff --git a/config/mh-darwin b/config/mh-darwin
index 66f68b6..19bf265 100644
--- a/config/mh-darwin
+++ b/config/mh-darwin
@@ -1,5 +1,7 @@
# The -mdynamic-no-pic ensures that the compiler executable is built without
# position-independent-code -- the usual default on Darwin. This fix speeds
# compiles by 3-5%.
-
BOOT_CFLAGS += -mdynamic-no-pic
+
+# Ensure we don't try and use -pie, as it is incompatible with pch.
+BOOT_LDFLAGS += `case ${host} in *-*-darwin[1][1-9]*) echo -Wl,-no_pie ;; esac;`
diff --git a/config/mh-interix b/config/mh-interix
deleted file mode 100644
index 3be195b..0000000
--- a/config/mh-interix
+++ /dev/null
@@ -1,2 +0,0 @@
-# The shell may not be in /bin.
-SHELL = sh
diff --git a/config/mh-ppc-aix b/config/mh-ppc-aix
index 4a97d81..a866f7f 100644
--- a/config/mh-ppc-aix
+++ b/config/mh-ppc-aix
@@ -5,4 +5,4 @@
# don't do it any more.
BOOT_ADAFLAGS = -gnatapg
BOOT_LDFLAGS = -Wl,-bbigtoc
-LDFLAGS = `case $(CC) in *gcc*) echo -Wl,-bbigtoc ;; esac;`
+LDFLAGS = `case '$(CC)' in *gcc*) echo -Wl,-bbigtoc ;; esac;`
diff --git a/config/mmap.m4 b/config/mmap.m4
new file mode 100644
index 0000000..fba0d9d
--- /dev/null
+++ b/config/mmap.m4
@@ -0,0 +1,97 @@
+dnl ----------------------------------------------------------------------
+dnl This whole bit snagged from gcc
+
+dnl
+dnl mmap(2) blacklisting. Some platforms provide the mmap library routine
+dnl but don't support all of the features we need from it.
+dnl
+AC_DEFUN([GCC_AC_FUNC_MMAP_BLACKLIST],
+[
+AC_CHECK_HEADER([sys/mman.h],
+ [gcc_header_sys_mman_h=yes], [gcc_header_sys_mman_h=no])
+AC_CHECK_FUNC([mmap], [gcc_func_mmap=yes], [gcc_func_mmap=no])
+if test "$gcc_header_sys_mman_h" != yes \
+ || test "$gcc_func_mmap" != yes; then
+ gcc_cv_func_mmap_file=no
+ gcc_cv_func_mmap_dev_zero=no
+ gcc_cv_func_mmap_anon=no
+else
+ AC_CACHE_CHECK([whether read-only mmap of a plain file works],
+ gcc_cv_func_mmap_file,
+ [# Add a system to this blacklist if
+ # mmap(0, stat_size, PROT_READ, MAP_PRIVATE, fd, 0) doesn't return a
+ # memory area containing the same data that you'd get if you applied
+ # read() to the same fd. The only system known to have a problem here
+ # is VMS, where text files have record structure.
+ case "$host_os" in
+ *vms* | ultrix*)
+ gcc_cv_func_mmap_file=no ;;
+ *)
+ gcc_cv_func_mmap_file=yes;;
+ esac])
+ AC_CACHE_CHECK([whether mmap from /dev/zero works],
+ gcc_cv_func_mmap_dev_zero,
+ [# Add a system to this blacklist if it has mmap() but /dev/zero
+ # does not exist, or if mmapping /dev/zero does not give anonymous
+ # zeroed pages with both the following properties:
+ # 1. If you map N consecutive pages in with one call, and then
+ # unmap any subset of those pages, the pages that were not
+ # explicitly unmapped remain accessible.
+ # 2. If you map two adjacent blocks of memory and then unmap them
+ # both at once, they must both go away.
+ # Systems known to be in this category are Windows (all variants),
+ # VMS, and Darwin.
+ case "$host_os" in
+ *vms* | cygwin* | pe | mingw* | darwin* | ultrix* | hpux10* | hpux11.00)
+ gcc_cv_func_mmap_dev_zero=no ;;
+ *)
+ gcc_cv_func_mmap_dev_zero=yes;;
+ esac])
+
+ # Unlike /dev/zero, the MAP_ANON(YMOUS) defines can be probed for.
+ AC_CACHE_CHECK([for MAP_ANON(YMOUS)], gcc_cv_decl_map_anon,
+ [AC_COMPILE_IFELSE([AC_LANG_PROGRAM(
+[#include <sys/types.h>
+#include <sys/mman.h>
+#include <unistd.h>
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+],
+[int n = MAP_ANONYMOUS;])],
+ gcc_cv_decl_map_anon=yes,
+ gcc_cv_decl_map_anon=no)])
+
+ if test $gcc_cv_decl_map_anon = no; then
+ gcc_cv_func_mmap_anon=no
+ else
+ AC_CACHE_CHECK([whether mmap with MAP_ANON(YMOUS) works],
+ gcc_cv_func_mmap_anon,
+ [# Add a system to this blacklist if it has mmap() and MAP_ANON or
+ # MAP_ANONYMOUS, but using mmap(..., MAP_PRIVATE|MAP_ANONYMOUS, -1, 0)
+ # doesn't give anonymous zeroed pages with the same properties listed
+ # above for use of /dev/zero.
+ # Systems known to be in this category are Windows, VMS, and SCO Unix.
+ case "$host_os" in
+ *vms* | cygwin* | pe | mingw* | sco* | udk* )
+ gcc_cv_func_mmap_anon=no ;;
+ *)
+ gcc_cv_func_mmap_anon=yes;;
+ esac])
+ fi
+fi
+
+if test $gcc_cv_func_mmap_file = yes; then
+ AC_DEFINE(HAVE_MMAP_FILE, 1,
+ [Define if read-only mmap of a plain file works.])
+fi
+if test $gcc_cv_func_mmap_dev_zero = yes; then
+ AC_DEFINE(HAVE_MMAP_DEV_ZERO, 1,
+ [Define if mmap of /dev/zero works.])
+fi
+if test $gcc_cv_func_mmap_anon = yes; then
+ AC_DEFINE(HAVE_MMAP_ANON, 1,
+ [Define if mmap with MAP_ANON(YMOUS) works.])
+fi
+])
diff --git a/config/mt-alphaieee b/config/mt-alphaieee
index 9c20531..80c17cd 100644
--- a/config/mt-alphaieee
+++ b/config/mt-alphaieee
@@ -1,2 +1,3 @@
CFLAGS_FOR_TARGET += -mieee
CXXFLAGS_FOR_TARGET += -mieee
+GOCFLAGS_FOR_TARGET += -mieee
diff --git a/config/mt-sde b/config/mt-sde
index cb20420..d6992e4 100644
--- a/config/mt-sde
+++ b/config/mt-sde
@@ -5,6 +5,6 @@
# as they have the D-to-I redirect for PC-relative loads. -mno-gpopt
# has two purposes: it allows libraries to be used in situations where
# $gp != our _gp, and it allows them to be built with -G8 while
-# retaining link compability with -G0 and -G4.
+# retaining link compatibility with -G0 and -G4.
CFLAGS_FOR_TARGET += -Os -minterlink-mips16 -mcode-xonly -mno-gpopt
CXXFLAGS_FOR_TARGET += -Os -minterlink-mips16 -mcode-xonly -mno-gpopt
diff --git a/config/picflag.m4 b/config/picflag.m4
index f6f1b44..bd81812 100644
--- a/config/picflag.m4
+++ b/config/picflag.m4
@@ -19,7 +19,7 @@
;;
i[[34567]]86-*-cygwin* | i[[34567]]86-*-mingw* | x86_64-*-mingw*)
;;
- i[[34567]]86-*-interix3*)
+ i[[34567]]86-*-interix[[3-9]]*)
# Interix 3.x gcc -fpic/-fPIC options generate broken code.
# Instead, we relocate shared libraries at runtime.
;;
@@ -51,9 +51,6 @@
m68k-*-*)
$1=-fpic
;;
- s390*-*-*)
- $1=-fpic
- ;;
# FIXME: Override -fPIC default in libgcc only?
sh-*-linux* | sh[[2346lbe]]*-*-linux*)
$1=-fpic
diff --git a/config/stdint.m4 b/config/stdint.m4
index fbdd586..61898a7 100644
--- a/config/stdint.m4
+++ b/config/stdint.m4
@@ -18,7 +18,7 @@
dnl existence of an include file <stdint.h> that defines a set of
dnl typedefs, especially uint8_t,int32_t,uintptr_t.
dnl Many older installations will not provide this file, but some will
-dnl have the very same definitions in <inttypes.h>. In other enviroments
+dnl have the very same definitions in <inttypes.h>. In other environments
dnl we can use the inet-types in <sys/types.h> which would define the
dnl typedefs int8_t and u_int8_t respectivly.
dnl
diff --git a/config/tcl.m4 b/config/tcl.m4
index 900a2ce..59a0c7e 100644
--- a/config/tcl.m4
+++ b/config/tcl.m4
@@ -290,7 +290,7 @@
elif test "`uname -s`" = "Darwin"; then
# If Tcl was built as a framework, attempt to use the libraries
# from the framework at the given location so that linking works
- # against Tcl.framework installed in an arbitary location.
+ # against Tcl.framework installed in an arbitrary location.
case ${TCL_DEFS} in
*TCL_FRAMEWORK*)
if test -f "${TCL_BIN_DIR}/${TCL_LIB_FILE}"; then
@@ -373,7 +373,7 @@
elif test "`uname -s`" = "Darwin"; then
# If Tk was built as a framework, attempt to use the libraries
# from the framework at the given location so that linking works
- # against Tk.framework installed in an arbitary location.
+ # against Tk.framework installed in an arbitrary location.
case ${TK_DEFS} in
*TK_FRAMEWORK*)
if test -f "${TK_BIN_DIR}/${TK_LIB_FILE}"; then
@@ -815,7 +815,7 @@
#
# Defines the following variable:
#
-# MAN_FLAGS - The apropriate flags for installManPage
+# MAN_FLAGS - The appropriate flags for installManPage
# according to the user's selection.
#
#--------------------------------------------------------------------
diff --git a/config/weakref.m4 b/config/weakref.m4
new file mode 100644
index 0000000..ecb8567
--- /dev/null
+++ b/config/weakref.m4
@@ -0,0 +1,47 @@
+
+dnl Check if the target supports weak.
+AC_DEFUN([GCC_CHECK_ATTRIBUTE_WEAK], [
+ AC_CACHE_CHECK([whether the target supports weak],
+ ac_cv_have_attribute_weak, [
+ weakref_m4_saved_CFLAGS="$CFLAGS"
+ CFLAGS="$CFLAGS -Werror"
+ AC_TRY_COMPILE([void __attribute__((weak)) foo(void) { }],
+ [], ac_cv_have_attribute_weak=yes,
+ ac_cv_have_attribute_weak=no)
+ CFLAGS="$weakref_m4_saved_CFLAGS"])
+ if test x"$ac_cv_have_attribute_weak" = xyes; then
+ AC_DEFINE(HAVE_ATTRIBUTE_WEAK, 1,
+ [Define to 1 if the target supports __attribute__((weak)).])
+ fi])
+
+dnl Check whether weak refs work like the ELF ones.
+dnl This means that the weak reference works without having to satify
+dnl linkage for the item.
+dnl There are targets (at least Darwin) where we have fully functional
+dnl weakrefs at runtime, but must supply the referenced item at link time.
+AC_DEFUN([GCC_CHECK_ELF_STYLE_WEAKREF], [
+ AC_CACHE_CHECK([whether weak refs work like ELF],
+ ac_cv_have_elf_style_weakref, [
+ weakref_m4_saved_CFLAGS="$CFLAGS"
+ case "${host}" in
+ *-apple-darwin*) CFLAGS="$CFLAGS -Wl,-undefined,dynamic_lookup" ;;
+ *) ;;
+ esac
+ AC_RUN_IFELSE([AC_LANG_SOURCE([[
+extern void fNotToBeFound(void) __attribute__((weak));
+int main ()
+{
+ if (fNotToBeFound)
+ return 1;
+ else
+ return 0;
+}
+]])], ac_cv_have_elf_style_weakref=yes, ac_cv_have_elf_style_weakref=no, [
+case "${host}" in
+ *-apple-darwin[[89]]*) ac_cv_have_elf_style_weakref=no ;;
+ *) ac_cv_have_elf_style_weakref=yes;;
+esac])CFLAGS="$weakref_m4_saved_CFLAGS"])
+if test x"$ac_cv_have_elf_style_weakref" = xyes; then
+ AC_DEFINE(HAVE_ELF_STYLE_WEAKREF, 1, [Define to 1 if target has a weakref that works like the ELF one.])
+fi])
+
diff --git a/configure b/configure
index 8554178..38111c1 100755
--- a/configure
+++ b/configure
@@ -5189,9 +5189,16 @@
gmplibs="-L$with_mpfr_lib $gmplibs"
fi
if test "x$with_mpfr$with_mpfr_include$with_mpfr_lib" = x && test -d ${srcdir}/mpfr; then
- gmplibs='-L$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir $gmplibs"
- gmpinc='-I$$r/$(HOST_SUBDIR)/mpfr -I$$s/mpfr '"$gmpinc"
- extra_mpc_mpfr_configure_flags='--with-mpfr-include=$$s/mpfr --with-mpfr-lib=$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir"
+ # MPFR v3.1.0 moved the sources into a src sub-directory.
+ if test -d ${srcdir}/mpfr/src; then
+ gmplibs='-L$$r/$(HOST_SUBDIR)/mpfr/src/'"$lt_cv_objdir $gmplibs"
+ gmpinc='-I$$r/$(HOST_SUBDIR)/mpfr/src -I$$s/mpfr/src '"$gmpinc"
+ extra_mpc_mpfr_configure_flags='--with-mpfr-include=$$s/mpfr/src --with-mpfr-lib=$$r/$(HOST_SUBDIR)/mpfr/src/'"$lt_cv_objdir"
+ else
+ gmplibs='-L$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir $gmplibs"
+ gmpinc='-I$$r/$(HOST_SUBDIR)/mpfr -I$$s/mpfr '"$gmpinc"
+ extra_mpc_mpfr_configure_flags='--with-mpfr-include=$$s/mpfr --with-mpfr-lib=$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir"
+ fi
# Do not test the mpfr version. Assume that it is sufficient, since
# it is in the source tree, and the library has not been built yet
# but it would be included on the link line in the version check below
diff --git a/configure.ac b/configure.ac
index 396c87b..224127c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1277,9 +1277,16 @@
gmplibs="-L$with_mpfr_lib $gmplibs"
fi
if test "x$with_mpfr$with_mpfr_include$with_mpfr_lib" = x && test -d ${srcdir}/mpfr; then
- gmplibs='-L$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir $gmplibs"
- gmpinc='-I$$r/$(HOST_SUBDIR)/mpfr -I$$s/mpfr '"$gmpinc"
- extra_mpc_mpfr_configure_flags='--with-mpfr-include=$$s/mpfr --with-mpfr-lib=$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir"
+ # MPFR v3.1.0 moved the sources into a src sub-directory.
+ if test -d ${srcdir}/mpfr/src; then
+ gmplibs='-L$$r/$(HOST_SUBDIR)/mpfr/src/'"$lt_cv_objdir $gmplibs"
+ gmpinc='-I$$r/$(HOST_SUBDIR)/mpfr/src -I$$s/mpfr/src '"$gmpinc"
+ extra_mpc_mpfr_configure_flags='--with-mpfr-include=$$s/mpfr/src --with-mpfr-lib=$$r/$(HOST_SUBDIR)/mpfr/src/'"$lt_cv_objdir"
+ else
+ gmplibs='-L$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir $gmplibs"
+ gmpinc='-I$$r/$(HOST_SUBDIR)/mpfr -I$$s/mpfr '"$gmpinc"
+ extra_mpc_mpfr_configure_flags='--with-mpfr-include=$$s/mpfr --with-mpfr-lib=$$r/$(HOST_SUBDIR)/mpfr/'"$lt_cv_objdir"
+ fi
# Do not test the mpfr version. Assume that it is sufficient, since
# it is in the source tree, and the library has not been built yet
# but it would be included on the link line in the version check below
diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog
index 1ec14e8..4c25a87 100644
--- a/elfcpp/ChangeLog
+++ b/elfcpp/ChangeLog
@@ -1,3 +1,8 @@
+2012-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gold/14091
+ * x86_64.h (R_X86_64_RELATIVE64): New.
+
2012-05-01 Cary Coutant <ccoutant@google.com>
* dwarf.h (enum DW_TAG, enum DW_FORM, enum DW_AT, enum DW_ENCODING)
diff --git a/elfcpp/x86_64.h b/elfcpp/x86_64.h
index ae7d0a8..a53beac 100644
--- a/elfcpp/x86_64.h
+++ b/elfcpp/x86_64.h
@@ -91,6 +91,7 @@
R_X86_64_TLSDESC_CALL = 35, // Relaxable call through TLS descriptor
R_X86_64_TLSDESC = 36, // 2 by 64-bit TLS descriptor
R_X86_64_IRELATIVE = 37, // Adjust indirectly by program base
+ R_X86_64_RELATIVE64 = 38, // 64-bit adjust by program base
// GNU vtable garbage collection extensions.
R_X86_64_GNU_VTINHERIT = 250,
R_X86_64_GNU_VTENTRY = 251
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 55cbff8..03424ce 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,233 @@
+2012-05-29 Roland McGrath <mcgrathr@google.com>
+
+ * read.c [HANDLE_BUNDLE] (bundle_lock_depth): New variable.
+ (read_a_source_file) [HANDLE_BUNDLE]: Reset it.
+ [HANDLE_BUNDLE] (s_bundle_lock, s_bundle_unlock): Allow nested
+ pairs.
+
+2012-05-28 Nick Clifton <nickc@redhat.com>
+
+ * read.c (read_symbol_name): New function. Reads a symbol names.
+ Allows escape codes in names.
+ (s_comm_internal): Use read_symbol_name.
+ (s_globl, s_lsym, s_set, s_weakref): Likewise.
+ * doc/as.texinfo: Document support for multibyte characters in
+ symbol names.
+
+2012-05-21 Mike Frysinger <vapier@gentoo.org>
+
+ * config/tc-mips.c (mips_after_parse_args): Assert that arch_info
+ is non-NULL.
+
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * config/obj-elf.c (obj_elf_section): Cater for TC_KEEP_OPERAND_SPACES
+ targets when checking for "comdat".
+
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * config/tc-dlx.c (s_proc): Don't use asprintf.
+
+2012-05-18 Alan Modra <amodra@gmail.com>
+
+ * config/tc-dlx.c (s_proc): Avoid warning about ignoring asprintf
+ return value.
+
+2012-05-18 James Lemke <jwlemke@codesourcery.com>
+ Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c: Don't capitalise error and warning messages.
+ (md_parse_option): Add checks for -a32 -mvle.
+
+2012-05-18 Alan Modra <amodra@gmail.com>
+
+ * config/obj-evax.c: Include as.h first.
+
+2012-05-18 Andreas Schwab <schwab@linux-m68k.org>
+
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+ * Makefile.in: Regenerate.
+
+2012-05-17 Daniel Richard G. <skunk@iskunk.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * configure.in: Add check that sysdep.h has been included before
+ any system header files.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * aclocal.m4: Regenerate.
+ * Makefile.am: Use wrappers around C files generated by flex.
+ * Makefile.in: Regenerate.
+ * doc/Makefile.in: Regenerate.
+ * itbl-lex-wrapper.c: New file.
+ * config/bfin-lex-wrapper.c: New file.
+ * cgen.c: Include as.h before setjmp.h.
+ * config/tc-dlx.c: Include as.h before any other header.
+ * config/tc-h8300.c: Likewise.
+ * config/tc-lm32.c: Likewise.
+ * config/tc-mep.c: Likewise.
+ * config/tc-microblaze.c: Likewise.
+ * config/tc-mmix.c: Likewise.
+ * config/tc-msp430.c: Likewise.
+ * config/tc-or32.c: Likewise.
+ * config/tc-tic4x.c: Likewise.
+ * config/tc-tic54x.c: Likewise.
+ * config/tc-xtensa.c: Likewise.
+
+2012-05-16 Sergio Durigan Junior <sergiodj@redhat.com>
+
+ * config/tc-alpha.c (maybe_set_gp): Pass proper `bfd'
+ as the first argument for `bfd_get_section_vma'.
+
+2012-05-16 Alberto Garcia <agarcia@igalia.com>
+
+ PR gas/14082
+ * app.c (do_scrub_chars): Prevent possible out of bounds access to
+ lex[] array.
+
+2012-05-16 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/13503
+ * config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to
+ R_AVR_8_HLO8.
+ (exp_mod_data) Ditto. And replace "hhi8" with "hlo8".
+ (md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
+
+2012-05-16 Nathan Sidwell <nathan@codesourcery.com>
+ Kwok Cheung Yeung <kcy@codesourcery.com>
+
+ * config/tc-m68k.c (m68k_cpus): Add 51ag, 51je, 51jf, 51jg, 51mm,
+ 51qm variants.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
+ Add option to offset S12 addresses into XGATE memory space.
+ Tweak target flags to match other tools. (i.e. -m m68hc11).
+ * doc/as.texinfo: Mention new options.
+ * doc/c-m68hc11.texi: Document new options.
+ * NEWS: Mention new support.
+
+2012-05-14 DJ Delorie <dj@redhat.com>
+
+ * config/rx-parse.y (rx_range): declare.
+ (O1,O2,O3,O4): Add calls to rx_range.
+ (UO1,UO2,UO3): Likewise.
+ (IMM2,IMMB): Likewise.
+ (rx_range): New.
+
+ * config/tc-rx.c (rx_fetchalign): Declare.
+ (md_pseudo_table): Add .fetchalign.
+ (RX_NBASE_FETCHALIGN): New.
+ (fetchalign_bytes): New.
+ (rx_fetchalign): New.
+ (rx_frag_init): If a "magic" value is found, also init the
+ machine-specific data.
+ (md_assemble): Note following opcode size if called for.
+ (rx_next_opcode): New.
+ (rx_relax_frag): Support .fetchalign.
+ (md_convert_frag): Likewise.
+ * doc/c-rx.texi (RX-Directives): Add .fetchalign.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+
+ * config/tc-ppc.c (insn_validate): New func of existing code to call..
+ (ppc_setup_opcodes): ..from 2 places here.
+ Revise for second (VLE) opcode table.
+ Add #ifdef'd code to print opcode tables.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+
+ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
+ for the VLE conditional branches.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+ Rhonda Wittels <rhonda@codesourcery.com>
+
+ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
+ (PPC_VLE_SPLIT16D): New macro.
+ (PPC_VLE_LO16A): New macro.
+ (PPC_VLE_LO16D): New macro.
+ (PPC_VLE_HI16A): New macro.
+ (PPC_VLE_HI16D): New macro.
+ (PPC_VLE_HA16A): New macro.
+ (PPC_VLE_HA16D): New macro.
+ (PPC_APUINFO_VLE): New definition.
+ (md_chars_to_number): New function.
+ (md_parse_option): Check for combinations of little
+ endian and -mvle.
+ (md_show_usage): Document -mvle.
+ (ppc_arch): Recognize VLE.
+ (ppc_mach): Recognize bfd_mach_ppc_vle.
+ (ppc_setup_opcodes): Print the opcode table if
+ * config/tc-ppc.h (ppc_frag_check): Declare.
+ * doc/c-ppc.texi: Document -mvle.
+ * NEWS: Mention PowerPC VLE port.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+
+ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
+ (DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
+ * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
+ * dwarf2dbg.c (scale_addr_delta): Handle values of 1
+ for DWARF2_LINE_MIN_INSN_LENGTH.
+
+2012-05-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow
+ for BFD_RELOC_64.
+
+2012-05-11 Daniel Richard G. <skunk@iskunk.org>
+
+ PR binutils/14028
+ * configure.in: Invoke ACX_HEADER_STRING.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * as.h: If STRINGS_WITH_STRING is defined then include both
+ string.h and strings.h.
+
+2012-05-11 Georg-Johann Lay <avr@gjlay.de
+
+ PR target/13503
+ * config/tc-avr.c (exp_mod_pm): Remove variable.
+ (exp_mod_data_t): New typedef.
+ (pexp_mod_data, exp_mod_data): New variables.
+ (avr_parse_cons_expression): Scan through exp_mod_data[] to find
+ data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
+ and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
+ (avr_cons_fix_new): Handle new data expression modifiers shipped
+ in pexp_mod_data.
+ (md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
+ BFD_RELOC_AVR_8_HHI.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (tc_gen_reloc): Use bfd_signed_vma in x32
+ addend overflow check.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (tc_gen_reloc): Display signed hex number in
+ x32 addend overflow check.
+
+2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (tc_gen_reloc): Use fits_in_signed_long.
+
+2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow
+ for BFD_RELOC_64.
+
+2012-05-08 Alan Modra <amodra@gmail.com>
+
+ * Makefile.am (check_DEJAGNU): Export LC_ALL=C in place of other
+ LC and LANG environment vars.
+ * Makefile.in: Regenerate.
+
2012-05-07 Alan Modra <amodra@gmail.com>
* Makefile.am (check-DEJAGNU): Clear LC_COLLATE, LC_ALL and LANG.
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 2ae007d..020e7cf 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -32,7 +32,7 @@
# use @target_cpu_type@ for refering to configured target name
IT_HDRS=itbl-parse.h $(srcdir)/itbl-ops.h
-IT_SRCS=itbl-parse.c itbl-lex.c $(srcdir)/itbl-ops.c
+IT_SRCS=itbl-parse.c itbl-lex-wrapper.c $(srcdir)/itbl-ops.c
IT_DEPS=$(srcdir)/itbl-parse.y $(srcdir)/itbl-lex.l $(srcdir)/config/itbl-@target_cpu_type@.h
IT_OBJS=itbl-parse.@OBJEXT@ itbl-lex.@OBJEXT@ itbl-ops.@OBJEXT@
@@ -393,7 +393,7 @@
cp site.exp testsuite/site.exp
rootme=`pwd`; export rootme; \
srcdir=`cd ${srcdir}; pwd` ; export srcdir ; \
- LC_COLLATE=; LC_ALL=; LANG=; export LC_COLLATE LC_ALL LANG; \
+ LC_ALL=C; export LC_ALL; \
EXPECT=${EXPECT} ; export EXPECT ; \
runtest=$(RUNTEST); \
cd testsuite; \
@@ -459,16 +459,16 @@
bfin-lex.c: $(srcdir)/config/bfin-lex.l
$(SHELL) $(YLWRAP) $(srcdir)/config/bfin-lex.l lex.yy.c bfin-lex.c -- $(LEXCOMPILE)
-bfin-lex.@OBJEXT@: bfin-lex.c bfin-parse.h $(srcdir)/config/bfin-defs.h
+bfin-lex-wrapper.@OBJEXT@: $(srcdir)/config/bfin-lex-wrapper.c bfin-lex.c bfin-parse.h $(srcdir)/config/bfin-defs.h
if am__fastdepCC
- $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `test -f bfin-lex.c || echo $(srcdir)/`bfin-lex.c $(NO_WERROR)
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $(srcdir)/config/bfin-lex-wrapper.c $(NO_WERROR)
mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
else
if AMDEP
- source='bfin-lex.c' object='$@' libtool=no @AMDEPBACKSLASH@
+ source='bfin-lex-wrapper.c' object='$@' libtool=no @AMDEPBACKSLASH@
DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
endif
- $(COMPILE) -c `test -f bfin-lex.c || echo $(srcdir)/`bfin-lex.c $(NO_WERROR)
+ $(COMPILE) -c $(srcdir)/config/bfin-lex-wrapper.c $(NO_WERROR)
endif
rl78-parse.c: $(srcdir)/config/rl78-parse.y
@@ -492,16 +492,16 @@
# Disable -Werror, if it has been enabled, since old versions of bison/
# yacc will produce working code which contain compile time warnings.
-itbl-lex.@OBJEXT@: itbl-lex.c itbl-parse.h
+itbl-lex-wrapper.@OBJEXT@: itbl-lex-wrapper.c itbl-lex.c itbl-parse.h
if am__fastdepCC
- $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `test -f itbl-lex.c || echo $(srcdir)/`itbl-lex.c $(NO_WERROR)
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $(srcdir)/itbl-lex-wrapper.c $(NO_WERROR)
mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
else
if AMDEP
- source='itbl-lex.c' object='$@' libtool=no @AMDEPBACKSLASH@
+ source='itbl-lex-wrapper.c' object='$@' libtool=no @AMDEPBACKSLASH@
DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
endif
- $(COMPILE) -c `test -f itbl-lex.c || echo $(srcdir)/`itbl-lex.c $(NO_WERROR)
+ $(COMPILE) -c $(srcdir)/itbl-lex-wrapper.c $(NO_WERROR)
endif
# Disable -Werror, if it has been enabled, since old versions of bison/
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 9e04218..f631d02 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -49,7 +49,7 @@
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../bfd/acinclude.m4 \
$(top_srcdir)/../config/zlib.m4 \
- $(top_srcdir)/../bfd/warning.m4 \
+ $(top_srcdir)/../bfd/warning.m4 $(top_srcdir)/../config/acx.m4 \
$(top_srcdir)/../config/depstand.m4 \
$(top_srcdir)/../config/gettext-sister.m4 \
$(top_srcdir)/../config/largefile.m4 \
@@ -303,7 +303,7 @@
# use @target_cpu_type@ for refering to configured target name
IT_HDRS = itbl-parse.h $(srcdir)/itbl-ops.h
-IT_SRCS = itbl-parse.c itbl-lex.c $(srcdir)/itbl-ops.c
+IT_SRCS = itbl-parse.c itbl-lex-wrapper.c $(srcdir)/itbl-ops.c
IT_DEPS = $(srcdir)/itbl-parse.y $(srcdir)/itbl-lex.l $(srcdir)/config/itbl-@target_cpu_type@.h
IT_OBJS = itbl-parse.@OBJEXT@ itbl-lex.@OBJEXT@ itbl-ops.@OBJEXT@
@@ -2409,7 +2409,7 @@
cp site.exp testsuite/site.exp
rootme=`pwd`; export rootme; \
srcdir=`cd ${srcdir}; pwd` ; export srcdir ; \
- LC_COLLATE=; LC_ALL=; LANG=; export LC_COLLATE LC_ALL LANG; \
+ LC_ALL=C; export LC_ALL; \
EXPECT=${EXPECT} ; export EXPECT ; \
runtest=$(RUNTEST); \
cd testsuite; \
@@ -2466,12 +2466,12 @@
bfin-lex.c: $(srcdir)/config/bfin-lex.l
$(SHELL) $(YLWRAP) $(srcdir)/config/bfin-lex.l lex.yy.c bfin-lex.c -- $(LEXCOMPILE)
-bfin-lex.@OBJEXT@: bfin-lex.c bfin-parse.h $(srcdir)/config/bfin-defs.h
-@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `test -f bfin-lex.c || echo $(srcdir)/`bfin-lex.c $(NO_WERROR)
+bfin-lex-wrapper.@OBJEXT@: $(srcdir)/config/bfin-lex-wrapper.c bfin-lex.c bfin-parse.h $(srcdir)/config/bfin-defs.h
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $(srcdir)/config/bfin-lex-wrapper.c $(NO_WERROR)
@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='bfin-lex.c' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='bfin-lex-wrapper.c' object='$@' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@ $(COMPILE) -c `test -f bfin-lex.c || echo $(srcdir)/`bfin-lex.c $(NO_WERROR)
+@am__fastdepCC_FALSE@ $(COMPILE) -c $(srcdir)/config/bfin-lex-wrapper.c $(NO_WERROR)
rl78-parse.c: $(srcdir)/config/rl78-parse.y
$(SHELL) $(YLWRAP) $(srcdir)/config/rl78-parse.y y.tab.c rl78-parse.c y.tab.h rl78-parse.h -- $(YACCCOMPILE) -d ;
@@ -2494,12 +2494,12 @@
# Disable -Werror, if it has been enabled, since old versions of bison/
# yacc will produce working code which contain compile time warnings.
-itbl-lex.@OBJEXT@: itbl-lex.c itbl-parse.h
-@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `test -f itbl-lex.c || echo $(srcdir)/`itbl-lex.c $(NO_WERROR)
+itbl-lex-wrapper.@OBJEXT@: itbl-lex-wrapper.c itbl-lex.c itbl-parse.h
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $(srcdir)/itbl-lex-wrapper.c $(NO_WERROR)
@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='itbl-lex.c' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='itbl-lex-wrapper.c' object='$@' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@ $(COMPILE) -c `test -f itbl-lex.c || echo $(srcdir)/`itbl-lex.c $(NO_WERROR)
+@am__fastdepCC_FALSE@ $(COMPILE) -c $(srcdir)/itbl-lex-wrapper.c $(NO_WERROR)
# Disable -Werror, if it has been enabled, since old versions of bison/
# yacc will produce working code which contain compile time warnings.
diff --git a/gas/NEWS b/gas/NEWS
index e8dcf50..6b6dbba 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,9 @@
-*- text -*-
+* Add support for S12X processor.
+
+* Add support for the VLE extension to the PowerPC architecture.
+
* Add support for the Freescale XGATE architecture.
* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
diff --git a/gas/aclocal.m4 b/gas/aclocal.m4
index c5287c5..ea731ac 100644
--- a/gas/aclocal.m4
+++ b/gas/aclocal.m4
@@ -991,6 +991,7 @@
m4_include([../bfd/acinclude.m4])
m4_include([../bfd/warning.m4])
+m4_include([../config/acx.m4])
m4_include([../config/depstand.m4])
m4_include([../config/gettext-sister.m4])
m4_include([../config/largefile.m4])
diff --git a/gas/app.c b/gas/app.c
index e5a7687..aafee2a 100644
--- a/gas/app.c
+++ b/gas/app.c
@@ -1344,7 +1344,7 @@
else
{
state = 9;
- if (!IS_SYMBOL_COMPONENT (ch))
+ if (ch == EOF || !IS_SYMBOL_COMPONENT (ch))
{
if (ch != EOF)
UNGET (ch);
diff --git a/gas/as.h b/gas/as.h
index 5408e1a..f2214e8 100644
--- a/gas/as.h
+++ b/gas/as.h
@@ -1,6 +1,6 @@
/* as.h - global header file
Copyright 1987, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -42,6 +42,11 @@
/* System include files first... */
#include <stdio.h>
+
+#ifdef STRING_WITH_STRINGS
+#include <string.h>
+#include <strings.h>
+#else
#ifdef HAVE_STRING_H
#include <string.h>
#else
@@ -49,6 +54,8 @@
#include <strings.h>
#endif
#endif
+#endif
+
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
diff --git a/gas/cgen.c b/gas/cgen.c
index 9697ef6..f7706c1 100644
--- a/gas/cgen.c
+++ b/gas/cgen.c
@@ -1,6 +1,6 @@
/* GAS interface for targets using CGEN: Cpu tools GENerator.
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007, 2009, 2010, 2011 Free Software Foundation, Inc.
+ 2006, 2007, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -18,8 +18,8 @@
along with GAS; see the file COPYING. If not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-#include <setjmp.h>
#include "as.h"
+#include <setjmp.h>
#include "symcat.h"
#include "cgen-desc.h"
#include "subsegs.h"
diff --git a/gas/config.in b/gas/config.in
index 4c63bd9..eb6cf03 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -1,5 +1,12 @@
/* config.in. Generated from configure.in by autoheader. */
+/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1
+
/* Define if building universal (internal helper macro) */
#undef AC_APPLE_UNIVERSAL_BUILD
@@ -228,6 +235,9 @@
/* Using strict COFF? */
#undef STRICTCOFF
+/* Define if you can safely include both <string.h> and <strings.h>. */
+#undef STRING_WITH_STRINGS
+
/* Target alias. */
#undef TARGET_ALIAS
diff --git a/gas/config/bfin-lex-wrapper.c b/gas/config/bfin-lex-wrapper.c
new file mode 100644
index 0000000..ac38720
--- /dev/null
+++ b/gas/config/bfin-lex-wrapper.c
@@ -0,0 +1,5 @@
+/* The C source file generated by flex includes stdio.h before any of
+ the C code in bfin-lex.l. Make sure we include sysdep.h first, so
+ that config.h can set the correct values for various things. */
+#include "sysdep.h"
+#include "bfin-lex.c"
diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c
index df2dafc..146ec91 100644
--- a/gas/config/obj-elf.c
+++ b/gas/config/obj-elf.c
@@ -1091,10 +1091,15 @@
group_name = obj_elf_section_name ();
if (group_name == NULL)
attr &= ~SHF_GROUP;
- else if (strncmp (input_line_pointer, ",comdat", 7) == 0)
+ else if (*input_line_pointer == ',')
{
- input_line_pointer += 7;
- linkonce = 1;
+ ++input_line_pointer;
+ SKIP_WHITESPACE ();
+ if (strncmp (input_line_pointer, "comdat", 6) == 0)
+ {
+ input_line_pointer += 6;
+ linkonce = 1;
+ }
}
else if (strncmp (name, ".gnu.linkonce", 13) == 0)
linkonce = 1;
diff --git a/gas/config/obj-evax.c b/gas/config/obj-evax.c
index b66e2c3..2fda63d 100644
--- a/gas/config/obj-evax.c
+++ b/gas/config/obj-evax.c
@@ -1,5 +1,6 @@
/* obj-evax.c - EVAX (openVMS/Alpha) object file format.
- Copyright 1996, 1997, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 2005, 2007, 2008, 2009, 2010, 2011, 2012
+ Free Software Foundation, Inc.
Contributed by Klaus Kämpf (kkaempf@progis.de) of
proGIS Software, Aachen, Germany.
Extensively enhanced by Douglas Rupp of AdaCore.
@@ -23,9 +24,9 @@
#define OBJ_HEADER "obj-evax.h"
+#include "as.h"
#include "bfd.h"
#include "vms.h"
-#include "as.h"
#include "subsegs.h"
#include "struc-symbol.h"
#include "safe-ctype.h"
diff --git a/gas/config/rx-parse.y b/gas/config/rx-parse.y
index 756637b..c719acc 100644
--- a/gas/config/rx-parse.y
+++ b/gas/config/rx-parse.y
@@ -72,14 +72,14 @@
#define F(val,pos,sz) rx_field (val, pos, sz)
#define FE(exp,pos,sz) rx_field (exp_val (exp), pos, sz);
-#define O1(v) rx_op (v, 1, RXREL_SIGNED)
-#define O2(v) rx_op (v, 2, RXREL_SIGNED)
-#define O3(v) rx_op (v, 3, RXREL_SIGNED)
+#define O1(v) rx_op (v, 1, RXREL_SIGNED); rx_range (v, -128, 255)
+#define O2(v) rx_op (v, 2, RXREL_SIGNED); rx_range (v, -32768, 65536)
+#define O3(v) rx_op (v, 3, RXREL_SIGNED); rx_range (v, -8388608, 16777216)
#define O4(v) rx_op (v, 4, RXREL_SIGNED)
-#define UO1(v) rx_op (v, 1, RXREL_UNSIGNED)
-#define UO2(v) rx_op (v, 2, RXREL_UNSIGNED)
-#define UO3(v) rx_op (v, 3, RXREL_UNSIGNED)
+#define UO1(v) rx_op (v, 1, RXREL_UNSIGNED); rx_range (v, 0, 255)
+#define UO2(v) rx_op (v, 2, RXREL_UNSIGNED); rx_range (v, 0, 65536)
+#define UO3(v) rx_op (v, 3, RXREL_UNSIGNED); rx_range (v, 0, 16777216)
#define UO4(v) rx_op (v, 4, RXREL_UNSIGNED)
#define NO1(v) rx_op (v, 1, RXREL_NEGATIVE)
@@ -94,8 +94,8 @@
#define IMM_(v,pos,size) F (immediate (v, RXREL_SIGNED, pos, size), pos, 2); \
if (v.X_op != O_constant && v.X_op != O_big) rx_linkrelax_imm (pos)
#define IMM(v,pos) IMM_ (v, pos, 32)
-#define IMMW(v,pos) IMM_ (v, pos, 16)
-#define IMMB(v,pos) IMM_ (v, pos, 8)
+#define IMMW(v,pos) IMM_ (v, pos, 16); rx_range (v, -32768, 65536)
+#define IMMB(v,pos) IMM_ (v, pos, 8); rx_range (v, -128, 255)
#define NIMM(v,pos) F (immediate (v, RXREL_NEGATIVE, pos, 32), pos, 2)
#define NBIMM(v,pos) F (immediate (v, RXREL_NEGATIVE_BORROW, pos, 32), pos, 2)
#define DSP(v,pos,msz) if (!v.X_md) rx_relax (RX_RELAX_DISP, pos); \
@@ -114,6 +114,7 @@
static int immediate (expressionS, int, int, int);
static int displacement (expressionS, int);
static void rtsd_immediate (expressionS);
+static void rx_range (expressionS, int, int);
static int need_flag = 0;
static int rx_in_brackets = 0;
@@ -1615,3 +1616,16 @@
exp.X_add_number = val;
O1 (exp);
}
+
+static void
+rx_range (expressionS exp, int minv, int maxv)
+{
+ int val;
+
+ if (exp.X_op != O_constant)
+ return;
+
+ val = exp.X_add_number;
+ if (val < minv || val > maxv)
+ as_warn (_("Value %d out of range %d..%d"), val, minv, maxv);
+}
diff --git a/gas/config/tc-alpha.c b/gas/config/tc-alpha.c
index 43bd18b..d020896 100644
--- a/gas/config/tc-alpha.c
+++ b/gas/config/tc-alpha.c
@@ -5302,7 +5302,7 @@
if (!sec)
return;
- vma = bfd_get_section_vma (foo, sec);
+ vma = bfd_get_section_vma (sec->owner, sec);
if (vma && vma < alpha_gp_value)
alpha_gp_value = vma;
}
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index 42eda2f..2a558cb 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -1,7 +1,7 @@
/* tc-avr.c -- Assembler code for the ATMEL AVR
Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
- 2010 Free Software Foundation, Inc.
+ 2010, 2012 Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc@overta.ru>
This file is part of GAS, the GNU Assembler.
@@ -65,19 +65,19 @@
{
{"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
/* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
- but set to AVR_ISA_AVR25 for some following version
- of GCC (from 4.3) for backward compatibility. */
+ but set to AVR_ISA_AVR25 for some following version
+ of GCC (from 4.3) for backward compatibility. */
{"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
{"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
-/* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
- but set to AVR_ISA_AVR3_ALL for some following version
+/* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
+ but set to AVR_ISA_AVR3_ALL for some following version
of GCC (from 4.3) for backward compatibility. */
{"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
{"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
{"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
{"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
-/* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
- but set to AVR_ISA_AVR51 for some following version
+/* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
+ but set to AVR_ISA_AVR51 for some following version
of GCC (from 4.3) for backward compatibility. */
{"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
{"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
@@ -327,7 +327,7 @@
{"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
{"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
{"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
- {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
+ {"hlo8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
};
/* A union used to store indicies into the exp_mod[] array
@@ -1013,7 +1013,7 @@
op_mask |= (x << 4);
}
break;
-
+
case '?':
break;
@@ -1334,7 +1334,19 @@
}
break;
- default:
+ case BFD_RELOC_AVR_8_LO:
+ *where = 0xff & value;
+ break;
+
+ case BFD_RELOC_AVR_8_HI:
+ *where = 0xff & (value >> 8);
+ break;
+
+ case BFD_RELOC_AVR_8_HLO:
+ *where = 0xff & (value >> 16);
+ break;
+
+ default:
as_fatal (_("line %d: unknown relocation type: 0x%x"),
fixP->fx_line, fixP->fx_r_type);
break;
@@ -1465,40 +1477,75 @@
}
}
-/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
- `avr_cons_fix_new'. */
-static int exp_mod_pm = 0;
+typedef struct
+{
+ /* Name of the expression modifier allowed with .byte, .word, etc. */
+ const char *name;
-/* Parse special CONS expression: pm (expression)
- or alternatively: gs (expression).
- These are used for addressing program memory.
- Relocation: BFD_RELOC_AVR_16_PM. */
+ /* Only allowed with n bytes of data. */
+ int nbytes;
+
+ /* Associated RELOC. */
+ bfd_reloc_code_real_type reloc;
+
+ /* Part of the error message. */
+ const char *error;
+} exp_mod_data_t;
+
+static const exp_mod_data_t exp_mod_data[] =
+{
+ /* Default, must be first. */
+ { "", 0, BFD_RELOC_16, "" },
+ /* Divides by 2 to get word address. Generate Stub. */
+ { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " },
+ { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " },
+ /* The following are used together with avr-gcc's __memx address space
+ in order to initialize a 24-bit pointer variable with a 24-bit address.
+ For address in flash, hlo8 will contain the flash segment if the
+ symbol is located in flash. If the symbol is located in RAM; hlo8
+ will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash
+ addresses linearize address space. */
+ { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " },
+ { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " },
+ { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " },
+ { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " },
+ /* End of list. */
+ { NULL, 0, 0, NULL }
+};
+
+/* Data to pass between `avr_parse_cons_expression' and `avr_cons_fix_new'. */
+static const exp_mod_data_t *pexp_mod_data = &exp_mod_data[0];
+
+/* Parse special CONS expression: pm (expression) or alternatively
+ gs (expression). These are used for addressing program memory. Moreover,
+ define lo8 (expression), hi8 (expression) and hlo8 (expression). */
void
avr_parse_cons_expression (expressionS *exp, int nbytes)
{
+ const exp_mod_data_t *pexp = &exp_mod_data[0];
char *tmp;
- exp_mod_pm = 0;
+ pexp_mod_data = pexp;
tmp = input_line_pointer = skip_space (input_line_pointer);
- if (nbytes == 2)
- {
- char *pm_name1 = "pm";
- char *pm_name2 = "gs";
- int len = strlen (pm_name1);
- /* len must be the same for both pm identifiers. */
+ /* The first entry of exp_mod_data[] contains an entry if no
+ expression modifier is present. Skip it. */
- if (strncasecmp (input_line_pointer, pm_name1, len) == 0
- || strncasecmp (input_line_pointer, pm_name2, len) == 0)
+ for (pexp++; pexp->name; pexp++)
+ {
+ int len = strlen (pexp->name);
+
+ if (nbytes == pexp->nbytes
+ && strncasecmp (input_line_pointer, pexp->name, len) == 0)
{
input_line_pointer = skip_space (input_line_pointer + len);
if (*input_line_pointer == '(')
{
input_line_pointer = skip_space (input_line_pointer + 1);
- exp_mod_pm = 1;
+ pexp_mod_data = pexp;
expression (exp);
if (*input_line_pointer == ')')
@@ -1506,13 +1553,15 @@
else
{
as_bad (_("`)' required"));
- exp_mod_pm = 0;
+ pexp_mod_data = &exp_mod_data[0];
}
return;
}
input_line_pointer = tmp;
+
+ break;
}
}
@@ -1525,8 +1574,11 @@
int nbytes,
expressionS *exp)
{
- if (exp_mod_pm == 0)
+ int bad = 0;
+
+ switch (pexp_mod_data->reloc)
{
+ default:
if (nbytes == 1)
fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
else if (nbytes == 2)
@@ -1534,16 +1586,24 @@
else if (nbytes == 4)
fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
else
- as_bad (_("illegal %srelocation size: %d"), "", nbytes);
- }
- else
- {
- if (nbytes == 2)
- fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
+ bad = 1;
+ break;
+
+ case BFD_RELOC_AVR_16_PM:
+ case BFD_RELOC_AVR_8_LO:
+ case BFD_RELOC_AVR_8_HI:
+ case BFD_RELOC_AVR_8_HLO:
+ if (nbytes == pexp_mod_data->nbytes)
+ fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc);
else
- as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
- exp_mod_pm = 0;
+ bad = 1;
+ break;
}
+
+ if (bad)
+ as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes);
+
+ pexp_mod_data = &exp_mod_data[0];
}
void
diff --git a/gas/config/tc-dlx.c b/gas/config/tc-dlx.c
index b846252..a629533 100644
--- a/gas/config/tc-dlx.c
+++ b/gas/config/tc-dlx.c
@@ -1,5 +1,5 @@
-/* tc-ldx.c -- Assemble for the DLX
- Copyright 2002, 2003, 2004, 2005, 2007, 2009, 2010
+/* tc-dlx.c -- Assemble for the DLX
+ Copyright 2002, 2003, 2004, 2005, 2007, 2009, 2010, 2012
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -21,8 +21,8 @@
/* Initially created by Kuang Hwa Lin, 3/20/2002. */
-#include "safe-ctype.h"
#include "as.h"
+#include "safe-ctype.h"
#include "tc-dlx.h"
#include "opcode/dlx.h"
@@ -245,7 +245,12 @@
/* Missing entry point, use function's name with the leading
char prepended. */
if (leading_char)
- asprintf (&label, "%c%s", leading_char, name);
+ {
+ unsigned len = strlen (name) + 1;
+ label = xmalloc (len + 1);
+ label[0] = leading_char;
+ memcpy (label + 1, name, len);
+ }
else
label = name;
}
diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c
index edfad44..bbf8c0e 100644
--- a/gas/config/tc-h8300.c
+++ b/gas/config/tc-h8300.c
@@ -359,7 +359,6 @@
static char *skip_colonthing (char *, int *);
static char *parse_exp (char *, struct h8_op *);
-static int constant_fits_width_p (struct h8_op *, unsigned int);
static int constant_fits_size_p (struct h8_op *, int, int);
/*
@@ -556,7 +555,7 @@
@@aa[:8] memory indirect. */
static int
-constant_fits_width_p (struct h8_op *operand, unsigned int width)
+constant_fits_width_p (struct h8_op *operand, offsetT width)
{
offsetT num;
diff --git a/gas/config/tc-lm32.c b/gas/config/tc-lm32.c
index bbdd2c5..88ffabb 100644
--- a/gas/config/tc-lm32.c
+++ b/gas/config/tc-lm32.c
@@ -1,5 +1,5 @@
/* tc-lm32.c - Lattice Mico32 assembler.
- Copyright 2008 Free Software Foundation, Inc.
+ Copyright 2008, 2012 Free Software Foundation, Inc.
Contributed by Jon Beniston <jon@beniston.com>
This file is part of GAS, the GNU Assembler.
@@ -19,10 +19,9 @@
Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "as.h"
#include <string.h>
#include <stdlib.h>
-
-#include "as.h"
#include "safe-ctype.h"
#include "subsegs.h"
#include "bfd.h"
diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c
index 2e328ea..6211f9d 100644
--- a/gas/config/tc-m68hc11.c
+++ b/gas/config/tc-m68hc11.c
@@ -1,7 +1,9 @@
/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12.
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010,
+ 2011, 2012
Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
+ XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
This file is part of GAS, the GNU Assembler.
@@ -65,7 +67,8 @@
How many bytes this mode will add to the size of the frag.
Which mode to go to if the offset won't fit in this one. */
-relax_typeS md_relax_table[] = {
+relax_typeS md_relax_table[] =
+{
{1, 1, 0, 0}, /* First entries aren't used. */
{1, 1, 0, 0}, /* For no good reason except. */
{1, 1, 0, 0}, /* that the VAX doesn't either. */
@@ -116,7 +119,8 @@
};
/* 68HC11 and 68HC12 registers. They are numbered according to the 68HC12. */
-typedef enum register_id {
+typedef enum register_id
+{
REG_NONE = -1,
REG_A = 0,
REG_B = 1,
@@ -125,17 +129,30 @@
REG_X = 5,
REG_Y = 6,
REG_SP = 7,
- REG_PC = 8
+ REG_PC = 8,
+ REG_R0 = 0,
+ REG_R1 = 1,
+ REG_R2 = 2,
+ REG_R3 = 3,
+ REG_R4 = 4,
+ REG_R5 = 5,
+ REG_R6 = 6,
+ REG_R7 = 7,
+ REG_SP_XG = 8,
+ REG_PC_XG = 9,
+ REG_CCR_XG = 10
} register_id;
-typedef struct operand {
+typedef struct operand
+{
expressionS exp;
register_id reg1;
register_id reg2;
int mode;
} operand;
-struct m68hc11_opcode_def {
+struct m68hc11_opcode_def
+{
long format;
int min_operands;
int max_operands;
@@ -147,18 +164,30 @@
static struct m68hc11_opcode_def *m68hc11_opcode_defs = 0;
static int m68hc11_nb_opcode_defs = 0;
-typedef struct alias {
+typedef struct alias
+{
const char *name;
const char *alias;
} alias;
-static alias alias_opcodes[] = {
+static alias alias_opcodes[] =
+{
{"cpd", "cmpd"},
{"cpx", "cmpx"},
{"cpy", "cmpy"},
{0, 0}
};
+struct m9s12xg_opcode_def
+{
+ long format;
+ int min_operands;
+ int max_operands;
+ int nb_modes;
+ int used;
+ struct m9s12xg_opcode *opcode;
+};
+
/* Local functions. */
static register_id reg_name_search (char *);
static register_id register_name (void);
@@ -173,6 +202,7 @@
static void fixup8 (expressionS *, int, int);
static void fixup16 (expressionS *, int, int);
static void fixup24 (expressionS *, int, int);
+static void fixup8_xg (expressionS *, int, int);
static unsigned char convert_branch (unsigned char);
static char *m68hc11_new_insn (int);
static void build_dbranch_insn (struct m68hc11_opcode *,
@@ -185,6 +215,7 @@
static struct m68hc11_opcode *find_opcode (struct m68hc11_opcode_def *,
operand *, int *);
static void build_jump_insn (struct m68hc11_opcode *, operand *, int, int);
+static void build_insn_xg (struct m68hc11_opcode *, operand *, int);
static void build_insn (struct m68hc11_opcode *, operand *, int);
static int relaxable_symbol (symbolS *);
@@ -259,10 +290,12 @@
pseudo-op name without dot
function to call to execute this pseudo-op
Integer arg to pass to the function. */
-const pseudo_typeS md_pseudo_table[] = {
+const pseudo_typeS md_pseudo_table[] =
+{
/* The following pseudo-ops are supported for MRI compatibility. */
{"fcb", cons, 1},
{"fdb", cons, 2},
+ {"fqb", cons, 4},
{"fcc", stringer, 8 + 1},
{"rmb", s_space, 0},
@@ -288,7 +321,8 @@
const char *md_shortopts = "Sm:";
-struct option md_longopts[] = {
+struct option md_longopts[] =
+{
#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
{"force-long-branches", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
{"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, /* Misspelt version kept for backwards compatibility. */
@@ -321,6 +355,9 @@
#define OPTION_MLONG_DOUBLE (OPTION_MD_BASE + 9)
{"mlong-double", no_argument, NULL, OPTION_MLONG_DOUBLE},
+#define OPTION_XGATE_RAMOFFSET (OPTION_MD_BASE + 10)
+ {"xgate-ramoffset", no_argument, NULL, OPTION_XGATE_RAMOFFSET},
+
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
@@ -360,6 +397,10 @@
{
if (current_architecture & cpu6811)
return "M68HC11 GAS ";
+ else if (current_architecture & cpuxgate)
+ return "XGATE GAS ";
+ else if (current_architecture & cpu9s12x)
+ return "S12X GAS ";
else
return "M68HC12 GAS ";
}
@@ -371,7 +412,8 @@
fprintf (stream, _("\
Motorola 68HC11/68HC12/68HCS12 options:\n\
-m68hc11 | -m68hc12 |\n\
- -m68hcs12 specify the processor [default %s]\n\
+ -m68hcs12 | -mm9s12x |\n\
+ -mm9s12xg specify the processor [default %s]\n\
-mshort use 16-bit int ABI (default)\n\
-mlong use 32-bit int ABI\n\
-mshort-double use 32-bit double ABI\n\
@@ -383,6 +425,7 @@
when the instruction does not support direct mode\n\
--print-insn-syntax print the syntax of instruction in case of error\n\
--print-opcodes print the list of instructions with syntax\n\
+ --xgate-ramoffset offset ram addresses by 0xc000\n\
--generate-example generate an example of each instruction\n\
(used for testing)\n"), default_cpu);
@@ -490,13 +533,26 @@
elf_flags |= E_M68HC11_F64;
break;
+ case OPTION_XGATE_RAMOFFSET:
+ elf_flags |= E_M68HC11_XGATE_RAMOFFSET;
+ break;
+
case 'm':
- if (strcasecmp (arg, "68hc11") == 0)
+ if ((strcasecmp (arg, "68hc11") == 0)
+ || (strcasecmp (arg, "m68hc11") == 0))
current_architecture = cpu6811;
- else if (strcasecmp (arg, "68hc12") == 0)
+ else if ((strcasecmp (arg, "68hc12") == 0)
+ || (strcasecmp (arg, "m68hc12") == 0))
current_architecture = cpu6812;
- else if (strcasecmp (arg, "68hcs12") == 0)
+ else if ((strcasecmp (arg, "68hcs12") == 0)
+ || (strcasecmp (arg, "m68hcs12") == 0))
current_architecture = cpu6812 | cpu6812s;
+ else if (strcasecmp (arg, "m9s12x") == 0)
+ current_architecture = cpu6812 | cpu6812s | cpu9s12x;
+ else if ((strcasecmp (arg, "m9s12xg") == 0)
+ || (strcasecmp (arg, "xgate") == 0))
+ /* xgate for backwards compatability */
+ current_architecture = cpuxgate;
else
as_bad (_("Option `%s' is not recognized."), arg);
break;
@@ -614,23 +670,39 @@
/* See how many operands this opcode needs. */
expect = 0;
- if (opcodes->format & M6811_OP_MASK)
- expect++;
- if (opcodes->format & M6811_OP_BITMASK)
- expect++;
- if (opcodes->format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
- expect++;
- if (opcodes->format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2))
- expect++;
- /* Special case for call instruction. */
- if ((opcodes->format & M6812_OP_PAGE)
- && !(opcodes->format & M6811_OP_IND16))
- expect++;
+ if (opcodes->arch == cpuxgate)
+ {
+ if (opcodes->format & (M68XG_OP_IMM3 | M68XG_OP_R | M68XG_OP_REL9
+ | M68XG_OP_REL10 ))
+ expect = 1;
+ else if (opcodes->format & (M68XG_OP_R_R | M68XG_OP_R_IMM4
+ | M68XG_OP_R_IMM8 | M68XG_OP_R_IMM8))
+ expect = 2;
+ else if (opcodes->format & (M68XG_OP_R_R_R | M68XG_OP_R_R_OFFS5
+ | M68XG_OP_RD_RB_RI | M68XG_OP_RD_RB_RIp
+ | M68XG_OP_RD_RB_mRI))
+ expect = 3;
+ }
+ else
+ {
+ if (opcodes->format & M6811_OP_MASK)
+ expect++;
+ if (opcodes->format & M6811_OP_BITMASK)
+ expect++;
+ if (opcodes->format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
+ expect++;
+ if (opcodes->format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2))
+ expect++;
+ /* Special case for call instruction. */
+ if ((opcodes->format & M6812_OP_PAGE)
+ && !(opcodes->format & M6811_OP_IND16))
+ expect++;
+ }
if (expect < opc->min_operands)
opc->min_operands = expect;
if (IS_CALL_SYMBOL (opcodes->format))
- expect++;
+ expect++;
if (expect > opc->max_operands)
opc->max_operands = expect;
}
@@ -654,6 +726,7 @@
/* Return a string that represents the operand format for the instruction.
When example is true, this generates an example of operand. This is used
to give an example and also to generate a test. */
+
static char *
print_opcode_format (struct m68hc11_opcode *opcode, int example)
{
@@ -663,111 +736,222 @@
p = buf;
buf[0] = 0;
- if (format & M6811_OP_IMM8)
+
+ if (current_architecture == cpuxgate)
{
- if (example)
- sprintf (p, "#%d", rand () & 0x0FF);
- else
- strcpy (p, _("#<imm8>"));
- p = &p[strlen (p)];
- }
-
- if (format & M6811_OP_IMM16)
- {
- if (example)
- sprintf (p, "#%d", rand () & 0x0FFFF);
- else
- strcpy (p, _("#<imm16>"));
- p = &p[strlen (p)];
- }
-
- if (format & M6811_OP_IX)
- {
- if (example)
- sprintf (p, "%d,X", rand () & 0x0FF);
- else
- strcpy (p, _("<imm8>,X"));
- p = &p[strlen (p)];
- }
-
- if (format & M6811_OP_IY)
- {
- if (example)
- sprintf (p, "%d,X", rand () & 0x0FF);
- else
- strcpy (p, _("<imm8>,X"));
- p = &p[strlen (p)];
- }
-
- if (format & M6812_OP_IDX)
- {
- if (example)
- sprintf (p, "%d,X", rand () & 0x0FF);
- else
- strcpy (p, "n,r");
- p = &p[strlen (p)];
- }
-
- if (format & M6812_OP_PAGE)
- {
- if (example)
- sprintf (p, ", %d", rand () & 0x0FF);
- else
- strcpy (p, ", <page>");
- p = &p[strlen (p)];
- }
-
- if (format & M6811_OP_DIRECT)
- {
- if (example)
- sprintf (p, "*Z%d", rand () & 0x0FF);
- else
- strcpy (p, _("*<abs8>"));
- p = &p[strlen (p)];
- }
-
- if (format & M6811_OP_BITMASK)
- {
- if (buf[0])
- *p++ = ' ';
-
- if (example)
- sprintf (p, "#$%02x", rand () & 0x0FF);
- else
- strcpy (p, _("#<mask>"));
-
- p = &p[strlen (p)];
- if (format & M6811_OP_JUMP_REL)
- *p++ = ' ';
- }
-
- if (format & M6811_OP_IND16)
- {
- if (example)
- sprintf (p, _("symbol%d"), rand () & 0x0FF);
- else
- strcpy (p, _("<abs>"));
-
- p = &p[strlen (p)];
- }
-
- if (format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
- {
- if (example)
+ if (format & M68XG_OP_IMM3)
{
- if (format & M6811_OP_BITMASK)
+ if (example)
+ sprintf (p, "#%d", rand () & 0x007);
+ else
+ strcpy (p, _("imm3"));
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R)
+ {
+ if (example)
+ sprintf (p, "R%d", rand () & 0x07);
+ else
+ strcpy (p, _("RD"));
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R_R)
+ {
+ if (example)
+ sprintf (p, "R%d,R%d", rand () & 0x07, rand () & 0x07);
+ else
+ strcpy (p, _("RD,RS"));
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R_IMM4)
+ {
+ if (example)
+ sprintf (p, "R%d,#%d", rand () & 0x07, rand () & 0x0f);
+ else
+ strcpy (p, _("RI, #imm4"));
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R_R_R)
+ {
+ if (example)
+ sprintf (p, "R%d,R%d,R%d", rand () & 0x07, rand () & 0x07, rand () & 0x07);
+ else
+ strcpy (p, "RD,RS1,RS2");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_REL9)
+ {
+ if (example)
+ sprintf (p, "%d", rand () & 0x1FF);
+ else
+ strcpy (p, "<rel9>");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_REL10)
+ {
+ if (example)
+ sprintf (p, "%d", rand () & 0x3FF);
+ else
+ strcpy (p, "<rel10>");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R_R_OFFS5)
+ {
+ if (example)
+ sprintf (p, "R%d, (R%d, #0x%x)", rand () & 0x07, rand () & 0x07, rand () & 0x1f);
+ else
+ strcpy (p, _("RD, (RI,#offs5)"));
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_RD_RB_RI)
+ {
+ if (example)
+ sprintf (p, "R%d, (R%d, R%d)", rand () & 0x07, rand () & 0x07, rand () & 0x07);
+ else
+ strcpy (p, "RD, (RB, RI)");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_RD_RB_RIp)
+ {
+ if (example)
+ sprintf (p, "R%d, (R%d, R%d+)", rand () & 0x07, rand () & 0x07, rand () & 0x07);
+ else
+ strcpy (p, "RD, (RB, RI+)");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_RD_RB_mRI)
+ {
+ if (example)
+ sprintf (p, "R%d, (R%d, -R%d)", rand () & 0x07, rand () & 0x07, rand () & 0x07);
+ else
+ strcpy (p, "RD, (RB, -RI)");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R_IMM8)
+ {
+ if (example)
+ sprintf (p, "R%d, #0x%x", rand () & 0x07, rand () & 0xff);
+ else
+ strcpy (p, "RD, #imm8");
+ p = &p[strlen (p)];
+ }
+ else if (format & M68XG_OP_R_IMM16)
+ {
+ if (example)
+ sprintf (p, "R%d, #0x%x", rand () & 0x07, rand () & 0xffff);
+ else
+ strcpy (p, "RD, #imm16");
+ p = &p[strlen (p)];
+ }
+ }
+ else
+ {
+
+ if (format & M6811_OP_IMM8)
+ {
+ if (example)
+ sprintf (p, "#%d", rand () & 0x0FF);
+ else
+ strcpy (p, _("#<imm8>"));
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6811_OP_IMM16)
+ {
+ if (example)
+ sprintf (p, "#%d", rand () & 0x0FFFF);
+ else
+ strcpy (p, _("#<imm16>"));
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6811_OP_IX)
+ {
+ if (example)
+ sprintf (p, "%d,X", rand () & 0x0FF);
+ else
+ strcpy (p, _("<imm8>,X"));
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6811_OP_IY)
+ {
+ if (example)
+ sprintf (p, "%d,X", rand () & 0x0FF);
+ else
+ strcpy (p, _("<imm8>,X"));
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6812_OP_IDX)
+ {
+ if (example)
+ sprintf (p, "%d,X", rand () & 0x0FF);
+ else
+ strcpy (p, "n,r");
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6812_OP_PAGE)
+ {
+ if (example)
+ sprintf (p, ", %d", rand () & 0x0FF);
+ else
+ strcpy (p, ", <page>");
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6811_OP_DIRECT)
+ {
+ if (example)
+ sprintf (p, "*Z%d", rand () & 0x0FF);
+ else
+ strcpy (p, _("*<abs8>"));
+ p = &p[strlen (p)];
+ }
+
+ if (format & M6811_OP_BITMASK)
+ {
+ if (buf[0])
+ *p++ = ' ';
+
+ if (example)
+ sprintf (p, "#$%02x", rand () & 0x0FF);
+ else
+ strcpy (p, _("#<mask>"));
+
+ p = &p[strlen (p)];
+ if (format & M6811_OP_JUMP_REL)
+ *p++ = ' ';
+ }
+
+ if (format & M6811_OP_IND16)
+ {
+ if (example)
+ sprintf (p, _("symbol%d"), rand () & 0x0FF);
+ else
+ strcpy (p, _("<abs>"));
+
+ p = &p[strlen (p)];
+ }
+
+ if (format & (M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
+ {
+ if (example)
{
- sprintf (p, ".+%d", rand () & 0x7F);
+ if (format & M6811_OP_BITMASK)
+ {
+ sprintf (p, ".+%d", rand () & 0x7F);
+ }
+ else
+ {
+ sprintf (p, "L%d", rand () & 0x0FF);
+ }
}
else
- {
- sprintf (p, "L%d", rand () & 0x0FF);
- }
+ strcpy (p, _("<label>"));
}
- else
- strcpy (p, _("<label>"));
}
-
return buf;
}
@@ -870,7 +1054,29 @@
return REG_PC;
if (strcasecmp (name, "ccr") == 0)
return REG_CCR;
-
+/* XGATE */
+ if (strcasecmp (name, "r0") == 0)
+ return REG_R0;
+ if (strcasecmp (name, "r1") == 0)
+ return REG_R1;
+ if (strcasecmp (name, "r2") == 0)
+ return REG_R2;
+ if (strcasecmp (name, "r3") == 0)
+ return REG_R3;
+ if (strcasecmp (name, "r4") == 0)
+ return REG_R4;
+ if (strcasecmp (name, "r5") == 0)
+ return REG_R5;
+ if (strcasecmp (name, "r6") == 0)
+ return REG_R6;
+ if (strcasecmp (name, "r7") == 0)
+ return REG_R7;
+ if (strcasecmp (name, "sp") == 0)
+ return REG_SP_XG;
+ if (strcasecmp (name, "pc") == 0)
+ return REG_PC_XG;
+ if (strcasecmp (name, "ccr") == 0)
+ return REG_CCR_XG;
return REG_NONE;
}
@@ -1271,51 +1477,83 @@
static int
check_range (long num, int mode)
{
- /* Auto increment and decrement are ok for [-8..8] without 0. */
- if (mode & M6812_AUTO_INC_DEC)
- return (num != 0 && num <= 8 && num >= -8);
-
- /* The 68HC12 supports 5, 9 and 16-bit offsets. */
- if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX))
- mode = M6811_OP_IND16;
-
- if (mode & M6812_OP_JUMP_REL16)
- mode = M6811_OP_IND16;
-
- mode &= ~M6811_OP_BRANCH;
- switch (mode)
+ if (current_architecture == cpuxgate)
{
- case M6811_OP_IX:
- case M6811_OP_IY:
- case M6811_OP_DIRECT:
- return (num >= 0 && num <= 255) ? 1 : 0;
+ switch (mode)
+ {
+ case M68XG_OP_IMM3:
+ return (num >= 0 && num <= 7) ? 1 : 0;
- case M6811_OP_BITMASK:
- case M6811_OP_IMM8:
- case M6812_OP_PAGE:
- return (((num & 0xFFFFFF00) == 0) || ((num & 0xFFFFFF00) == 0xFFFFFF00))
- ? 1 : 0;
+ case M68XG_OP_R_IMM4:
+ return (num >= 0 && num <= 15) ? 1 : 0;
- case M6811_OP_JUMP_REL:
- return (num >= -128 && num <= 127) ? 1 : 0;
+ case M68XG_OP_R_R_OFFS5:
+ return (num >= 0 && num <= 31) ? 1 : 0;
- case M6811_OP_IND16:
- case M6811_OP_IND16 | M6812_OP_PAGE:
- case M6811_OP_IMM16:
- return (((num & 0xFFFF0000) == 0) || ((num & 0xFFFF0000) == 0xFFFF0000))
- ? 1 : 0;
+ case M68XG_OP_R_IMM8:
+ return (num >= 0 && num <= 255) ? 1 : 0;
- case M6812_OP_IBCC_MARKER:
- case M6812_OP_TBCC_MARKER:
- case M6812_OP_DBCC_MARKER:
- return (num >= -256 && num <= 255) ? 1 : 0;
+ case M68XG_OP_R_IMM16:
+ return (num >= 0 && num <= 65535) ? 1 : 0;
- case M6812_OP_TRAP_ID:
- return ((num >= 0x30 && num <= 0x39)
- || (num >= 0x40 && num <= 0x0ff)) ? 1 : 0;
+ case M68XG_OP_B_MARKER:
+ return (num >= -512 && num <= 511) ? 1 : 0;
- default:
- return 0;
+ case M68XG_OP_BRA_MARKER:
+ return (num >= -1024 && num <= 1023) ? 1 : 0;
+
+ default:
+ return 0;
+ }
+ }
+ else
+ {
+ /* Auto increment and decrement are ok for [-8..8] without 0. */
+ if (mode & M6812_AUTO_INC_DEC)
+ return (num != 0 && num <= 8 && num >= -8);
+
+ /* The 68HC12 supports 5, 9 and 16-bit offsets. */
+ if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX))
+ mode = M6811_OP_IND16;
+
+ if (mode & M6812_OP_JUMP_REL16)
+ mode = M6811_OP_IND16;
+
+ mode &= ~M6811_OP_BRANCH;
+ switch (mode)
+ {
+ case M6811_OP_IX:
+ case M6811_OP_IY:
+ case M6811_OP_DIRECT:
+ return (num >= 0 && num <= 255) ? 1 : 0;
+
+ case M6811_OP_BITMASK:
+ case M6811_OP_IMM8:
+ case M6812_OP_PAGE:
+ return (((num & 0xFFFFFF00) == 0) || ((num & 0xFFFFFF00) == 0xFFFFFF00))
+ ? 1 : 0;
+
+ case M6811_OP_JUMP_REL:
+ return (num >= -128 && num <= 127) ? 1 : 0;
+
+ case M6811_OP_IND16:
+ case M6811_OP_IND16 | M6812_OP_PAGE:
+ case M6811_OP_IMM16:
+ return (((num & 0xFFFF0000) == 0) || ((num & 0xFFFF0000) == 0xFFFF0000))
+ ? 1 : 0;
+
+ case M6812_OP_IBCC_MARKER:
+ case M6812_OP_TBCC_MARKER:
+ case M6812_OP_DBCC_MARKER:
+ return (num >= -256 && num <= 255) ? 1 : 0;
+
+ case M6812_OP_TRAP_ID:
+ return ((num >= 0x30 && num <= 0x39)
+ || (num >= 0x40 && num <= 0x0ff)) ? 1 : 0;
+
+ default:
+ return 0;
+ }
}
}
@@ -1473,10 +1711,92 @@
as_fatal (_("Operand `%x' not recognized in fixup16."), oper->X_op);
}
}
+
+/* XGATE Put a 1 byte expression described by 'oper'. If this expression
+ containts unresolved symbols, generate an 8-bit fixup. */
+static void
+fixup8_xg (expressionS *oper, int mode, int opmode)
+{
+ char *f;
+
+ f = frag_more (1);
+
+ if (oper->X_op == O_constant)
+ {
+ fixS *fixp;
+ int reloc;
+
+ if ((opmode & M6811_OP_HIGH_ADDR) || (opmode & M6811_OP_LOW_ADDR))
+ {
+ if (opmode & M6811_OP_HIGH_ADDR)
+ reloc = BFD_RELOC_M68HC11_HI8;
+ else
+ reloc = BFD_RELOC_M68HC11_LO8;
+
+ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1,
+ oper, FALSE, reloc);
+ fixp->fx_no_overflow = 1;
+ number_to_chars_bigendian (f, 0, 1);
+ }
+ else
+ {
+ if (!(check_range (oper->X_add_number, mode)))
+ as_bad (_("Operand out of 8-bit range: `%ld'."),
+ oper->X_add_number);
+ number_to_chars_bigendian (f, oper->X_add_number & 0x0FF, 1);
+ }
+ }
+ else if (oper->X_op != O_register)
+ {
+ if (mode == M68XG_OP_REL9)
+ {
+ fixS *fixp;
+
+ /* Future improvement:
+ This fixup/reloc isn't adding on constants to symbols. */
+ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal -1, 2,
+ oper, TRUE, BFD_RELOC_M68HC12_9_PCREL);
+ fixp->fx_pcrel_adjust = 1;
+ }
+ else if (mode == M68XG_OP_REL10)
+ {
+ fixS *fixp;
+
+ /* Future improvement:
+ This fixup/reloc isn't adding on constants to symbols. */
+ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal -1, 2,
+ oper, TRUE, BFD_RELOC_M68HC12_10_PCREL);
+ fixp->fx_pcrel_adjust = 1;
+ }
+ else
+ {
+ fixS *fixp;
+ int reloc;
+
+ /* Now create an 8-bit fixup. If there was some %hi, %lo
+ modifier, generate the reloc accordingly. */
+ if (opmode & M6811_OP_HIGH_ADDR)
+ reloc = BFD_RELOC_M68HC11_HI8;
+ else if (opmode & M6811_OP_LOW_ADDR)
+ reloc = BFD_RELOC_M68HC11_LO8;
+ else
+ reloc = BFD_RELOC_8;
+
+ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1,
+ oper, FALSE, reloc);
+ if (reloc != BFD_RELOC_8)
+ fixp->fx_no_overflow = 1;
+ }
+ number_to_chars_bigendian (f, 0, 1);
+ }
+ else
+ as_fatal (_("Operand `%x' not recognized in fixup8."), oper->X_op);
+}
/* 68HC11 and 68HC12 code generation. */
/* Translate the short branch/bsr instruction into a long branch. */
+
static unsigned char
convert_branch (unsigned char code)
{
@@ -1741,6 +2061,7 @@
#define OP_EXTENDED (M6811_OP_PAGE2 | M6811_OP_PAGE3 | M6811_OP_PAGE4)
/* Assemble the post index byte for 68HC12 extended addressing modes. */
+
static int
build_indexed_byte (operand *op, int format ATTRIBUTE_UNUSED, int move_insn)
{
@@ -1760,15 +2081,15 @@
if (op->exp.X_op == O_constant)
{
if (!check_range (val, mode))
- {
- as_bad (_("Increment/decrement value is out of range: `%ld'."),
- val);
- }
+ as_bad (_("Increment/decrement value is out of range: `%ld'."),
+ val);
+
if (mode & (M6812_POST_INC | M6812_PRE_INC))
byte |= (val - 1) & 0x07;
else
byte |= (8 - ((val) & 7)) | 0x8;
}
+
switch (op->reg1)
{
case REG_NONE:
@@ -1820,14 +2141,15 @@
as_bad (_("Invalid register."));
break;
}
+
if (op->exp.X_op == O_constant)
{
if (!check_range (val, M6812_OP_IDX))
- {
- as_bad (_("Offset out of 16-bit range: %ld."), val);
- }
+ as_bad (_("Offset out of 16-bit range: %ld."), val);
- if (move_insn && !(val >= -16 && val <= 15))
+ if (move_insn && !(val >= -16 && val <= 15)
+ && ((!(mode & M6812_OP_IDX) && !(mode & M6812_OP_D_IDX_2))
+ || !(current_architecture & cpu9s12x)))
{
as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."),
val);
@@ -1867,6 +2189,7 @@
return 3;
}
}
+
if (mode & M6812_OP_D_IDX_2)
{
byte = (byte << 3) | 0xe3;
@@ -1889,14 +2212,31 @@
sym = make_expr_symbol (&op->exp);
off = 0;
}
+
/* movb/movw cannot be relaxed. */
if (move_insn)
{
- byte <<= 6;
- number_to_chars_bigendian (f, byte, 1);
- fix_new (frag_now, f - frag_now->fr_literal, 1,
- sym, off, 0, BFD_RELOC_M68HC12_5B);
- return 1;
+ if ((mode & M6812_OP_IDX) && (current_architecture & cpu9s12x))
+ {
+ /* Must treat as a 16bit relocate as size of final result is unknown. */
+
+ byte <<= 3;
+ byte |= 0b11100010;
+ number_to_chars_bigendian (f, byte, 1);
+ fix_new (frag_now, f - frag_now->fr_literal, 2,
+ sym, off, 0, BFD_RELOC_M68HC12_16B);
+ f = frag_more (2);
+ return 1;
+ }
+ else
+ {
+ /* Non-S12X will fail at relocate stage if offset out of range. */
+ byte <<= 6;
+ number_to_chars_bigendian (f, byte, 1);
+ fix_new (frag_now, f - frag_now->fr_literal, 1,
+ sym, off, 0, BFD_RELOC_M68HC12_5B);
+ return 1;
+ }
}
else
{
@@ -1909,6 +2249,7 @@
else
{
f = frag_more (1);
+
/* movb/movw cannot be relaxed. */
if (move_insn)
{
@@ -1936,7 +2277,7 @@
{
if (op->reg1 != REG_D)
as_bad (_("Expecting register D for indexed indirect mode."));
- if (move_insn)
+ if ((move_insn) && (!(current_architecture & cpu9s12x)))
as_bad (_("Indexed indirect mode is not allowed for movb/movw."));
byte = 0xE7;
@@ -1987,6 +2328,8 @@
return 1;
}
+ fprintf (stderr, "mode = 0x%x\nop->reg1 = 0x%x\nop->reg2 = 0x%x\n",
+ mode, op->reg1, op->reg2);
as_fatal (_("Addressing mode not implemented yet."));
return 0;
}
@@ -1998,8 +2341,9 @@
unsigned char byte;
char *f;
- if (format & M6812_OP_SEX_MARKER
- && op->reg1 != REG_A && op->reg1 != REG_B && op->reg1 != REG_CCR)
+ if ((format & M6812_OP_SEX_MARKER)
+ && (op->reg1 != REG_A) && (op->reg1 != REG_B) && (op->reg1 != REG_CCR)
+ && (!(current_architecture & cpu9s12x)))
as_bad (_("Invalid source register for this instruction, use 'tfr'."));
else if (op->reg1 == REG_NONE || op->reg1 == REG_PC)
as_bad (_("Invalid source register."));
@@ -2015,17 +2359,96 @@
if (format & M6812_OP_EXG_MARKER)
byte |= 0x80;
+ if ((format & M6812_OP_SEX_MARKER)
+ && (op->reg1 == REG_D) && (current_architecture & cpu9s12x))
+ byte |= 0x08;
+
f = frag_more (1);
number_to_chars_bigendian (f, byte, 1);
return 1;
}
+/* build_insn_xg takes a pointer to the opcode entry in the opcode table,
+ the array of operand expressions and builds the corresponding instruction. */
+
+static void
+build_insn_xg (struct m68hc11_opcode *opcode,
+ operand operands[],
+ int nb_operands ATTRIBUTE_UNUSED)
+{
+ char *f;
+ long format;
+
+ /* Put the page code instruction if there is one. */
+ format = opcode->format;
+
+ if (!(operands[0].mode & (M6811_OP_LOW_ADDR | M6811_OP_HIGH_ADDR)))
+ /* Need to retain those two modes, but clear for others. */
+ operands[0].mode = 0;
+
+ if (format & M68XG_OP_R_IMM8)
+ {
+ /* These opcodes are byte followed by imm8. */
+ f = m68hc11_new_insn (1);
+ number_to_chars_bigendian (f, opcode->opcode >> 8, 1);
+ fixup8_xg (&operands[0].exp, format, operands[0].mode);
+ }
+ else if (format & M68XG_OP_R_IMM16)
+ {
+ fixS *fixp;
+ /* These opcodes expand into two imm8 instructions.
+ Emit as low:high as per the Freescale datasheet.
+ The linker requires them to be adjacent to handle the upper byte. */
+
+ /* Build low byte. */
+ f = m68hc11_new_insn (1);
+ number_to_chars_bigendian (f, opcode->opcode >> 8, 1);
+ operands[0].mode = M6811_OP_LOW_ADDR;
+ f = frag_more (1);
+ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1,
+ &operands[0].exp, FALSE, BFD_RELOC_M68HC12_LO8XG);
+ fixp->fx_no_overflow = 1;
+ number_to_chars_bigendian (f, 0, 1);
+
+ /* Build high byte. */
+ f = m68hc11_new_insn (1);
+ number_to_chars_bigendian (f, (opcode->opcode >> 8) | 0x08, 1);
+ operands[0].mode = M6811_OP_HIGH_ADDR;
+ f = frag_more (1);
+ fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1,
+ &operands[0].exp, FALSE, BFD_RELOC_M68HC12_HI8XG);
+ fixp->fx_no_overflow = 1;
+ number_to_chars_bigendian (f, 0, 1);
+
+ }
+ else if (format & M68XG_OP_REL9)
+ {
+ f = m68hc11_new_insn (1);
+ number_to_chars_bigendian (f, opcode->opcode >> 8, 1); /* High byte. */
+ fixup8_xg (&operands[0].exp, format, M68XG_OP_REL9);
+ }
+ else if (format & M68XG_OP_REL10)
+ {
+ f = m68hc11_new_insn (1);
+ number_to_chars_bigendian (f, opcode->opcode >> 8, 1); /* High byte. */
+ fixup8_xg (&operands[0].exp, format, M68XG_OP_REL10);
+ }
+ else
+ {
+ f = m68hc11_new_insn (2);
+ number_to_chars_bigendian (f, opcode->opcode, 2);
+ }
+ return;
+}
+
/* build_insn takes a pointer to the opcode entry in the opcode table,
the array of operand expressions and builds the corresponding instruction.
This operation only deals with non relative jumps insn (need special
handling). */
+
static void
-build_insn (struct m68hc11_opcode *opcode, operand operands[],
+build_insn (struct m68hc11_opcode *opcode,
+ operand operands[],
int nb_operands ATTRIBUTE_UNUSED)
{
int i;
@@ -2159,6 +2582,21 @@
opcode = opc->opcode;
/* Now search the opcode table table for one with operands
+ that matches what we've got. */
+
+ if (current_architecture & cpuxgate)
+ {
+ /* Many XGATE insns are simple enough that we get an exact match. */
+ for (pos = match = 0; match == 0 && pos < opc->nb_modes; pos++, opcode++)
+ if (opcode->format == operands[nb_operands-1].mode)
+ return opcode;
+
+ return 0;
+ }
+
+ /* Non XGATE */
+
+ /* Now search the opcode table table for one with operands
that matches what we've got. We're only done if the operands matched so
far AND there are no more to check. */
for (pos = match = 0; match == 0 && pos < opc->nb_modes; pos++, opcode++)
@@ -2260,7 +2698,7 @@
|| operands[i].reg1 == REG_SP
|| operands[i].reg1 == REG_PC))
continue;
- if (i == 1 && format & M6812_OP_IDX_P2)
+ if (i == 1 && (format & M6812_OP_IDX_P2))
continue;
}
if (mode & format & (M6812_OP_D_IDX | M6812_OP_D_IDX_2))
@@ -2301,12 +2739,7 @@
match = 1;
}
- if (!match)
- {
- return (0);
- }
-
- return opcode;
+ return match ? opcode : 0;
}
/* Find the real opcode and its associated operands. We use a progressive
@@ -2387,6 +2820,7 @@
struct m68hc11_opcode_def *opc;
struct m68hc11_opcode *opcode;
+ struct m68hc11_opcode opcode_local;
unsigned char *op_start, *op_end;
char *save;
char name[20];
@@ -2419,6 +2853,629 @@
return;
}
+ if (current_architecture == cpuxgate)
+ {
+ /* Find the opcode definition given its name. */
+ opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, name);
+ if (opc == NULL)
+ {
+ as_bad (_("Opcode `%s' is not recognized."), name);
+ return;
+ }
+
+ /* Grab a local copy. */
+ opcode_local.name = opc->opcode->name;
+ /* These will be incomplete where multiple variants exist. */
+ opcode_local.opcode = opc->opcode->opcode;
+ opcode_local.format = opc->opcode->format;
+
+ save = input_line_pointer;
+ input_line_pointer = (char *) op_end;
+
+ if (opc->format == M68XG_OP_NONE)
+ {
+ /* No special handling required. */
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (opc->opcode, operands, 0);
+ return;
+ }
+
+ /* Special handling of TFR. */
+ if (strncmp (opc->opcode->name, "tfr",3) == 0)
+ {
+ /* There must be two operands with a comma. */
+ input_line_pointer = skip_whites (input_line_pointer);
+ operands[0].reg1 = register_name ();
+ if (operands[0].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ input_line_pointer = skip_whites (input_line_pointer);
+ if (*input_line_pointer != ',')
+ {
+ as_bad ("Missing comma.\n");
+ return;
+ }
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+ operands[1].reg1 = register_name ();
+ if (operands[1].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ input_line_pointer = skip_whites (input_line_pointer);
+ if (*input_line_pointer != '\n' && *input_line_pointer)
+ {
+ as_bad (_("Garbage at end of instruction: `%s'."),
+ input_line_pointer);
+ return;
+ }
+ if (operands[1].reg1 == REG_CCR) /* ,CCR */
+ opc->opcode->opcode = 0x00f8 | ( operands[0].reg1 << 8);
+ else if (operands[0].reg1 == REG_CCR) /* CCR, */
+ opc->opcode->opcode = 0x00f9 | ( operands[1].reg1 << 8);
+ else if (operands[1].reg1 == REG_PC) /* ,PC */
+ opc->opcode->opcode = 0x00fa | ( operands[0].reg1 << 8);
+ else
+ {
+ as_bad ("Invalid operand to TFR\n");
+ return;
+ }
+ /* no special handling required */
+ opcode_local.format = M68XG_OP_NONE;
+ opcode_local.opcode = opc->opcode->opcode;
+ build_insn_xg (&opcode_local, operands, 0);
+ return;
+ }
+
+ /* CSEM, SSEM */
+ if (opc->format & M68XG_OP_IMM3)
+ {
+ /* Either IMM3 or R */
+ input_line_pointer = skip_whites (input_line_pointer);
+ if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
+ {
+ operands[0].reg1 = register_name ();
+ if (operands[0].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ operands[0].mode = M68XG_OP_R;
+ /* One opcode has multiple modes, so find right one. */
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8);
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ else
+ as_bad ("No opcode found\n");
+
+ return;
+ }
+ else
+ {
+ if (*input_line_pointer == '#')
+ input_line_pointer++;
+
+ expression (&operands[0].exp);
+ if (operands[0].exp.X_op == O_illegal)
+ {
+ as_bad (_("Illegal operand."));
+ return;
+ }
+ else if (operands[0].exp.X_op == O_absent)
+ {
+ as_bad (_("Missing operand."));
+ return;
+ }
+
+ if (check_range (operands[0].exp.X_add_number,M68XG_OP_IMM3))
+ {
+ opcode_local.opcode |= (operands[0].exp.X_add_number);
+ operands[0].mode = M68XG_OP_IMM3;
+
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ opcode_local.opcode = opcode->opcode;
+ opcode_local.opcode
+ |= (operands[0].exp.X_add_number) << 8;
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ else
+ as_bad ("No opcode found\n");
+
+ return;
+ }
+ else
+ {
+ as_bad ("Number out of range for IMM3\n");
+ return;
+ }
+ }
+ }
+
+ /* Special handling of SIF. */
+ if (strncmp (opc->opcode->name, "sif",3) == 0)
+ {
+ /* Either OP_NONE or OP_RS. */
+ if (*input_line_pointer != '\n')
+ input_line_pointer = skip_whites (input_line_pointer);
+
+ if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
+ || (*input_line_pointer == '\0'))
+ opc->opcode->opcode = 0x0300;
+ else
+ {
+ operands[0].reg1 = register_name ();
+ if (operands[0].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ opcode_local.opcode = 0x00f7 | (operands[0].reg1 << 8);
+ }
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 0);
+ return;
+ }
+
+ /* SEX, PAR, JAL plus aliases NEG, TST, COM */
+ if (opc->format & M68XG_OP_R)
+ {
+ input_line_pointer = skip_whites (input_line_pointer);
+ operands[0].reg1 = register_name ();
+ if (operands[0].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
+ || (*input_line_pointer == '\0'))
+ {
+ /* Likely to be OP R. */
+ if (opc->format & M68XG_OP_R)
+ {
+ operands[0].mode = M68XG_OP_R;
+
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ if ((strncmp (opc->opcode->name, "com",3) == 0)
+ || (strncmp (opc->opcode->name, "neg",3) == 0))
+ /* Special case for com RD as alias for sub RD,R0,RS */
+ /* Special case for neg RD as alias for sub RD,R0,RS */
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8) | (operands[0].reg1 << 2);
+ else if (strncmp (opc->opcode->name, "tst",3) == 0)
+ /* Special case for tst RS alias for sub R0, RS, R0 */
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 5);
+ else
+ opcode_local.opcode |= (operands[0].reg1 << 8);
+ }
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 0);
+ }
+ else
+ as_bad ("No valid mode found\n");
+
+ return;
+ }
+ }
+
+ if (opc->format & (M68XG_OP_REL9 | M68XG_OP_REL10))
+ {
+ opcode_local.format = opc->format;
+ input_line_pointer = skip_whites (input_line_pointer);
+ expression (&operands[0].exp);
+ if (operands[0].exp.X_op == O_illegal)
+ {
+ as_bad (_("Illegal operand."));
+ return;
+ }
+ else if (operands[0].exp.X_op == O_absent)
+ {
+ as_bad (_("Missing operand."));
+ return;
+ }
+ opcode_local.opcode = opc->opcode->opcode;
+ build_insn_xg (&opcode_local, operands, 1);
+ return;
+ }
+
+
+ /* For other command formats, parse input line and determine the mode
+ we are using as we go. */
+
+ input_line_pointer = skip_whites (input_line_pointer);
+ if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
+ || (*input_line_pointer == '\0'))
+ return; /* nothing left */
+
+ if (*input_line_pointer == '#')
+ {
+ as_bad ("No register specified before hash\n");
+ return;
+ }
+
+ /* first operand is expected to be a register */
+ if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
+ {
+ operands[0].reg1 = register_name ();
+ if (operands[0].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ }
+
+ input_line_pointer = skip_whites (input_line_pointer);
+ if (*input_line_pointer != ',')
+ {
+ as_bad ("Missing operand\n");
+ return;
+ }
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+
+ if (*input_line_pointer == '#')
+ {
+ /* Some kind of immediate mode, check if this is possible. */
+ if (!(opc->format
+ & (M68XG_OP_R_IMM8 | M68XG_OP_R_IMM16 | M68XG_OP_R_IMM4)))
+ as_bad ("Invalid immediate mode for `%s'", opc->opcode->name);
+ else
+ {
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+ if (strncmp (input_line_pointer, "%hi", 3) == 0)
+ {
+ input_line_pointer += 3;
+ operands[0].mode = M6811_OP_HIGH_ADDR;
+ }
+ else if (strncmp (input_line_pointer, "%lo", 3) == 0)
+ {
+ input_line_pointer += 3;
+ operands[0].mode = M6811_OP_LOW_ADDR;
+ }
+ else
+ operands[0].mode = 0;
+
+ expression (&operands[0].exp);
+ if (operands[0].exp.X_op == O_illegal)
+ {
+ as_bad (_("Illegal operand."));
+ return;
+ }
+ else if (operands[0].exp.X_op == O_absent)
+ {
+ as_bad (_("Missing operand."));
+ return;
+ }
+ /* ok so far, can only be one mode */
+ opcode_local.format = opc->format
+ & (M68XG_OP_R_IMM8 | M68XG_OP_R_IMM16 | M68XG_OP_R_IMM4);
+ if (opcode_local.format & M68XG_OP_R_IMM4)
+ {
+ operands[0].mode = M68XG_OP_R_IMM4;
+ /* same opcodes have multiple modes, so find right one */
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8);
+
+ if (operands[0].exp.X_op != O_constant)
+ as_bad ("Only constants supported at for IMM4 mode\n");
+ else
+ {
+ if (check_range
+ (operands[0].exp.X_add_number,M68XG_OP_R_IMM4))
+ opcode_local.opcode
+ |= (operands[0].exp.X_add_number << 4);
+ else
+ as_bad ("Number out of range for IMM4\n");
+ }
+ opcode_local.format = M68XG_OP_NONE;
+ }
+ else if (opcode_local.format & M68XG_OP_R_IMM16)
+ {
+ operands[0].mode = M68XG_OP_R_IMM16;
+
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8);
+ }
+ }
+ else
+ {
+ opcode_local.opcode = opc->opcode->opcode
+ | (operands[0].reg1 << 8);
+ }
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ }
+ else if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
+ {
+ /* we've got as far as OP R, R */
+ operands[1].reg1 = register_name ();
+ if (operands[1].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
+ || (*input_line_pointer == '\0'))
+ {
+ /* looks like OP_R_R */
+ if (opc->format & M68XG_OP_R_R)
+ {
+ operands[0].mode = M68XG_OP_R_R;
+ /* same opcodes have multiple modes, so find right one */
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ if ((strncmp (opc->opcode->name, "com",3) == 0)
+ || (strncmp (opc->opcode->name, "mov",3) == 0)
+ || (strncmp (opc->opcode->name, "neg",3) == 0))
+ {
+ /* Special cases for:
+ com RD, RS alias for xnor RD,R0,RS
+ mov RD, RS alias for or RD, R0, RS
+ neg RD, RS alias for sub RD, R0, RS */
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8) | (operands[1].reg1 << 2);
+ }
+ else if ((strncmp (opc->opcode->name, "cmp",3) == 0)
+ || (strncmp (opc->opcode->name, "cpc",3) == 0))
+ {
+ /* special cases for:
+ cmp RS1, RS2 alias for sub R0, RS1, RS2
+ cpc RS1, RS2 alias for sbc R0, RS1, RS2 */
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 5) | (operands[1].reg1 << 2);
+ }
+ else
+ {
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8) | (operands[1].reg1 << 5);
+ }
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ }
+ else
+ {
+ as_bad ("No valid mode found\n");
+ }
+ }
+ else
+ {
+ /* more data */
+ if (*input_line_pointer != ',')
+ {
+ as_bad (_("Missing operand."));
+ return;
+ }
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+ if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
+ {
+ operands[2].reg1 = register_name ();
+ if (operands[2].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+ if (opc->format & M68XG_OP_R_R_R)
+ {
+ operands[0].mode = M68XG_OP_R_R_R;
+
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8) | (operands[1].reg1 << 5)
+ | (operands[2].reg1 << 2);
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ }
+ else
+ {
+ as_bad ("No valid mode found\n");
+ }
+ }
+ }
+ }
+ else if (*input_line_pointer == '(') /* Indexed modes */
+ {
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+ if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
+ {
+ /* we've got as far as OP R, (R */
+ operands[1].reg1 = register_name ();
+ if (operands[1].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+
+ if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
+ || (*input_line_pointer == '\0'))
+ {
+ /* Looks like OP_R_R. */
+ as_bad (_("Missing operand."));
+ return;
+ }
+
+ input_line_pointer = skip_whites (input_line_pointer);
+
+ if (*input_line_pointer != ',')
+ {
+ as_bad (_("Missing operand."));
+ return;
+ }
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+
+ if (*input_line_pointer == '#')
+ {
+ input_line_pointer++;
+ input_line_pointer = skip_whites (input_line_pointer);
+ expression (&operands[0].exp);
+ if (operands[0].exp.X_op == O_illegal)
+ {
+ as_bad (_("Illegal operand."));
+ return;
+ }
+ else if (operands[0].exp.X_op == O_absent)
+ {
+ as_bad (_("Missing operand."));
+ return;
+ }
+
+ input_line_pointer = skip_whites (input_line_pointer);
+ if (*input_line_pointer != ')')
+ {
+ as_bad ("Missing `)' to close register indirect operand.");
+ return;
+ }
+ else
+ {
+ input_line_pointer++;
+ }
+
+ /* Ok so far, can only be one mode. */
+ opcode_local.format = M68XG_OP_R_R_OFFS5;
+ operands[0].mode = M68XG_OP_R_R_OFFS5;
+
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8) | (operands[1].reg1 << 5);
+ if (operands[0].exp.X_op != O_constant)
+ {
+ as_bad
+ ("Only constants supported for indexed OFFS5 mode\n");
+ }
+ else
+ {
+ if (check_range (operands[0].exp.X_add_number,
+ M68XG_OP_R_R_OFFS5))
+ {
+ opcode_local.opcode
+ |= (operands[0].exp.X_add_number);
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ else
+ {
+ as_bad ("Number out of range for OFFS5\n");
+ }
+ }
+ }
+ }
+ else
+ {
+ operands[0].mode = M68XG_OP_RD_RB_RI;
+
+ if (*input_line_pointer == '-')
+ {
+ operands[0].mode = M68XG_OP_RD_RB_mRI;
+ input_line_pointer++;
+ }
+ operands[2].reg1 = register_name ();
+ if (operands[2].reg1 == REG_NONE)
+ {
+ as_bad ("Invalid register\n");
+ return;
+ }
+
+ if (*input_line_pointer == '+')
+ {
+ if (opcode_local.format == M68XG_OP_RD_RB_mRI)
+ {
+ as_bad (_("Illegal operand."));
+ return;
+ }
+ operands[0].mode = M68XG_OP_RD_RB_RIp;
+ input_line_pointer++;
+ }
+
+ input_line_pointer = skip_whites (input_line_pointer);
+ if (*input_line_pointer != ')')
+ {
+ as_bad
+ ("Missing `)' to close register indirect operand.");
+ return;
+ }
+ else
+ {
+ input_line_pointer++;
+ }
+
+ opcode = find (opc, operands, 1);
+ if (opcode)
+ {
+ opcode_local.opcode = opcode->opcode
+ | (operands[0].reg1 << 8) | (operands[1].reg1 << 5)
+ | (operands[2].reg1 << 2);
+ opcode_local.format = M68XG_OP_NONE;
+ build_insn_xg (&opcode_local, operands, 1);
+ }
+ else
+ {
+ as_bad ("Failed to find opcode for %s %s\n",
+ opc->opcode->name, (char *)op_end);
+ }
+ }
+ }
+ }
+ else
+ {
+ as_bad (_("Failed to find a valid mode for `%s'."),
+ opc->opcode->name);
+ }
+
+ if (opc->opcode && !flag_mri)
+ {
+ char *p = input_line_pointer;
+
+ while (*p == ' ' || *p == '\t' || *p == '\n' || *p == '\r')
+ p++;
+
+ if (*p != '\n' && *p)
+ as_bad (_("Garbage at end of instruction: `%s'."), p);
+ }
+
+ input_line_pointer = save;
+
+ /* Opcode is known but does not have valid operands. Print out the
+ syntax for this opcode. */
+ if (opc->opcode == 0)
+ {
+ if (flag_print_insn_syntax)
+ print_insn_format (name);
+
+ as_bad (_("Invalid operand for `%s'"), name);
+ return;
+ }
+
+ return;
+ }
+
/* Find the opcode definition given its name. */
opc = (struct m68hc11_opcode_def *) hash_find (m68hc11_hash, name);
@@ -2437,7 +3494,7 @@
branch_optimize = 1;
}
- /* The following test should probably be removed. This is not conform
+ /* The following test should probably be removed. This does not conform
to Motorola assembler specs. */
if (opc == NULL && flag_mri)
{
@@ -2525,8 +3582,120 @@
if (flag_print_insn_syntax)
print_insn_format (name);
- as_bad (_("Invalid operand for `%s'"), name);
- return;
+ if (((strcmp (name, "movb") == 0) || (strcmp (name, "movw") == 0))
+ && (current_architecture & cpu9s12x))
+ {
+ char *f;
+ int movb;
+ if (strcmp (name, "movb") == 0)
+ movb = 8;
+ else
+ movb = 0;
+
+ /* The existing operand extract code fell over if these additional modes
+ were enabled in m68hc11-opc.c. So they are commented there and
+ decoded here instead. */
+
+ if (operands[1].mode & (M6812_OP_IDX | M6812_OP_IDX_1
+ | M6812_OP_IDX_2 | M6812_OP_D_IDX | M6812_OP_D_IDX_2 | M6812_PRE_INC
+ | M6812_PRE_DEC | M6812_POST_INC | M6812_POST_DEC ))
+ {
+ /* first check if valid mode then start building it up */
+ if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16
+ | M6811_OP_IND16 | M6812_OP_IDX | M6812_OP_IDX_1
+ | M6812_OP_IDX_2 | M6812_OP_D_IDX | M6812_OP_D_IDX_2))
+ {
+ int opr16a;
+ if (operands[1].mode & (M6811_OP_IND16))
+ opr16a = 3;
+ else
+ opr16a = 0;
+
+ f = m68hc11_new_insn (2);
+
+ if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16))
+ {
+ number_to_chars_bigendian (f, 0x1800 + movb + opr16a, 2);
+ build_indexed_byte (&operands[1], operands[1].mode, 1);
+ if (movb)
+ fixup8 (&operands[0].exp, M6811_OP_IMM8,
+ operands[0].mode);
+ else
+ fixup16 (&operands[0].exp, M6811_OP_IMM16,
+ operands[0].mode);
+
+ return;
+ }
+ else if (operands[0].mode & M6811_OP_IND16)
+ {
+ number_to_chars_bigendian (f, 0x1801 + movb + opr16a, 2);
+ build_indexed_byte (&operands[1], operands[1].mode, 1);
+ fixup16 (&operands[0].exp, M6811_OP_IND16, operands[0].mode);
+ return;
+ }
+ else
+ {
+ number_to_chars_bigendian (f, 0x1802 + movb + opr16a, 2);
+ build_indexed_byte (&operands[0], operands[0].mode, 1);
+ build_indexed_byte (&operands[1], operands[1].mode, 1);
+ return;
+ }
+ }
+ }
+ else if (operands[1].mode & M6811_OP_IND16)
+ {
+ /* First check if this is valid mode, then start building it up. */
+ if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16
+ | M6811_OP_IND16 | M6812_OP_IDX | M6812_OP_IDX_1
+ | M6812_OP_IDX_2 | M6812_OP_D_IDX | M6812_OP_D_IDX_2))
+ {
+ int opr16a;
+ if (operands[1].mode & (M6811_OP_IND16))
+ opr16a = 3;
+ else
+ opr16a = 0;
+
+ f = m68hc11_new_insn (2);
+
+ /* The first two cases here should actually be covered by the
+ normal operand code. */
+ if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16))
+ {
+ number_to_chars_bigendian (f, 0x1800 + movb + opr16a, 2);
+ if (movb)
+ fixup8 (&operands[0].exp, M6811_OP_IMM8, operands[0].mode);
+ else
+ fixup16 (&operands[0].exp, M6811_OP_IMM16, operands[0].mode);
+
+ fixup16 (&operands[0].exp, M6811_OP_IND16, operands[0].mode);
+ return;
+ }
+ else if (operands[0].mode & M6811_OP_IND16)
+ {
+ number_to_chars_bigendian (f, 0x1801 + movb + opr16a, 2);
+ build_indexed_byte (&operands[1], operands[1].mode, 1);
+ fixup16 (&operands[0].exp, M6811_OP_IND16, operands[0].mode);
+ return;
+ }
+ else
+ {
+ number_to_chars_bigendian (f, 0x1802 + movb + opr16a, 2);
+ build_indexed_byte (&operands[0], operands[0].mode, 1);
+ fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode);
+ return;
+ }
+ }
+ }
+
+ as_bad (_("Invalid operand for `%s'"), name);
+ return;
+
+ }
+ else
+ {
+ as_bad (_("Invalid operand for `%s'"), name);
+ return;
+ }
}
/* Treat dbeq/ibeq/tbeq instructions in a special way. The branch is
@@ -3210,9 +4379,13 @@
break;
case BFD_RELOC_M68HC11_HI8:
+ /* Caution, %hi(<symbol>+%ld) will generate incorrect code if %lo
+ causes a carry. */
+ case BFD_RELOC_M68HC12_HI8XG:
value = value >> 8;
/* Fall through. */
+ case BFD_RELOC_M68HC12_LO8XG:
case BFD_RELOC_M68HC11_LO8:
case BFD_RELOC_8:
case BFD_RELOC_M68HC11_PAGE:
@@ -3228,6 +4401,26 @@
value);
break;
+ /* These next two are for XGATE. */
+ case BFD_RELOC_M68HC12_9_PCREL:
+ ((bfd_byte *) where)[0] |= (bfd_byte) ((value >>9) & 0x01);
+ ((bfd_byte *) where)[1] = (bfd_byte) ((value>>1) & 0xff);
+ if (value < -512 || value > 511)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Value %ld too large for 9-bit PC-relative branch."),
+ value);
+ break;
+
+ case BFD_RELOC_M68HC12_10_PCREL:
+ ((bfd_byte *) where)[0] |= (bfd_byte) ((value >>9) & 0x03);
+ ((bfd_byte *) where)[1] = (bfd_byte) ((value>>1) & 0xff);
+ if (value < -1024 || value > 1023)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Value %ld too large for 10-bit PC-relative branch."),
+ value);
+
+ break;
+
case BFD_RELOC_M68HC11_3B:
if (value <= 0 || value > 8)
as_bad_where (fixP->fx_file, fixP->fx_line,
@@ -3252,6 +4445,30 @@
where[0] |= (0x10 | (16 + value));
break;
+ case BFD_RELOC_M68HC12_9B:
+ if (value < -256 || value > 255)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Offset out of 9-bit range for movw/movb insn: %ld"),
+ value);
+ /* sign bit already in xb postbyte */
+ if (value >= 0)
+ where[1] = value;
+ else
+ where[1] = (256 + value);
+ break;
+
+ case BFD_RELOC_M68HC12_16B:
+ if (value < -32768 || value > 32767)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("Offset out of 16-bit range for movw/movb insn: %ld"),
+ value);
+ if (value < 0)
+ value += 65536;
+
+ where[1] = (value >> 8);
+ where[2] = (value & 0xff);
+ break;
+
case BFD_RELOC_M68HC11_RL_JUMP:
case BFD_RELOC_M68HC11_RL_GROUP:
case BFD_RELOC_VTABLE_INHERIT:
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index 9822b4a..21accf6 100644
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -609,10 +609,16 @@
{mcfisa_a|mcfisa_c|mcfusp, mcf51_ctrl, "51", 0},
{mcfisa_a|mcfisa_c|mcfusp, mcf51_ctrl, "51ac", 1},
+ {mcfisa_a|mcfisa_c|mcfusp, mcf51_ctrl, "51ag", 1},
{mcfisa_a|mcfisa_c|mcfusp, mcf51_ctrl, "51cn", 1},
{mcfisa_a|mcfisa_c|mcfusp|mcfmac, mcf51_ctrl, "51em", 1},
+ {mcfisa_a|mcfisa_c|mcfusp|mcfmac, mcf51_ctrl, "51je", 1},
+ {mcfisa_a|mcfisa_c|mcfusp|mcfemac, mcf51_ctrl, "51jf", 1},
+ {mcfisa_a|mcfisa_c|mcfusp|mcfemac, mcf51_ctrl, "51jg", 1},
{mcfisa_a|mcfisa_c|mcfusp, mcf51_ctrl, "51jm", 1},
+ {mcfisa_a|mcfisa_c|mcfusp|mcfmac, mcf51_ctrl, "51mm", 1},
{mcfisa_a|mcfisa_c|mcfusp, mcf51_ctrl, "51qe", 1},
+ {mcfisa_a|mcfisa_c|mcfusp|mcfemac, mcf51_ctrl, "51qm", 1},
{mcfisa_a, mcf_ctrl, "5200", 0},
{mcfisa_a, mcf_ctrl, "5202", 1},
diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c
index 3a6bd6a..377e4c3 100644
--- a/gas/config/tc-mep.c
+++ b/gas/config/tc-mep.c
@@ -1,5 +1,5 @@
/* tc-mep.c -- Assembler for the Toshiba Media Processor.
- Copyright (C) 2001, 2002, 2003, 2004, 2005, 2007, 2009
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2007, 2009, 2012
Free Software Foundation. Inc.
This file is part of GAS, the GNU Assembler.
@@ -19,8 +19,8 @@
the Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA. */
-#include <stdio.h>
#include "as.h"
+#include <stdio.h>
#include "dwarf2dbg.h"
#include "subsegs.h"
#include "symcat.h"
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
index 440c88b..3ab854f 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -19,8 +19,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-#include <stdio.h>
#include "as.h"
+#include <stdio.h>
#include "bfd.h"
#include "subsegs.h"
#define DEFINE_TABLE
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index d6b8ecb..4760c05 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -15005,7 +15005,10 @@
}
if (arch_info == 0)
- arch_info = mips_parse_cpu ("default CPU", MIPS_CPU_STRING_DEFAULT);
+ {
+ arch_info = mips_parse_cpu ("default CPU", MIPS_CPU_STRING_DEFAULT);
+ gas_assert (arch_info);
+ }
if (ABI_NEEDS_64BIT_REGS (mips_abi) && !ISA_HAS_64BIT_REGS (arch_info->isa))
as_bad (_("-march=%s is not compatible with the selected ABI"),
diff --git a/gas/config/tc-mmix.c b/gas/config/tc-mmix.c
index 5b6b331..9d42302 100644
--- a/gas/config/tc-mmix.c
+++ b/gas/config/tc-mmix.c
@@ -1,6 +1,6 @@
/* tc-mmix.c -- Assembler for Don Knuth's MMIX.
- Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
- Free Software Foundation.
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
+ 2012 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
@@ -27,8 +27,8 @@
compatible syntax, but the main purpose is to serve GCC. */
-#include <limits.h>
#include "as.h"
+#include <limits.h>
#include "subsegs.h"
#include "elf/mmix.h"
#include "opcode/mmix.h"
@@ -40,11 +40,11 @@
for example assert something of what it became or make a relocation. */
enum mmix_fixup_action
- {
- mmix_fixup_byte,
- mmix_fixup_register,
- mmix_fixup_register_or_adjust_for_byte
- };
+{
+ mmix_fixup_byte,
+ mmix_fixup_register,
+ mmix_fixup_register_or_adjust_for_byte
+};
static int get_spec_regno (char *);
static int get_operands (int, char *, expressionS *);
diff --git a/gas/config/tc-msp430.c b/gas/config/tc-msp430.c
index 98d90c6..8ec7546 100644
--- a/gas/config/tc-msp430.c
+++ b/gas/config/tc-msp430.c
@@ -1,6 +1,6 @@
/* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
- Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
+ Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2012
Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
@@ -21,10 +21,9 @@
the Free Software Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
-#include <limits.h>
-
-#define PUSH_1X_WORKAROUND
#include "as.h"
+#include <limits.h>
+#define PUSH_1X_WORKAROUND
#include "subsegs.h"
#include "opcode/msp430.h"
#include "safe-ctype.h"
diff --git a/gas/config/tc-or32.c b/gas/config/tc-or32.c
index 7234fb8..23e44af 100644
--- a/gas/config/tc-or32.c
+++ b/gas/config/tc-or32.c
@@ -1,5 +1,5 @@
/* Assembly backend for the OpenRISC 1000.
- Copyright (C) 2002, 2003, 2005, 2007, 2009, 2010
+ Copyright (C) 2002, 2003, 2005, 2007, 2009, 2010, 2012
Free Software Foundation, Inc.
Contributed by Damjan Lampret <lampret@opencores.org>.
Modified bu Johan Rydberg, <johan.rydberg@netinsight.se>.
@@ -24,8 +24,8 @@
/* tc-a29k.c used as a template. */
-#include "safe-ctype.h"
#include "as.h"
+#include "safe-ctype.h"
#include "opcode/or32.h"
#include "elf/or32.h"
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 0e7f017..af1f4cf 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -64,14 +64,40 @@
/* #lo(value) denotes the least significant 16 bits of the indicated. */
#define PPC_LO(v) ((v) & 0xffff)
+/* Split the indicated value with the msbs in bits 11-15
+ and the lsbs in bits 21-31. */
+#define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
+
+/* Split the indicated value with the msbs in bits 6-10
+ and the lsbs in bits 21-31. */
+#define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
+
+/* #lo(value) denotes the lsb 16 bits in split16a format. */
+#define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
+
+/* #lo(value) denotes the lsb 16 bits in split16d format. */
+#define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
+
/* #hi(value) denotes bits 16 through 31 of the indicated value. */
#define PPC_HI(v) (((v) >> 16) & 0xffff)
+/* #lo(value) denotes the msb 16 bits in split16a format. */
+#define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
+
+/* #lo(value) denotes the msb 16 bits in split16d format. */
+#define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
+
/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
the indicated value, compensating for #lo() being treated as a
signed number. */
#define PPC_HA(v) PPC_HI ((v) + 0x8000)
+/* #ha(value) denotes the high adjusted value in split16a format. */
+#define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
+
+/* #ha(value) denotes the high adjusted value in split16d format. */
+#define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
+
/* #higher(value) denotes bits 32 through 47 of the indicated value. */
#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
@@ -1038,6 +1064,7 @@
#define PPC_APUINFO_SPE 0x100
#define PPC_APUINFO_EFS 0x101
#define PPC_APUINFO_BRLOCK 0x102
+#define PPC_APUINFO_VLE 0x104
/*
* We keep a list of APUinfo
@@ -1059,6 +1086,35 @@
};
const size_t md_longopts_size = sizeof (md_longopts);
+/* Convert the target integer stored in N bytes in BUF to a host
+ integer, returning that value. */
+
+static valueT
+md_chars_to_number (char *buf, int n)
+{
+ valueT result = 0;
+ unsigned char *p = (unsigned char *) buf;
+
+ if (target_big_endian)
+ {
+ while (n--)
+ {
+ result <<= 8;
+ result |= (*p++ & 0xff);
+ }
+ }
+ else
+ {
+ while (n--)
+ {
+ result <<= 8;
+ result |= (p[n] & 0xff);
+ }
+ }
+
+ return result;
+}
+
int
md_parse_option (int c, char *arg)
{
@@ -1079,6 +1135,8 @@
{
target_big_endian = 0;
set_target_endian = 1;
+ if (ppc_cpu & PPC_OPCODE_VLE)
+ as_bad (_("the use of -mvle requires big endian."));
}
else
return 0;
@@ -1115,6 +1173,8 @@
{
#ifdef BFD64
ppc_obj64 = 1;
+ if (ppc_cpu & PPC_OPCODE_VLE)
+ as_bad (_("the use of -mvle requires -a32."));
#else
as_fatal (_("%s unsupported"), "-a64");
#endif
@@ -1126,8 +1186,18 @@
break;
case 'm':
- if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
- ppc_cpu = new_cpu;
+ new_cpu = ppc_parse_cpu (ppc_cpu, arg);
+ if (new_cpu != 0)
+ {
+ ppc_cpu = new_cpu;
+ if (strcmp (arg, "vle") == 0)
+ {
+ if (set_target_endian && target_big_endian == 0)
+ as_bad (_("the use of -mvle requires big endian."));
+ if (ppc_obj64)
+ as_bad (_("the use of -mvle requires -a32."));
+ }
+ }
else if (strcmp (arg, "regnames") == 0)
reg_names_p = TRUE;
@@ -1160,6 +1230,8 @@
{
target_big_endian = 0;
set_target_endian = 1;
+ if (ppc_cpu & PPC_OPCODE_VLE)
+ as_bad (_("the use of -mvle requires big endian."));
}
else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
@@ -1268,6 +1340,7 @@
-me5500, generate code for Freescale e5500 core complex\n\
-me6500, generate code for Freescale e6500 core complex\n\
-mspe generate code for Motorola SPE instructions\n\
+-mvle generate code for Freescale VLE instructions\n\
-mtitan generate code for AppliedMicro Titan core complex\n\
-mregnames Allow symbolic names for registers\n\
-mno-regnames Do not allow symbolic names for registers\n"));
@@ -1312,7 +1385,7 @@
else if (strncmp (default_cpu, "powerpc", 7) == 0)
ppc_cpu |= PPC_OPCODE_PPC;
else
- as_fatal (_("Unknown default cpu = %s, os = %s"),
+ as_fatal (_("unknown default cpu = %s, os = %s"),
default_cpu, default_os);
}
}
@@ -1328,9 +1401,11 @@
if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
return bfd_arch_powerpc;
- else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
+ if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
+ return bfd_arch_powerpc;
+ if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
return bfd_arch_rs6000;
- else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
+ if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
{
if (strcmp (default_cpu, "rs6000") == 0)
return bfd_arch_rs6000;
@@ -1338,7 +1413,7 @@
return bfd_arch_powerpc;
}
- as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
+ as_fatal (_("neither Power nor PowerPC opcodes were selected."));
return bfd_arch_unknown;
}
@@ -1351,6 +1426,8 @@
return bfd_mach_rs6k;
else if (ppc_cpu & PPC_OPCODE_TITAN)
return bfd_mach_ppc_titan;
+ else if (ppc_cpu & PPC_OPCODE_VLE)
+ return bfd_mach_ppc_vle;
else
return bfd_mach_ppc;
}
@@ -1384,6 +1461,54 @@
#endif
}
+/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
+ Return TRUE if there's a problem, otherwise FALSE. */
+
+static bfd_boolean
+insn_validate (const struct powerpc_opcode *op)
+{
+ const unsigned char *o;
+ unsigned long omask = op->mask;
+
+ /* The mask had better not trim off opcode bits. */
+ if ((op->opcode & omask) != op->opcode)
+ {
+ as_bad (_("mask trims opcode bits for %s"), op->name);
+ return TRUE;
+ }
+
+ /* The operands must not overlap the opcode or each other. */
+ for (o = op->operands; *o; ++o)
+ {
+ if (*o >= num_powerpc_operands)
+ {
+ as_bad (_("operand index error for %s"), op->name);
+ return TRUE;
+ }
+ else
+ {
+ const struct powerpc_operand *operand = &powerpc_operands[*o];
+ if (operand->shift != PPC_OPSHIFT_INV)
+ {
+ unsigned long mask;
+
+ if (operand->shift >= 0)
+ mask = operand->bitm << operand->shift;
+ else
+ mask = operand->bitm >> -operand->shift;
+ if (omask & mask)
+ {
+ as_bad (_("operand %d overlap in %s"),
+ (int) (o - op->operands), op->name);
+ return TRUE;
+ }
+ omask |= mask;
+ }
+ }
+ }
+ return FALSE;
+}
+
/* Insert opcodes and macros into hash tables. Called at startup and
for .cpu pseudo. */
@@ -1440,89 +1565,29 @@
{
if (ENABLE_CHECKING)
{
- const unsigned char *o;
- unsigned long omask = op->mask;
-
if (op != powerpc_opcodes)
{
+ int old_opcode = PPC_OP (op[-1].opcode);
+ int new_opcode = PPC_OP (op[0].opcode);
+
+#ifdef PRINT_OPCODE_TABLE
+ printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
+ op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
+ (unsigned int) op->opcode, (unsigned int) op->mask,
+ (unsigned long long) op->flags);
+#endif
+
/* The major opcodes had better be sorted. Code in the
disassembler assumes the insns are sorted according to
major opcode. */
- if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
+ if (new_opcode < old_opcode)
{
as_bad (_("major opcode is not sorted for %s"),
op->name);
bad_insn = TRUE;
}
-
- /* Warn if the table isn't more strictly ordered.
- Unfortunately it doesn't seem possible to order the
- table on much more than the major opcode, which makes
- it difficult to implement a binary search in the
- disassembler. The problem is that we have multiple
- ways to disassemble instructions, and we usually want
- to choose a more specific form (with more bits set in
- the opcode) than a more general form. eg. all of the
- following are equivalent:
- bne label # opcode = 0x40820000, mask = 0xff830003
- bf 2,label # opcode = 0x40800000, mask = 0xff800003
- bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
-
- There are also cases where the table needs to be out
- of order to disassemble the correct instruction for
- processor variants. */
- else if (0)
- {
- unsigned long t1 = op[0].opcode;
- unsigned long t2 = op[-1].opcode;
-
- if (((t1 ^ t2) & 0xfc0007ff) == 0
- && (t1 & 0xfc0006df) == 0x7c000286)
- {
- /* spr field is split. */
- t1 = ((t1 & ~0x1ff800)
- | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
- t2 = ((t2 & ~0x1ff800)
- | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
- }
- if (t1 < t2)
- as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
- op[0].name, op[0].opcode, op[0].mask,
- op[-1].name, op[-1].opcode, op[-1].mask);
- }
}
-
- /* The mask had better not trim off opcode bits. */
- if ((op->opcode & omask) != op->opcode)
- {
- as_bad (_("mask trims opcode bits for %s"),
- op->name);
- bad_insn = TRUE;
- }
-
- /* The operands must not overlap the opcode or each other. */
- for (o = op->operands; *o; ++o)
- if (*o >= num_powerpc_operands)
- {
- as_bad (_("operand index error for %s"),
- op->name);
- bad_insn = TRUE;
- }
- else
- {
- const struct powerpc_operand *operand = &powerpc_operands[*o];
- if (operand->shift >= 0)
- {
- unsigned long mask = operand->bitm << operand->shift;
- if (omask & mask)
- {
- as_bad (_("operand %d overlap in %s"),
- (int) (o - op->operands), op->name);
- bad_insn = TRUE;
- }
- omask |= mask;
- }
- }
+ bad_insn |= insn_validate (op);
}
if ((ppc_cpu & op->flags) != 0
@@ -1544,6 +1609,59 @@
for (op = powerpc_opcodes; op < op_end; op++)
hash_insert (ppc_hash, op->name, (void *) op);
+ op_end = vle_opcodes + vle_num_opcodes;
+ for (op = vle_opcodes; op < op_end; op++)
+ {
+ if (ENABLE_CHECKING)
+ {
+ if (op != vle_opcodes)
+ {
+ unsigned old_seg, new_seg;
+
+ old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
+ old_seg = VLE_OP_TO_SEG (old_seg);
+ new_seg = VLE_OP (op[0].opcode, op[0].mask);
+ new_seg = VLE_OP_TO_SEG (new_seg);
+
+#ifdef PRINT_OPCODE_TABLE
+ printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
+ op->name, op - powerpc_opcodes, (unsigned int) new_opcode,
+ (unsigned int) op->opcode, (unsigned int) op->mask,
+ (unsigned long long) op->flags);
+#endif
+ /* The major opcodes had better be sorted. Code in the
+ disassembler assumes the insns are sorted according to
+ major opcode. */
+ if (new_seg < old_seg)
+ {
+ as_bad (_("major opcode is not sorted for %s"),
+ op->name);
+ bad_insn = TRUE;
+ }
+ }
+
+ bad_insn |= insn_validate (op);
+ }
+
+ if ((ppc_cpu & op->flags) != 0
+ && !(ppc_cpu & op->deprecated))
+ {
+ const char *retval;
+
+ retval = hash_insert (ppc_hash, op->name, (void *) op);
+ if (retval != NULL)
+ {
+ as_bad (_("duplicate instruction %s"),
+ op->name);
+ bad_insn = TRUE;
+ }
+ }
+ }
+
+ if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
+ for (op = vle_opcodes; op < op_end; op++)
+ hash_insert (ppc_hash, op->name, (void *) op);
+
/* Insert the macros into a hash table. */
ppc_macro_hash = hash_new ();
@@ -1743,8 +1861,10 @@
if (errmsg != (const char *) NULL)
as_bad_where (file, line, "%s", errmsg);
}
- else
+ else if (operand->shift >= 0)
insn |= ((long) val & operand->bitm) << operand->shift;
+ else
+ insn |= ((long) val & operand->bitm) >> -operand->shift;
return insn;
}
@@ -1826,6 +1946,9 @@
MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
MAP32 ("sdarel", BFD_RELOC_GPREL16),
+ MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
+ MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
+ MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
@@ -1835,6 +1958,7 @@
MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
+ MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
@@ -2048,7 +2172,7 @@
SKIP_WHITESPACE ();
if (*input_line_pointer != ',')
{
- as_bad (_("Expected comma after symbol-name: rest of line ignored."));
+ as_bad (_("expected comma after symbol-name: rest of line ignored."));
ignore_rest_of_line ();
return;
}
@@ -2081,7 +2205,7 @@
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
{
- as_bad (_("Ignoring attempt to re-define symbol `%s'."),
+ as_bad (_("ignoring attempt to re-define symbol `%s'."),
S_GET_NAME (symbolP));
ignore_rest_of_line ();
return;
@@ -2089,7 +2213,7 @@
if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
{
- as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
+ as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
(long) S_GET_VALUE (symbolP),
(long) size);
@@ -2107,7 +2231,7 @@
for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
if (align != 1)
{
- as_bad (_("Common alignment not a power of 2"));
+ as_bad (_("common alignment not a power of 2"));
ignore_rest_of_line ();
return;
}
@@ -2169,7 +2293,7 @@
|| fixp->fx_r_type != BFD_RELOC_CTOR)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
- _("Relocation cannot be done when using -mrelocatable"));
+ _("relocation cannot be done when using -mrelocatable"));
}
}
return;
@@ -2371,6 +2495,22 @@
#define MAX_INSN_FIXUPS (5)
+/* Form I16L. */
+#define E_OR2I_INSN 0x7000C000
+#define E_AND2I_DOT_INSN 0x7000C800
+#define E_OR2IS_INSN 0x7000D000
+#define E_LIS_INSN 0x7000E000
+#define E_AND2IS_DOT_INSN 0x7000E800
+
+/* Form I16A. */
+#define E_ADD2I_DOT_INSN 0x70008800
+#define E_ADD2IS_INSN 0x70009000
+#define E_CMP16I_INSN 0x70009800
+#define E_MULL2I_INSN 0x7000A000
+#define E_CMPL16I_INSN 0x7000A800
+#define E_CMPH16I_INSN 0x7000B000
+#define E_CMPHL16I_INSN 0x7000B800
+
/* This routine is called for each instruction to be assembled. */
void
@@ -2388,6 +2528,7 @@
char *f;
int addr_mod;
int i;
+ unsigned int insn_length;
#ifdef OBJ_ELF
bfd_reloc_code_real_type reloc;
#endif
@@ -2406,7 +2547,7 @@
macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
if (macro == (const struct powerpc_macro *) NULL)
- as_bad (_("Unrecognized opcode: `%s'"), str);
+ as_bad (_("unrecognized opcode: `%s'"), str);
else
ppc_macro (s, macro);
@@ -2601,12 +2742,12 @@
toc entries. We don't support them today. Is this
the right way to say that? */
toc_reloc = BFD_RELOC_UNUSED;
- as_bad (_("Unimplemented toc32 expression modifier"));
+ as_bad (_("unimplemented toc32 expression modifier"));
break;
case must_be_64:
/* FIXME: see above. */
toc_reloc = BFD_RELOC_UNUSED;
- as_bad (_("Unimplemented toc64 expression modifier"));
+ as_bad (_("unimplemented toc64 expression modifier"));
break;
default:
fprintf (stderr,
@@ -2637,12 +2778,15 @@
else
#endif /* TE_PE */
{
- if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
+ if ((reg_names_p
+ && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
+ || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
|| !register_name (&ex))
{
char save_lex = lex_type['%'];
- if ((operand->flags & PPC_OPERAND_CR) != 0)
+ if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
+ || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
{
cr_operand = TRUE;
lex_type['%'] |= LEX_BEGIN_NAME;
@@ -2810,6 +2954,73 @@
break;
}
+ /* If VLE-mode convert LO/HI/HA relocations. */
+ if (opcode->flags & PPC_OPCODE_VLE)
+ {
+ int tmp_insn = insn & opcode->mask;
+
+ int use_d_reloc = (tmp_insn == E_OR2I_INSN
+ || tmp_insn == E_AND2I_DOT_INSN
+ || tmp_insn == E_OR2IS_INSN
+ || tmp_insn == E_LIS_INSN
+ || tmp_insn == E_AND2IS_DOT_INSN);
+
+
+ int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
+ || tmp_insn == E_ADD2IS_INSN
+ || tmp_insn == E_CMP16I_INSN
+ || tmp_insn == E_MULL2I_INSN
+ || tmp_insn == E_CMPL16I_INSN
+ || tmp_insn == E_CMPH16I_INSN
+ || tmp_insn == E_CMPHL16I_INSN);
+
+ switch (reloc)
+ {
+ default:
+ break;
+
+ case BFD_RELOC_PPC_EMB_SDA21:
+ reloc = BFD_RELOC_PPC_VLE_SDA21;
+ break;
+
+ case BFD_RELOC_LO16:
+ if (use_d_reloc)
+ reloc = BFD_RELOC_PPC_VLE_LO16D;
+ else if (use_a_reloc)
+ reloc = BFD_RELOC_PPC_VLE_LO16A;
+ break;
+
+ case BFD_RELOC_HI16:
+ if (use_d_reloc)
+ reloc = BFD_RELOC_PPC_VLE_HI16D;
+ else if (use_a_reloc)
+ reloc = BFD_RELOC_PPC_VLE_HI16A;
+ break;
+
+ case BFD_RELOC_HI16_S:
+ if (use_d_reloc)
+ reloc = BFD_RELOC_PPC_VLE_HA16D;
+ else if (use_a_reloc)
+ reloc = BFD_RELOC_PPC_VLE_HA16A;
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
+ if (use_d_reloc)
+ reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
+ if (use_d_reloc)
+ reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
+ if (use_d_reloc)
+ reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
+ break;
+ }
+ }
+
/* For the absolute forms of branches, convert the PC
relative form back into the absolute. */
if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
@@ -2974,8 +3185,8 @@
as_bad (_("junk at end of line: `%s'"), str);
#ifdef OBJ_ELF
- /* Do we need/want a APUinfo section? */
- if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
+ /* Do we need/want an APUinfo section? */
+ if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0)
{
/* These are all version "1". */
if (opcode->flags & PPC_OPCODE_SPE)
@@ -2992,20 +3203,41 @@
ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
if (opcode->flags & PPC_OPCODE_RFMCI)
ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
+ if (opcode->flags & PPC_OPCODE_VLE)
+ ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
}
#endif
/* Write out the instruction. */
- f = frag_more (4);
- addr_mod = frag_now_fix () & 3;
+ /* Differentiate between two and four byte insns. */
+ if (ppc_mach () == bfd_mach_ppc_vle)
+ {
+ if (PPC_OP_SE_VLE (insn))
+ insn_length = 2;
+ else
+ insn_length = 4;
+ addr_mod = frag_now_fix () & 1;
+ }
+ else
+ {
+ insn_length = 4;
+ addr_mod = frag_now_fix () & 3;
+ }
+ /* All instructions can start on a 2 byte boundary for VLE. */
+ f = frag_more (insn_length);
if (frag_now->has_code && frag_now->insn_addr != addr_mod)
- as_bad (_("instruction address is not a multiple of 4"));
+ {
+ if (ppc_mach() == bfd_mach_ppc_vle)
+ as_bad (_("instruction address is not a multiple of 2"));
+ else
+ as_bad (_("instruction address is not a multiple of 4"));
+ }
frag_now->insn_addr = addr_mod;
frag_now->has_code = 1;
- md_number_to_chars (f, insn, 4);
+ md_number_to_chars (f, insn, insn_length);
#ifdef OBJ_ELF
- dwarf2_emit_insn (4);
+ dwarf2_emit_insn (insn_length);
#endif
/* Create any fixups. At this point we do not use a
@@ -3049,6 +3281,12 @@
case BFD_RELOC_LO16:
case BFD_RELOC_HI16:
case BFD_RELOC_HI16_S:
+ case BFD_RELOC_PPC_VLE_LO16A:
+ case BFD_RELOC_PPC_VLE_LO16D:
+ case BFD_RELOC_PPC_VLE_HI16A:
+ case BFD_RELOC_PPC_VLE_HI16D:
+ case BFD_RELOC_PPC_VLE_HA16A:
+ case BFD_RELOC_PPC_VLE_HA16D:
#ifdef OBJ_ELF
case BFD_RELOC_PPC64_HIGHER:
case BFD_RELOC_PPC64_HIGHER_S:
@@ -3068,7 +3306,7 @@
operand = &powerpc_operands[fixups[i].opindex];
fix_new_exp (frag_now,
f - frag_now->fr_literal,
- 4,
+ insn_length,
&fixups[i].exp,
(operand->flags & PPC_OPERAND_RELATIVE) != 0,
((bfd_reloc_code_real_type)
@@ -3580,7 +3818,7 @@
/* Return now in case of unknown subsection. */
if (dw == NULL)
{
- as_bad (_("No known dwarf XCOFF section for flag 0x%08x\n"),
+ as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
(unsigned)flag);
return;
}
@@ -3709,7 +3947,7 @@
real_name = ".data[RW]";
else
{
- as_bad (_("The XCOFF file format does not support arbitrary sections"));
+ as_bad (_("the XCOFF file format does not support arbitrary sections"));
*input_line_pointer = c;
ignore_rest_of_line ();
return;
@@ -4650,7 +4888,7 @@
if (ppc_previous_section == NULL)
{
- as_warn (_("No previous section to return to. Directive ignored."));
+ as_warn (_("no previous section to return to, ignored."));
return;
}
@@ -4885,7 +5123,7 @@
SKIP_WHITESPACE ();
if (*input_line_pointer != ',')
{
- as_bad (_("Expected comma after symbol-name: rest of line ignored."));
+ as_bad (_("expected comma after symbol-name: rest of line ignored."));
ignore_rest_of_line ();
return;
}
@@ -4921,7 +5159,7 @@
*p = c;
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
{
- as_bad (_("Ignoring attempt to re-define symbol `%s'."),
+ as_bad (_("ignoring attempt to re-define symbol `%s'."),
S_GET_NAME (symbolP));
ignore_rest_of_line ();
return;
@@ -4930,7 +5168,7 @@
if (S_GET_VALUE (symbolP))
{
if (S_GET_VALUE (symbolP) != (valueT) temp)
- as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
+ as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
(long) S_GET_VALUE (symbolP),
(long) temp);
@@ -5060,7 +5298,7 @@
{
/* Section Contents */
case 'a': /* unknown */
- as_bad (_("Unsupported section attribute -- 'a'"));
+ as_bad (_("unsupported section attribute -- 'a'"));
break;
case 'c': /* code section */
flags |= SEC_CODE;
@@ -5337,7 +5575,7 @@
}
if (tc->symbol_class == -1)
- as_bad (_("Unrecognized symbol suffix"));
+ as_bad (_("unrecognized symbol suffix"));
}
/* Set the class of a label based on where it is defined. This
@@ -5953,6 +6191,24 @@
}
#endif
+void
+ppc_frag_check (struct frag *fragP)
+{
+ if (!fragP->has_code)
+ return;
+
+ if (ppc_mach() == bfd_mach_ppc_vle)
+ {
+ if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
+ as_bad (_("instruction address is not a multiple of 2"));
+ }
+ else
+ {
+ if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
+ as_bad (_("instruction address is not a multiple of 4"));
+ }
+}
+
/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
rs_align_code frag. */
@@ -5962,7 +6218,14 @@
valueT count = (fragP->fr_next->fr_address
- (fragP->fr_address + fragP->fr_fix));
- if (count != 0 && (count & 3) == 0)
+ if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
+ {
+ char *dest = fragP->fr_literal + fragP->fr_fix;
+
+ fragP->fr_var = 2;
+ md_number_to_chars (dest, 0x4400, 2);
+ }
+ else if (count != 0 && (count & 3) == 0)
{
char *dest = fragP->fr_literal + fragP->fr_fix;
@@ -6117,16 +6380,36 @@
value, and stuff the instruction back again. */
where = fixP->fx_frag->fr_literal + fixP->fx_where;
if (target_big_endian)
- insn = bfd_getb32 ((unsigned char *) where);
+ {
+ if (fixP->fx_size == 4)
+ insn = bfd_getb32 ((unsigned char *) where);
+ else
+ insn = bfd_getb16 ((unsigned char *) where);
+ }
else
- insn = bfd_getl32 ((unsigned char *) where);
+ {
+ if (fixP->fx_size == 4)
+ insn = bfd_getl32 ((unsigned char *) where);
+ else
+ insn = bfd_getl16 ((unsigned char *) where);
+ }
insn = ppc_insert_operand (insn, operand, (offsetT) value,
fixP->tc_fix_data.ppc_cpu,
fixP->fx_file, fixP->fx_line);
if (target_big_endian)
- bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
+ {
+ if (fixP->fx_size == 4)
+ bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
+ else
+ bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
+ }
else
- bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
+ {
+ if (fixP->fx_size == 4)
+ bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
+ else
+ bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
+ }
if (fixP->fx_done)
/* Nothing else to do here. */
@@ -6152,6 +6435,18 @@
fixP->fx_where += 2;
#endif
}
+ else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
+ && operand->bitm == 0x1fe
+ && operand->shift == -1)
+ fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL8;
+ else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
+ && operand->bitm == 0xfffe
+ && operand->shift == 0)
+ fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL15;
+ else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
+ && operand->bitm == 0x1fffffe
+ && operand->shift == 0)
+ fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL24;
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
&& operand->bitm == 0x3fffffc
&& operand->shift == 0)
@@ -6336,6 +6631,91 @@
PPC_HA (value), 2);
break;
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
+ case BFD_RELOC_PPC_VLE_LO16A:
+ {
+ int tval = PPC_VLE_LO16A (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
+ case BFD_RELOC_PPC_VLE_LO16D:
+ {
+ int tval = PPC_VLE_LO16D (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
+ case BFD_RELOC_PPC_VLE_HI16A:
+ {
+ int tval = PPC_VLE_HI16A (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
+ case BFD_RELOC_PPC_VLE_HI16D:
+ {
+ int tval = PPC_VLE_HI16D (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
+ case BFD_RELOC_PPC_VLE_HA16A:
+ {
+ int tval = PPC_VLE_HA16A (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
+ case BFD_RELOC_PPC_VLE_HA16D:
+ {
+ int tval = PPC_VLE_HA16D (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDA21_LO:
+ {
+ int tval = PPC_LO (value);
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | tval), 4);
+ }
+ break;
+
+ case BFD_RELOC_PPC_VLE_SDA21:
+ {
+ valueT oldval = md_chars_to_number (
+ fixP->fx_frag->fr_literal + fixP->fx_where, 4);
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ (oldval | value), 4);
+ }
+ break;
+
#ifdef OBJ_XCOFF
case BFD_RELOC_NONE:
break;
@@ -6474,10 +6854,10 @@
/* This can occur if there is a bug in the input assembler, eg:
".byte <undefined_symbol> - ." */
if (fixP->fx_addsy)
- as_bad (_("Unable to handle reference to symbol %s"),
+ as_bad (_("unable to handle reference to symbol %s"),
S_GET_NAME (fixP->fx_addsy));
else
- as_bad (_("Unable to resolve expression"));
+ as_bad (_("unable to resolve expression"));
fixP->fx_done = 1;
}
else
diff --git a/gas/config/tc-ppc.h b/gas/config/tc-ppc.h
index a11d396..eb19017 100644
--- a/gas/config/tc-ppc.h
+++ b/gas/config/tc-ppc.h
@@ -84,14 +84,11 @@
ppc_handle_align (FRAGP);
extern void ppc_handle_align (struct frag *);
+extern void ppc_frag_check (struct frag *);
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
-#define md_frag_check(FRAGP) \
- if ((FRAGP)->has_code \
- && (((FRAGP)->fr_address + (FRAGP)->insn_addr) & 3) != 0) \
- as_bad_where ((FRAGP)->fr_file, (FRAGP)->fr_line, \
- _("instruction address is not a multiple of 4"));
+#define md_frag_check(FRAGP) ppc_frag_check (FRAGP)
/* Arrange to store the value of ppc_cpu at the site of a fixup
for later use in md_apply_fix. */
diff --git a/gas/config/tc-rx.c b/gas/config/tc-rx.c
index 4fa0f67..3db8fe1 100644
--- a/gas/config/tc-rx.c
+++ b/gas/config/tc-rx.c
@@ -56,6 +56,8 @@
int rx_pid_register;
int rx_gp_register;
+static void rx_fetchalign (int ignore ATTRIBUTE_UNUSED);
+
enum options
{
OPTION_BIG = OPTION_MD_BASE,
@@ -600,6 +602,8 @@
{ "int", cons, 4 },
{ "word", cons, 4 },
+ { "fetchalign", rx_fetchalign, 0 },
+
/* End of list marker. */
{ NULL, NULL, 0 }
};
@@ -648,9 +652,14 @@
char * rx_lex_start;
char * rx_lex_end;
+/* These negative numbers are found in rx_bytesT.n_base for non-opcode
+ md_frags */
+#define RX_NBASE_FETCHALIGN -1
+
typedef struct rx_bytesT
{
char base[4];
+ /* If this is negative, it's a special-purpose frag as per the defines above. */
int n_base;
char ops[8];
int n_ops;
@@ -678,6 +687,31 @@
} rx_bytesT;
static rx_bytesT rx_bytes;
+/* We set n_ops to be "size of next opcode" if the next opcode doesn't relax. */
+static rx_bytesT *fetchalign_bytes = NULL;
+
+static void
+rx_fetchalign (int ignore ATTRIBUTE_UNUSED)
+{
+ char * bytes;
+ fragS * frag_then;
+
+ memset (& rx_bytes, 0, sizeof (rx_bytes));
+ rx_bytes.n_base = RX_NBASE_FETCHALIGN;
+
+ bytes = frag_more (8);
+ frag_then = frag_now;
+ frag_variant (rs_machine_dependent,
+ 0 /* max_chars */,
+ 0 /* var */,
+ 0 /* subtype */,
+ 0 /* symbol */,
+ 0 /* offset */,
+ 0 /* opcode */);
+ frag_then->fr_opcode = bytes;
+ frag_then->fr_subtype = 0;
+ fetchalign_bytes = frag_then->tc_frag_data;
+}
void
rx_relax (int type, int pos)
@@ -933,7 +967,7 @@
void
rx_frag_init (fragS * fragP)
{
- if (rx_bytes.n_relax || rx_bytes.link_relax)
+ if (rx_bytes.n_relax || rx_bytes.link_relax || rx_bytes.n_base < 0)
{
fragP->tc_frag_data = malloc (sizeof (rx_bytesT));
memcpy (fragP->tc_frag_data, & rx_bytes, sizeof (rx_bytesT));
@@ -1049,8 +1083,12 @@
{
bytes = frag_more (rx_bytes.n_base + rx_bytes.n_ops);
frag_then = frag_now;
+ if (fetchalign_bytes)
+ fetchalign_bytes->n_ops = rx_bytes.n_base + rx_bytes.n_ops;
}
+ fetchalign_bytes = NULL;
+
APPEND (base, n_base);
APPEND (ops, n_ops);
@@ -1413,6 +1451,18 @@
return delta;
}
+/* Given a frag FRAGP, return the "next" frag that contains an
+ opcode. Assumes the next opcode is relaxable, and thus rs_machine_dependent. */
+
+static fragS *
+rx_next_opcode (fragS *fragP)
+{
+ do {
+ fragP = fragP->fr_next;
+ } while (fragP && fragP->fr_type != rs_machine_dependent);
+ return fragP;
+}
+
/* Given the new addresses for this relax pass, figure out how big
each opcode must be. We store the total number of bytes needed in
fr_subtype. The return value is the difference between the size
@@ -1437,6 +1487,34 @@
(long) fragP->fr_fix, (long) fragP->fr_var, (long) fragP->fr_offset,
fragP->fr_literal, fragP->fr_opcode, fragP->fr_type, fragP->fr_subtype, stretch);
+ mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal);
+
+ if (fragP->tc_frag_data->n_base == RX_NBASE_FETCHALIGN)
+ {
+ unsigned int next_size;
+ if (fragP->fr_next == NULL)
+ return 0;
+
+ next_size = fragP->tc_frag_data->n_ops;
+ if (next_size == 0)
+ {
+ fragS *n = rx_next_opcode (fragP);
+ next_size = n->fr_subtype;
+ }
+
+ fragP->fr_subtype = (8-(mypc & 7)) & 7;
+ tprintf("subtype %u\n", fragP->fr_subtype);
+ if (fragP->fr_subtype >= next_size)
+ fragP->fr_subtype = 0;
+ tprintf ("\033[34m -> mypc %lu next_size %u new %d old %d delta %d (fetchalign)\033[0m\n",
+ mypc & 7,
+ next_size, fragP->fr_subtype, oldsize, fragP->fr_subtype-oldsize);
+
+ newsize = fragP->fr_subtype;
+
+ return newsize - oldsize;
+ }
+
optype = rx_opcode_type (fragP->fr_opcode);
/* In the one case where we have both a disp and imm relaxation, we want
@@ -1485,7 +1563,6 @@
return newsize - oldsize;
}
- mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal);
if (sym_addr > mypc)
addr0 += stretch;
@@ -1644,13 +1721,29 @@
{
int i;
- printf ("lit %08x opc %08x", (int) fragP->fr_literal, (int) fragP->fr_opcode);
+ printf ("lit 0x%p opc 0x%p", fragP->fr_literal, fragP->fr_opcode);
for (i = 0; i < 10; i++)
printf (" %02x", (unsigned char) (fragP->fr_opcode[i]));
printf ("\n");
}
#endif
+ if (fragP->tc_frag_data->n_base == RX_NBASE_FETCHALIGN)
+ {
+ int count = fragP->fr_subtype;
+ if (count == 0)
+ ;
+ else if (count > BIGGEST_NOP)
+ {
+ op[0] = 0x2e;
+ op[1] = count;
+ }
+ else if (count > 0)
+ {
+ memcpy (op, nops[count], count);
+ }
+ }
+
/* In the one case where we have both a disp and imm relaxation, we want
the imm relaxation here. */
ri = 0;
diff --git a/gas/config/tc-tic4x.c b/gas/config/tc-tic4x.c
index fd6cec7..1764b0b 100644
--- a/gas/config/tc-tic4x.c
+++ b/gas/config/tc-tic4x.c
@@ -43,11 +43,10 @@
o Evaluation of constant floating point expressions (expr.c needs
work!)
- o Support 'abc' constants (that is 0x616263)
-*/
+ o Support 'abc' constants (that is 0x616263). */
-#include "safe-ctype.h"
#include "as.h"
+#include "safe-ctype.h"
#include "opcode/tic4x.h"
#include "subsegs.h"
#include "obstack.h"
diff --git a/gas/config/tc-tic54x.c b/gas/config/tc-tic54x.c
index 99fafe8..d4bd75f 100644
--- a/gas/config/tc-tic54x.c
+++ b/gas/config/tc-tic54x.c
@@ -1,6 +1,6 @@
/* tc-tic54x.c -- Assembly code for the Texas Instruments TMS320C54X
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
- 2009, 2010 Free Software Foundation, Inc.
+ 2009, 2010, 2012 Free Software Foundation, Inc.
Contributed by Timothy Wall (twall@cygnus.com)
This file is part of GAS, the GNU Assembler.
@@ -45,8 +45,8 @@
COFF1 limits section names to 8 characters.
Some of the default behavior changed from COFF1 to COFF2. */
-#include <limits.h>
#include "as.h"
+#include <limits.h>
#include "safe-ctype.h"
#include "sb.h"
#include "macro.h"
diff --git a/gas/config/tc-xgate.c b/gas/config/tc-xgate.c
index 954acdc..29089c9 100644
--- a/gas/config/tc-xgate.c
+++ b/gas/config/tc-xgate.c
@@ -49,7 +49,9 @@
/* This macro has no side-effects. */
#define ENCODE_RELAX(what,length) (((what) << 2) + (length))
-/* what this is */
+/* Each unique opcode name has a handle. That handle may
+ contain pointers to opcodes with the same name but
+ different address modes. */
struct xgate_opcode_handle
{
int number_of_modes;
@@ -283,16 +285,16 @@
struct xgate_opcode_handle *op_handles = 0;
char *prev_op_name = 0;
int handle_enum = 0;
- unsigned int number_of_handle_rows = 0;
+ int number_of_op_handles = 0;
int i, j = 0;
/* Create a local copy of our opcode table
including an extra line for NULL termination. */
xgate_op_table = (struct xgate_opcode *)
- xmalloc ((xgate_num_opcodes + 1) * sizeof (struct xgate_opcode));
+ xmalloc ((xgate_num_opcodes) * sizeof (struct xgate_opcode));
memset (xgate_op_table, 0,
- sizeof(struct xgate_opcode) * (xgate_num_opcodes + 1));
+ sizeof(struct xgate_opcode) * (xgate_num_opcodes));
for (xgate_opcode_ptr = (struct xgate_opcode*) xgate_opcodes, i = 0;
i < xgate_num_opcodes; i++)
@@ -303,50 +305,44 @@
/* Calculate number of handles since this will be
smaller than the raw number of opcodes in the table. */
- for (xgate_opcode_ptr = xgate_op_table; xgate_opcode_ptr->name;
- xgate_opcode_ptr++)
+ prev_op_name = "";
+ for (xgate_opcode_ptr = xgate_op_table, i = 0; i < xgate_num_opcodes;
+ xgate_opcode_ptr++, i++)
{
- if (prev_op_name != 0)
- {
- if (strcmp (prev_op_name, xgate_opcode_ptr->name))
- number_of_handle_rows++;
- }
+ if (strcmp (prev_op_name, xgate_opcode_ptr->name))
+ number_of_op_handles++;
prev_op_name = xgate_opcode_ptr->name;
}
op_handles = (struct xgate_opcode_handle *)
- xmalloc (sizeof(struct xgate_opcode_handle) * (number_of_handle_rows + 1));
+ xmalloc (sizeof(struct xgate_opcode_handle) * (number_of_op_handles));
- /* Insert opcode names into hash table, aliasing duplicates. */
+ /* Insert unique opcode names into hash table, aliasing duplicates. */
xgate_hash = hash_new ();
+ prev_op_name = "";
for (xgate_opcode_ptr = xgate_op_table, i = 0, j = 0; i < xgate_num_opcodes;
- i++, xgate_opcode_ptr++)
+ i++, xgate_opcode_ptr++)
{
- if (strcmp (prev_op_name, xgate_opcode_ptr->name) || i == 0)
- {
- handle_enum = 0;
- if (i)
- j++;
-
- op_handles[j].name = xgate_opcode_ptr->name;
- op_handles[j].opc0[0] = xgate_opcode_ptr;
- }
- else
+ if (!strcmp (prev_op_name, xgate_opcode_ptr->name))
{
handle_enum++;
op_handles[j].opc0[handle_enum] = xgate_opcode_ptr;
}
+ else
+ {
+ handle_enum = 0;
+ if (i)
+ j++;
+ op_handles[j].name = xgate_opcode_ptr->name;
+ op_handles[j].opc0[0] = xgate_opcode_ptr;
+ hash_insert (xgate_hash, (char *) op_handles[j].name,
+ (char *) &(op_handles[j]));
+ }
op_handles[j].number_of_modes = handle_enum;
prev_op_name = op_handles[j].name;
}
- while (op_handles->name)
- {
- hash_insert (xgate_hash, op_handles->name, (char *) op_handles);
- op_handles++;
- }
-
if (flag_print_opcodes == 1)
xgate_print_table ();
}
diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c
index fd6a992..3624cc9 100644
--- a/gas/config/tc-xtensa.c
+++ b/gas/config/tc-xtensa.c
@@ -1,5 +1,5 @@
/* tc-xtensa.c -- Assemble Xtensa instructions.
- Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@@ -19,8 +19,8 @@
the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <limits.h>
#include "as.h"
+#include <limits.h>
#include "sb.h"
#include "safe-ctype.h"
#include "tc-xtensa.h"
diff --git a/gas/configure b/gas/configure
index 9f81627..c3586f0 100755
--- a/gas/configure
+++ b/gas/configure
@@ -11638,6 +11638,9 @@
ac_config_headers="$ac_config_headers config.h:config.in"
+# PR 14072
+
+
# If we are on a DOS filesystem, we must use gdb.ini rather than
# .gdbinit.
case "${host}" in
@@ -12137,9 +12140,9 @@
extra_objects="$extra_objects bfin-parse.o"
fi
- echo ${extra_objects} | grep -s "bfin-lex.o"
+ echo ${extra_objects} | grep -s "bfin-lex-wrapper.o"
if test $? -ne 0 ; then
- extra_objects="$extra_objects bfin-lex.o"
+ extra_objects="$extra_objects bfin-lex-wrapper.o"
fi
;;
@@ -12170,9 +12173,9 @@
extra_objects="$extra_objects itbl-parse.o"
fi
- echo ${extra_objects} | grep -s "itbl-lex.o"
+ echo ${extra_objects} | grep -s "itbl-lex-wrapper.o"
if test $? -ne 0 ; then
- extra_objects="$extra_objects itbl-lex.o"
+ extra_objects="$extra_objects itbl-lex-wrapper.o"
fi
echo ${extra_objects} | grep -s "itbl-ops.o"
@@ -13180,6 +13183,38 @@
done
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether string.h and strings.h may both be included" >&5
+$as_echo_n "checking whether string.h and strings.h may both be included... " >&6; }
+if test "${gcc_cv_header_string+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <string.h>
+#include <strings.h>
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ gcc_cv_header_string=yes
+else
+ gcc_cv_header_string=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_header_string" >&5
+$as_echo "$gcc_cv_header_string" >&6; }
+if test $gcc_cv_header_string = yes; then
+
+$as_echo "#define STRING_WITH_STRINGS 1" >>confdefs.h
+
+fi
+
# Put this here so that autoconf's "cross-compiling" message doesn't confuse
# people who are not cross-compiling but are compiling cross-assemblers.
diff --git a/gas/configure.in b/gas/configure.in
index 618095c..1f16e70 100644
--- a/gas/configure.in
+++ b/gas/configure.in
@@ -58,6 +58,15 @@
# Generate a header file
AC_CONFIG_HEADERS(config.h:config.in)
+# PR 14072
+AH_VERBATIM([00_CONFIG_H_CHECK],
+[/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1])
+
# If we are on a DOS filesystem, we must use gdb.ini rather than
# .gdbinit.
case "${host}" in
@@ -299,9 +308,9 @@
extra_objects="$extra_objects bfin-parse.o"
fi
- echo ${extra_objects} | grep -s "bfin-lex.o"
+ echo ${extra_objects} | grep -s "bfin-lex-wrapper.o"
if test $? -ne 0 ; then
- extra_objects="$extra_objects bfin-lex.o"
+ extra_objects="$extra_objects bfin-lex-wrapper.o"
fi
;;
@@ -332,9 +341,9 @@
extra_objects="$extra_objects itbl-parse.o"
fi
- echo ${extra_objects} | grep -s "itbl-lex.o"
+ echo ${extra_objects} | grep -s "itbl-lex-wrapper.o"
if test $? -ne 0 ; then
- extra_objects="$extra_objects itbl-lex.o"
+ extra_objects="$extra_objects itbl-lex-wrapper.o"
fi
echo ${extra_objects} | grep -s "itbl-ops.o"
@@ -634,6 +643,7 @@
AC_EXEEXT
AC_CHECK_HEADERS(string.h stdlib.h memory.h strings.h unistd.h errno.h sys/types.h limits.h locale.h time.h sys/stat.h)
+ACX_HEADER_STRING
# Put this here so that autoconf's "cross-compiling" message doesn't confuse
# people who are not cross-compiling but are compiling cross-assemblers.
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index 375e513..4893f03 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -38,9 +38,7 @@
DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/Makefile.am \
$(as_TEXINFOS)
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
-am__aclocal_m4_deps = $(top_srcdir)/../bfd/acinclude.m4 \
- $(top_srcdir)/../config/zlib.m4 \
- $(top_srcdir)/../bfd/warning.m4 \
+am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
$(top_srcdir)/../config/depstand.m4 \
$(top_srcdir)/../config/gettext-sister.m4 \
$(top_srcdir)/../config/largefile.m4 \
@@ -51,9 +49,9 @@
$(top_srcdir)/../config/plugins.m4 \
$(top_srcdir)/../config/po.m4 \
$(top_srcdir)/../config/progtest.m4 \
- $(top_srcdir)/../libtool.m4 $(top_srcdir)/../ltoptions.m4 \
- $(top_srcdir)/../ltsugar.m4 $(top_srcdir)/../ltversion.m4 \
- $(top_srcdir)/../lt~obsolete.m4 $(top_srcdir)/acinclude.m4 \
+ $(top_srcdir)/../bfd/acinclude.m4 \
+ $(top_srcdir)/../config/zlib.m4 \
+ $(top_srcdir)/../bfd/warning.m4 $(top_srcdir)/acinclude.m4 \
$(top_srcdir)/configure.in
am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
$(ACLOCAL_M4)
@@ -120,6 +118,7 @@
DATADIRNAME = @DATADIRNAME@
DEFS = @DEFS@
DEPDIR = @DEPDIR@
+DLLTOOL = @DLLTOOL@
DSYMUTIL = @DSYMUTIL@
DUMPBIN = @DUMPBIN@
ECHO_C = @ECHO_C@
@@ -155,6 +154,7 @@
LTLIBOBJS = @LTLIBOBJS@
MAINT = @MAINT@
MAKEINFO = @MAKEINFO@
+MANIFEST_TOOL = @MANIFEST_TOOL@
MKDIR_P = @MKDIR_P@
MKINSTALLDIRS = @MKINSTALLDIRS@
MSGFMT = @MSGFMT@
@@ -191,6 +191,7 @@
abs_srcdir = @abs_srcdir@
abs_top_builddir = @abs_top_builddir@
abs_top_srcdir = @abs_top_srcdir@
+ac_ct_AR = @ac_ct_AR@
ac_ct_CC = @ac_ct_CC@
ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
am__include = @am__include@
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 034cc92..5b5d268 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -369,7 +369,7 @@
@ifset M68HC11
@emph{Target M68HC11 options:}
- [@b{-m68hc11}|@b{-m68hc12}|@b{-m68hcs12}]
+ [@b{-m68hc11}|@b{-m68hc12}|@b{-m68hcs12}|@b{-mm9s12x}|@b{-mm9s12xg}]
[@b{-mshort}|@b{-mlong}]
[@b{-mshort-double}|@b{-mlong-double}]
[@b{--force-long-branches}] [@b{--short-branches}]
@@ -1050,10 +1050,14 @@
@table @gcctabopt
-@item -m68hc11 | -m68hc12 | -m68hcs12
+@item -m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg
Specify what processor is the target. The default is
defined by the configuration option when building the assembler.
+@item --xgate-ramoffset
+Instruct the linker to offset RAM addresses from S12X address space into
+XGATE address space.
+
@item -mshort
Specify to use the 16-bit integer ABI.
@@ -1083,10 +1087,10 @@
Print the syntax of instruction in case of error.
@item --print-opcodes
-print the list of instructions with syntax and then exit.
+Print the list of instructions with syntax and then exit.
@item --generate-example
-print an example of instruction for each possible instruction and then exit.
+Print an example of instruction for each possible instruction and then exit.
This option is only useful for testing @command{@value{AS}}.
@end table
@@ -2481,10 +2485,10 @@
are noted in @ref{Machine Dependencies}.
@end ifset
No symbol may begin with a digit. Case is significant.
-There is no length limit: all characters are significant. Symbols are
-delimited by characters not in that set, or by the beginning of a file
-(since the source program must end with a newline, the end of a file is
-not a possible symbol delimiter). @xref{Symbols}.
+There is no length limit: all characters are significant. Multibyte characters
+are supported. Symbols are delimited by characters not in that set, or by the
+beginning of a file (since the source program must end with a newline, the end
+of a file is not a possible symbol delimiter). @xref{Symbols}.
@cindex length of symbols
@node Statements
@@ -3410,6 +3414,11 @@
Case of letters is significant: @code{foo} is a different symbol name
than @code{Foo}.
+Multibyte characters are supported. To generate a symbol name containing
+multibyte characters enclose it within double quotes and use escape codes. cf
+@xref{Strings}. Generating a multibyte symbol name from a label is not
+currently supported.
+
Each symbol has exactly one name. Each name in an assembly language program
refers to exactly one symbol. You may use that symbol name any number of times
in a program.
@@ -4342,9 +4351,12 @@
aligned bundle boundary. It's an error if the sequence is longer than the
bundle size.
-Bundle-locked sequences do not nest. It's an error if two
-@code{.bundle_lock} directives appear without an intervening
-@code{.bundle_unlock} directive.
+For convenience when using @code{.bundle_lock} and @code{.bundle_unlock}
+inside assembler macros (@pxref{Macro}), bundle-locked sequences may be
+nested. That is, a second @code{.bundle_lock} directive before the next
+@code{.bundle_unlock} directive has no effect except that it must be
+matched by another closing @code{.bundle_unlock} so that there is the
+same number of @code{.bundle_lock} and @code{.bundle_unlock} directives.
@node Byte
@section @code{.byte @var{expressions}}
diff --git a/gas/doc/c-m68hc11.texi b/gas/doc/c-m68hc11.texi
index bebc53e..3d69396 100644
--- a/gas/doc/c-m68hc11.texi
+++ b/gas/doc/c-m68hc11.texi
@@ -1,5 +1,5 @@
@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2003,
-@c 2006, 2011
+@c 2006, 2011, 2012
@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@@ -35,24 +35,40 @@
@cindex @samp{-m68hc11}
@item -m68hc11
-This option switches the assembler in the M68HC11 mode. In this mode,
+This option switches the assembler into the M68HC11 mode. In this mode,
the assembler only accepts 68HC11 operands and mnemonics. It produces
code for the 68HC11.
@cindex @samp{-m68hc12}
@item -m68hc12
-This option switches the assembler in the M68HC12 mode. In this mode,
+This option switches the assembler into the M68HC12 mode. In this mode,
the assembler also accepts 68HC12 operands and mnemonics. It produces
code for the 68HC12. A few 68HC11 instructions are replaced by
some 68HC12 instructions as recommended by Motorola specifications.
@cindex @samp{-m68hcs12}
@item -m68hcs12
-This option switches the assembler in the M68HCS12 mode. This mode is
+This option switches the assembler into the M68HCS12 mode. This mode is
similar to @samp{-m68hc12} but specifies to assemble for the 68HCS12
series. The only difference is on the assembling of the @samp{movb}
and @samp{movw} instruction when a PC-relative operand is used.
+@cindex @samp{-mm9s12x}
+@item -mm9s12x
+This option switches the assembler into the M9S12X mode. This mode is
+similar to @samp{-m68hc12} but specifies to assemble for the S12X
+series which is a superset of the HCS12.
+
+@cindex @samp{-mm9s12xg}
+@item -mm9s12xg
+This option switches the assembler into the XGATE mode for the RISC
+co-processor featured on some S12X-family chips.
+
+@cindex @samp{--xgate-ramoffset}
+@item --xgate-ramoffset
+This option instructs the linker to offset RAM addresses from S12X address
+space into XGATE address space.
+
@cindex @samp{-mshort}
@item -mshort
This option controls the ABI and indicates to use a 16-bit integer ABI.
diff --git a/gas/doc/c-rx.texi b/gas/doc/c-rx.texi
index cb89bd6..5f9239b 100644
--- a/gas/doc/c-rx.texi
+++ b/gas/doc/c-rx.texi
@@ -155,6 +155,16 @@
@cindex RX assembler directive .3byte
Inserts a 3-byte value into the output file at the current location.
+@item .fetchalign
+@cindex assembler directive .fetchalign, RX
+@cindex RX assembler directive .fetchalign
+If the next opcode following this directive spans a fetch line
+boundary (8 byte boundary), the opcode is aligned to that boundary.
+If the next opcode does not span a fetch line, this directive has no
+effect. Note that one or more labels may be between this directive
+and the opcode; those labels are aligned as well. Any inserted bytes
+due to alignment will form a NOP opcode.
+
@end table
@node RX-Float
diff --git a/gas/itbl-lex-wrapper.c b/gas/itbl-lex-wrapper.c
new file mode 100644
index 0000000..0fbd030
--- /dev/null
+++ b/gas/itbl-lex-wrapper.c
@@ -0,0 +1,5 @@
+/* The C source file generated by flex includes stdio.h before any of
+ the C code in itbl-lex.l. Make sure we include sysdep.h first, so
+ that config.h can set the correct values for various things. */
+#include "sysdep.h"
+#include "itbl-lex.c"
diff --git a/gas/read.c b/gas/read.c
index 4ff3313..2b7f4ff 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -40,6 +40,7 @@
#include "obstack.h"
#include "ecoff.h"
#include "dw2gencfi.h"
+#include "wchar.h"
#ifndef TC_START_LABEL
#define TC_START_LABEL(x,y,z) (x == ':')
@@ -232,6 +233,10 @@
we are expecting to see .bundle_unlock. */
static fragS *bundle_lock_frag;
static frchainS *bundle_lock_frchain;
+
+/* This is incremented by .bundle_lock and decremented by .bundle_unlock,
+ to allow nesting. */
+static unsigned int bundle_lock_depth;
#endif
static void do_s_func (int end_p, const char *default_prefix);
@@ -1287,6 +1292,7 @@
_(".bundle_lock with no matching .bundle_unlock"));
bundle_lock_frag = NULL;
bundle_lock_frchain = NULL;
+ bundle_lock_depth = 0;
}
#endif
@@ -1583,13 +1589,106 @@
macro_set_alternate (on);
}
+/* Read a symbol name from input_line_pointer.
+
+ Stores the symbol name in a buffer and returns a pointer to this buffer.
+ The buffer is xalloc'ed. It is the caller's responsibility to free
+ this buffer.
+
+ The name is not left in the i_l_p buffer as it may need processing
+ to handle escape characters.
+
+ Advances i_l_p to the next non-whitespace character.
+
+ If a symbol name could not be read, the routine issues an error
+ messages, skips to the end of the line and returns NULL. */
+
+static char *
+read_symbol_name (void)
+{
+ char * name;
+ char * start;
+ char c;
+
+ c = *input_line_pointer++;
+
+ if (c == '"')
+ {
+#define SYM_NAME_CHUNK_LEN 128
+ ptrdiff_t len = SYM_NAME_CHUNK_LEN;
+ char * name_end;
+ unsigned int C;
+
+ start = name = xmalloc (len + 1);
+
+ name_end = name + SYM_NAME_CHUNK_LEN;
+
+ while (is_a_char (C = next_char_of_string ()))
+ {
+ if (name >= name_end)
+ {
+ ptrdiff_t sofar;
+
+ sofar = name - start;
+ len += SYM_NAME_CHUNK_LEN;
+ start = xrealloc (start, len + 1);
+ name_end = start + len;
+ name = start + sofar;
+ }
+
+ *name++ = (char) C;
+ }
+ *name = 0;
+
+ /* Since quoted symbol names can contain non-ASCII characters,
+ check the string and warn if it cannot be recognised by the
+ current character set. */
+ if (mbstowcs (NULL, name, len) == (size_t) -1)
+ as_warn (_("symbol name not recognised in the current locale"));
+ }
+ else if (is_name_beginner (c) || c == '\001')
+ {
+ ptrdiff_t len;
+
+ name = input_line_pointer - 1;
+
+ /* We accept \001 in a name in case this is
+ being called with a constructed string. */
+ while (is_part_of_name (c = *input_line_pointer++)
+ || c == '\001')
+ ;
+
+ len = (input_line_pointer - name) - 1;
+ start = xmalloc (len + 1);
+
+ memcpy (start, name, len);
+ start[len] = 0;
+
+ /* Skip a name ender char if one is present. */
+ if (! is_name_ender (c))
+ --input_line_pointer;
+ }
+ else
+ name = start = NULL;
+
+ if (name == start)
+ {
+ as_bad (_("expected symbol name"));
+ ignore_rest_of_line ();
+ return NULL;
+ }
+
+ SKIP_WHITESPACE ();
+
+ return start;
+}
+
+
symbolS *
s_comm_internal (int param,
symbolS *(*comm_parse_extra) (int, symbolS *, addressT))
{
char *name;
- char c;
- char *p;
offsetT temp, size;
symbolS *symbolP = NULL;
char *stop = NULL;
@@ -1599,20 +1698,8 @@
if (flag_mri)
stop = mri_comment_field (&stopc);
- name = input_line_pointer;
- c = get_symbol_end ();
- /* Just after name is now '\0'. */
- p = input_line_pointer;
- *p = c;
-
- if (name == p)
- {
- as_bad (_("expected symbol name"));
- ignore_rest_of_line ();
- goto out;
- }
-
- SKIP_WHITESPACE ();
+ if ((name = read_symbol_name ()) == NULL)
+ goto out;
/* Accept an optional comma after the name. The comma used to be
required, but Irix 5 cc does not generate it for .lcomm. */
@@ -1635,7 +1722,6 @@
goto out;
}
- *p = 0;
symbolP = symbol_find_or_make (name);
if ((S_IS_DEFINED (symbolP) || symbol_equated_p (symbolP))
&& !S_IS_COMMON (symbolP))
@@ -1644,7 +1730,6 @@
{
symbolP = NULL;
as_bad (_("symbol `%s' is already defined"), name);
- *p = c;
ignore_rest_of_line ();
goto out;
}
@@ -1662,7 +1747,6 @@
as_warn (_("size of \"%s\" is already %ld; not changing to %ld"),
name, (long) size, (long) temp);
- *p = c;
if (comm_parse_extra != NULL)
symbolP = (*comm_parse_extra) (param, symbolP, size);
else
@@ -1676,6 +1760,8 @@
out:
if (flag_mri)
mri_comment_end (stop, stopc);
+ if (name != NULL)
+ free (name);
return symbolP;
}
@@ -2179,12 +2265,12 @@
do
{
- name = input_line_pointer;
- c = get_symbol_end ();
+ if ((name = read_symbol_name ()) == NULL)
+ return;
+
symbolP = symbol_find_or_make (name);
S_SET_EXTERNAL (symbolP);
- *input_line_pointer = c;
SKIP_WHITESPACE ();
c = *input_line_pointer;
if (c == ',')
@@ -2194,6 +2280,8 @@
if (is_end_of_line[(unsigned char) *input_line_pointer])
c = '\n';
}
+
+ free (name);
}
while (c == ',');
@@ -2580,33 +2668,17 @@
s_lsym (int ignore ATTRIBUTE_UNUSED)
{
char *name;
- char c;
- char *p;
expressionS exp;
symbolS *symbolP;
/* We permit ANY defined expression: BSD4.2 demands constants. */
- name = input_line_pointer;
- c = get_symbol_end ();
- p = input_line_pointer;
- *p = c;
-
- if (name == p)
- {
- as_bad (_("expected symbol name"));
- ignore_rest_of_line ();
- return;
- }
-
- SKIP_WHITESPACE ();
+ if ((name = read_symbol_name ()) == NULL)
+ return;
if (*input_line_pointer != ',')
{
- *p = 0;
as_bad (_("expected comma after \"%s\""), name);
- *p = c;
- ignore_rest_of_line ();
- return;
+ goto err_out;
}
input_line_pointer++;
@@ -2616,11 +2688,9 @@
&& exp.X_op != O_register)
{
as_bad (_("bad expression"));
- ignore_rest_of_line ();
- return;
+ goto err_out;
}
- *p = 0;
symbolP = symbol_find_or_make (name);
if (S_GET_SEGMENT (symbolP) == undefined_section)
@@ -2638,8 +2708,14 @@
as_bad (_("symbol `%s' is already defined"), name);
}
- *p = c;
demand_empty_rest_of_line ();
+ free (name);
+ return;
+
+ err_out:
+ ignore_rest_of_line ();
+ free (name);
+ return;
}
/* Read a line into an sb. Returns the character that ended the line
@@ -3283,42 +3359,25 @@
s_set (int equiv)
{
char *name;
- char delim;
- char *end_name;
/* Especial apologies for the random logic:
this just grew, and could be parsed much more simply!
Dean in haste. */
- name = input_line_pointer;
- delim = get_symbol_end ();
- end_name = input_line_pointer;
- *end_name = delim;
-
- if (name == end_name)
- {
- as_bad (_("expected symbol name"));
- ignore_rest_of_line ();
- return;
- }
-
- SKIP_WHITESPACE ();
+ if ((name = read_symbol_name ()) == NULL)
+ return;
if (*input_line_pointer != ',')
{
- *end_name = 0;
as_bad (_("expected comma after \"%s\""), name);
- *end_name = delim;
ignore_rest_of_line ();
+ free (name);
return;
}
input_line_pointer++;
- *end_name = 0;
-
assign_symbol (name, equiv);
- *end_name = delim;
-
demand_empty_rest_of_line ();
+ free (name);
}
void
@@ -3622,23 +3681,12 @@
s_weakref (int ignore ATTRIBUTE_UNUSED)
{
char *name;
- char delim;
- char *end_name;
symbolS *symbolP;
symbolS *symbolP2;
expressionS exp;
- name = input_line_pointer;
- delim = get_symbol_end ();
- end_name = input_line_pointer;
-
- if (name == end_name)
- {
- as_bad (_("expected symbol name"));
- *end_name = delim;
- ignore_rest_of_line ();
- return;
- }
+ if ((name = read_symbol_name ()) == NULL)
+ return;
symbolP = symbol_find_or_make (name);
@@ -3647,41 +3695,27 @@
if (!S_IS_VOLATILE (symbolP))
{
as_bad (_("symbol `%s' is already defined"), name);
- *end_name = delim;
- ignore_rest_of_line ();
- return;
+ goto err_out;
}
symbolP = symbol_clone (symbolP, 1);
S_CLEAR_VOLATILE (symbolP);
}
- *end_name = delim;
-
SKIP_WHITESPACE ();
if (*input_line_pointer != ',')
{
- *end_name = 0;
as_bad (_("expected comma after \"%s\""), name);
- *end_name = delim;
- ignore_rest_of_line ();
- return;
+ goto err_out;
}
input_line_pointer++;
SKIP_WHITESPACE ();
+ free (name);
- name = input_line_pointer;
- delim = get_symbol_end ();
- end_name = input_line_pointer;
-
- if (name == end_name)
- {
- as_bad (_("expected symbol name"));
- ignore_rest_of_line ();
- return;
- }
+ if ((name = read_symbol_name ()) == NULL)
+ return;
if ((symbolP2 = symbol_find_noref (name, 1)) == NULL
&& (symbolP2 = md_undefined_symbol (name)) == NULL)
@@ -3712,6 +3746,7 @@
while (symp != symbolP)
{
char *old_loop = loop;
+
symp = symbol_get_value_expression (symp)->X_add_symbol;
loop = concat (loop, " => ", S_GET_NAME (symp),
(const char *) NULL);
@@ -3722,8 +3757,7 @@
S_GET_NAME (symbolP), loop);
free (loop);
-
- *end_name = delim;
+ free (name);
ignore_rest_of_line ();
return;
}
@@ -3734,8 +3768,6 @@
/* symbolP2 = symp; */
}
- *end_name = delim;
-
memset (&exp, 0, sizeof (exp));
exp.X_op = O_symbol;
exp.X_add_symbol = symbolP2;
@@ -3746,6 +3778,13 @@
S_SET_WEAKREFR (symbolP);
demand_empty_rest_of_line ();
+ free (name);
+ return;
+
+ err_out:
+ ignore_rest_of_line ();
+ free (name);
+ return;
}
@@ -6062,14 +6101,12 @@
return;
}
- if (bundle_lock_frag != NULL)
+ if (bundle_lock_depth == 0)
{
- as_bad (_("second .bundle_lock without .bundle_unlock"));
- return;
+ bundle_lock_frchain = frchain_now;
+ bundle_lock_frag = start_bundle ();
}
-
- bundle_lock_frchain = frchain_now;
- bundle_lock_frag = start_bundle ();
+ ++bundle_lock_depth;
}
void
@@ -6087,6 +6124,10 @@
gas_assert (bundle_align_p2 > 0);
+ gas_assert (bundle_lock_depth > 0);
+ if (--bundle_lock_depth > 0)
+ return;
+
size = pending_bundle_size (bundle_lock_frag);
if (size > (1U << bundle_align_p2))
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0fd88fe..78bec37 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,202 @@
+2012-05-29 Roland McGrath <mcgrathr@google.com>
+
+ * gas/i386/bundle-bad.s: Remove nested .bundle_lock case.
+ * gas/i386/bundle-bad.l: Remove expected error line.
+ * gas/i386/bundle-lock.s: Add nested .bundle_lock case.
+ * gas/i386/bundle-lock.d: Update expectations.
+
+2012-05-28 Nick Clifton <nickc@redhat.com>
+
+ * gas/elf/syms.s: New test - checks the generation of multibyte
+ symbol names.
+ * gas/elf/syms.d: New file - expected readelf output.
+ * gas/elf/elf.exp: Add syms.
+
+2012-05-25 Alan Modra <amodra@gmail.com>
+
+ * gas/lns/lns-big-delta.s: Add nops.
+ * gas/lns/lns-big-delta.d: Update.
+
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * gas/tic6x/unwind-1.d: Update for readelf changes.
+ * gas/tic6x/unwind-2.d: Likewise.
+ * gas/tic6x/unwind-3.d: Likewise.
+
+2012-05-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/all/weakref1.d: Expect addend as signed.
+ * gas/arm/pic_vxworks.d: Likewise.
+ * gas/arm/wince.d: Likewise.
+ * gas/h8300/h8300.exp: Likewise.
+ * gas/i386/sub.d: Likewise.
+ * gas/mips/ecoff@ld.d: Likewise.
+ * gas/mips/ecoff@sd.d: Likewise.
+ * gas/mips/l_d-n32.d: Likewise.
+ * gas/mips/l_d-n64.d: Likewise.
+ * gas/mips/l_d.d: Likewise.
+ * gas/mips/ld-n32.d: Likewise.
+ * gas/mips/ld-n64.d: Likewise.
+ * gas/mips/ld.d: Likewise.
+ * gas/mips/mips1@l_d.d: Likewise.
+ * gas/mips/mips1@ld-forward.d: Likewise.
+ * gas/mips/mips1@ld.d: Likewise.
+ * gas/mips/mips1@s_d.d: Likewise.
+ * gas/mips/s_d-n32.d: Likewise.
+ * gas/mips/s_d-n64.d: Likewise.
+ * gas/mips/s_d.d: Likewise.
+ * gas/mips/sd-n32.d: Likewise.
+ * gas/mips/sd-n64.d: Likewise.
+ * gas/mips/sd.d: Likewise.
+ * gas/mmix/bz-c.d: Likewise.
+ * gas/mmix/geta-c.d: Likewise.
+ * gas/mmix/jump-c.d: Likewise.
+ * gas/mmix/pushj-c.d: Likewise.
+ * gas/mmix/pushj-cs.d: Likewise.
+ * gas/mmix/reloc16-n.d: Likewise.
+ * gas/mmix/reloc16-r.d: Likewise.
+ * gas/mmix/reloc16.d: Likewise.
+ * gas/mmix/reloc8-r.d: Likewise.
+ * gas/mmix/reloc8.d: Likewise.
+ * gas/mmix/relocxrn.d: Likewise.
+ * gas/sh/sh64/case-1.d: Likewise.
+ * gas/sh/sh64/mix-1.d: Likewise.
+ * gas/sh/sh64/pt32-1.d: Likewise.
+ * gas/sh/sh64/pt64-1.d: Likewise.
+ * gas/sh/sh64/pt64-32-2.d: Likewise.
+ * gas/sh/sh64/rel32-2.d: Likewise.
+ * gas/sh/sh64/rel32-4.d: Likewise.
+ * gas/sh/sh64/rel64-2.d: Likewise.
+ * gas/sh/sh64/rel64-4.d: Likewise.
+ * gas/tic6x/data-reloc.d: Likewise.
+ * gas/tic6x/pcr-relocs.d: Likewise.
+ * gas/xstormy16/allinsn.d: Likewise.
+ * gas/xstormy16/reloc-1.d: Likewise.
+ * gas/xstormy16/reloc-2.d: Likewise.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * gas/elf/dwarf2-1.d: Update.
+ * gas/elf/dwarf2-2.d: Update.
+ * gas/i386/dw2-compress-1.d: Update.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * gas/ppc/vle.d: Pass -a32 to assembler.
+ * gas/ppc/vle-reloc.d: Likewise.
+ * gas/ppc/vle-simple-1.d: Likewise, also match wider addresses.
+ * gas/ppc/vle-simple-2.d: Likewise.
+ * gas/ppc/vle-simple-3.d: Likewise.
+ * gas/ppc/vle-simple-4.d: Likewise.
+ * gas/ppc/vle-simple-5.d: Likewise.
+ * gas/ppc/vle-simple-6.d: Likewise.
+
+2012-05-16 Meador Inge <meadori@codesourcery.com>
+
+ * gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to
+ PUSH/POP {reg} any longer. Some new test cases have been added as well.
+ * gas/arm/stm-ldm.s: Likewise.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * gas/m68hc11/insns9s12x.s: New
+ * gas/m68hc11/insns9s12x.d: New
+ * gas/m68hc11/hexprefix.s: New
+ * gas/m68hc11/hexprefix.d: New
+ * gas/m68hc11/9s12x-exg-sex-tfr.s: New
+ * gas/m68hc11/9s12x-exg-sex-tfr.d: New
+ * gas/m68hc11/insns9s12xg.s: New
+ * gas/m68hc11/insns9s12xg.d: New
+ * gas/m68hc11/9s12x-mov.s: New
+ * gas/m68hc11/9s12x-mov.d: New
+ * gas/m68hc11/m68hc11.exp: Updated
+ * gas/m68hc11/*.d: Brought in line with changed objdump output.
+ * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
+ * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+ Rhonda Wittels <rhonda@codesourcery.com>
+
+ * gas/ppc/ppc.exp: Run new tests.
+ * gas/ppc/vle-reloc.d: New test.
+ * gas/ppc/vle-reloc.s: New test.
+ * gas/ppc/vle-simple-1.d: New test.
+ * gas/ppc/vle-simple-1.s: New test.
+ * gas/ppc/vle-simple-2.d: New test.
+ * gas/ppc/vle-simple-2.s: New test.
+ * gas/ppc/vle-simple-3.d: New test.
+ * gas/ppc/vle-simple-3.s: New test.
+ * gas/ppc/vle-simple-4.d: New test.
+ * gas/ppc/vle-simple-4.s: New test.
+ * gas/ppc/vle-simple-5.d: New test.
+ * gas/ppc/vle-simple-5.s: New test.
+ * gas/ppc/vle-simple-6.d: New test.
+ * gas/ppc/vle-simple-6.s: New test.
+ * gas/ppc/vle.d: New test.
+ * gas/ppc/vle.s: New test.
+
+2012-05-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/cris/rd-pic-1.d: Expect addend as signed.
+ * gas/cris/rd-tls-1.d: Likewise.
+ * gas/cris/rd-tls-2.d: Likewise.
+
+2012-05-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/all/fwdexp.d: Expect addend as signed.
+ * gas/alpha/elf-reloc-1.d: Likewise.
+ * gas/i386/mixed-mode-reloc64.d: Likewise.
+ * gas/i386/reloc64.d: Likewise.
+ * gas/i386/ilp32/mixed-mode-reloc64.d: Expect addend as signed.
+ * gas/i386/ilp32/reloc64.d: Likewise.
+ * gas/ia64/pcrel.d: Likewise.
+ * gas/mips/branch-misc-2-64.d: Likewise.
+ * gas/mips/branch-misc-2pic-64.d: Likewise.
+ * gas/mips/branch-misc-4-64.d: Likewise.
+ * gas/mips/ldstla-n64-sym32.d: Likewise.
+ * gas/mips/micromips@branch-misc-2-64.d: Likewise.
+ * gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
+ * gas/mips/micromips@branch-misc-4-64.d: Likewise.
+ * gas/mips/mips16-hilo-n32.d: Likewise.
+ * gas/ppc/astest.d: Likewise.
+ * gas/ppc/astest2.d: Likewise.
+ * gas/ppc/astest2_64.d: Likewise.
+ * gas/ppc/astest64.d: Likewise.
+ * gas/ppc/test1elf32.d: Likewise.
+ * gas/ppc/test1elf64.d: Likewise.
+ * gas/sparc/reloc64.d: Likewise.
+
+2012-05-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/mips/elf-rel10.d: Updated.
+ * gas/mips/elf-rel22.d: Likewise.
+ * gas/mmix/comment-1.d: Likewise.
+
+2012-05-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/ilp32/ilp32.exp: Don't run reloc64-inval.
+
+ * gas/i386/ilp32/reloc64.s: Add test for -4294967295 addend.
+ * gas/i386/ilp32/reloc64.d: Updated.
+
+ * gas/i386/ilp32/reloc64-inval.l: Removed.
+ * gas/i386/ilp32/reloc64-inval.s: Likewise.
+
+2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/ilp32/ilp32.exp: Run reloc64-inval.
+
+ * gas/i386/ilp32/reloc64.s: Add tests for ".quad".
+ * gas/i386/ilp32/reloc64.d: Updated.
+
+ * gas/i386/ilp32/reloc64-inval.l: New file.
+ * gas/i386/ilp32/reloc64-inval.s: Likewise.
+
+2012-05-08 Alan Modra <amodra@gmail.com>
+
+ * lib/gas-defs.exp (run_dump_test): Don't set LC_ALL here.
+
2012-05-06 Arnold Metselaar <arnold_m@operamail.com>
* gas/z80/jr-forwf.s: New file, adapted from z8k version.
diff --git a/gas/testsuite/gas/all/weakref1.d b/gas/testsuite/gas/all/weakref1.d
index b44d1fc..d116707 100644
--- a/gas/testsuite/gas/all/weakref1.d
+++ b/gas/testsuite/gas/all/weakref1.d
@@ -89,8 +89,8 @@
[0-9a-f]+ [^ ]* +(ld3|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
[0-9a-f]+ [^ ]* +(ld4|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
[0-9a-f]+ [^ ]* +ud5
-[0-9a-f]+ [^ ]* +(gd6|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
-[0-9a-f]+ [^ ]* +(gd7|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
+[0-9a-f]+ [^ ]* +(gd6|\.text|\$CODE\$)((\+|-)0x[0-9a-f]+)?
+[0-9a-f]+ [^ ]* +(gd7|\.text|\$CODE\$)((\+|-)0x[0-9a-f]+)?
[0-9a-f]+ [^ ]* +(ld8|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
[0-9a-f]+ [^ ]* +(ld8|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
[0-9a-f]+ [^ ]* +(ld9|\.text|\$CODE\$)(\+0x[0-9a-f]+)?
diff --git a/gas/testsuite/gas/arm/pic_vxworks.d b/gas/testsuite/gas/arm/pic_vxworks.d
index f7db8aa..6b0f3ed 100644
--- a/gas/testsuite/gas/arm/pic_vxworks.d
+++ b/gas/testsuite/gas/arm/pic_vxworks.d
@@ -9,9 +9,9 @@
Disassembly of section .text:
00+0 <[^>]*> eb000000 bl .*
- 0: R_ARM_PC24 foo\+0xfffffff8
+ 0: R_ARM_PC24 foo-0x8
00+4 <[^>]*> eb000000 bl .*
- 4: R_ARM_PLT32 foo\+0xfffffff8
+ 4: R_ARM_PLT32 foo-0x8
\.\.\.
8: R_ARM_ABS32 sym
c: R_ARM_GOT32 sym
diff --git a/gas/testsuite/gas/arm/stm-ldm.d b/gas/testsuite/gas/arm/stm-ldm.d
index 564b8bc..3d940a5 100644
--- a/gas/testsuite/gas/arm/stm-ldm.d
+++ b/gas/testsuite/gas/arm/stm-ldm.d
@@ -1,14 +1,43 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: STM and LDM
+#warning: writeback of base register when in register list is UNPREDICTABLE
# Test the `STM*' and `LDM*' instructions
.*: +file format .*arm.*
Disassembly of section .text:
-0+000 <.*> e92d0001 push {r0}
-0+004 <.*> e92d000e push {r1, r2, r3}
-0+008 <.*> e92d0200 push {r9}
-0+00c <.*> e8bd0200 pop {r9}
-0+010 <.*> e8bd000e pop {r1, r2, r3}
-0+014 <.*> e8bd0001 pop {r0}
+0+000 <.*> e92d0001 stmfd sp!, {r0}
+0+004 <.*> e92d0002 stmfd sp!, {r1}
+0+008 <.*> e92d0004 stmfd sp!, {r2}
+0+00c <.*> e92d0008 stmfd sp!, {r3}
+0+010 <.*> e92d0010 stmfd sp!, {r4}
+0+014 <.*> e92d0020 stmfd sp!, {r5}
+0+018 <.*> e92d0040 stmfd sp!, {r6}
+0+01c <.*> e92d0080 stmfd sp!, {r7}
+0+020 <.*> e92d0100 stmfd sp!, {r8}
+0+024 <.*> e92d0200 stmfd sp!, {r9}
+0+028 <.*> e92d0400 stmfd sp!, {sl}
+0+02c <.*> e92d0800 stmfd sp!, {fp}
+0+030 <.*> e92d1000 stmfd sp!, {ip}
+0+034 <.*> e92d2000 stmfd sp!, {sp}
+0+038 <.*> e92d4000 stmfd sp!, {lr}
+0+03c <.*> e92d8000 stmfd sp!, {pc}
+0+040 <.*> e92d000e push {r1, r2, r3}
+0+044 <.*> e8bd000e pop {r1, r2, r3}
+0+048 <.*> e8bd0001 ldmfd sp!, {r0}
+0+04c <.*> e8bd0002 ldmfd sp!, {r1}
+0+050 <.*> e8bd0004 ldmfd sp!, {r2}
+0+054 <.*> e8bd0008 ldmfd sp!, {r3}
+0+058 <.*> e8bd0010 ldmfd sp!, {r4}
+0+05c <.*> e8bd0020 ldmfd sp!, {r5}
+0+060 <.*> e8bd0040 ldmfd sp!, {r6}
+0+064 <.*> e8bd0080 ldmfd sp!, {r7}
+0+068 <.*> e8bd0100 ldmfd sp!, {r8}
+0+06c <.*> e8bd0200 ldmfd sp!, {r9}
+0+070 <.*> e8bd0400 ldmfd sp!, {sl}
+0+074 <.*> e8bd0800 ldmfd sp!, {fp}
+0+078 <.*> e8bd1000 ldmfd sp!, {ip}
+0+07c <.*> e8bd2000 ldmfd sp!, {sp}
+0+080 <.*> e8bd4000 ldmfd sp!, {lr}
+0+084 <.*> e8bd8000 ldmfd sp!, {pc}
diff --git a/gas/testsuite/gas/arm/stm-ldm.s b/gas/testsuite/gas/arm/stm-ldm.s
index 77bbfbb..d35179d 100644
--- a/gas/testsuite/gas/arm/stm-ldm.s
+++ b/gas/testsuite/gas/arm/stm-ldm.s
@@ -1,8 +1,36 @@
.text
.syntax unified
stmfd sp!, {r0}
- stmfd sp!, {r1, r2, r3}
+ stmfd sp!, {r1}
+ stmfd sp!, {r2}
+ stmfd sp!, {r3}
+ stmfd sp!, {r4}
+ stmfd sp!, {r5}
+ stmfd sp!, {r6}
+ stmfd sp!, {r7}
+ stmfd sp!, {r8}
stmfd sp!, {r9}
- ldmia sp!, {r9}
+ stmfd sp!, {sl}
+ stmfd sp!, {fp}
+ stmfd sp!, {ip}
+ stmfd sp!, {sp}
+ stmfd sp!, {lr}
+ stmfd sp!, {pc}
+ stmfd sp!, {r1, r2, r3}
ldmia sp!, {r1, r2, r3}
ldmia sp!, {r0}
+ ldmia sp!, {r1}
+ ldmia sp!, {r2}
+ ldmia sp!, {r3}
+ ldmia sp!, {r4}
+ ldmia sp!, {r5}
+ ldmia sp!, {r6}
+ ldmia sp!, {r7}
+ ldmia sp!, {r8}
+ ldmia sp!, {r9}
+ ldmia sp!, {sl}
+ ldmia sp!, {fp}
+ ldmia sp!, {ip}
+ ldmia sp!, {sp}
+ ldmia sp!, {lr}
+ ldmia sp!, {pc}
diff --git a/gas/testsuite/gas/arm/wince.d b/gas/testsuite/gas/arm/wince.d
index 4f6535a..3d116bc 100644
--- a/gas/testsuite/gas/arm/wince.d
+++ b/gas/testsuite/gas/arm/wince.d
@@ -15,11 +15,11 @@
0+008 <global_sym\+0x4> e1a00000 nop ; \(mov r0, r0\)
0+00c <global_sym\+0x8> e1a00000 nop ; \(mov r0, r0\)
0+010 <global_sym\+0xc> eafffffb b f+ff8 <global_sym\+0xf+ff4>
- 10: ARM_26D global_sym\+0xf+ffc
+ 10: ARM_26D global_sym-0x4
0+014 <global_sym\+0x10> ebfffffa bl f+ff4 <global_sym\+0xf+ff0>
- 14: ARM_26D global_sym\+0xf+ffc
+ 14: ARM_26D global_sym-0x4
0+018 <global_sym\+0x14> 0afffff9 beq f+ff0 <global_sym\+0xf+fec>
- 18: ARM_26D global_sym\+0xf+ffc
+ 18: ARM_26D global_sym-0x4
0+01c <global_sym\+0x18> eafffff8 b 0+004 <global_sym>
0+020 <global_sym\+0x1c> ebfffff7 bl 0+004 <global_sym>
0+024 <global_sym\+0x20> 0afffff6 beq 0+004 <global_sym>
diff --git a/gas/testsuite/gas/cris/rd-pic-1.d b/gas/testsuite/gas/cris/rd-pic-1.d
index ce8ebc9..aab93a5 100644
--- a/gas/testsuite/gas/cris/rd-pic-1.d
+++ b/gas/testsuite/gas/cris/rd-pic-1.d
@@ -28,31 +28,31 @@
[ ]+3a:[ ]+af9e 0000 0000[ ]+sub\.d 0 <start>,\$?r9
[ ]+3c:[ ]+R_CRIS_32_GOTREL extsym4\+0x2a
[ ]+40:[ ]+af3e 0000 0000[ ]+sub\.d 0 <start>,\$?r3
-[ ]+42:[ ]+R_CRIS_32_GOTREL extsym4\+0x[f]+fffffa0
+[ ]+42:[ ]+R_CRIS_32_GOTREL extsym4-0x60
[ ]+46:[ ]+6fad 0000 0000 287a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r7,\$?r8
[ ]+48:[ ]+R_CRIS_32_GOT extsym3\+0x38
[ ]+4e:[ ]+6f5d 0000 0000 611a[ ]+move\.d \[\$?r5\+0 <start>\],\$?r1
[ ]+50:[ ]+R_CRIS_32_GOT extsym6\+0xa
[ ]+56:[ ]+6fad 0000 0000 284a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r4,\$?r8
-[ ]+58:[ ]+R_CRIS_32_GOT extsym3\+0x[f]+ffffdd0
+[ ]+58:[ ]+R_CRIS_32_GOT extsym3-0x230
[ ]+5e:[ ]+6f5d 0000 0000 6cca[ ]+move\.d \[\$?r5\+0 <start>\],\$?r12
-[ ]+60:[ ]+R_CRIS_32_GOT extsym6\+0x[f]+fffff92
+[ ]+60:[ ]+R_CRIS_32_GOT extsym6-0x6e
[ ]+66:[ ]+6f5d 0000 0000 69ce[ ]+move\.d \[\$?r9=\$?r5\+0 <start>\],\$?r12
-[ ]+68:[ ]+R_CRIS_32_GOT extsym6\+0x[f]+fffff24
+[ ]+68:[ ]+R_CRIS_32_GOT extsym6-0xdc
[ ]+6e:[ ]+6f3d 0000 0000 67de[ ]+move\.d \[\$?r7=\$?r3\+0 <start>\],\$?r13
-[ ]+70:[ ]+R_CRIS_32_GOTREL extsym10\+0x[f]+ffffeb6
+[ ]+70:[ ]+R_CRIS_32_GOTREL extsym10-0x14a
[ ]+76:[ ]+6f5e 0000 0000[ ]+move\.d 0 <start>,\$?r5
[ ]+78:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0x4
[ ]+7c:[ ]+6f9e 0000 0000[ ]+move\.d 0 <start>,\$?r9
-[ ]+7e:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0x[f]+fffffd8
+[ ]+7e:[ ]+R_CRIS_32_PLT_PCREL extsym7-0x28
[ ]+82:[ ]+6f5e 0000 0000[ ]+move\.d 0 <start>,\$?r5
[ ]+84:[ ]+R_CRIS_32_PLT_GOTREL extsym11\+0x10
[ ]+88:[ ]+6f9e 0000 0000[ ]+move\.d 0 <start>,\$?r9
-[ ]+8a:[ ]+R_CRIS_32_PLT_GOTREL extsym12\+0x[f]+fffffc4
+[ ]+8a:[ ]+R_CRIS_32_PLT_GOTREL extsym12-0x3c
[ ]+8e:[ ]+5fcd 0000 a89a[ ]+sub\.d \[\$?r12\+0\],\$?r9,\$?r8
-[ ]+90:[ ]+R_CRIS_16_GOT extsym3\+0x[f]+fffff64
+[ ]+90:[ ]+R_CRIS_16_GOT extsym3-0x9c
[ ]+94:[ ]+5fbd 0000 699a[ ]+move\.d \[\$?r11\+0\],\$?r9
-[ ]+96:[ ]+R_CRIS_16_GOTPLT extsym14\+0x[f]+fffff00
+[ ]+96:[ ]+R_CRIS_16_GOTPLT extsym14-0x100
[ ]+9a:[ ]+6fad 0000 0000 287a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r7,\$?r8
[ ]+9c:[ ]+R_CRIS_32_GOTPLT extsym3\+0x38
[ ]+\.\.\.
diff --git a/gas/testsuite/gas/cris/rd-tls-1.d b/gas/testsuite/gas/cris/rd-tls-1.d
index c7d6b65..aec9c50 100644
--- a/gas/testsuite/gas/cris/rd-tls-1.d
+++ b/gas/testsuite/gas/cris/rd-tls-1.d
@@ -18,11 +18,11 @@
[ ]+18:[ ]+af9e 0000 0000[ ]+sub\.d 0 <start>,\$?r9
[ ]+1a:[ ]+R_CRIS_32_GD extsym4\+0x2a
[ ]+1e:[ ]+af3e 0000 0000[ ]+sub\.d 0 <start>,\$?r3
-[ ]+20:[ ]+R_CRIS_32_GD extsym4\+0xffffffa0
+[ ]+20:[ ]+R_CRIS_32_GD extsym4-0x60
[ ]+24:[ ]+6f3d 0000 0000 67de[ ]+move\.d \[\$?r7=\$?r3\+0 <start>\],\$?r13
-[ ]+26:[ ]+R_CRIS_32_GD extsym10\+0xfffffeb6
+[ ]+26:[ ]+R_CRIS_32_GD extsym10-0x14a
[ ]+2c:[ ]+5fbd 0000 699a[ ]+move\.d \[\$?r11\+0\],\$?r9
-[ ]+2e:[ ]+R_CRIS_16_TPREL extsym14\+0xffffff00
+[ ]+2e:[ ]+R_CRIS_16_TPREL extsym14-0x100
[ ]+32:[ ]+6fad 0000 0000 287a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r7,\$?r8
[ ]+34:[ ]+R_CRIS_32_TPREL extsym3\+0x38
[ ]+3a:[ ]+7f0d 0000 0000 611a[ ]+move.d \[0 <start>],\$?r1
diff --git a/gas/testsuite/gas/cris/rd-tls-2.d b/gas/testsuite/gas/cris/rd-tls-2.d
index a5f8647..c686381 100644
--- a/gas/testsuite/gas/cris/rd-tls-2.d
+++ b/gas/testsuite/gas/cris/rd-tls-2.d
@@ -22,27 +22,27 @@
[ ]+24: af9e 0000 0000[ ]+sub\.d 0 <start>,\$?r9
[ ]+26: R_CRIS_32_DTPREL extsym4\+0x16
[ ]+2a: 9f3e 0000[ ]+sub\.w 0x0,\$?r3
-[ ]+2c: R_CRIS_16_DTPREL extsym4\+0xffffffaa
+[ ]+2c: R_CRIS_16_DTPREL extsym4-0x56
[ ]+2e: 6f3d 0000 0000 aa4a[ ]+sub\.d \[\$?r3\+0 <start>\],\$?r4,\$?r10
[ ]+30: R_CRIS_32_GOT_TPREL extsym3
[ ]+36: af9e 0000 0000[ ]+sub\.d 0 <start>,\$?r9
[ ]+38: R_CRIS_32_GOT_GD extsym4\+0x2a
[ ]+3c: af3e 0000 0000[ ]+sub\.d 0 <start>,\$?r3
-[ ]+3e: R_CRIS_32_GOT_TPREL extsym4\+0xffffffa0
+[ ]+3e: R_CRIS_32_GOT_TPREL extsym4-0x60
[ ]+42: 6fad 0000 0000 287a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r7,\$?r8
[ ]+44: R_CRIS_32_GOT_TPREL extsym3\+0x38
[ ]+4a: 6f5d 0000 0000 611a[ ]+move\.d \[\$?r5\+0 <start>\],\$?r1
[ ]+4c: R_CRIS_32_GOT_TPREL extsym6\+0xa
[ ]+52: 6fad 0000 0000 284a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r4,\$?r8
-[ ]+54: R_CRIS_32_GOT_TPREL extsym3\+0xfffffdd0
+[ ]+54: R_CRIS_32_GOT_TPREL extsym3-0x230
[ ]+5a: 6f5d 0000 0000 6cca[ ]+move\.d \[\$?r5\+0 <start>\],\$?r12
-[ ]+5c: R_CRIS_32_GOT_TPREL extsym6\+0xffffff92
+[ ]+5c: R_CRIS_32_GOT_TPREL extsym6-0x6e
[ ]+62: 6f5d 0000 0000 69ce[ ]+move\.d \[\$?r9=\$?r5\+0 <start>\],\$?r12
-[ ]+64: R_CRIS_32_GOT_TPREL extsym6\+0xffffff24
+[ ]+64: R_CRIS_32_GOT_TPREL extsym6-0xdc
[ ]+6a: 5fcd 0000 a89a[ ]+sub\.d \[\$?r12\+0\],\$?r9,\$?r8
-[ ]+6c: R_CRIS_16_GOT_TPREL extsym3\+0xffffff64
+[ ]+6c: R_CRIS_16_GOT_TPREL extsym3-0x9c
[ ]+70: 5fbd 0000 699a[ ]+move\.d \[\$?r11\+0\],\$?r9
-[ ]+72: R_CRIS_16_GOT_GD extsym14\+0xffffff00
+[ ]+72: R_CRIS_16_GOT_GD extsym14-0x100
[ ]+76: 6fad 0000 0000 287a[ ]+add\.d \[\$?r10\+0 <start>\],\$?r7,\$?r8
[ ]+78: R_CRIS_32_GOT_GD extsym3\+0x38
[ ]+\.\.\.
diff --git a/gas/testsuite/gas/elf/dwarf2-1.d b/gas/testsuite/gas/elf/dwarf2-1.d
index 8decc1c..ff0ff74 100644
--- a/gas/testsuite/gas/elf/dwarf2-1.d
+++ b/gas/testsuite/gas/elf/dwarf2-1.d
@@ -1,14 +1,14 @@
#as: --compress-debug-sections
#readelf: -w
#name: DWARF2 1
-#not-target: ia64-*-*
+#not-target: ia64-*-* m68hc1*-*-* m681*-*-*
Contents of the .[z]?debug_info section:
Compilation Unit @ offset 0x0:
Length: 0x4e \(32-bit\)
Version: 2
- Abbrev Offset: 0
+ Abbrev Offset: 0x0
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_stmt_list : 0x0
@@ -77,7 +77,7 @@
Contents of the .[z]?debug_abbrev section:
- Number TAG
+ Number TAG \(0x0\)
1 DW_TAG_compile_unit \[has children\]
DW_AT_stmt_list DW_FORM_data4
DW_AT_high_pc DW_FORM_addr
diff --git a/gas/testsuite/gas/elf/dwarf2-2.d b/gas/testsuite/gas/elf/dwarf2-2.d
index 030adb8..2feafa6 100644
--- a/gas/testsuite/gas/elf/dwarf2-2.d
+++ b/gas/testsuite/gas/elf/dwarf2-2.d
@@ -1,14 +1,14 @@
#as: --compress-debug-sections
#readelf: -w
#name: DWARF2 2
-#not-target: ia64-*-*
+#not-target: ia64-*-* m68hc1*-*-* m681*-*-*
Contents of the .[z]?debug_info section:
Compilation Unit @ offset 0x0:
Length: 0x4e \(32-bit\)
Version: 2
- Abbrev Offset: 0
+ Abbrev Offset: 0x0
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_stmt_list : 0x0
@@ -77,7 +77,7 @@
Contents of the .[z]?debug_abbrev section:
- Number TAG
+ Number TAG \(0x0\)
1 DW_TAG_compile_unit \[has children\]
DW_AT_stmt_list DW_FORM_data4
DW_AT_high_pc DW_FORM_addr
diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp
index 15d4407..b437730 100644
--- a/gas/testsuite/gas/elf/elf.exp
+++ b/gas/testsuite/gas/elf/elf.exp
@@ -126,6 +126,7 @@
# against ordinary symbols into relocations against section symbols.
# This is usually revealed by the error message:
# symbol `sym' required but not present
+ setup_xfail "m681*-*-*" "m68hc*-*-*"
run_dump_test redef
run_dump_test equ-reloc
}
@@ -183,6 +184,8 @@
run_dump_test "bad-size"
run_dump_test "bad-group"
+ run_dump_test "syms"
+
load_lib gas-dg.exp
dg-init
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/err-*.s $srcdir/$subdir/warn-*.s]] "" ""
diff --git a/gas/testsuite/gas/elf/syms.d b/gas/testsuite/gas/elf/syms.d
new file mode 100644
index 0000000..40f7706
--- /dev/null
+++ b/gas/testsuite/gas/elf/syms.d
@@ -0,0 +1,18 @@
+#readelf: -S -s -p .strtab
+#name: Multibyte symbol names
+# The following targets use an unusual .set syntax...
+#not-target: alpha*-*-* h8300-*-*
+
+#...
+Section Headers:
+#...
+ \[ .\] sec.*tion.*
+#...
+Symbol table.*
+#...
+ ..: .*sy.*mbol
+#...
+String dump.*
+#...
+ \[......\] sy.*mbol
+#pass
diff --git a/gas/testsuite/gas/elf/syms.s b/gas/testsuite/gas/elf/syms.s
new file mode 100644
index 0000000..977c6bb
--- /dev/null
+++ b/gas/testsuite/gas/elf/syms.s
@@ -0,0 +1,5 @@
+ .section "sec\xa5\xc2tion"
+
+ .set "sy\xa5\xc2mbol", .
+
+ .string8 "str\xa5\xc2ing"
diff --git a/gas/testsuite/gas/h8300/h8300.exp b/gas/testsuite/gas/h8300/h8300.exp
index 1441806..4fb5706 100644
--- a/gas/testsuite/gas/h8300/h8300.exp
+++ b/gas/testsuite/gas/h8300/h8300.exp
@@ -2098,7 +2098,7 @@
while 1 {
expect {
- -re "00000002\[^\n\]*32\[^\n\]*_a.0x0*88ca6c00\[^\n\]*\n"
+ -re "00000002\[^\n\]*32\[^\n\]*_a-0x77359400\[^\n\]*\n"
{ set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
diff --git a/gas/testsuite/gas/i386/bundle-bad.l b/gas/testsuite/gas/i386/bundle-bad.l
index ece5d7e..dd6a793 100644
--- a/gas/testsuite/gas/i386/bundle-bad.l
+++ b/gas/testsuite/gas/i386/bundle-bad.l
@@ -7,5 +7,4 @@
[^:]*:26:.*cannot change section or subsection inside \.bundle_lock
[^:]*:31:.*cannot change \.bundle_align_mode inside \.bundle_lock
[^:]*:36:.*\.bundle_unlock without preceding \.bundle_lock
-[^:]*:41:.*second \.bundle_lock without \.bundle_unlock
-[^:]*:46:.*\.bundle_lock with no matching \.bundle_unlock
+[^:]*:39:.*\.bundle_lock with no matching \.bundle_unlock
diff --git a/gas/testsuite/gas/i386/bundle-bad.s b/gas/testsuite/gas/i386/bundle-bad.s
index 0974d30..0234ae5 100644
--- a/gas/testsuite/gas/i386/bundle-bad.s
+++ b/gas/testsuite/gas/i386/bundle-bad.s
@@ -35,13 +35,6 @@
hlt
.bundle_unlock
- # Nested .bundle_lock.
- .bundle_lock
- clc
- .bundle_lock
- cld
- .bundle_unlock
-
# End of input with dangling .bundle_lock.
.bundle_lock
hlt
diff --git a/gas/testsuite/gas/i386/bundle-lock.d b/gas/testsuite/gas/i386/bundle-lock.d
index afca500..86547e0 100644
--- a/gas/testsuite/gas/i386/bundle-lock.d
+++ b/gas/testsuite/gas/i386/bundle-lock.d
@@ -3052,5 +3052,9 @@
#...
*bde0:\s+(f4\s+hlt|f8\s+clc)\s*
#...
- *be00:\s+f4\s+hlt\s*
+ *be00:\s+f8\s+clc\s*
+ *be01:\s+fc\s+cld\s*
+ *be02:\s+f8\s+clc\s*
+#...
+ *be20:\s+f4\s+hlt\s*
#pass
diff --git a/gas/testsuite/gas/i386/bundle-lock.s b/gas/testsuite/gas/i386/bundle-lock.s
index 6fca9c8..af52e99 100644
--- a/gas/testsuite/gas/i386/bundle-lock.s
+++ b/gas/testsuite/gas/i386/bundle-lock.s
@@ -90,4 +90,14 @@
test_offsets 32
.p2align 5
+ # Nested .bundle_lock.
+ .bundle_lock
+ clc
+ .bundle_lock
+ cld
+ .bundle_unlock
+ clc
+ .bundle_unlock
+
+.p2align 5
hlt
diff --git a/gas/testsuite/gas/i386/dw2-compress-1.d b/gas/testsuite/gas/i386/dw2-compress-1.d
index f47e58c..06057ca 100644
--- a/gas/testsuite/gas/i386/dw2-compress-1.d
+++ b/gas/testsuite/gas/i386/dw2-compress-1.d
@@ -7,7 +7,7 @@
Compilation Unit @ offset 0x0:
Length: 0x4e \(32-bit\)
Version: 2
- Abbrev Offset: 0
+ Abbrev Offset: 0x0
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_stmt_list : 0x0
@@ -32,7 +32,7 @@
Contents of the .zdebug_abbrev section:
- Number TAG
+ Number TAG \(0x0\)
1 DW_TAG_compile_unit \[has children\]
DW_AT_stmt_list DW_FORM_data4
DW_AT_high_pc DW_FORM_addr
diff --git a/gas/testsuite/gas/i386/ilp32/reloc64.d b/gas/testsuite/gas/i386/ilp32/reloc64.d
index af75c51..5d3df9a 100644
--- a/gas/testsuite/gas/i386/ilp32/reloc64.d
+++ b/gas/testsuite/gas/i386/ilp32/reloc64.d
@@ -60,6 +60,7 @@
.*[ ]+R_X86_64_TPOFF32[ ]+xtrn
.*[ ]+R_X86_64_TPOFF32[ ]+xtrn
.*[ ]+R_X86_64_TPOFF32[ ]+xtrn
+.*[ ]+R_X86_64_64[ ]+xtrn\+0x1
Disassembly of section \.data:
#...
.*[ ]+R_X86_64_32[ ]+xtrn
@@ -90,3 +91,6 @@
.*[ ]+R_X86_64_PC16[ ]+xtrn
.*[ ]+R_X86_64_8[ ]+xtrn
.*[ ]+R_X86_64_PC8[ ]+xtrn
+.*[ ]+R_X86_64_64[ ]+xtrn
+.*[ ]+R_X86_64_64[ ]+xtrn\+0x7fffffff
+.*[ ]+R_X86_64_64[ ]+xtrn\-0x80000000
diff --git a/gas/testsuite/gas/i386/ilp32/reloc64.s b/gas/testsuite/gas/i386/ilp32/reloc64.s
index 3f18d04..4149ec2 100644
--- a/gas/testsuite/gas/i386/ilp32/reloc64.s
+++ b/gas/testsuite/gas/i386/ilp32/reloc64.s
@@ -178,3 +178,9 @@
.text
mov xtrn@tpoff (%rbx), %eax
+ movabsq $xtrn - 4294967295, %rbp
+
+ .data
+ .quad xtrn
+ .quad xtrn + 0x7fffffff
+ .quad xtrn - 0x80000000
diff --git a/gas/testsuite/gas/i386/sub.d b/gas/testsuite/gas/i386/sub.d
index fd5e5fa..f16323a 100644
--- a/gas/testsuite/gas/i386/sub.d
+++ b/gas/testsuite/gas/i386/sub.d
@@ -6,5 +6,5 @@
Disassembly of section .text:
0+000 <foo>:
- 0: 66 be (0|1)(0|2|4) 00[ ]+mov[ ]+\$0x(1)?(0|2|4),%si[ ]+2:[ ]+(R_386_PC|DISP)16[ ]+.data(\+0xfffffff0)?
+ 0: 66 be (0|1)(0|2|4) 00[ ]+mov[ ]+\$0x(1)?(0|2|4),%si[ ]+2:[ ]+(R_386_PC|DISP)16[ ]+.data(-0x10)?
#pass
diff --git a/gas/testsuite/gas/lns/lns-big-delta.d b/gas/testsuite/gas/lns/lns-big-delta.d
index 58ed7e0..43b48d8 100644
--- a/gas/testsuite/gas/lns/lns-big-delta.d
+++ b/gas/testsuite/gas/lns/lns-big-delta.d
@@ -4,11 +4,14 @@
Raw dump of debug contents of section \.debug_line:
#...
Line Number Statements:
- Extended opcode 2: set Address to .*
+ Extended opcode 2: set Address to 0x0
Copy
Advance Line by 1 to 2
- Extended opcode 2: set Address to .*
+ Advance PC by fixed size amount 0 to 0x0
Copy
- Advance PC by fixed size amount 0 to .*
+ Advance Line by 1 to 3
+ Extended opcode 2: set Address to 0x124fc
+ Copy
+ Advance PC by fixed size amount 4 to 0x12500
Extended opcode 1: End of Sequence
#pass
diff --git a/gas/testsuite/gas/lns/lns-big-delta.s b/gas/testsuite/gas/lns/lns-big-delta.s
index a959748..40a7dd2 100644
--- a/gas/testsuite/gas/lns/lns-big-delta.s
+++ b/gas/testsuite/gas/lns/lns-big-delta.s
@@ -1,5 +1,9 @@
.file 1 "foo.c"
.loc 1 1 0
.loc 1 2 0
+ nop
+ nop
.space 75000
.loc 1 3 0
+ nop
+ nop
diff --git a/gas/testsuite/gas/m68hc11/9s12x-exg-sex-tfr.d b/gas/testsuite/gas/m68hc11/9s12x-exg-sex-tfr.d
new file mode 100644
index 0000000..dafd7fe
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/9s12x-exg-sex-tfr.d
@@ -0,0 +1,65 @@
+#objdump: -d -mm9s12x --prefix-addresses --reloc
+#as: -mm9s12x
+#name: s12x extended forms of exg,tfr,sex
+
+dump.o: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+0x00000000 exg A,A
+0x00000002 exg B,A
+0x00000004 exg D,A
+0x00000006 exg A,B
+0x00000008 exg B,B
+0x0000000a exg D,B
+0x0000000c exg CCR,CCR
+0x0000000e exg D,CCR
+0x00000010 exg X,CCR
+0x00000012 exg Y,CCR
+0x00000014 exg SP,CCR
+0x00000016 exg A,D
+0x00000018 exg B,D
+0x0000001a exg CCR,D
+0x0000001c exg D,D
+0x0000001e exg X,D
+0x00000020 exg Y,D
+0x00000022 exg SP,D
+0x00000024 exg CCR,X
+0x00000026 xgdx
+0x00000028 exg X,X
+0x0000002a exg Y,X
+0x0000002c exg SP,X
+0x0000002e exg CCR,Y
+0x00000030 xgdy
+0x00000032 exg X,Y
+0x00000034 exg Y,Y
+0x00000036 exg SP,Y
+0x00000038 exg CCR,SP
+0x0000003a exg D,SP
+0x0000003c exg X,SP
+0x0000003e exg Y,SP
+0x00000040 exg SP,SP
+0x00000042 sex A,D
+0x00000044 sex B,D
+0x00000046 sex D,X
+0x00000048 sex D,Y
+0x0000004a tfr A,A
+0x0000004c tfr B,A
+0x0000004e tfr D,A
+0x00000050 tfr A,B
+0x00000052 tfr B,B
+0x00000054 tfr D,B
+0x00000056 tfr D,D
+0x00000058 tfr X,D
+0x0000005a tfr Y,D
+0x0000005c tfr SP,D
+0x0000005e tfr X,X
+0x00000060 tfr Y,X
+0x00000062 tsx
+0x00000064 tfr X,Y
+0x00000066 tfr Y,Y
+0x00000068 tsy
+0x0000006a tfr D,SP
+0x0000006c txs
+0x0000006e tys
+0x00000070 tfr SP,SP
diff --git a/gas/testsuite/gas/m68hc11/9s12x-exg-sex-tfr.s b/gas/testsuite/gas/m68hc11/9s12x-exg-sex-tfr.s
new file mode 100644
index 0000000..efe5a9a
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/9s12x-exg-sex-tfr.s
@@ -0,0 +1,145 @@
+# Test for correct generation of 9s12x specific insns.
+
+ .sect .text
+;;
+;; Test all s12x extended forms of exg,tfr,sex where supported
+;;
+;; presently tmp register and h/l forms not supported in gas
+;exg
+;; none of shaded area is actually supported
+ exg a,a
+ exg b,a
+; exg ccrh,a
+; exg tmp3h,a
+ exg d,a
+; exg xh,a
+; exg yh,a
+; exg sph,a
+ exg a,b
+ exg b,b
+; exg ccrl,b
+; exg tmp3l,b
+ exg d,b
+; exg xl,b
+; exg yl,b
+; exg spl,b
+; exg a,ccrh
+; exg b,ccrl
+ exg ccr,ccr
+; exg tmp3,ccr
+ exg d,ccr
+ exg x,ccr
+ exg y,ccr
+ exg sp,ccr
+; exg a,tmp2h
+; exg b,tmp2l
+; exg ccr,tmp2
+; exg tmp3,tmp2
+; exg d,tmp1
+; exg x,tmp2
+; exg y,tmp2
+; exg sp,tmp2
+ exg a,d
+ exg b,d
+ exg ccr,d
+; exg tmp1,d
+ exg d,d
+ exg x,d
+ exg y,d
+ exg sp,d
+; exg a,xh
+; exg b,xl
+ exg ccr,x
+; exg tmp3,x
+ exg d,x
+ exg x,x
+ exg y,x
+ exg sp,x
+; exg a,yh
+; exg b,yl
+ exg ccr,y
+; exg tmp3,y
+ exg d,y
+ exg x,y
+ exg y,y
+ exg sp,y
+; exg a,sph
+; exg b,spl
+ exg ccr,sp
+; exg tmp3,sp
+ exg d,sp
+ exg x,sp
+ exg y,sp
+ exg sp,sp
+
+;sex
+ sex a,d
+ sex b,d
+ sex d,x ; new
+ sex d,y ; new
+
+;tfr
+ tfr a,a
+ tfr b,a
+; tfr tmp3h,a
+ tfr d,a
+; tfr xh,a
+; tfr yh,a
+; tfr sph,a
+ tfr a,b
+ tfr b,b
+; tfr ccrl,b
+; tfr tmp3l,b
+ tfr d,b
+; tfr xl,b
+; tfr yl,b
+; tfr spl,b
+; tfr a,ccrh
+; tfr b,ccrl
+; tfr ccrw,ccrw
+; tfr tmp3,ccrw
+; tfr d,ccrw
+; tfr x,ccrw
+; tfr y,ccrw
+; tfr sp,ccrw
+; tfr a,tmp2h
+; tfr b,tmp2l
+; tfr ccrw,tmp
+; tfr tmp3,tmp2
+; tfr d,tmp1
+; tfr x,tmp2
+; tfr y,tmp2
+; tfr sp,tmp2
+;sex
+;sex
+; tfr ccrw,d
+; tfr tmp1,d
+ tfr d,d
+ tfr x,d
+ tfr y,d
+ tfr sp,d
+; tfr a,xh
+; tfr b,xl
+; tfr ccrw,x
+; tfr tmp3,x
+;sex
+ tfr x,x
+ tfr y,x
+ tfr sp,x
+; tfr a,yh
+; tfr b,yl
+; tfr ccrw,y
+; tfr tmp3,y
+;sex
+ tfr x,y
+ tfr y,y
+ tfr sp,y
+; tfr a,sph
+; tfr b,spl
+; tfr ccrw,xp
+; tfr tmp3,sp
+ tfr d,sp
+ tfr x,sp
+ tfr y,sp
+ tfr sp,sp
+
diff --git a/gas/testsuite/gas/m68hc11/9s12x-mov.d b/gas/testsuite/gas/m68hc11/9s12x-mov.d
new file mode 100644
index 0000000..dac7f75
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/9s12x-mov.d
@@ -0,0 +1,68 @@
+#objdump: -d -mm9s12x --prefix-addresses --reloc
+#as: -mm9s12x
+#name: s12x extended forms of movb,movw
+
+dump.o: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+00000000 <.text> movb #0x4, 0x00001234 <a1>
+00000005 <.text\+0x5> movb #0x44, 0x0,X
+00000009 <.text\+0x9> movb #0x58, 0xff02,Y
+0000000e <.text\+0xe> movb #0x89, 0x1234,SP
+00000014 <.text\+0x14> movb #0xfe, \[D,X\]
+00000018 <.text\+0x18> movb #0x80, \[0x3456,SP\]
+0000001e <.text\+0x1e> movb 0x00001234 <a1>, 0x00003456 <a2>
+00000024 <.text\+0x24> movb 0x00003456 <a2>, 0x1,X
+00000029 <.text\+0x29> movb 0x00008123 <a3>, 0xff,Y
+0000002f <.text\+0x2f> movb 0x0000c567 <a4>, 0x1234,SP
+00000036 <.text\+0x36> movb 0x00002987 <a5>, \[D,Y\]
+0000003b <.text\+0x3b> movb 0x00001009 <a6>, \[0x8123,SP\]
+00000042 <.text\+0x42> movb 1,X\+, 0x00001234 <a1>
+00000047 <.text\+0x47> movb 2,-X, 0xf,X
+0000004b <.text\+0x4b> movb 7,SP\+, 0xfd,Y
+00000050 <.text\+0x50> movb 6,-SP, 0x3456,SP
+00000056 <.text\+0x56> movb 0xfff1,Y, \[D,X\]
+0000005a <.text\+0x5a> movb 0xd,SP, \[0x2987,SP\]
+00000060 <.text\+0x60> movb \[D,X\], 0x00001234 <a1>
+00000065 <.text\+0x65> movb \[D,Y\], 0xe,X
+00000069 <.text\+0x69> movb \[D,SP\], 0xfd,Y
+0000006e <.text\+0x6e> movb \[D,PC\], 0x3456,SP
+00000074 <.text\+0x74> movb \[D,X\], \[D,X\]
+00000078 <.text\+0x78> movb \[D,Y\], \[0x2987,SP\]
+0000007e <.text\+0x7e> movb \[0x1234,X\], 0x00003456 <a2>
+00000085 <.text\+0x85> movb \[0x3456,Y\], 0xd,X
+0000008b <.text\+0x8b> movb \[0x8123,SP\], 0xfb,Y
+00000092 <.text\+0x92> movb \[0xc567,PC\], 0x8123,SP
+0000009a <.text\+0x9a> movb \[0x2987,X\], \[D,PC\]
+000000a0 <.text\+0xa0> movb \[0x1009,Y\], \[0x2987,SP\]
+000000a8 <.text\+0xa8> movw #0x00001234 <a1>, 0x00001234 <a1>
+000000ae <.text\+0xae> movw #0x00003456 <a2>, 0x0,X
+000000b3 <.text\+0xb3> movw #0x00008123 <a3>, 0xff02,Y
+000000b9 <.text\+0xb9> movw #0x0000c567 <a4>, 0x1234,SP
+000000c0 <.text\+0xc0> movw #0x00002987 <a5>, \[D,X\]
+000000c5 <.text\+0xc5> movw #0x00001009 <a6>, \[0x3456,SP\]
+000000cc <.text\+0xcc> movw 0x00001234 <a1>, 0x00003456 <a2>
+000000d2 <.text\+0xd2> movw 0x00003456 <a2>, 0x1,X
+000000d7 <.text\+0xd7> movw 0x00008123 <a3>, 0xff,Y
+000000dd <.text\+0xdd> movw 0x0000c567 <a4>, 0x1234,SP
+000000e4 <.text\+0xe4> movw 0x00002987 <a5>, \[D,Y\]
+000000e9 <.text\+0xe9> movw 0x00001009 <a6>, \[0x8123,SP\]
+000000f0 <.text\+0xf0> movw 1,X\+, 0x00001234 <a1>
+000000f5 <.text\+0xf5> movw 2,-X, 0xf,X
+000000f9 <.text\+0xf9> movw 7,SP\+, 0xfd,Y
+000000fe <.text\+0xfe> movw 6,-SP, 0x3456,SP
+00000104 <.text\+0x104> movw 0xfff1,Y, \[D,X\]
+00000108 <.text\+0x108> movw 0xd,SP, \[0x2987,SP\]
+0000010e <.text\+0x10e> movw \[D,X\], 0x00001234 <a1>
+00000113 <.text\+0x113> movw \[D,Y\], 0xe,X
+00000117 <.text\+0x117> movw \[D,SP\], 0xfd,Y
+0000011c <.text\+0x11c> movw \[D,PC\], 0x3456,SP
+00000122 <.text\+0x122> movw \[D,X\], \[D,X\]
+00000126 <.text\+0x126> movw \[D,Y\], \[0x2987,SP\]
+0000012c <.text\+0x12c> movw \[0x1234,X\], 0x00003456 <a2>
+00000133 <.text\+0x133> movw \[0x3456,Y\], 0xd,X
+00000139 <.text\+0x139> movw \[0x8123,SP\], 0xfb,Y
+00000140 <.text\+0x140> movw \[0xc567,PC\], 0x8123,SP
+00000148 <.text\+0x148> movw \[0x2987,X\], \[D,PC\]
+0000014e <.text\+0x14e> movw \[0x1009,Y\], \[0x2987,SP\]
diff --git a/gas/testsuite/gas/m68hc11/9s12x-mov.s b/gas/testsuite/gas/m68hc11/9s12x-mov.s
new file mode 100644
index 0000000..553b4c7
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/9s12x-mov.s
@@ -0,0 +1,91 @@
+# Test for correct generation of 9s12x specific moves
+
+ .sect .text
+;;
+;; Test all s12x extended forms of movb, movw
+;; page 273 et seq in S12XCPUV2
+;;
+v1=4
+v2=68
+v3=88
+v4=0x89
+v5=0xfe
+v6=0x80
+a1=0x1234
+a2=0x3456
+a3=0x8123
+a4=0xc567
+a5=0x2987
+a6=0x1009
+
+;movb
+ movb #v1, a1
+ movb #v2, 0,x
+ movb #v3, -254,y
+ movb #v4, a1,sp
+ movb #v5, [d,x]
+ movb #v6, [a2,sp]
+
+ movb a1, a2
+ movb a2, 1,x
+ movb a3, 255,y
+ movb a4, a1,sp
+ movb a5, [d,y]
+ movb a6, [a3,sp]
+
+ movb 1,x+, a1
+ movb 2,-x, 15,x
+ movb 7,sp+, 253,y
+ movb 6,-sp, a2,sp
+ movb -15,y, [d,x]
+ movb 13,sp, [a5,sp]
+
+ movb [d,x], a1
+ movb [d,y], 14,x
+ movb [d,sp], 253,y
+ movb [d,pc], a2,sp
+ movb [d,x], [d,x]
+ movb [d,y], [a5,sp]
+
+ movb [a1,x], a2
+ movb [a2,y], 13,x
+ movb [a3,sp], 251,y
+ movb [a4,pc], a3,sp
+ movb [a5,x], [d,pc]
+ movb [a6,y], [a5,sp]
+
+;movw
+ movw #a1, a1
+ movw #a2, 0,x
+ movw #a3, -254,y
+ movw #a4, a1,sp
+ movw #a5, [d,x]
+ movw #a6, [a2,sp]
+
+ movw a1, a2
+ movw a2, 1,x
+ movw a3, 255,y
+ movw a4, a1,sp
+ movw a5, [d,y]
+ movw a6, [a3,sp]
+
+ movw 1,x+, a1
+ movw 2,-x, 15,x
+ movw 7,sp+, 253,y
+ movw 6,-sp, a2,sp
+ movw -15,y, [d,x]
+ movw 13,sp, [a5,sp]
+
+ movw [d,x], a1
+ movw [d,y], 14,x
+ movw [d,sp], 253,y
+ movw [d,pc], a2,sp
+ movw [d,x], [d,x]
+ movw [d,y], [a5,sp]
+
+ movw [a1,x], a2
+ movw [a2,y], 13,x
+ movw [a3,sp], 251,y
+ movw [a4,pc], a3,sp
+ movw [a5,x], [d,pc]
+ movw [a6,y], [a5,sp]
diff --git a/gas/testsuite/gas/m68hc11/all_insns.d b/gas/testsuite/gas/m68hc11/all_insns.d
index 3531b3a..55dd534 100644
--- a/gas/testsuite/gas/m68hc11/all_insns.d
+++ b/gas/testsuite/gas/m68hc11/all_insns.d
@@ -10,377 +10,377 @@
0+0+ <L0> aba
0+0001 <L1> abx
0+0002 <L2> aby
-0+0004 <L3> adca #103
-0+0006 <L4> adca \*0+0+ <L0>
+0+0004 <L3> adca #0x67
+0+0006 <L4> adca \*0x0+0+ <L0>
7: R_M68HC11_8 Z198
-0+0008 <L5> adca 105,x
-0+000a <L6> adca 0+0+ <L0>
+0+0008 <L5> adca 0x69,x
+0+000a <L6> adca 0x0+0+ <L0>
b: R_M68HC11_16 symbol115
-0+000d <L7> adca 81,x
-0+000f <L8> adcb #255
-0+0011 <L9> adcb \*0+0+ <L0>
+0+000d <L7> adca 0x51,x
+0+000f <L8> adcb #0xff
+0+0011 <L9> adcb \*0x0+0+ <L0>
12: R_M68HC11_8 Z74
-0+0013 <L10> adcb 236,x
-0+0015 <L11> adcb 0+0+ <L0>
+0+0013 <L10> adcb 0xec,x
+0+0015 <L11> adcb 0x0+0+ <L0>
16: R_M68HC11_16 symbol41
-0+0018 <L12> adcb 205,x
-0+001a <L13> adda #186
-0+001c <L14> adda \*0+0+ <L0>
+0+0018 <L12> adcb 0xcd,x
+0+001a <L13> adda #0xba
+0+001c <L14> adda \*0x0+0+ <L0>
1d: R_M68HC11_8 Z171
-0+001e <L15> adda 242,x
-0+0020 <L16> adda 0+0+ <L0>
+0+001e <L15> adda 0xf2,x
+0+0020 <L16> adda 0x0+0+ <L0>
21: R_M68HC11_16 symbol251
-0+0023 <L17> adda 227,x
-0+0025 <L18> addb #70
-0+0027 <L19> addb \*0+0+ <L0>
+0+0023 <L17> adda 0xe3,x
+0+0025 <L18> addb #0x46
+0+0027 <L19> addb \*0x0+0+ <L0>
28: R_M68HC11_8 Z124
-0+0029 <L20> addb 194,x
-0+002b <L21> addb 0+0+ <L0>
+0+0029 <L20> addb 0xc2,x
+0+002b <L21> addb 0x0+0+ <L0>
2c: R_M68HC11_16 symbol84
-0+002e <L22> addb 248,x
-0+0030 <L23> addd #0+231b <L330\+0x2034>
-0+0033 <L24> addd \*0+0+ <L0>
+0+002e <L22> addb 0xf8,x
+0+0030 <L23> addd #0x0+231b <L330\+0x2034>
+0+0033 <L24> addd \*0x0+0+ <L0>
34: R_M68HC11_8 Z232
-0+0035 <L25> addd 231,x
-0+0037 <L26> addd 0+0+ <L0>
+0+0035 <L25> addd 0xe7,x
+0+0037 <L26> addd 0x0+0+ <L0>
38: R_M68HC11_16 symbol141
-0+003a <L27> addd 118,x
-0+003c <L28> anda #90
-0+003e <L29> anda \*0+0+ <L0>
+0+003a <L27> addd 0x76,x
+0+003c <L28> anda #0x5a
+0+003e <L29> anda \*0x0+0+ <L0>
3f: R_M68HC11_8 Z46
-0+0040 <L30> anda 99,x
-0+0042 <L31> anda 0+0+ <L0>
+0+0040 <L30> anda 0x63,x
+0+0042 <L31> anda 0x0+0+ <L0>
43: R_M68HC11_16 symbol51
-0+0045 <L32> anda 159,x
-0+0047 <L33> andb #201
-0+0049 <L34> andb \*0+0+ <L0>
+0+0045 <L32> anda 0x9f,x
+0+0047 <L33> andb #0xc9
+0+0049 <L34> andb \*0x0+0+ <L0>
4a: R_M68HC11_8 Z154
-0+004b <L35> andb 102,x
-0+004d <L36> andb 0+0+ <L0>
+0+004b <L35> andb 0x66,x
+0+004d <L36> andb 0x0+0+ <L0>
4e: R_M68HC11_16 symbol50
-0+0050 <L37> andb 13,x
-0+0052 <L38> asl 183,x
-0+0054 <L39> asl 0+0+ <L0>
+0+0050 <L37> andb 0xd,x
+0+0052 <L38> asl 0xb7,x
+0+0054 <L39> asl 0x0+0+ <L0>
55: R_M68HC11_16 symbol49
-0+0057 <L40> asl 88,x
+0+0057 <L40> asl 0x58,x
0+0059 <L41> asla
0+005a <L42> aslb
0+005b <L43> asld
-0+005c <L44> asr 163,x
-0+005e <L45> asr 0+0+ <L0>
+0+005c <L44> asr 0xa3,x
+0+005e <L45> asr 0x0+0+ <L0>
5f: R_M68HC11_16 symbol90
-0+0061 <L46> asr 37,x
+0+0061 <L46> asr 0x25,x
0+0063 <L47> asra
0+0064 <L48> asrb
-0+0065 <L49> bcs 0+006a <L50>
+0+0065 <L49> bcs 0x0+006a <L50>
65: R_M68HC11_RL_JUMP \*ABS\*
-0+0067 <L49\+0x2> jmp 0+0+ <L0>
+0+0067 <L49\+0x2> jmp 0x0+0+ <L0>
68: R_M68HC11_16 L93
-0+006a <L50> bclr \*0+0+ <L0> #\$00
+0+006a <L50> bclr \*0x0+0+ <L0>, #0x00
6b: R_M68HC11_8 Z5
6c: R_M68HC11_8 \$17
-0+006d <L51> bclr 88,x #\$00
+0+006d <L51> bclr 0x58,x, #0x00
6f: R_M68HC11_8 \$e9
-0+0070 <L52> bclr 94,x #\$00
+0+0070 <L52> bclr 0x5e,x, #0x00
72: R_M68HC11_8 \$d4
-0+0073 <L53> bcc 0+0078 <L54>
+0+0073 <L53> bcc 0x0+0078 <L54>
73: R_M68HC11_RL_JUMP \*ABS\*
-0+0075 <L53\+0x2> jmp 0+0+ <L0>
+0+0075 <L53\+0x2> jmp 0x0+0+ <L0>
76: R_M68HC11_16 L171
-0+0078 <L54> bne 0+007d <L55>
+0+0078 <L54> bne 0x0+007d <L55>
78: R_M68HC11_RL_JUMP \*ABS\*
-0+007a <L54\+0x2> jmp 0+0+ <L0>
+0+007a <L54\+0x2> jmp 0x0+0+ <L0>
7b: R_M68HC11_16 L178
-0+007d <L55> blt 0+0082 <L56>
+0+007d <L55> blt 0x0+0082 <L56>
7d: R_M68HC11_RL_JUMP \*ABS\*
-0+007f <L55\+0x2> jmp 0+0+ <L0>
+0+007f <L55\+0x2> jmp 0x0+0+ <L0>
80: R_M68HC11_16 L205
-0+0082 <L56> ble 0+0087 <L57>
+0+0082 <L56> ble 0x0+0087 <L57>
82: R_M68HC11_RL_JUMP \*ABS\*
-0+0084 <L56\+0x2> jmp 0+0+ <L0>
+0+0084 <L56\+0x2> jmp 0x0+0+ <L0>
85: R_M68HC11_16 L198
-0+0087 <L57> bls 0+008c <L58>
+0+0087 <L57> bls 0x0+008c <L58>
87: R_M68HC11_RL_JUMP \*ABS\*
-0+0089 <L57\+0x2> jmp 0+0+ <L0>
+0+0089 <L57\+0x2> jmp 0x0+0+ <L0>
8a: R_M68HC11_16 L155
-0+008c <L58> bcs 0+0091 <L59>
+0+008c <L58> bcs 0x0+0091 <L59>
8c: R_M68HC11_RL_JUMP \*ABS\*
-0+008e <L58\+0x2> jmp 0+0+ <L0>
+0+008e <L58\+0x2> jmp 0x0+0+ <L0>
8f: R_M68HC11_16 L180
-0+0091 <L59> bita #84
-0+0093 <L60> bita \*0+0+ <L0>
+0+0091 <L59> bita #0x54
+0+0093 <L60> bita \*0x0+0+ <L0>
94: R_M68HC11_8 Z17
-0+0095 <L61> bita 14,x
-0+0097 <L62> bita 0+0+ <L0>
+0+0095 <L61> bita 0xe,x
+0+0097 <L62> bita 0x0+0+ <L0>
98: R_M68HC11_16 symbol130
-0+009a <L63> bita 116,x
-0+009c <L64> bitb #65
-0+009e <L65> bitb \*0+0+ <L0>
+0+009a <L63> bita 0x74,x
+0+009c <L64> bitb #0x41
+0+009e <L65> bitb \*0x0+0+ <L0>
9f: R_M68HC11_8 Z33
-0+00a0 <L66> bitb 61,x
-0+00a2 <L67> bitb 0+0+ <L0>
+0+00a0 <L66> bitb 0x3d,x
+0+00a2 <L67> bitb 0x0+0+ <L0>
a3: R_M68HC11_16 symbol220
-0+00a5 <L68> bitb 135,x
-0+00a7 <L69> ble 0+011d <L112>
+0+00a5 <L68> bitb 0x87,x
+0+00a7 <L69> ble 0x0+011d <L112>
a7: R_M68HC11_RL_JUMP \*ABS\*
-0+00a9 <L70> bcc 0+00ae <L71>
+0+00a9 <L70> bcc 0x0+00ae <L71>
a9: R_M68HC11_RL_JUMP \*ABS\*
-0+00ab <L70\+0x2> jmp 0+0+ <L0>
+0+00ab <L70\+0x2> jmp 0x0+0+ <L0>
ac: R_M68HC11_16 L233
-0+00ae <L71> bls 0+0097 <L62>
+0+00ae <L71> bls 0x0+0097 <L62>
ae: R_M68HC11_RL_JUMP \*ABS\*
-0+00b0 <L72> bge 0+00b5 <L73>
+0+00b0 <L72> bge 0x0+00b5 <L73>
b0: R_M68HC11_RL_JUMP \*ABS\*
-0+00b2 <L72\+0x2> jmp 0+0+ <L0>
+0+00b2 <L72\+0x2> jmp 0x0+0+ <L0>
b3: R_M68HC11_16 L161
-0+00b5 <L73> bmi 0+009e <L65>
+0+00b5 <L73> bmi 0x0+009e <L65>
b5: R_M68HC11_RL_JUMP \*ABS\*
-0+00b7 <L74> beq 0+00bc <L75>
+0+00b7 <L74> beq 0x0+00bc <L75>
b7: R_M68HC11_RL_JUMP \*ABS\*
-0+00b9 <L74\+0x2> jmp 0+0+ <L0>
+0+00b9 <L74\+0x2> jmp 0x0+0+ <L0>
ba: R_M68HC11_16 L225
-0+00bc <L75> bmi 0+00c1 <L76>
+0+00bc <L75> bmi 0x0+00c1 <L76>
bc: R_M68HC11_RL_JUMP \*ABS\*
-0+00be <L75\+0x2> jmp 0+0+ <L0>
+0+00be <L75\+0x2> jmp 0x0+0+ <L0>
bf: R_M68HC11_16 L252
-0+00c1 <L76> bra 0+0106 <L103>
+0+00c1 <L76> bra 0x0+0106 <L103>
c1: R_M68HC11_RL_JUMP \*ABS\*
-0+00c3 <L77> brclr \*0+0+ <L0> #\$00 0+0145 <L125\+0x2>
+0+00c3 <L77> brclr \*0x0+0+ <L0>, #0x00, 0x0+0145 <L125\+0x2>
c3: R_M68HC11_RL_JUMP \*ABS\*
c4: R_M68HC11_8 Z62
c5: R_M68HC11_8 \$01
-0+00c7 <L78> brclr 151,x #\$00 0+0127 <L115>
+0+00c7 <L78> brclr 0x97,x, #0x00, 0x0+0127 <L115>
c7: R_M68HC11_RL_JUMP \*ABS\*
c9: R_M68HC11_8 \$ea
-0+00cb <L79> brclr 107,x #\$00 0+00de <L84\+0x1>
+0+00cb <L79> brclr 0x6b,x, #0x00, 0x0+00de <L84\+0x1>
cb: R_M68HC11_RL_JUMP \*ABS\*
cd: R_M68HC11_8 \$96
-0+00cf <L80> brn 0+0082 <L56>
+0+00cf <L80> brn 0x0+0082 <L56>
cf: R_M68HC11_RL_JUMP \*ABS\*
-0+00d1 <L81> brset \*0+0+ <L0> #\$00 0+0141 <L124>
+0+00d1 <L81> brset \*0x0+0+ <L0>, #0x00, 0x0+0141 <L124>
d1: R_M68HC11_RL_JUMP \*ABS\*
d2: R_M68HC11_8 Z92
d3: R_M68HC11_8 \$2a
-0+00d5 <L82> brset 176,x #\$00 0+0154 <L132>
+0+00d5 <L82> brset 0xb0,x, #0x00, 0x0+0154 <L132>
d5: R_M68HC11_RL_JUMP \*ABS\*
d7: R_M68HC11_8 \$3b
-0+00d9 <L83> brset 50,x #\$00 0+0119 <L110\+0x2>
+0+00d9 <L83> brset 0x32,x, #0x00, 0x0+0119 <L110\+0x2>
d9: R_M68HC11_RL_JUMP \*ABS\*
db: R_M68HC11_8 \$af
-0+00dd <L84> bset \*0+0+ <L0> #\$00
+0+00dd <L84> bset \*0x0+0+ <L0>, #0x00
de: R_M68HC11_8 Z84
df: R_M68HC11_8 \$ec
-0+00e0 <L85> bset 24,x #\$00
+0+00e0 <L85> bset 0x18,x, #0x00
e2: R_M68HC11_8 \$db
-0+00e3 <L86> bset 92,x #\$00
+0+00e3 <L86> bset 0x5c,x, #0x00
e5: R_M68HC11_8 \$02
-0+00e6 <L87> jsr 0+0+ <L0>
+0+00e6 <L87> jsr 0x0+0+ <L0>
e6: R_M68HC11_RL_JUMP \*ABS\*
e7: R_M68HC11_16 L26
-0+00e9 <L88> bvs 0+00ee <L89>
+0+00e9 <L88> bvs 0x0+00ee <L89>
e9: R_M68HC11_RL_JUMP \*ABS\*
-0+00eb <L88\+0x2> jmp 0+0+ <L0>
+0+00eb <L88\+0x2> jmp 0x0+0+ <L0>
ec: R_M68HC11_16 L254
-0+00ee <L89> bvs 0+00a2 <L67>
+0+00ee <L89> bvs 0x0+00a2 <L67>
ee: R_M68HC11_RL_JUMP \*ABS\*
0+00f0 <L90> cba
0+00f1 <L91> clc
0+00f2 <L92> cli
-0+00f3 <L93> clr 251,x
-0+00f5 <L94> clr 0+0+ <L0>
+0+00f3 <L93> clr 0xfb,x
+0+00f5 <L94> clr 0x0+0+ <L0>
f6: R_M68HC11_16 symbol250
-0+00f8 <L95> clr 170,x
+0+00f8 <L95> clr 0xaa,x
0+00fa <L96> clra
0+00fb <L97> clrb
0+00fc <L98> clv
-0+00fd <L99> cmpa #58
-0+00ff <L100> cmpa \*0+0+ <L0>
+0+00fd <L99> cmpa #0x3a
+0+00ff <L100> cmpa \*0x0+0+ <L0>
100: R_M68HC11_8 Z251
-0+0101 <L101> cmpa 41,x
-0+0103 <L102> cmpa 0+0+ <L0>
+0+0101 <L101> cmpa 0x29,x
+0+0103 <L102> cmpa 0x0+0+ <L0>
104: R_M68HC11_16 symbol209
-0+0106 <L103> cmpa 230,x
-0+0108 <L104> cmpb #5
-0+010a <L105> cmpb \*0+0+ <L0>
+0+0106 <L103> cmpa 0xe6,x
+0+0108 <L104> cmpb #0x5
+0+010a <L105> cmpb \*0x0+0+ <L0>
10b: R_M68HC11_8 Z60
-0+010c <L106> cmpb 124,x
-0+010e <L107> cmpb 0+0+ <L0>
+0+010c <L106> cmpb 0x7c,x
+0+010e <L107> cmpb 0x0+0+ <L0>
10f: R_M68HC11_16 symbol148
-0+0111 <L108> cmpb 117,x
-0+0113 <L109> cpd #0+0fd8 <L330\+0xcf1>
-0+0117 <L110> cpd \*0+0+ <L0>
+0+0111 <L108> cmpb 0x75,x
+0+0113 <L109> cpd #0x0+0fd8 <L330\+0xcf1>
+0+0117 <L110> cpd \*0x0+0+ <L0>
119: R_M68HC11_8 Z190
-0+011a <L111> cpd 97,x
-0+011d <L112> cpd 0+0+ <L0>
+0+011a <L111> cpd 0x61,x
+0+011d <L112> cpd 0x0+0+ <L0>
11f: R_M68HC11_16 symbol137
-0+0121 <L113> cpd 249,x
-0+0124 <L114> cpx #0+af5c <L330\+0xac75>
-0+0127 <L115> cpx \*0+0+ <L0>
+0+0121 <L113> cpd 0xf9,x
+0+0124 <L114> cpx #0x0+af5c <L330\+0xac75>
+0+0127 <L115> cpx \*0x0+0+ <L0>
128: R_M68HC11_8 Z187
-0+0129 <L116> cpx 168,x
-0+012b <L117> cpx 0+0+ <L0>
+0+0129 <L116> cpx 0xa8,x
+0+012b <L117> cpx 0x0+0+ <L0>
12c: R_M68HC11_16 symbol153
-0+012e <L118> cpx 15,x
-0+0130 <L119> cpy #0+4095 <L330\+0x3dae>
-0+0134 <L120> cpy \*0+0+ <L0>
+0+012e <L118> cpx 0xf,x
+0+0130 <L119> cpy #0x0+4095 <L330\+0x3dae>
+0+0134 <L120> cpy \*0x0+0+ <L0>
136: R_M68HC11_8 Z177
-0+0137 <L121> cpy 235,x
-0+013a <L122> cpy 0+0+ <L0>
+0+0137 <L121> cpy 0xeb,x
+0+013a <L122> cpy 0x0+0+ <L0>
13c: R_M68HC11_16 symbol241
-0+013e <L123> cpy 179,x
-0+0141 <L124> com 5,x
-0+0143 <L125> com 0+0+ <L0>
+0+013e <L123> cpy 0xb3,x
+0+0141 <L124> com 0x5,x
+0+0143 <L125> com 0x0+0+ <L0>
144: R_M68HC11_16 symbol239
-0+0146 <L126> com 247,x
+0+0146 <L126> com 0xf7,x
0+0148 <L127> coma
0+0149 <L128> comb
-0+014a <L129> cpd #0+bf00 <L330\+0xbc19>
-0+014e <L130> cpd \*0+0+ <L0>
+0+014a <L129> cpd #0x0+bf00 <L330\+0xbc19>
+0+014e <L130> cpd \*0x0+0+ <L0>
150: R_M68HC11_8 Z233
-0+0151 <L131> cpd 161,x
-0+0154 <L132> cpd 0+0+ <L0>
+0+0151 <L131> cpd 0xa1,x
+0+0154 <L132> cpd 0x0+0+ <L0>
156: R_M68HC11_16 symbol58
-0+0158 <L133> cpd 229,x
-0+015b <L134> cpx #0+8fca <L330\+0x8ce3>
-0+015e <L135> cpx \*0+0+ <L0>
+0+0158 <L133> cpd 0xe5,x
+0+015b <L134> cpx #0x0+8fca <L330\+0x8ce3>
+0+015e <L135> cpx \*0x0+0+ <L0>
15f: R_M68HC11_8 Z11
-0+0160 <L136> cpx 203,x
-0+0162 <L137> cpx 0+0+ <L0>
+0+0160 <L136> cpx 0xcb,x
+0+0162 <L137> cpx 0x0+0+ <L0>
163: R_M68HC11_16 symbol208
-0+0165 <L138> cpx 72,x
-0+0167 <L139> cpy #0+0247 <L248>
-0+016b <L140> cpy \*0+0+ <L0>
+0+0165 <L138> cpx 0x48,x
+0+0167 <L139> cpy #0x0+0247 <L248>
+0+016b <L140> cpy \*0x0+0+ <L0>
16d: R_M68HC11_8 Z100
-0+016e <L141> cpy 189,x
-0+0171 <L142> cpy 0+0+ <L0>
+0+016e <L141> cpy 0xbd,x
+0+0171 <L142> cpy 0x0+0+ <L0>
173: R_M68HC11_16 symbol31
-0+0175 <L143> cpy 35,x
+0+0175 <L143> cpy 0x23,x
0+0178 <L144> daa
-0+0179 <L145> dec 30,x
-0+017b <L146> dec 0+0+ <L0>
+0+0179 <L145> dec 0x1e,x
+0+017b <L146> dec 0x0+0+ <L0>
17c: R_M68HC11_16 symbol168
-0+017e <L147> dec 28,x
+0+017e <L147> dec 0x1c,x
0+0180 <L148> deca
0+0181 <L149> decb
0+0182 <L150> des
0+0183 <L151> dex
0+0184 <L152> dey
-0+0186 <L153> eora #123
-0+0188 <L154> eora \*0+0+ <L0>
+0+0186 <L153> eora #0x7b
+0+0188 <L154> eora \*0x0+0+ <L0>
189: R_M68HC11_8 Z100
-0+018a <L155> eora 197,x
-0+018c <L156> eora 0+0+ <L0>
+0+018a <L155> eora 0xc5,x
+0+018c <L156> eora 0x0+0+ <L0>
18d: R_M68HC11_16 symbol20
-0+018f <L157> eora 115,x
-0+0191 <L158> eorb #90
-0+0193 <L159> eorb \*0+0+ <L0>
+0+018f <L157> eora 0x73,x
+0+0191 <L158> eorb #0x5a
+0+0193 <L159> eorb \*0x0+0+ <L0>
194: R_M68HC11_8 Z197
-0+0195 <L160> eorb 94,x
-0+0197 <L161> eorb 0+0+ <L0>
+0+0195 <L160> eorb 0x5e,x
+0+0197 <L161> eorb 0x0+0+ <L0>
198: R_M68HC11_16 symbol75
-0+019a <L162> eorb 121,x
+0+019a <L162> eorb 0x79,x
0+019c <L163> fdiv
0+019d <L164> idiv
-0+019e <L165> inc 99,x
-0+01a0 <L166> inc 0+0+ <L0>
+0+019e <L165> inc 0x63,x
+0+01a0 <L166> inc 0x0+0+ <L0>
1a1: R_M68HC11_16 symbol59
-0+01a3 <L167> inc 112,x
+0+01a3 <L167> inc 0x70,x
0+01a5 <L168> inca
0+01a6 <L169> incb
0+01a7 <L170> ins
0+01a8 <L171> inx
0+01a9 <L172> iny
-0+01ab <L173> jmp 100,x
-0+01ad <L174> jmp 0+0+ <L0>
+0+01ab <L173> jmp 0x64,x
+0+01ad <L174> jmp 0x0+0+ <L0>
1ad: R_M68HC11_RL_JUMP \*ABS\*
1ae: R_M68HC11_16 symbol36
-0+01b0 <L175> jmp 17,x
-0+01b2 <L176> jsr \*0+0+ <L0>
+0+01b0 <L175> jmp 0x11,x
+0+01b2 <L176> jsr \*0x0+0+ <L0>
1b2: R_M68HC11_RL_JUMP \*ABS\*
1b3: R_M68HC11_8 Z158
-0+01b4 <L177> jsr 9,x
-0+01b6 <L178> jsr 0+0+ <L0>
+0+01b4 <L177> jsr 0x9,x
+0+01b6 <L178> jsr 0x0+0+ <L0>
1b6: R_M68HC11_RL_JUMP \*ABS\*
1b7: R_M68HC11_16 symbol220
-0+01b9 <L179> jsr 170,x
-0+01bb <L180> ldaa #212
-0+01bd <L181> ldaa \*0+0+ <L0>
+0+01b9 <L179> jsr 0xaa,x
+0+01bb <L180> ldaa #0xd4
+0+01bd <L181> ldaa \*0x0+0+ <L0>
1be: R_M68HC11_8 Z172
-0+01bf <L182> ldaa 242,x
-0+01c1 <L183> ldaa 0+0+ <L0>
+0+01bf <L182> ldaa 0xf2,x
+0+01c1 <L183> ldaa 0x0+0+ <L0>
1c2: R_M68HC11_16 symbol27
-0+01c4 <L184> ldaa 16,x
-0+01c6 <L185> ldab #175
-0+01c8 <L186> ldab \*0+0+ <L0>
+0+01c4 <L184> ldaa 0x10,x
+0+01c6 <L185> ldab #0xaf
+0+01c8 <L186> ldab \*0x0+0+ <L0>
1c9: R_M68HC11_8 Z59
-0+01ca <L187> ldab 51,x
-0+01cc <L188> ldab 0+0+ <L0>
+0+01ca <L187> ldab 0x33,x
+0+01cc <L188> ldab 0x0+0+ <L0>
1cd: R_M68HC11_16 symbol205
-0+01cf <L189> ldab 227,x
-0+01d1 <L190> ldd #0+c550 <L330\+0xc269>
-0+01d4 <L191> ldd \*0+0+ <L0>
+0+01cf <L189> ldab 0xe3,x
+0+01d1 <L190> ldd #0x0+c550 <L330\+0xc269>
+0+01d4 <L191> ldd \*0x0+0+ <L0>
1d5: R_M68HC11_8 Z72
-0+01d6 <L192> ldd 71,x
-0+01d8 <L193> ldd 0+0+ <L0>
+0+01d6 <L192> ldd 0x47,x
+0+01d8 <L193> ldd 0x0+0+ <L0>
1d9: R_M68HC11_16 symbol21
-0+01db <L194> ldd 92,x
-0+01dd <L195> lds #0+4fbb <L330\+0x4cd4>
-0+01e0 <L196> lds \*0+0+ <L0>
+0+01db <L194> ldd 0x5c,x
+0+01dd <L195> lds #0x0+4fbb <L330\+0x4cd4>
+0+01e0 <L196> lds \*0x0+0+ <L0>
1e1: R_M68HC11_8 Z111
-0+01e2 <L197> lds 34,x
-0+01e4 <L198> lds 0+0+ <L0>
+0+01e2 <L197> lds 0x22,x
+0+01e4 <L198> lds 0x0+0+ <L0>
1e5: R_M68HC11_16 symbol25
-0+01e7 <L199> lds 186,x
-0+01e9 <L200> ldx #0+579b <L330\+0x54b4>
-0+01ec <L201> ldx \*0+0+ <L0>
+0+01e7 <L199> lds 0xba,x
+0+01e9 <L200> ldx #0x0+579b <L330\+0x54b4>
+0+01ec <L201> ldx \*0x0+0+ <L0>
1ed: R_M68HC11_8 Z125
-0+01ee <L202> ldx 245,x
-0+01f0 <L203> ldx 0+0+ <L0>
+0+01ee <L202> ldx 0xf5,x
+0+01f0 <L203> ldx 0x0+0+ <L0>
1f1: R_M68HC11_16 symbol11
-0+01f3 <L204> ldx 225,x
-0+01f5 <L205> ldy #0+ac1a <L330\+0xa933>
-0+01f9 <L206> ldy \*0+0+ <L0>
+0+01f3 <L204> ldx 0xe1,x
+0+01f5 <L205> ldy #0x0+ac1a <L330\+0xa933>
+0+01f9 <L206> ldy \*0x0+0+ <L0>
1fb: R_M68HC11_8 Z28
-0+01fc <L207> ldy 127,x
-0+01ff <L208> ldy 0+0+ <L0>
+0+01fc <L207> ldy 0x7f,x
+0+01ff <L208> ldy 0x0+0+ <L0>
201: R_M68HC11_16 symbol35
-0+0203 <L209> ldy 248,x
-0+0206 <L210> asl 41,x
-0+0208 <L211> asl 0+0+ <L0>
+0+0203 <L209> ldy 0xf8,x
+0+0206 <L210> asl 0x29,x
+0+0208 <L211> asl 0x0+0+ <L0>
209: R_M68HC11_16 symbol248
-0+020b <L212> asl 164,x
+0+020b <L212> asl 0xa4,x
0+020d <L213> asla
0+020e <L214> aslb
0+020f <L215> asld
-0+0210 <L216> lsr 27,x
-0+0212 <L217> lsr 0+0+ <L0>
+0+0210 <L216> lsr 0x1b,x
+0+0212 <L217> lsr 0x0+0+ <L0>
213: R_M68HC11_16 symbol19
-0+0215 <L218> lsr 181,x
+0+0215 <L218> lsr 0xb5,x
0+0217 <L219> lsra
0+0218 <L220> lsrb
0+0219 <L221> lsrd
0+021a <L222> mul
-0+021b <L223> neg 202,x
-0+021d <L224> neg 0+0+ <L0>
+0+021b <L223> neg 0xca,x
+0+021d <L224> neg 0x0+0+ <L0>
21e: R_M68HC11_16 symbol78
-0+0220 <L225> neg 232,x
+0+0220 <L225> neg 0xe8,x
0+0222 <L226> nega
0+0223 <L227> negb
0+0224 <L228> nop
-0+0225 <L229> oraa #152
-0+0227 <L230> oraa \*0+0+ <L0>
+0+0225 <L229> oraa #0x98
+0+0227 <L230> oraa \*0x0+0+ <L0>
228: R_M68HC11_8 Z50
-0+0229 <L231> oraa 56,x
-0+022b <L232> oraa 0+0+ <L0>
+0+0229 <L231> oraa 0x38,x
+0+022b <L232> oraa 0x0+0+ <L0>
22c: R_M68HC11_16 symbol224
-0+022e <L233> oraa 121,x
-0+0230 <L234> orab #77
-0+0232 <L235> orab \*0+0+ <L0>
+0+022e <L233> oraa 0x79,x
+0+0230 <L234> orab #0x4d
+0+0232 <L235> orab \*0x0+0+ <L0>
233: R_M68HC11_8 Z61
-0+0234 <L236> orab 52,x
-0+0236 <L237> orab 0+0+ <L0>
+0+0234 <L236> orab 0x34,x
+0+0236 <L237> orab 0x0+0+ <L0>
237: R_M68HC11_16 symbol188
-0+0239 <L238> orab 95,x
+0+0239 <L238> orab 0x5f,x
0+023b <L239> psha
0+023c <L240> pshb
0+023d <L241> pshx
@@ -389,106 +389,106 @@
0+0241 <L244> pulb
0+0242 <L245> pulx
0+0243 <L246> puly
-0+0245 <L247> rol 78,x
-0+0247 <L248> rol 0+0+ <L0>
+0+0245 <L247> rol 0x4e,x
+0+0247 <L248> rol 0x0+0+ <L0>
248: R_M68HC11_16 symbol119
-0+024a <L249> rol 250,x
+0+024a <L249> rol 0xfa,x
0+024c <L250> rola
0+024d <L251> rolb
-0+024e <L252> ror 203,x
-0+0250 <L253> ror 0+0+ <L0>
+0+024e <L252> ror 0xcb,x
+0+0250 <L253> ror 0x0+0+ <L0>
251: R_M68HC11_16 symbol108
-0+0253 <L254> ror 5,x
+0+0253 <L254> ror 0x5,x
0+0255 <L255> rora
0+0256 <L256> rorb
0+0257 <L257> rti
0+0258 <L258> rts
0+0259 <L259> sba
-0+025a <L260> sbca #172
-0+025c <L261> sbca \*0+0+ <L0>
+0+025a <L260> sbca #0xac
+0+025c <L261> sbca \*0x0+0+ <L0>
25d: R_M68HC11_8 Z134
-0+025e <L262> sbca 33,x
-0+0260 <L263> sbca 0+0+ <L0>
+0+025e <L262> sbca 0x21,x
+0+0260 <L263> sbca 0x0+0+ <L0>
261: R_M68HC11_16 symbol43
-0+0263 <L264> sbca 170,x
-0+0265 <L265> sbcb #26
-0+0267 <L266> sbcb \*0+0+ <L0>
+0+0263 <L264> sbca 0xaa,x
+0+0265 <L265> sbcb #0x1a
+0+0267 <L266> sbcb \*0x0+0+ <L0>
268: R_M68HC11_8 Z85
-0+0269 <L267> sbcb 162,x
-0+026b <L268> sbcb 0+0+ <L0>
+0+0269 <L267> sbcb 0xa2,x
+0+026b <L268> sbcb 0x0+0+ <L0>
26c: R_M68HC11_16 symbol190
-0+026e <L269> sbcb 112,x
+0+026e <L269> sbcb 0x70,x
0+0270 <L270> sec
0+0271 <L271> sei
0+0272 <L272> sev
-0+0273 <L273> staa \*0+0+ <L0>
+0+0273 <L273> staa \*0x0+0+ <L0>
274: R_M68HC11_8 Z181
-0+0275 <L274> staa 115,x
-0+0277 <L275> staa 0+0+ <L0>
+0+0275 <L274> staa 0x73,x
+0+0277 <L275> staa 0x0+0+ <L0>
278: R_M68HC11_16 symbol59
-0+027a <L276> staa 4,x
-0+027c <L277> stab \*0+0+ <L0>
+0+027a <L276> staa 0x4,x
+0+027c <L277> stab \*0x0+0+ <L0>
27d: R_M68HC11_8 Z92
-0+027e <L278> stab 211,x
-0+0280 <L279> stab 0+0+ <L0>
+0+027e <L278> stab 0xd3,x
+0+0280 <L279> stab 0x0+0+ <L0>
281: R_M68HC11_16 symbol54
-0+0283 <L280> stab 148,x
-0+0285 <L281> std \*0+0+ <L0>
+0+0283 <L280> stab 0x94,x
+0+0285 <L281> std \*0x0+0+ <L0>
286: R_M68HC11_8 Z179
-0+0287 <L282> std 175,x
-0+0289 <L283> std 0+0+ <L0>
+0+0287 <L282> std 0xaf,x
+0+0289 <L283> std 0x0+0+ <L0>
28a: R_M68HC11_16 symbol226
-0+028c <L284> std 240,x
+0+028c <L284> std 0xf0,x
0+028e <L285> stop
-0+028f <L286> sts \*0+0+ <L0>
+0+028f <L286> sts \*0x0+0+ <L0>
290: R_M68HC11_8 Z228
-0+0291 <L287> sts 158,x
-0+0293 <L288> sts 0+0+ <L0>
+0+0291 <L287> sts 0x9e,x
+0+0293 <L288> sts 0x0+0+ <L0>
294: R_M68HC11_16 symbol79
-0+0296 <L289> sts 50,x
-0+0298 <L290> stx \*0+0+ <L0>
+0+0296 <L289> sts 0x32,x
+0+0298 <L290> stx \*0x0+0+ <L0>
299: R_M68HC11_8 Z21
-0+029a <L291> stx 73,x
-0+029c <L292> stx 0+0+ <L0>
+0+029a <L291> stx 0x49,x
+0+029c <L292> stx 0x0+0+ <L0>
29d: R_M68HC11_16 symbol253
-0+029f <L293> stx 130,x
-0+02a1 <L294> sty \*0+0+ <L0>
+0+029f <L293> stx 0x82,x
+0+02a1 <L294> sty \*0x0+0+ <L0>
2a3: R_M68HC11_8 Z78
-0+02a4 <L295> sty 169,x
-0+02a7 <L296> sty 0+0+ <L0>
+0+02a4 <L295> sty 0xa9,x
+0+02a7 <L296> sty 0x0+0+ <L0>
2a9: R_M68HC11_16 symbol8
-0+02ab <L297> sty 112,x
-0+02ae <L298> suba #212
-0+02b0 <L299> suba \*0+0+ <L0>
+0+02ab <L297> sty 0x70,x
+0+02ae <L298> suba #0xd4
+0+02b0 <L299> suba \*0x0+0+ <L0>
2b1: R_M68HC11_8 Z178
-0+02b2 <L300> suba 138,x
-0+02b4 <L301> suba 0+0+ <L0>
+0+02b2 <L300> suba 0x8a,x
+0+02b4 <L301> suba 0x0+0+ <L0>
2b5: R_M68HC11_16 symbol41
-0+02b7 <L302> suba 84,x
-0+02b9 <L303> subb #72
-0+02bb <L304> subb \*0+0+ <L0>
+0+02b7 <L302> suba 0x54,x
+0+02b9 <L303> subb #0x48
+0+02bb <L304> subb \*0x0+0+ <L0>
2bc: R_M68HC11_8 Z154
-0+02bd <L305> subb 10,x
-0+02bf <L306> subb 0+0+ <L0>
+0+02bd <L305> subb 0xa,x
+0+02bf <L306> subb 0x0+0+ <L0>
2c0: R_M68HC11_16 symbol188
-0+02c2 <L307> subb 213,x
-0+02c4 <L308> subd #0+f10e <L330\+0xee27>
-0+02c7 <L309> subd \*0+0+ <L0>
+0+02c2 <L307> subb 0xd5,x
+0+02c4 <L308> subd #0x0+f10e <L330\+0xee27>
+0+02c7 <L309> subd \*0x0+0+ <L0>
2c8: R_M68HC11_8 Z24
-0+02c9 <L310> subd 168,x
-0+02cb <L311> subd 0+0+ <L0>
+0+02c9 <L310> subd 0xa8,x
+0+02cb <L311> subd 0x0+0+ <L0>
2cc: R_M68HC11_16 symbol68
-0+02ce <L312> subd 172,x
+0+02ce <L312> subd 0xac,x
0+02d0 <L313> swi
0+02d1 <L314> tab
0+02d2 <L315> tap
0+02d3 <L316> tba
...
0+02d5 <L318> tpa
-0+02d6 <L319> tst 91,x
-0+02d8 <L320> tst 0+0+ <L0>
+0+02d6 <L319> tst 0x5b,x
+0+02d8 <L320> tst 0x0+0+ <L0>
2d9: R_M68HC11_16 symbol243
-0+02db <L321> tst 142,x
+0+02db <L321> tst 0x8e,x
0+02dd <L322> tsta
0+02de <L323> tstb
0+02df <L324> tsx
diff --git a/gas/testsuite/gas/m68hc11/branchs12.d b/gas/testsuite/gas/m68hc11/branchs12.d
index 682b1cc..47d3598 100644
--- a/gas/testsuite/gas/m68hc11/branchs12.d
+++ b/gas/testsuite/gas/m68hc11/branchs12.d
@@ -5,220 +5,220 @@
.*: +file format elf32\-m68hc12
Disassembly of section .text:
-0+00 <start> bgt 0+48 <L1>
+0+00 <start> bgt 0x0+48 <L1>
[ ]+0: R_M68HC12_RL_JUMP \*ABS\*
-0+02 <start\+0x2> bge 0+48 <L1>
+0+02 <start\+0x2> bge 0x0+48 <L1>
[ ]+2: R_M68HC12_RL_JUMP \*ABS\*
-0+04 <start\+0x4> ble 0+48 <L1>
+0+04 <start\+0x4> ble 0x0+48 <L1>
[ ]+4: R_M68HC12_RL_JUMP \*ABS\*
-0+06 <start\+0x6> blt 0+48 <L1>
+0+06 <start\+0x6> blt 0x0+48 <L1>
[ ]+6: R_M68HC12_RL_JUMP \*ABS\*
-0+08 <start\+0x8> bhi 0+48 <L1>
+0+08 <start\+0x8> bhi 0x0+48 <L1>
[ ]+8: R_M68HC12_RL_JUMP \*ABS\*
-0+0a <start\+0xa> bcc 0+48 <L1>
+0+0a <start\+0xa> bcc 0x0+48 <L1>
[ ]+a: R_M68HC12_RL_JUMP \*ABS\*
-0+0c <start\+0xc> bcc 0+48 <L1>
+0+0c <start\+0xc> bcc 0x0+48 <L1>
[ ]+c: R_M68HC12_RL_JUMP \*ABS\*
-0+0e <start\+0xe> beq 0+48 <L1>
+0+0e <start\+0xe> beq 0x0+48 <L1>
[ ]+e: R_M68HC12_RL_JUMP \*ABS\*
-0+10 <start\+0x10> bls 0+48 <L1>
+0+10 <start\+0x10> bls 0x0+48 <L1>
[ ]+10: R_M68HC12_RL_JUMP \*ABS\*
-0+12 <start\+0x12> bcs 0+48 <L1>
+0+12 <start\+0x12> bcs 0x0+48 <L1>
[ ]+12: R_M68HC12_RL_JUMP \*ABS\*
-0+14 <start\+0x14> bcs 0+48 <L1>
+0+14 <start\+0x14> bcs 0x0+48 <L1>
[ ]+14: R_M68HC12_RL_JUMP \*ABS\*
-0+16 <start\+0x16> bmi 0+48 <L1>
+0+16 <start\+0x16> bmi 0x0+48 <L1>
[ ]+16: R_M68HC12_RL_JUMP \*ABS\*
-0+18 <start\+0x18> bvs 0+48 <L1>
+0+18 <start\+0x18> bvs 0x0+48 <L1>
[ ]+18: R_M68HC12_RL_JUMP \*ABS\*
-0+1a <start\+0x1a> bra 0+48 <L1>
+0+1a <start\+0x1a> bra 0x0+48 <L1>
[ ]+1a: R_M68HC12_RL_JUMP \*ABS\*
-0+1c <start\+0x1c> bvc 0+48 <L1>
+0+1c <start\+0x1c> bvc 0x0+48 <L1>
[ ]+1c: R_M68HC12_RL_JUMP \*ABS\*
-0+1e <start\+0x1e> bne 0+48 <L1>
+0+1e <start\+0x1e> bne 0x0+48 <L1>
[ ]+1e: R_M68HC12_RL_JUMP \*ABS\*
-0+20 <start\+0x20> bpl 0+48 <L1>
+0+20 <start\+0x20> bpl 0x0+48 <L1>
[ ]+20: R_M68HC12_RL_JUMP \*ABS\*
-0+22 <start\+0x22> brn 0+48 <L1>
+0+22 <start\+0x22> brn 0x0+48 <L1>
[ ]+22: R_M68HC12_RL_JUMP \*ABS\*
-0+24 <start\+0x24> bgt 0+00 <start>
+0+24 <start\+0x24> bgt 0x0+00 <start>
[ ]+24: R_M68HC12_RL_JUMP \*ABS\*
-0+26 <start\+0x26> bge 0+00 <start>
+0+26 <start\+0x26> bge 0x0+00 <start>
[ ]+26: R_M68HC12_RL_JUMP \*ABS\*
-0+28 <start\+0x28> ble 0+00 <start>
+0+28 <start\+0x28> ble 0x0+00 <start>
[ ]+28: R_M68HC12_RL_JUMP \*ABS\*
-0+2a <start\+0x2a> blt 0+00 <start>
+0+2a <start\+0x2a> blt 0x0+00 <start>
[ ]+2a: R_M68HC12_RL_JUMP \*ABS\*
-0+2c <start\+0x2c> bhi 0+00 <start>
+0+2c <start\+0x2c> bhi 0x0+00 <start>
[ ]+2c: R_M68HC12_RL_JUMP \*ABS\*
-0+2e <start\+0x2e> bcc 0+00 <start>
+0+2e <start\+0x2e> bcc 0x0+00 <start>
[ ]+2e: R_M68HC12_RL_JUMP \*ABS\*
-0+30 <start\+0x30> bcc 0+00 <start>
+0+30 <start\+0x30> bcc 0x0+00 <start>
[ ]+30: R_M68HC12_RL_JUMP \*ABS\*
-0+32 <start\+0x32> beq 0+00 <start>
+0+32 <start\+0x32> beq 0x0+00 <start>
[ ]+32: R_M68HC12_RL_JUMP \*ABS\*
-0+34 <start\+0x34> bls 0+00 <start>
+0+34 <start\+0x34> bls 0x0+00 <start>
[ ]+34: R_M68HC12_RL_JUMP \*ABS\*
-0+36 <start\+0x36> bcs 0+00 <start>
+0+36 <start\+0x36> bcs 0x0+00 <start>
[ ]+36: R_M68HC12_RL_JUMP \*ABS\*
-0+38 <start\+0x38> bcs 0+00 <start>
+0+38 <start\+0x38> bcs 0x0+00 <start>
[ ]+38: R_M68HC12_RL_JUMP \*ABS\*
-0+3a <start\+0x3a> bmi 0+00 <start>
+0+3a <start\+0x3a> bmi 0x0+00 <start>
[ ]+3a: R_M68HC12_RL_JUMP \*ABS\*
-0+3c <start\+0x3c> bvs 0+00 <start>
+0+3c <start\+0x3c> bvs 0x0+00 <start>
[ ]+3c: R_M68HC12_RL_JUMP \*ABS\*
-0+3e <start\+0x3e> bra 0+00 <start>
+0+3e <start\+0x3e> bra 0x0+00 <start>
[ ]+3e: R_M68HC12_RL_JUMP \*ABS\*
-0+40 <start\+0x40> bvc 0+00 <start>
+0+40 <start\+0x40> bvc 0x0+00 <start>
[ ]+40: R_M68HC12_RL_JUMP \*ABS\*
-0+42 <start\+0x42> bne 0+00 <start>
+0+42 <start\+0x42> bne 0x0+00 <start>
[ ]+42: R_M68HC12_RL_JUMP \*ABS\*
-0+44 <start\+0x44> bpl 0+00 <start>
+0+44 <start\+0x44> bpl 0x0+00 <start>
[ ]+44: R_M68HC12_RL_JUMP \*ABS\*
-0+46 <start\+0x46> brn 0+00 <start>
+0+46 <start\+0x46> brn 0x0+00 <start>
[ ]+46: R_M68HC12_RL_JUMP \*ABS\*
-0+48 <L1> lbgt 0+1e7 <L2>
+0+48 <L1> lbgt 0x0+1e7 <L2>
[ ]+48: R_M68HC12_RL_JUMP \*ABS\*
-0+4c <L1\+0x4> lbge 0+1e7 <L2>
+0+4c <L1\+0x4> lbge 0x0+1e7 <L2>
[ ]+4c: R_M68HC12_RL_JUMP \*ABS\*
-0+50 <L1\+0x8> lble 0+1e7 <L2>
+0+50 <L1\+0x8> lble 0x0+1e7 <L2>
[ ]+50: R_M68HC12_RL_JUMP \*ABS\*
-0+54 <L1\+0xc> lblt 0+1e7 <L2>
+0+54 <L1\+0xc> lblt 0x0+1e7 <L2>
[ ]+54: R_M68HC12_RL_JUMP \*ABS\*
-0+58 <L1\+0x10> lbhi 0+1e7 <L2>
+0+58 <L1\+0x10> lbhi 0x0+1e7 <L2>
[ ]+58: R_M68HC12_RL_JUMP \*ABS\*
-0+5c <L1\+0x14> lbcc 0+1e7 <L2>
+0+5c <L1\+0x14> lbcc 0x0+1e7 <L2>
[ ]+5c: R_M68HC12_RL_JUMP \*ABS\*
-0+60 <L1\+0x18> lbcc 0+1e7 <L2>
+0+60 <L1\+0x18> lbcc 0x0+1e7 <L2>
[ ]+60: R_M68HC12_RL_JUMP \*ABS\*
-0+64 <L1\+0x1c> lbeq 0+1e7 <L2>
+0+64 <L1\+0x1c> lbeq 0x0+1e7 <L2>
[ ]+64: R_M68HC12_RL_JUMP \*ABS\*
-0+68 <L1\+0x20> lbls 0+1e7 <L2>
+0+68 <L1\+0x20> lbls 0x0+1e7 <L2>
[ ]+68: R_M68HC12_RL_JUMP \*ABS\*
-0+6c <L1\+0x24> lbcs 0+1e7 <L2>
+0+6c <L1\+0x24> lbcs 0x0+1e7 <L2>
[ ]+6c: R_M68HC12_RL_JUMP \*ABS\*
-0+70 <L1\+0x28> lbcs 0+1e7 <L2>
+0+70 <L1\+0x28> lbcs 0x0+1e7 <L2>
[ ]+70: R_M68HC12_RL_JUMP \*ABS\*
-0+74 <L1\+0x2c> lbmi 0+1e7 <L2>
+0+74 <L1\+0x2c> lbmi 0x0+1e7 <L2>
[ ]+74: R_M68HC12_RL_JUMP \*ABS\*
-0+78 <L1\+0x30> lbvs 0+1e7 <L2>
+0+78 <L1\+0x30> lbvs 0x0+1e7 <L2>
[ ]+78: R_M68HC12_RL_JUMP \*ABS\*
-0+7c <L1\+0x34> lbra 0+1e7 <L2>
+0+7c <L1\+0x34> lbra 0x0+1e7 <L2>
[ ]+7c: R_M68HC12_RL_JUMP \*ABS\*
-0+80 <L1\+0x38> lbvc 0+1e7 <L2>
+0+80 <L1\+0x38> lbvc 0x0+1e7 <L2>
[ ]+80: R_M68HC12_RL_JUMP \*ABS\*
-0+84 <L1\+0x3c> lbne 0+1e7 <L2>
+0+84 <L1\+0x3c> lbne 0x0+1e7 <L2>
[ ]+84: R_M68HC12_RL_JUMP \*ABS\*
-0+88 <L1\+0x40> lbpl 0+1e7 <L2>
+0+88 <L1\+0x40> lbpl 0x0+1e7 <L2>
[ ]+88: R_M68HC12_RL_JUMP \*ABS\*
-0+8c <L1\+0x44> lbrn 0+1e7 <L2>
+0+8c <L1\+0x44> lbrn 0x0+1e7 <L2>
[ ]+8c: R_M68HC12_RL_JUMP \*ABS\*
-0+90 <L1\+0x48> lbgt 0+00 <start>
+0+90 <L1\+0x48> lbgt 0x0+00 <start>
[ ]+90: R_M68HC12_RL_JUMP \*ABS\*
[ ]+92: R_M68HC12_PCREL_16 undefined
-0+94 <L1\+0x4c> lbge 0+00 <start>
+0+94 <L1\+0x4c> lbge 0x0+00 <start>
[ ]+94: R_M68HC12_RL_JUMP \*ABS\*
[ ]+96: R_M68HC12_PCREL_16 undefined
-0+98 <L1\+0x50> lble 0+00 <start>
+0+98 <L1\+0x50> lble 0x0+00 <start>
[ ]+98: R_M68HC12_RL_JUMP \*ABS\*
[ ]+9a: R_M68HC12_PCREL_16 undefined
-0+9c <L1\+0x54> lblt 0+00 <start>
+0+9c <L1\+0x54> lblt 0x0+00 <start>
[ ]+9c: R_M68HC12_RL_JUMP \*ABS\*
[ ]+9e: R_M68HC12_PCREL_16 undefined
-0+a0 <L1\+0x58> lbhi 0+00 <start>
+0+a0 <L1\+0x58> lbhi 0x0+00 <start>
[ ]+a0: R_M68HC12_RL_JUMP \*ABS\*
[ ]+a2: R_M68HC12_PCREL_16 undefined
-0+a4 <L1\+0x5c> lbcc 0+00 <start>
+0+a4 <L1\+0x5c> lbcc 0x0+00 <start>
[ ]+a4: R_M68HC12_RL_JUMP \*ABS\*
[ ]+a6: R_M68HC12_PCREL_16 undefined
-0+a8 <L1\+0x60> lbcc 0+00 <start>
+0+a8 <L1\+0x60> lbcc 0x0+00 <start>
[ ]+a8: R_M68HC12_RL_JUMP \*ABS\*
[ ]+aa: R_M68HC12_PCREL_16 undefined
-0+ac <L1\+0x64> lbeq 0+00 <start>
+0+ac <L1\+0x64> lbeq 0x0+00 <start>
[ ]+ac: R_M68HC12_RL_JUMP \*ABS\*
[ ]+ae: R_M68HC12_PCREL_16 undefined
-0+b0 <L1\+0x68> lbls 0+00 <start>
+0+b0 <L1\+0x68> lbls 0x0+00 <start>
[ ]+b0: R_M68HC12_RL_JUMP \*ABS\*
[ ]+b2: R_M68HC12_PCREL_16 undefined
-0+b4 <L1\+0x6c> lbcs 0+00 <start>
+0+b4 <L1\+0x6c> lbcs 0x0+00 <start>
[ ]+b4: R_M68HC12_RL_JUMP \*ABS\*
[ ]+b6: R_M68HC12_PCREL_16 undefined
-0+b8 <L1\+0x70> lbcs 0+00 <start>
+0+b8 <L1\+0x70> lbcs 0x0+00 <start>
[ ]+b8: R_M68HC12_RL_JUMP \*ABS\*
[ ]+ba: R_M68HC12_PCREL_16 undefined
-0+bc <L1\+0x74> lbmi 0+00 <start>
+0+bc <L1\+0x74> lbmi 0x0+00 <start>
[ ]+bc: R_M68HC12_RL_JUMP \*ABS\*
[ ]+be: R_M68HC12_PCREL_16 undefined
-0+c0 <L1\+0x78> lbvs 0+00 <start>
+0+c0 <L1\+0x78> lbvs 0x0+00 <start>
[ ]+c0: R_M68HC12_RL_JUMP \*ABS\*
[ ]+c2: R_M68HC12_PCREL_16 undefined
-0+c4 <L1\+0x7c> jmp 0+00 <start>
+0+c4 <L1\+0x7c> jmp 0x0+00 <start>
[ ]+c4: R_M68HC12_RL_JUMP \*ABS\*
[ ]+c5: R_M68HC12_16 undefined
-0+c7 <L1\+0x7f> lbvc 0+00 <start>
+0+c7 <L1\+0x7f> lbvc 0x0+00 <start>
[ ]+c7: R_M68HC12_RL_JUMP \*ABS\*
[ ]+c9: R_M68HC12_PCREL_16 undefined
-0+cb <L1\+0x83> lbne 0+00 <start>
+0+cb <L1\+0x83> lbne 0x0+00 <start>
[ ]+cb: R_M68HC12_RL_JUMP \*ABS\*
[ ]+cd: R_M68HC12_PCREL_16 undefined
-0+cf <L1\+0x87> lbpl 0+00 <start>
+0+cf <L1\+0x87> lbpl 0x0+00 <start>
[ ]+cf: R_M68HC12_RL_JUMP \*ABS\*
[ ]+d1: R_M68HC12_PCREL_16 undefined
-0+d3 <L1\+0x8b> lbrn 0+00 <start>
+0+d3 <L1\+0x8b> lbrn 0x0+00 <start>
[ ]+d3: R_M68HC12_RL_JUMP \*ABS\*
[ ]+d5: R_M68HC12_PCREL_16 undefined
-0+d7 <L1\+0x8f> lbgt 0+10 <start\+0x10>
+0+d7 <L1\+0x8f> lbgt 0x0+10 <start\+0x10>
[ ]+d7: R_M68HC12_RL_JUMP \*ABS\*
[ ]+d9: R_M68HC12_PCREL_16 undefined
-0+db <L1\+0x93> lbge 0+10 <start\+0x10>
+0+db <L1\+0x93> lbge 0x0+10 <start\+0x10>
[ ]+db: R_M68HC12_RL_JUMP \*ABS\*
[ ]+dd: R_M68HC12_PCREL_16 undefined
-0+df <L1\+0x97> lble 0+10 <start\+0x10>
+0+df <L1\+0x97> lble 0x0+10 <start\+0x10>
[ ]+df: R_M68HC12_RL_JUMP \*ABS\*
[ ]+e1: R_M68HC12_PCREL_16 undefined
-0+e3 <L1\+0x9b> lblt 0+10 <start\+0x10>
+0+e3 <L1\+0x9b> lblt 0x0+10 <start\+0x10>
[ ]+e3: R_M68HC12_RL_JUMP \*ABS\*
[ ]+e5: R_M68HC12_PCREL_16 undefined
-0+e7 <L1\+0x9f> lbhi 0+10 <start\+0x10>
+0+e7 <L1\+0x9f> lbhi 0x0+10 <start\+0x10>
[ ]+e7: R_M68HC12_RL_JUMP \*ABS\*
[ ]+e9: R_M68HC12_PCREL_16 undefined
-0+eb <L1\+0xa3> lbcc 0+10 <start\+0x10>
+0+eb <L1\+0xa3> lbcc 0x0+10 <start\+0x10>
[ ]+eb: R_M68HC12_RL_JUMP \*ABS\*
[ ]+ed: R_M68HC12_PCREL_16 undefined
-0+ef <L1\+0xa7> lbcc 0+10 <start\+0x10>
+0+ef <L1\+0xa7> lbcc 0x0+10 <start\+0x10>
[ ]+ef: R_M68HC12_RL_JUMP \*ABS\*
[ ]+f1: R_M68HC12_PCREL_16 undefined
-0+f3 <L1\+0xab> lbeq 0+10 <start\+0x10>
+0+f3 <L1\+0xab> lbeq 0x0+10 <start\+0x10>
[ ]+f3: R_M68HC12_RL_JUMP \*ABS\*
[ ]+f5: R_M68HC12_PCREL_16 undefined
-0+f7 <L1\+0xaf> lbls 0+10 <start\+0x10>
+0+f7 <L1\+0xaf> lbls 0x0+10 <start\+0x10>
[ ]+f7: R_M68HC12_RL_JUMP \*ABS\*
[ ]+f9: R_M68HC12_PCREL_16 undefined
-0+fb <L1\+0xb3> lbcs 0+10 <start\+0x10>
+0+fb <L1\+0xb3> lbcs 0x0+10 <start\+0x10>
[ ]+fb: R_M68HC12_RL_JUMP \*ABS\*
[ ]+fd: R_M68HC12_PCREL_16 undefined
-0+ff <L1\+0xb7> lbcs 0+10 <start\+0x10>
+0+ff <L1\+0xb7> lbcs 0x0+10 <start\+0x10>
[ ]+ff: R_M68HC12_RL_JUMP \*ABS\*
[ ]+101: R_M68HC12_PCREL_16 undefined
-0+103 <L1\+0xbb> lbmi 0+10 <start\+0x10>
+0+103 <L1\+0xbb> lbmi 0x0+10 <start\+0x10>
[ ]+103: R_M68HC12_RL_JUMP \*ABS\*
[ ]+105: R_M68HC12_PCREL_16 undefined
-0+107 <L1\+0xbf> lbvs 0+10 <start\+0x10>
+0+107 <L1\+0xbf> lbvs 0x0+10 <start\+0x10>
[ ]+107: R_M68HC12_RL_JUMP \*ABS\*
[ ]+109: R_M68HC12_PCREL_16 undefined
-0+10b <L1\+0xc3> lbra 0+10 <start\+0x10>
+0+10b <L1\+0xc3> lbra 0x0+10 <start\+0x10>
[ ]+10b: R_M68HC12_RL_JUMP \*ABS\*
[ ]+10d: R_M68HC12_PCREL_16 undefined
-0+10f <L1\+0xc7> lbvc 0+10 <start\+0x10>
+0+10f <L1\+0xc7> lbvc 0x0+10 <start\+0x10>
[ ]+10f: R_M68HC12_RL_JUMP \*ABS\*
[ ]+111: R_M68HC12_PCREL_16 undefined
-0+113 <L1\+0xcb> lbne 0+10 <start\+0x10>
+0+113 <L1\+0xcb> lbne 0x0+10 <start\+0x10>
[ ]+113: R_M68HC12_RL_JUMP \*ABS\*
[ ]+115: R_M68HC12_PCREL_16 undefined
-0+117 <L1\+0xcf> lbpl 0+10 <start\+0x10>
+0+117 <L1\+0xcf> lbpl 0x0+10 <start\+0x10>
[ ]+117: R_M68HC12_RL_JUMP \*ABS\*
[ ]+119: R_M68HC12_PCREL_16 undefined
-0+11b <L1\+0xd3> lbrn 0+10 <start\+0x10>
+0+11b <L1\+0xd3> lbrn 0x0+10 <start\+0x10>
[ ]+11b: R_M68HC12_RL_JUMP \*ABS\*
[ ]+11d: R_M68HC12_PCREL_16 undefined
...
diff --git a/gas/testsuite/gas/m68hc11/bug-1825.d b/gas/testsuite/gas/m68hc11/bug-1825.d
index 0f134fc..055d82d 100644
--- a/gas/testsuite/gas/m68hc11/bug-1825.d
+++ b/gas/testsuite/gas/m68hc11/bug-1825.d
@@ -15,9 +15,9 @@
nop
0: a7 nop
ldx L1,pc ; Assemble to 5\-bit > 0 offset
- 1: ee c2 ldx 2,PC \{5 <L1>\}
+ 1: ee c2 ldx 0x2,PC \{0x5 <L1>\}
bra L2
- 3: 20 02 bra 7 <L2>
+ 3: 20 02 bra 0x7 <L2>
3: R_M68HC12_RL_JUMP \*ABS\*
0+5 <L1>:
@@ -28,7 +28,7 @@
.dc.w 0xaabb
L2:
subd L1,pc ; Assemble to 5\-bit < 0 offset
- 7: a3 dc subd \-4,PC \{5 <L1>\}
+ 7: a3 dc subd 0xfffc,PC \{0x5 <L1>\}
0+9 <L3>:
9: a7 nop
@@ -48,9 +48,9 @@
L3:
.ds.b 14, 0xA7
ldab L3,pc ; 5\-bit < 0 offset
- 17: e6 d0 ldab \-16,PC \{9 <L3>\}
+ 17: e6 d0 ldab 0xfff0,PC \{0x9 <L3>\}
ldab L4,pc ; 5\-bit > 0 offset
- 19: e6 cf ldab 15,PC \{2a <L4>\}
+ 19: e6 cf ldab 0xf,PC \{0x2a <L4>\}
...
0+2a <L4>:
@@ -59,9 +59,9 @@
L4:
.skip 128
subd L4,pc ; 9\-bit < 0 offset
- aa: a3 f9 7d subd \-131,PC \{2a <L4>\}
+ aa: a3 f9 7d subd 0xff7d,PC \{0x2a <L4>\}
addd L5,pc ; 9\-bit > 0 offset
- ad: e3 f8 80 addd 128,PC \{130 <L5>\}
+ ad: e3 f8 80 addd 0x80,PC \{0x130 <L5>\}
...
0+130 <L5>:
@@ -71,9 +71,9 @@
L5:
.skip 256\-3
orab L5,pc ; 9 bit < 0 offset \(min value\)
- 22d: ea f9 00 orab \-256,PC \{130 <L5>\}
+ 22d: ea f9 00 orab 0xff00,PC \{0x130 <L5>\}
oraa L6,pc ; 9 bit > 0 offset \(max value\)
- 230: aa f8 ff oraa 255,PC \{332 <L6>\}
+ 230: aa f8 ff oraa 0xff,PC \{0x332 <L6>\}
...
0+332 <L6>:
@@ -84,31 +84,31 @@
L6:
.skip 256\-2
orab L6,pc ; 16 bit < 0 offset
- 430: ea fa fe fe orab \-258,PC \{332 <L6>\}
+ 430: ea fa fe fe orab 0xfefe,PC \{0x332 <L6>\}
anda _main,pc ; 16 bit < 0 offset
- 434: a4 fa fb c8 anda \-1080,PC \{0 <_main>\}
+ 434: a4 fa fb c8 anda 0xfbc8,PC \{0x0 <_main>\}
andb L7,pc
- 438: e4 fa 01 00 andb 256,PC \{53c <L7>\}
+ 438: e4 fa 01 00 andb 0x100,PC \{0x53c <L7>\}
...
0+53c <L7>:
.skip 256
L7:
stab external,pc ; External 16\-bit PCREL
- 53c: 6b fa fa c0 stab \-1344,PC \{0 <_main>\}
+ 53c: 6b fa fa c0 stab 0xfac0,PC \{0x0 <_main>\}
53e: R_M68HC12_PCREL_16 external
ldd _table,pc
- 540: ec cf ldd 15,PC \{551 <_table>\}
+ 540: ec cf ldd 0xf,PC \{0x551 <_table>\}
addd _table\+2,pc
- 542: e3 cf addd 15,PC \{553 <_table\+0x2>\}
+ 542: e3 cf addd 0xf,PC \{0x553 <_table\+0x2>\}
subd _table\+4,pc
- 544: a3 cf subd 15,PC \{555 <_table\+0x4>\}
+ 544: a3 cf subd 0xf,PC \{0x555 <_table\+0x4>\}
addd _table\+8,pc
- 546: e3 f8 10 addd 16,PC \{559 <_table\+0x8>\}
+ 546: e3 f8 10 addd 0x10,PC \{0x559 <_table\+0x8>\}
addd _table\+12,pc
- 549: e3 f8 11 addd 17,PC \{55d <_table\+0xc>\}
+ 549: e3 f8 11 addd 0x11,PC \{0x55d <_table\+0xc>\}
addd _table\+16,pc
- 54c: e3 f8 12 addd 18,PC \{561 <_table\+0x10>\}
+ 54c: e3 f8 12 addd 0x12,PC \{0x561 <_table\+0x10>\}
rts
54f: 3d rts
nop
@@ -119,11 +119,11 @@
_table:
.ds.b 16,0
leax _table,sp ; 16\-bit absolute reloc
- 561: 1a f2 00 00 leax 0,SP
+ 561: 1a f2 00 00 leax 0x0,SP
563: R_M68HC12_16 _table
leay _table,x
- 565: 19 e2 00 00 leay 0,X
+ 565: 19 e2 00 00 leay 0x0,X
567: R_M68HC12_16 _table
leax _table,y
- 569: 1a ea 00 00 leax 0,Y
+ 569: 1a ea 00 00 leax 0x0,Y
56b: R_M68HC12_16 _table
diff --git a/gas/testsuite/gas/m68hc11/hexprefix.d b/gas/testsuite/gas/m68hc11/hexprefix.d
new file mode 100644
index 0000000..f6c9dd7
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/hexprefix.d
@@ -0,0 +1,19 @@
+#objdump: -d -mm9s12x --prefix-addresses --reloc
+#as: -mm9s12x
+#name: verify hex prefixes present and not duplicated (hexprefix)
+
+dump.o: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+0x00000000 ldaa 0x00001234
+0x00000003 ldab #0x12
+0x00000005 ldd \*0x00000023
+0x00000007 ldx #0x00001234
+0x0000000a movw 0x00001234, 0x00002345
+0x00000010 movb 0x00003456, 0x00004567
+0x00000016 orx 0x00008765
+0x0000001a call 0x00104007 \{0x00008007, 0x3d\}
+ 1a: R_M68HC12_RL_JUMP \*ABS\*
+0x0000001e movw #0x00001234, 0x00002345
+0x00000024 movb #0x23, 0x00003456
diff --git a/gas/testsuite/gas/m68hc11/hexprefix.s b/gas/testsuite/gas/m68hc11/hexprefix.s
new file mode 100644
index 0000000..18647f2
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/hexprefix.s
@@ -0,0 +1,14 @@
+# Test for correct generation of hex prefixes.
+
+ .sect .text
+
+ ldaa 0x1234
+ ldab #0x12
+ ldd *0x23
+ ldx #0x1234
+ movw 0x1234, 0x2345
+ movb 0x3456, 0x4567
+ orx 0x8765
+ call 0x8007, 0x3d
+ movw #0x1234, 0x2345
+ movb #0x23, 0x3456
diff --git a/gas/testsuite/gas/m68hc11/indexed12.d b/gas/testsuite/gas/m68hc11/indexed12.d
index 360d87b..1862b6a 100644
--- a/gas/testsuite/gas/m68hc11/indexed12.d
+++ b/gas/testsuite/gas/m68hc11/indexed12.d
@@ -17,122 +17,122 @@
0: a7 nop
;;; Global check \(1st\)
ldab L1\-_main,x ; Offset/const of these 2 insns must be
- 1: e6 e0 93 ldab 147,X
+ 1: e6 e0 93 ldab 0x93,X
ldaa #L1\-_main ; identical \(likewise for 2nd global check\)
- 4: 86 93 ldaa #147
+ 4: 86 93 ldaa #0x93
;;; Test gas relax with difference of symbols \(same section\)
ldaa L2\-L1,x ; \-> ldaa 2,x \(5\-bit offset\), text seg
- 6: a6 02 ldaa 2,X
+ 6: a6 02 ldaa 0x2,X
adda L1\-L2,y ; \-> adda \-2,y \(5\-bit offset\), text seg
- 8: ab 5e adda \-2,Y
+ 8: ab 5e adda 0xfffe,Y
orab L7\-L6,sp ; \-> orab 8,sp \(5\-bit offset\), text seg
- a: ea 88 orab 8,SP
+ a: ea 88 orab 0x8,SP
anda L8\-L7,sp ; \-> anda 15,sp \(5\-bit offset\), text seg
- c: a4 8f anda 15,SP
+ c: a4 8f anda 0xf,SP
eora L7\-L8,sp ; \-> eora \-15,sp \(5\-bit offset\), text seg
- e: a8 91 eora \-15,SP
+ e: a8 91 eora 0xfff1,SP
eorb L7\-L9,sp ; \-> eorb \-16,sp \(5\-bit offset\), text seg
- 10: e8 90 eorb \-16,SP
+ 10: e8 90 eorb 0xfff0,SP
andb L9\-L7,sp ; \-> andb 16,sp \(9\-bit offset\), text seg
- 12: e4 f0 10 andb 16,SP
+ 12: e4 f0 10 andb 0x10,SP
staa L7\-L10,x ; \-> staa \-17,x \(9\-bit offset\), text seg
- 15: 6a e1 ef staa \-17,X
+ 15: 6a e1 ef staa 0xffef,X
stab L11\-L10,y ; \-> stab 128,y \(9\-bit offset\), text seg
- 18: 6b e8 80 stab 128,Y
+ 18: 6b e8 80 stab 0x80,Y
stab L10\-L11,y ; \-> stab \-128,y \(9\-bit offset\), text seg
- 1b: 6b e9 80 stab \-128,Y
+ 1b: 6b e9 80 stab 0xff80,Y
stab L11\-L10\+1,y ; \-> stab 129,y \(9\-bit offset\), text seg
- 1e: 6b e8 81 stab 129,Y
+ 1e: 6b e8 81 stab 0x81,Y
stab L10\-L11\-1,y ; \-> stab \-129,y \(9\-bit offset\), text seg
- 21: 6b e9 7f stab \-129,Y
+ 21: 6b e9 7f stab 0xff7f,Y
stab L11\-1\-L10,y ; \-> stab 127,y \(9\-bit offset\), text seg
- 24: 6b e8 7f stab 127,Y
+ 24: 6b e8 7f stab 0x7f,Y
stab L10\-1\-L11,y ; \-> stab \-129,y \(9\-bit offset\), text seg
- 27: 6b e9 7f stab \-129,Y
+ 27: 6b e9 7f stab 0xff7f,Y
tst L12\-L10,x ; \-> tst 255,x \(9\-bit offset\), text seg
- 2a: e7 e0 ff tst 255,X
+ 2a: e7 e0 ff tst 0xff,X
tst L10\-L12,x ; \-> tst \-255,x \(9\-bit offset\), text seg
- 2d: e7 e1 01 tst \-255,X
+ 2d: e7 e1 01 tst 0xff01,X
tst L12\-L10\+1,x ; \-> tst 256,x \(16\-bit offset\), text seg
- 30: e7 e2 01 00 tst 256,X
+ 30: e7 e2 01 00 tst 0x100,X
mina L13\-L10,x ; \-> mina 256,x \(16\-bit offset\)
- 34: 18 19 e2 01 mina 256,X
+ 34: 18 19 e2 01 mina 0x100,X
38: 00
mina L10\-L13,x ; \-> mina \-256,x \(9\-bit offset\)
- 39: 18 19 e1 00 mina \-256,X
+ 39: 18 19 e1 00 mina 0xff00,X
maxa L14\-L10,x ; \-> maxa 257,x \(16\-bit offset\)
- 3d: 18 18 e2 01 maxa 257,X
+ 3d: 18 18 e2 01 maxa 0x101,X
41: 01
maxa L10\-L14,x ; \-> maxa \-257,x \(16\-bit offset\)
- 42: 18 18 e2 fe maxa \-257,X
+ 42: 18 18 e2 fe maxa 0xfeff,X
46: ff
;;; Test gas relax with difference of symbols \(different section\)
ldaa D2\-D1,x ; \-> ldaa 2,x \(5\-bit offset\), data seg
- 47: a6 02 ldaa 2,X
+ 47: a6 02 ldaa 0x2,X
adda D1\-D2,y ; \-> adda \-2,y \(5\-bit offset\), data seg
- 49: ab 5e adda \-2,Y
+ 49: ab 5e adda 0xfffe,Y
orab D7\-D6,sp ; \-> orab 8,sp \(5\-bit offset\), data seg
- 4b: ea 88 orab 8,SP
+ 4b: ea 88 orab 0x8,SP
anda D8\-D7,sp ; \-> anda 15,sp \(5\-bit offset\), data seg
- 4d: a4 8f anda 15,SP
+ 4d: a4 8f anda 0xf,SP
eora D7\-D8,sp ; \-> eora \-15,sp \(5\-bit offset\), data seg
- 4f: a8 91 eora \-15,SP
+ 4f: a8 91 eora 0xfff1,SP
eorb D7\-D9,sp ; \-> eorb \-16,sp \(5\-bit offset\), data seg
- 51: e8 90 eorb \-16,SP
+ 51: e8 90 eorb 0xfff0,SP
andb D9\-D7,sp ; \-> andb 16,sp \(9\-bit offset\), data seg
- 53: e4 f0 10 andb 16,SP
+ 53: e4 f0 10 andb 0x10,SP
staa D7\-D10,x ; \-> staa \-17,x \(9\-bit offset\), data seg
- 56: 6a e1 ef staa \-17,X
+ 56: 6a e1 ef staa 0xffef,X
stab D11\-D10,y ; \-> stab 128,y \(9\-bit offset\), data seg
- 59: 6b e8 80 stab 128,Y
+ 59: 6b e8 80 stab 0x80,Y
stab D10\-D11,y ; \-> stab \-128,y \(9\-bit offset\), data seg
- 5c: 6b e9 80 stab \-128,Y
+ 5c: 6b e9 80 stab 0xff80,Y
stab D11\-D10\+1,y ; \-> stab 129,y \(9\-bit offset\), data seg
- 5f: 6b e8 81 stab 129,Y
+ 5f: 6b e8 81 stab 0x81,Y
stab D10\-D11\+1,y ; \-> stab \-127,y \(9\-bit offset\), data seg
- 62: 6b e9 81 stab \-127,Y
+ 62: 6b e9 81 stab 0xff81,Y
stab D11\-1\-D10,y ; \-> stab 127,y \(9\-bit offset\), data seg
- 65: 6b e8 7f stab 127,Y
+ 65: 6b e8 7f stab 0x7f,Y
stab D10\-1\-D11,y ; \-> stab \-129,y \(9\-bit offset\), data seg
- 68: 6b e9 7f stab \-129,Y
+ 68: 6b e9 7f stab 0xff7f,Y
tst D12\-D10,x ; \-> tst 255,x \(9\-bit offset\), data seg
- 6b: e7 e0 ff tst 255,X
+ 6b: e7 e0 ff tst 0xff,X
tst D10\-D12,x ; \-> tst \-255,x \(9\-bit offset\), data seg
- 6e: e7 e1 01 tst \-255,X
+ 6e: e7 e1 01 tst 0xff01,X
tst D12\-D10\+1,x ; \-> tst 256,x \(16\-bit offset\), data seg
- 71: e7 e2 01 00 tst 256,X
+ 71: e7 e2 01 00 tst 0x100,X
mina D13\-D10,x ; \-> mina 256,x \(16\-bit offset\)
- 75: 18 19 e2 01 mina 256,X
+ 75: 18 19 e2 01 mina 0x100,X
79: 00
mina D10\-D13,x ; \-> mina \-256,x \(9\-bit offset\)
- 7a: 18 19 e1 00 mina \-256,X
+ 7a: 18 19 e1 00 mina 0xff00,X
maxa D14\-D10,x ; \-> maxa 257,x \(16\-bit offset\)
- 7e: 18 18 e2 01 maxa 257,X
+ 7e: 18 18 e2 01 maxa 0x101,X
82: 01
maxa D10\-D14,x ; \-> maxa \-257,x \(16\-bit offset\)
- 83: 18 18 e2 fe maxa \-257,X
+ 83: 18 18 e2 fe maxa 0xfeff,X
87: ff
;;; Global check \(2nd\)
ldab L1\-_main,x
- 88: e6 e0 93 ldab 147,X
+ 88: e6 e0 93 ldab 0x93,X
ldaa #L1\-_main
- 8b: 86 93 ldaa #147
+ 8b: 86 93 ldaa #0x93
;;; Indexed addressing with external symbol
ldab _external\+128,x
- 8d: e6 e2 00 80 ldab 128,X
+ 8d: e6 e2 00 80 ldab 0x80,X
bra L2
- 91: 20 02 bra 95 <L2>
+ 91: 20 02 bra 0x95 <L2>
0+93 <L1>:
93: aa bb oraa 5,SP\-
diff --git a/gas/testsuite/gas/m68hc11/insns-dwarf2.d b/gas/testsuite/gas/m68hc11/insns-dwarf2.d
index 5b05bb7..706a04e 100644
--- a/gas/testsuite/gas/m68hc11/insns-dwarf2.d
+++ b/gas/testsuite/gas/m68hc11/insns-dwarf2.d
@@ -16,18 +16,18 @@
_start:
lds #stack\+1024
- 0: 8e 04 00 lds #400 <stack_end>
+ 0: 8e 04 00 lds #0x400 <stack_end>
ldx #1
- 3: ce 00 01 ldx #1 <_start\+0x1>
+ 3: ce 00 01 ldx #0x1 <_start\+0x1>
0+06 <Loop>:
Loop:
jsr test
- 6: bd 00 00 jsr 0 <_start>
+ 6: bd 00 00 jsr 0x0 <_start>
dex
9: 09 dex
bne Loop
- a: 26 fa bne 6 <Loop>
+ a: 26 fa bne 0x6 <Loop>
0000000c <Stop>:
c: cd 03 .byte 0xcd, 0x03
@@ -36,15 +36,15 @@
.byte 0xcd
.byte 3
bra _start
- e: 20 f0 bra 0 <_start>
+ e: 20 f0 bra 0x0 <_start>
00000010 <test>:
test:
ldd #2
- 10: cc 00 02 ldd #2 <_start\+0x2>
+ 10: cc 00 02 ldd #0x2 <_start\+0x2>
jsr test2
- 13: bd 00 00 jsr 0 <_start>
+ 13: bd 00 00 jsr 0x0 <_start>
rts
16: 39 rts
@@ -56,59 +56,59 @@
.globl test2
test2:
ldx value,y
- 17: cd ee 17 ldx 23,y
+ 17: cd ee 17 ldx 0x17,y
std value,x
- 1a: ed 17 std 23,x
+ 1a: ed 17 std 0x17,x
ldd ,x
- 1c: ec 00 ldd 0,x
+ 1c: ec 00 ldd 0x0,x
sty ,y
- 1e: 18 ef 00 sty 0,y
+ 1e: 18 ef 00 sty 0x0,y
stx ,y
- 21: cd ef 00 stx 0,y
+ 21: cd ef 00 stx 0x0,y
brclr 6,x,#4,test2
- 24: 1f 06 04 ef brclr 6,x #\$04 17 <test2>
+ 24: 1f 06 04 ef brclr 0x6,x, #0x04, 0x17 <test2>
brclr 12,x #8 test2
- 28: 1f 0c 08 eb brclr 12,x #\$08 17 <test2>
+ 28: 1f 0c 08 eb brclr 0xc,x, #0x08, 0x17 <test2>
ldd \*ZD1
- 2c: dc 00 ldd \*0 <_start>
+ 2c: dc 00 ldd \*0x0 <_start>
ldx \*ZD1\+2
- 2e: de 02 ldx \*2 <_start\+0x2>
+ 2e: de 02 ldx \*0x2 <_start\+0x2>
clr \*ZD2
- 30: 7f 00 00 clr 0 <_start>
+ 30: 7f 00 00 clr 0x0 <_start>
clr \*ZD2\+1
- 33: 7f 00 01 clr 1 <_start\+0x1>
+ 33: 7f 00 01 clr 0x1 <_start\+0x1>
bne .-4
- 36: 26 fc bne 34 <test2\+0x1d>
+ 36: 26 fc bne 0x34 <test2\+0x1d>
beq .\+2
- 38: 27 02 beq 3c <test2\+0x25>
+ 38: 27 02 beq 0x3c <test2\+0x25>
bclr \*ZD1\+1, #32
- 3a: 15 01 20 bclr \*1 <_start\+0x1> #\$20
+ 3a: 15 01 20 bclr \*0x1 <_start\+0x1>, #0x20
brclr \*ZD2\+2, #40, test2
- 3d: 13 02 28 d6 brclr \*2 <_start\+0x2> #\$28 17 <test2>
+ 3d: 13 02 28 d6 brclr \*0x2 <_start\+0x2>, #0x28, 0x17 <test2>
ldy #24\+_start-44
- 41: 18 ce ff ec ldy #ffec <stack_end\+0xfbec>
+ 41: 18 ce ff ec ldy #0xffec <stack_end\+0xfbec>
ldd B_low,y
- 45: 18 ec 0c ldd 12,y
+ 45: 18 ec 0c ldd 0xc,y
addd A_low,y
- 48: 18 e3 2c addd 44,y
+ 48: 18 e3 2c addd 0x2c,y
addd D_low,y
- 4b: 18 e3 32 addd 50,y
+ 4b: 18 e3 32 addd 0x32,y
subd A_low
- 4e: b3 00 2c subd 2c <test2\+0x15>
+ 4e: b3 00 2c subd 0x2c <test2\+0x15>
subd #A_low
- 51: 83 00 2c subd #2c <test2\+0x15>
+ 51: 83 00 2c subd #0x2c <test2\+0x15>
jmp Stop
- 54: 7e 00 00 jmp 0 <_start>
+ 54: 7e 00 00 jmp 0x0 <_start>
00000057 <L1>:
L1:
anda #%lo\(test2\)
- 57: 84 17 anda #23
+ 57: 84 17 anda #0x17
andb #%hi\(test2\)
- 59: c4 00 andb #0
+ 59: c4 00 andb #0x0
ldab #%page\(test2\) ; Check that the relocs are against symbol
- 5b: c6 00 ldab #0
+ 5b: c6 00 ldab #0x0
ldy #%addr\(test2\) ; otherwise linker relaxation fails
- 5d: 18 ce 00 00 ldy #0 <_start>
+ 5d: 18 ce 00 00 ldy #0x0 <_start>
rts
61: 39 rts
diff --git a/gas/testsuite/gas/m68hc11/insns.d b/gas/testsuite/gas/m68hc11/insns.d
index 41cb4b0..a90620f 100644
--- a/gas/testsuite/gas/m68hc11/insns.d
+++ b/gas/testsuite/gas/m68hc11/insns.d
@@ -7,63 +7,63 @@
.*: +file format elf32\-m68hc11
Disassembly of section .text:
-0+0+ <_start> lds #0+0400 <stack_end>
+0+0+ <_start> lds #0x0+0400 <stack_end>
[ ]+1: R_M68HC11_16 stack
-0+0003 <_start\+0x3> ldx #0+0001 <_start\+0x1>
-0+0006 <Loop> jsr 0+0+ <_start>
+0+0003 <_start\+0x3> ldx #0x0+0001 <_start\+0x1>
+0+0006 <Loop> jsr 0x0+0+ <_start>
[ ]+6: R_M68HC11_RL_JUMP \*ABS\*
[ ]+7: R_M68HC11_16 test
0+0009 <Loop\+0x3> dex
-0+000a <Loop\+0x4> bne 0+0006 <Loop>
+0+000a <Loop\+0x4> bne 0x0+0006 <Loop>
[ ]+a: R_M68HC11_RL_JUMP \*ABS\*
0+000c <Stop> .byte 0xcd, 0x03
-0+000e <Stop\+0x2> bra 0+0+ <_start>
+0+000e <Stop\+0x2> bra 0x0+0+ <_start>
[ ]+e: R_M68HC11_RL_JUMP \*ABS\*
-0+0010 <test> ldd #0+0002 <_start\+0x2>
-0+0013 <test\+0x3> jsr 0+0+ <_start>
+0+0010 <test> ldd #0x0+0002 <_start\+0x2>
+0+0013 <test\+0x3> jsr 0x0+0+ <_start>
[ ]+13: R_M68HC11_RL_JUMP \*ABS\*
[ ]+14: R_M68HC11_16 test2
0+0016 <test\+0x6> rts
-0+0017 <test2> ldx 23,y
-0+001a <test2\+0x3> std 23,x
-0+001c <test2\+0x5> ldd 0,x
-0+001e <test2\+0x7> sty 0,y
-0+0021 <test2\+0xa> stx 0,y
-0+0024 <test2\+0xd> brclr 6,x #\$04 0+0017 <test2>
+0+0017 <test2> ldx 0x17,y
+0+001a <test2\+0x3> std 0x17,x
+0+001c <test2\+0x5> ldd 0x0,x
+0+001e <test2\+0x7> sty 0x0,y
+0+0021 <test2\+0xa> stx 0x0,y
+0+0024 <test2\+0xd> brclr 0x6,x, #0x04, 0x0+0017 <test2>
[ ]+24: R_M68HC11_RL_JUMP \*ABS\*
-0+0028 <test2\+0x11> brclr 12,x #\$08 0+0017 <test2>
+0+0028 <test2\+0x11> brclr 0xc,x, #0x08, 0x0+0017 <test2>
[ ]+28: R_M68HC11_RL_JUMP \*ABS\*
-0+002c <test2\+0x15> ldd \*0+0+ <_start>
+0+002c <test2\+0x15> ldd \*0x0+0+ <_start>
[ ]+2d: R_M68HC11_8 ZD1
-0+002e <test2\+0x17> ldx \*0+0002 <_start\+0x2>
+0+002e <test2\+0x17> ldx \*0x0+0002 <_start\+0x2>
[ ]+2f: R_M68HC11_8 ZD1
-0+0030 <test2\+0x19> clr 0+0+ <_start>
+0+0030 <test2\+0x19> clr 0x0+0+ <_start>
[ ]+31: R_M68HC11_16 ZD2
-0+0033 <test2\+0x1c> clr 0+0001 <_start\+0x1>
+0+0033 <test2\+0x1c> clr 0x0+0001 <_start\+0x1>
[ ]+34: R_M68HC11_16 ZD2
-0+0036 <test2\+0x1f> bne 0+0034 <test2\+0x1d>
-0+0038 <test2\+0x21> beq 0+003c <test2\+0x25>
-0+003a <test2\+0x23> bclr \*0+0001 <_start\+0x1> #\$20
+0+0036 <test2\+0x1f> bne 0x0+0034 <test2\+0x1d>
+0+0038 <test2\+0x21> beq 0x0+003c <test2\+0x25>
+0+003a <test2\+0x23> bclr \*0x0+0001 <_start\+0x1>, #0x20
[ ]+3b: R_M68HC11_8 ZD1
-0+003d <test2\+0x26> brclr \*0+0002 <_start\+0x2> #\$28 0+0017 <test2>
+0+003d <test2\+0x26> brclr \*0x0+0002 <_start\+0x2>, #0x28, 0x0+0017 <test2>
[ ]+3d: R_M68HC11_RL_JUMP \*ABS\*
[ ]+3e: R_M68HC11_8 ZD2
-0+0041 <test2\+0x2a> ldy #0+ffec <stack_end\+0xfbec>
+0+0041 <test2\+0x2a> ldy #0x0+ffec <stack_end\+0xfbec>
[ ]+43: R_M68HC11_16 _start
-0+0045 <test2\+0x2e> ldd 12,y
-0+0048 <test2\+0x31> addd 44,y
-0+004b <test2\+0x34> addd 50,y
-0+004e <test2\+0x37> subd 0+002c <test2\+0x15>
-0+0051 <test2\+0x3a> subd #0+002c <test2\+0x15>
-0+0054 <test2\+0x3d> jmp 0+0+ <_start>
+0+0045 <test2\+0x2e> ldd 0xc,y
+0+0048 <test2\+0x31> addd 0x2c,y
+0+004b <test2\+0x34> addd 0x32,y
+0+004e <test2\+0x37> subd 0x0+002c <test2\+0x15>
+0+0051 <test2\+0x3a> subd #0x0+002c <test2\+0x15>
+0+0054 <test2\+0x3d> jmp 0x0+0+ <_start>
[ ]+54: R_M68HC11_RL_JUMP \*ABS\*
[ ]+55: R_M68HC11_16 Stop
-0+0057 <L1> anda #23
+0+0057 <L1> anda #0x17
[ ]+58: R_M68HC11_LO8 \.text
-0+0059 <L1\+0x2> andb #0
+0+0059 <L1\+0x2> andb #0x0
[ ]+5a: R_M68HC11_HI8 \.text
-0+5b <L1\+0x4> ldab #0
+0+5b <L1\+0x4> ldab #0x0
[ ]+5c: R_M68HC11_PAGE test2
-0+5d <L1\+0x6> ldy #0+ <_start>
+0+5d <L1\+0x6> ldy #0x0+ <_start>
[ ]+5f: R_M68HC11_LO16 test2
0+61 <L1\+0xa> rts
diff --git a/gas/testsuite/gas/m68hc11/insns12.d b/gas/testsuite/gas/m68hc11/insns12.d
index c42cfcc..3abc5a9 100644
--- a/gas/testsuite/gas/m68hc11/insns12.d
+++ b/gas/testsuite/gas/m68hc11/insns12.d
@@ -5,81 +5,81 @@
.*: +file format elf32-m68hc12
Disassembly of section .text:
-0+ <call_test> call 0+ <call_test> \{0+ <call_test>, 0\}
+0+ <call_test> call 0x0+ <call_test> \{0x0+ <call_test>, 0x0\}
0: R_M68HC12_RL_JUMP \*ABS\*
1: R_M68HC12_24 _foo
-0+4 <call_test\+0x4> call 0+ <call_test> \{0+ <call_test>, 1\}
+0+4 <call_test\+0x4> call 0x0+ <call_test> \{0x0+ <call_test>, 0x1\}
4: R_M68HC12_RL_JUMP \*ABS\*
5: R_M68HC12_LO16 _foo
-0+8 <call_test\+0x8> call 0+ <call_test> \{0+ <call_test>, 0\}
+0+8 <call_test\+0x8> call 0x0+ <call_test> \{0x0+ <call_test>, 0x0\}
8: R_M68HC12_RL_JUMP \*ABS\*
9: R_M68HC12_LO16 _foo
b: R_M68HC12_PAGE foo_page
-0+c <call_test\+0xc> call 0,X, 3
+0+c <call_test\+0xc> call 0x0,X, 0x3
c: R_M68HC12_RL_JUMP \*ABS\*
-0+f <call_test\+0xf> call 4,Y, 12
+0+f <call_test\+0xf> call 0x4,Y, 0xc
f: R_M68HC12_RL_JUMP \*ABS\*
-0+12 <call_test\+0x12> call 7,SP, 13
+0+12 <call_test\+0x12> call 0x7,SP, 0xd
12: R_M68HC12_RL_JUMP \*ABS\*
-0+15 <call_test\+0x15> call 12,X, 0
+0+15 <call_test\+0x15> call 0xc,X, 0x0
15: R_M68HC12_RL_JUMP \*ABS\*
17: R_M68HC12_PAGE foo_page
-0+18 <call_test\+0x18> call 4,Y, 0
+0+18 <call_test\+0x18> call 0x4,Y, 0x0
18: R_M68HC12_RL_JUMP \*ABS\*
1a: R_M68HC12_PAGE foo_page
-0+1b <call_test\+0x1b> call 7,SP, 0
+0+1b <call_test\+0x1b> call 0x7,SP, 0x0
1b: R_M68HC12_RL_JUMP \*ABS\*
1d: R_M68HC12_PAGE foo_page
0+1e <call_test\+0x1e> call \[D,X\]
1e: R_M68HC12_RL_JUMP \*ABS\*
-0+20 <call_test\+0x20> ldab \[32767,SP\]
-0+24 <call_test\+0x24> call \[2048,SP\]
+0+20 <call_test\+0x20> ldab \[0x7fff,SP\]
+0+24 <call_test\+0x24> call \[0x800,SP\]
24: R_M68HC12_RL_JUMP \*ABS\*
-0+28 <call_test\+0x28> call \[0,X\]
+0+28 <call_test\+0x28> call \[0x0,X\]
28: R_M68HC12_RL_JUMP \*ABS\*
2a: R_M68HC12_16 _foo
0+2c <call_test\+0x2c> rtc
-0+2d <special_test> emacs 0+ <call_test>
+0+2d <special_test> emacs 0x0+ <call_test>
2f: R_M68HC12_16 _foo
-0+31 <special_test\+0x4> maxa 0,X
-0+34 <special_test\+0x7> maxa 819,Y
+0+31 <special_test\+0x4> maxa 0x0,X
+0+34 <special_test\+0x7> maxa 0x333,Y
0+39 <special_test\+0xc> maxa \[D,X\]
-0+3c <special_test\+0xf> maxa \[0,X\]
+0+3c <special_test\+0xf> maxa \[0x0,X\]
3f: R_M68HC12_16 _foo
-0+41 <special_test\+0x14> maxm 0,X
-0+44 <special_test\+0x17> maxm 819,Y
+0+41 <special_test\+0x14> maxm 0x0,X
+0+44 <special_test\+0x17> maxm 0x333,Y
0+49 <special_test\+0x1c> maxm \[D,X\]
-0+4c <special_test\+0x1f> maxm \[0,X\]
+0+4c <special_test\+0x1f> maxm \[0x0,X\]
4f: R_M68HC12_16 _foo
-0+51 <special_test\+0x24> emaxd 0,X
-0+54 <special_test\+0x27> emaxd 819,Y
+0+51 <special_test\+0x24> emaxd 0x0,X
+0+54 <special_test\+0x27> emaxd 0x333,Y
0+59 <special_test\+0x2c> emaxd \[D,X\]
-0+5c <special_test\+0x2f> emaxd \[0,X\]
+0+5c <special_test\+0x2f> emaxd \[0x0,X\]
5f: R_M68HC12_16 _foo
-0+61 <special_test\+0x34> emaxm 0,X
-0+64 <special_test\+0x37> emaxm 819,Y
+0+61 <special_test\+0x34> emaxm 0x0,X
+0+64 <special_test\+0x37> emaxm 0x333,Y
0+69 <special_test\+0x3c> emaxm \[D,X\]
-0+6c <special_test\+0x3f> emaxm \[0,X\]
+0+6c <special_test\+0x3f> emaxm \[0x0,X\]
6f: R_M68HC12_16 _foo
-0+71 <special_test\+0x44> mina 0,X
-0+74 <special_test\+0x47> mina 819,Y
+0+71 <special_test\+0x44> mina 0x0,X
+0+74 <special_test\+0x47> mina 0x333,Y
0+79 <special_test\+0x4c> mina \[D,X\]
-0+7c <special_test\+0x4f> mina \[0,X\]
+0+7c <special_test\+0x4f> mina \[0x0,X\]
7f: R_M68HC12_16 _foo
-0+81 <special_test\+0x54> minm 0,X
-0+84 <special_test\+0x57> minm 819,Y
+0+81 <special_test\+0x54> minm 0x0,X
+0+84 <special_test\+0x57> minm 0x333,Y
0+89 <special_test\+0x5c> minm \[D,X\]
-0+8c <special_test\+0x5f> minm \[0,X\]
+0+8c <special_test\+0x5f> minm \[0x0,X\]
8f: R_M68HC12_16 _foo
-0+91 <special_test\+0x64> emind 0,X
-0+94 <special_test\+0x67> emind 819,Y
+0+91 <special_test\+0x64> emind 0x0,X
+0+94 <special_test\+0x67> emind 0x333,Y
0+99 <special_test\+0x6c> emind \[D,X\]
-0+9c <special_test\+0x6f> emind \[0,X\]
+0+9c <special_test\+0x6f> emind \[0x0,X\]
9f: R_M68HC12_16 _foo
0+a1 <special_test\+0x74> emul
0+a2 <special_test\+0x75> emuls
-0+a4 <special_test\+0x77> etbl 3,X
-0+a7 <special_test\+0x7a> etbl 4,PC \{0+ae <special_test\+0x81>\}
+0+a4 <special_test\+0x77> etbl 0x3,X
+0+a7 <special_test\+0x7a> etbl 0x4,PC \{0x0+ae <special_test\+0x81>\}
0+aa <special_test\+0x7d> rev
0+ac <special_test\+0x7f> revw
0+ae <special_test\+0x81> wav
diff --git a/gas/testsuite/gas/m68hc11/insns9s12x.d b/gas/testsuite/gas/m68hc11/insns9s12x.d
new file mode 100644
index 0000000..650015f
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/insns9s12x.d
@@ -0,0 +1,82 @@
+#objdump: -d -mm9s12x --prefix-addresses --reloc
+#as: -mm9s12x
+#name: 9s12x specific instructions (insns9s12x)
+
+dump.o: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+0x00000000 addx #0x00005678
+0x00000004 addy 2,X\+
+0x00000007 aded 0x0,X
+0x0000000a adex 2,-Y
+0x0000000d adey \[D,X\]
+0x00000010 andx #0x00009988
+0x00000014 andy 0x000055aa
+0x00000018 aslw 0x00002004
+0x0000001c aslx
+0x0000001e asly
+0x00000020 asrw 0x3000,Y
+0x00000025 asrx
+0x00000027 asry
+0x00000029 bitx \[0x3456,SP\]
+0x0000002e bity \[D,SP\]
+0x00000031 btas 0x00002345, #0x04
+0x00000036 clrw 0x2008,Y
+0x0000003b clrx
+0x0000003d clry
+0x0000003f comw 0x0,X
+0x00000042 comx
+0x00000044 comy
+0x00000046 cped #0x0000fdeb
+0x0000004a cpes 0x0000fedc
+0x0000004e cpex 0x2,SP
+0x00000051 cpey 2,SP\+
+0x00000054 decw 0x0,X
+0x00000057 decx
+0x00000059 decy
+0x0000005b eorx 0x00000034
+0x0000005f eory 0x00001234
+0x00000063 gldaa 0x00005678
+0x00000067 gldab 0x0,X
+0x0000006a gldd 2,Y\+
+0x0000006d glds 0x0,Y
+0x00000070 gldx \[D,Y\]
+0x00000073 gldy \[D,X\]
+0x00000076 gstaa 0x00005001
+0x0000007a gstab 0x00005189
+0x0000007e gstd 0x5000,X
+0x00000083 gsts 0x00007008
+0x00000087 gstx 0x6001,Y
+0x0000008c gsty \[D,X\]
+0x0000008f incw \[0x100,SP\]
+0x00000094 incx
+0x00000096 incy
+0x00000098 aslw 0x00003005
+0x0000009c aslx
+0x0000009e asly
+0x000000a0 lsrw 0x00003890
+0x000000a4 lsrx
+0x000000a6 lsry
+0x000000a8 negw 2,-Y
+0x000000ab negx
+0x000000ad negy
+0x000000af orx #0x00009876
+0x000000b3 ory 0x00009876
+0x000000b7 pshcw
+0x000000b9 pulcw
+0x000000bb rolw 0x00005544
+0x000000bf rolx
+0x000000c1 roly
+0x000000c3 rorw 0x0,X
+0x000000c6 rorx
+0x000000c8 rory
+0x000000ca sbed 0x2,Y
+0x000000cd sbex 0x00003458
+0x000000d1 sbey 0x00008543
+0x000000d5 subx \[D,Y\]
+0x000000d8 suby \[D,X\]
+0x000000db sys
+0x000000dd tstw 0x3,X
+0x000000e0 tstx
+0x000000e2 tsty
diff --git a/gas/testsuite/gas/m68hc11/insns9s12x.s b/gas/testsuite/gas/m68hc11/insns9s12x.s
new file mode 100644
index 0000000..74af484
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/insns9s12x.s
@@ -0,0 +1,83 @@
+# Test for correct generation of 9s12x specific insns.
+
+ .sect .text
+
+ addx #0x5678
+ addy 2,x+
+ aded 0,x
+ adex 2,-y
+ adey [d,x]
+ andx #0x9988
+ andy 0x55aa
+ aslw 0x2004
+ aslx
+ asly
+ asrw 0x3000,y
+ asrx
+ asry
+ bitx [0x3456,sp]
+ bity [d,sp]
+ btas 0x2345, #0x04
+ clrw 0x2008,y
+ clrx
+ clry
+ comw 0,x
+ comx
+ comy
+ cped #0xfdeb
+ cpes 0xfedc
+ cpex 2,sp
+ cpey 2,sp+
+ decw 0,x
+ decx
+ decy
+ eorx 0x34
+ eory 0x1234
+; exg in own test
+ gldaa 0x5678
+ gldab 0,x
+ gldd 2,y+
+ glds 0,y
+ gldx [d,y]
+ gldy [d,x]
+ gstaa 0x5001
+ gstab 0x5189
+ gstd 0x5000,x
+ gsts 0x7008
+ gstx 0x6001,y
+ gsty [d,x]
+ incw [0x100,sp]
+ incx
+ incy
+ lslw 0x3005
+ lslx
+ lsly
+ lsrw 0x3890
+ lsrx
+ lsry
+; mov in own test
+ negw 2,-y
+ negx
+ negy
+ orx #0x9876
+ ory 0x9876
+ pshcw
+ pulcw
+ rolw 0x5544
+ rolx
+ roly
+ rorw 0,x
+ rorx
+ rory
+ sbed 2,y
+ sbex 0x3458
+ sbey 0x8543
+;sex with exg
+ subx [d,y]
+ suby [d,x]
+ sys
+;tfr with exg
+ tstw 3,x
+ tstx
+ tsty
+
diff --git a/gas/testsuite/gas/m68hc11/insns9s12xg.d b/gas/testsuite/gas/m68hc11/insns9s12xg.d
new file mode 100644
index 0000000..7b41620
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/insns9s12xg.d
@@ -0,0 +1,120 @@
+#objdump: -d -mm9s12xg --prefix-addresses --reloc
+#as: -mm9s12xg
+#name: XGATE instruction set and all modes
+
+dump.o: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+00000000 <label1> adc R1, R2, R3
+00000002 <label2> add R4, R6, R1
+00000004 <label3> addl R7, #0x34
+00000006 <label3\+0x2> addh R7, #0x12
+00000008 <label3\+0x4> addl R4, #0xa5
+0000000a <label3\+0x6> addh R4, #0x32
+0000000c <label3\+0x8> and R7, R6, R5
+0000000e <label3\+0xa> andl R2, #0x32
+00000010 <label3\+0xc> andh R2, #0x54
+00000012 <label3\+0xe> andl R1, #0xa5
+00000014 <label3\+0x10> andh R1, #0x32
+00000016 <label3\+0x12> asr R2, #0x3
+00000018 <label3\+0x14> asr R3, R4
+0000001a <label3\+0x16> bcc 0x00000000 <label1>
+0000001c <label3\+0x18> bcs 0x00000002 <label2>
+0000001e <label3\+0x1a> beq 0x00000004 <label3>
+00000020 <label3\+0x1c> bfext R1, R2, R3
+00000022 <label3\+0x1e> bffo R4, R5
+00000024 <label3\+0x20> bfins R6, R7, R1
+00000026 <label3\+0x22> bfinsi R2, R4, R6
+00000028 <label3\+0x24> bfinsx R3, R5, R7
+0000002a <label3\+0x26> bge 0x00000000 <label1>
+0000002c <label3\+0x28> bgt 0x00000002 <label2>
+0000002e <label3\+0x2a> bhi 0x00000004 <label3>
+00000030 <label3\+0x2c> bcc 0x00000000 <label1>
+00000032 <label3\+0x2e> bith R2, #0x55
+00000034 <label3\+0x30> bitl R3, #0xaa
+00000036 <label3\+0x32> ble 0x00000002 <label2>
+00000038 <label3\+0x34> bcs 0x00000004 <label3>
+0000003a <label3\+0x36> bls 0x00000000 <label1>
+0000003c <label3\+0x38> blt 0x00000002 <label2>
+0000003e <label3\+0x3a> bmi 0x00000004 <label3>
+00000040 <label3\+0x3c> bne 0x00000000 <label1>
+00000042 <label3\+0x3e> bpl 0x00000002 <label2>
+00000044 <label3\+0x40> bra 0x00000004 <label3>
+00000046 <label3\+0x42> brk
+00000048 <label3\+0x44> bvc 0x00000000 <label1>
+0000004a <label3\+0x46> bvs 0x00000002 <label2>
+0000004c <label3\+0x48> sub R0, R1, R2
+0000004e <label3\+0x4a> cmpl R3, #0x34
+00000050 <label3\+0x4c> cpch R3, #0x12
+00000052 <label3\+0x4e> cmpl R4, #0x32
+00000054 <label3\+0x50> xnor R4, R0, R5
+00000056 <label3\+0x52> xnor R6, R0, R6
+00000058 <label3\+0x54> sbc R0, R7, R5
+0000005a <label3\+0x56> cpch R6, #0xa5
+0000005c <label3\+0x58> csem #0x2
+0000005e <label3\+0x5a> csem R1
+00000060 <label3\+0x5c> csl R2, #0x1
+00000062 <label3\+0x5e> csl R3, R4
+00000064 <label3\+0x60> csr R5, #0x4
+00000066 <label3\+0x62> csr R6, R7
+00000068 <label3\+0x64> jal R1
+0000006a <label3\+0x66> ldb R2, \(R3, #0x4\)
+0000006c <label3\+0x68> ldb R3, \(R0, R2\)
+0000006e <label3\+0x6a> ldb R4, \(R5, R6\+\)
+00000070 <label3\+0x6c> ldb R5, \(R6, -R7\)
+00000072 <label3\+0x6e> ldh R6, #0x35
+00000074 <label3\+0x70> ldl R7, #0x46
+00000076 <label3\+0x72> ldw R1, \(R2, #0x1d\)
+00000078 <label3\+0x74> ldw R2, \(R3, R0\)
+0000007a <label3\+0x76> ldw R3, \(R4, R5\+\)
+0000007c <label3\+0x78> ldw R4, \(R5, -R6\)
+0000007e <label3\+0x7a> ldl R6, #0x34
+00000080 <label3\+0x7c> ldh R6, #0x12
+00000082 <label3\+0x7e> lsl R7, #0x2
+00000084 <label3\+0x80> lsl R2, R1
+00000086 <label3\+0x82> lsr R5, #0x3
+00000088 <label3\+0x84> lsl R6, R3
+0000008a <label3\+0x86> or R7, R0, R6
+0000008c <label3\+0x88> sub R2, R0, R3
+0000008e <label3\+0x8a> sub R4, R0, R4
+00000090 <label3\+0x8c> nop
+00000092 <label3\+0x8e> or R2, R3, R4
+00000094 <label3\+0x90> orl R5, #0x56
+00000096 <label3\+0x92> orh R5, #0x12
+00000098 <label3\+0x94> orh R6, #0x08
+0000009a <label3\+0x96> orl R4, #0xf0
+0000009c <label3\+0x98> par R1
+0000009e <label3\+0x9a> rol R2, #0x5
+000000a0 <label3\+0x9c> rol R3, R4
+000000a2 <label3\+0x9e> ror R3, #0x6
+000000a4 <label3\+0xa0> ror R5, R4
+000000a6 <label3\+0xa2> rts
+000000a8 <label3\+0xa4> sbc R7, R1, R2
+000000aa <label3\+0xa6> sex R1
+000000ac <label3\+0xa8> sif
+000000ae <label3\+0xaa> sif R2
+000000b0 <label3\+0xac> ssem #0x5
+000000b2 <label3\+0xae> ssem R3
+000000b4 <label3\+0xb0> stb R2, \(R4, #0xf\)
+000000b6 <label3\+0xb2> stb R3, \(R5, R6\)
+000000b8 <label3\+0xb4> stb R0, \(R7, R1\+\)
+000000ba <label3\+0xb6> stb R1, \(R2, -R3\)
+000000bc <label3\+0xb8> stw R7, \(R6, #0x1e\)
+000000be <label3\+0xba> stw R6, \(R5, R0\)
+000000c0 <label3\+0xbc> stw R5, \(R4, R3\+\)
+000000c2 <label3\+0xbe> stw R4, \(R3, -R2\)
+000000c4 <label3\+0xc0> sub R7, R6, R5
+000000c6 <label3\+0xc2> subl R4, #0x34
+000000c8 <label3\+0xc4> subh R4, #0x12
+000000ca <label3\+0xc6> subh R5, #0x44
+000000cc <label3\+0xc8> subl R4, #0x55
+000000ce <label3\+0xca> tfr R2, CCR
+000000d0 <label3\+0xcc> tfr CCR, R3
+000000d2 <label3\+0xce> tfr R5, PC
+000000d4 <label3\+0xd0> sub R0, R2, R0
+000000d6 <label3\+0xd2> xnor R4, R6, R2
+000000d8 <label3\+0xd4> xnorl R3, #0x32
+000000da <label3\+0xd6> xnorh R3, #0x54
+000000dc <label3\+0xd8> xnorh R2, #0x32
+000000de <label3\+0xda> xnorl R1, #0x54
diff --git a/gas/testsuite/gas/m68hc11/insns9s12xg.s b/gas/testsuite/gas/m68hc11/insns9s12xg.s
new file mode 100644
index 0000000..fc4c0cd
--- /dev/null
+++ b/gas/testsuite/gas/m68hc11/insns9s12xg.s
@@ -0,0 +1,118 @@
+# XGATE instruction set and all modes
+
+ .sect .text
+
+val1 = 0x1234
+val2 = 0x5432
+u08_1 = 0x32
+u08_2 = 0xa5
+
+label1:
+ adc r1,r2,r3
+label2:
+ add r4,r6,r1
+label3:
+ add r7,#val1 ;splits out to addh, addl
+ addl r4,#u08_2
+ addh r4,#u08_1
+ and r7,r6,r5
+ and r2,#val2
+ andl r1, #u08_2
+ andh r1, #u08_1
+ asr r2,#3
+ asr r3,r4
+ bcc label1
+ bcs label2
+ beq label3
+ bfext r1,r2,r3
+ bffo r4,r5
+ bfins r6,r7,r1
+ bfinsi r2,r4,r6
+ bfinsx r3,r5,r7
+ bge label1
+ bgt label2
+ bhi label3
+ bhs label1
+ bith r2,#0x55
+ bitl r3,#0xaa
+ ble label2
+ blo label3
+ bls label1
+ blt label2
+ bmi label3
+ bne label1
+ bpl label2
+ bra label3
+ brk
+ bvc label1
+ bvs label2
+ cmp r1,r2
+ cmp r3,#val1
+ cmpl r4,#u08_1
+ com r4,r5
+ com r6
+ cpc r7,r5
+ cpch r6,#u08_2
+ csem #2
+ csem r1
+ csl r2,#1
+ csl r3,r4
+ csr r5,#4
+ csr r6,r7
+ jal r1
+ ldb r2,(r3,#4)
+ ldb r3,(r0,r2)
+ ldb r4,(r5,r6+)
+ ldb r5,(r6,-r7)
+ ldh r6,#0x35
+ ldl r7,#0x46
+ ldw r1,(r2,#29)
+ ldw r2,(r3,r0)
+ ldw r3,(r4,r5+)
+ ldw r4,(r5,-r6)
+ ldw r6,#0x1234
+ lsl r7,#2
+ lsl r2,r1
+ lsr r5,#3
+ lsl r6,r3
+ mov r7,r6
+ neg r2,r3
+ neg r4
+ nop
+ or r2,r3,r4
+ or r5,#0x1256
+ orh r6,#0x08
+ orl r4,#0xf0
+ par r1 ; comma on datasheet a typo?
+ rol r2,#5
+ rol r3,r4
+ ror r3,#6
+ ror r5,r4
+ rts
+ sbc r7,r1,r2
+ sex r1
+ sif
+ sif r2
+ ssem #5
+ ssem r3
+ stb r2,(r4,#15)
+ stb r3,(r5,r6)
+ stb r0,(r7,r1+)
+ stb r1,(r2,-r3)
+ stw r7,(r6,#30)
+ stw r6,(r5,r0)
+ stw r5,(r4,r3+)
+ stw r4,(r3,-r2)
+ sub r7,r6,r5
+ sub r4,#val1
+ subh r5,#0x44
+ subl r4,#0x55
+ tfr r2,ccr
+ tfr ccr,r3
+ tfr r5,pc
+ tst r2
+ xnor r4,r6,r2
+ xnor r3,#val2
+ xnorh r2,#0x32
+ xnorl r1,#0x54
+
diff --git a/gas/testsuite/gas/m68hc11/lbranch-dwarf2.d b/gas/testsuite/gas/m68hc11/lbranch-dwarf2.d
index 14798e9..6aaeae6 100644
--- a/gas/testsuite/gas/m68hc11/lbranch-dwarf2.d
+++ b/gas/testsuite/gas/m68hc11/lbranch-dwarf2.d
@@ -16,67 +16,67 @@
_start:
_rcall:
ldaa #0x10 ;86 10
- 0: 86 10 ldaa #16
+ 0: 86 10 ldaa #0x10
jbra Lend ; Must be switched to a jmp
- 2: 7e 00 00 jmp 0 <_rcall>
+ 2: 7e 00 00 jmp 0x0 <_rcall>
jbsr toto ; -> to a jsr
- 5: bd 00 00 jsr 0 <_rcall>
+ 5: bd 00 00 jsr 0x0 <_rcall>
jbne toto ; -> to a beq\+jmp
- 8: 27 03 beq d <_rcall\+0xd>
- a: 7e 00 00 jmp 0 <_rcall>
+ 8: 27 03 beq 0xd <_rcall\+0xd>
+ a: 7e 00 00 jmp 0x0 <_rcall>
jbeq toto ; -> to a bne\+jmp
- d: 26 03 bne 12 <_rcall\+0x12>
- f: 7e 00 00 jmp 0 <_rcall>
+ d: 26 03 bne 0x12 <_rcall\+0x12>
+ f: 7e 00 00 jmp 0x0 <_rcall>
jbcs toto ; -> to a bcc\+jmp
- 12: 24 03 bcc 17 <_rcall\+0x17>
- 14: 7e 00 00 jmp 0 <_rcall>
+ 12: 24 03 bcc 0x17 <_rcall\+0x17>
+ 14: 7e 00 00 jmp 0x0 <_rcall>
jbcc toto ; -> to a bcs\+jmp
- 17: 25 03 bcs 1c <_rcall\+0x1c>
- 19: 7e 00 00 jmp 0 <_rcall>
+ 17: 25 03 bcs 0x1c <_rcall\+0x1c>
+ 19: 7e 00 00 jmp 0x0 <_rcall>
xgdx
1c: 8f xgdx
xgdx
1d: 8f xgdx
beq bidule ; -> to a bne\+jmp
- 1e: 26 03 bne 23 <_rcall\+0x23>
- 20: 7e 00 00 jmp 0 <_rcall>
+ 1e: 26 03 bne 0x23 <_rcall\+0x23>
+ 20: 7e 00 00 jmp 0x0 <_rcall>
bcs bidule ; -> to a bcc\+jmp
- 23: 24 03 bcc 28 <_rcall\+0x28>
- 25: 7e 00 00 jmp 0 <_rcall>
+ 23: 24 03 bcc 0x28 <_rcall\+0x28>
+ 25: 7e 00 00 jmp 0x0 <_rcall>
bcc bidule ; -> to a bcs\+jmp
- 28: 25 03 bcs 2d <_rcall\+0x2d>
- 2a: 7e 00 00 jmp 0 <_rcall>
+ 28: 25 03 bcs 0x2d <_rcall\+0x2d>
+ 2a: 7e 00 00 jmp 0x0 <_rcall>
xgdx
2d: 8f xgdx
jbra 200
- 2e: 7e 00 c8 jmp c8 <_rcall\+0xc8>
+ 2e: 7e 00 c8 jmp 0xc8 <_rcall\+0xc8>
jbsr 1923
- 31: bd 07 83 jsr 783 <L0\+0x602>
+ 31: bd 07 83 jsr 0x783 <L0\+0x602>
bne Lend ; -> to a beq\+jmp
- 34: 27 03 beq 39 <_rcall\+0x39>
- 36: 7e 00 00 jmp 0 <_rcall>
+ 34: 27 03 beq 0x39 <_rcall\+0x39>
+ 36: 7e 00 00 jmp 0x0 <_rcall>
jbsr toto
- 39: bd 00 00 jsr 0 <_rcall>
+ 39: bd 00 00 jsr 0x0 <_rcall>
jbeq toto
- 3c: 26 03 bne 41 <_rcall\+0x41>
- 3e: 7e 00 00 jmp 0 <_rcall>
+ 3c: 26 03 bne 0x41 <_rcall\+0x41>
+ 3e: 7e 00 00 jmp 0x0 <_rcall>
...
.skip 200
ldaa \*dir ;96 33
- 109: 96 00 ldaa \*0 <_rcall>
+ 109: 96 00 ldaa \*0x0 <_rcall>
0000010b <Lend>:
Lend:
bhi external_op
- 10b: 23 03 bls 110 <Lend\+0x5>
- 10d: 7e 00 00 jmp 0 <_rcall>
+ 10b: 23 03 bls 0x110 <Lend\+0x5>
+ 10d: 7e 00 00 jmp 0x0 <_rcall>
bls external_op
- 110: 22 03 bhi 115 <Lend\+0xa>
- 112: 7e 00 00 jmp 0 <_rcall>
+ 110: 22 03 bhi 0x115 <Lend\+0xa>
+ 112: 7e 00 00 jmp 0x0 <_rcall>
bsr out
- 115: bd 00 00 jsr 0 <_rcall>
+ 115: bd 00 00 jsr 0x0 <_rcall>
ldx #12
- 118: ce 00 0c ldx #c <_rcall\+0xc>
+ 118: ce 00 0c ldx #0xc <_rcall\+0xc>
0000011b <toto>:
toto:
diff --git a/gas/testsuite/gas/m68hc11/lbranch.d b/gas/testsuite/gas/m68hc11/lbranch.d
index 4770a4a..07a559d 100644
--- a/gas/testsuite/gas/m68hc11/lbranch.d
+++ b/gas/testsuite/gas/m68hc11/lbranch.d
@@ -7,74 +7,74 @@
.*: +file format elf32\-m68hc11
Disassembly of section .text:
-0+0+ <_rcall> ldaa #16
-0+0002 <_rcall\+0x2> jmp 0+0+ <_rcall>
+0+0+ <_rcall> ldaa #0x10
+0+0002 <_rcall\+0x2> jmp 0x0+0+ <_rcall>
[ ]+2: R_M68HC11_RL_JUMP \*ABS\*
[ ]+3: R_M68HC11_16 Lend
-0+0005 <_rcall\+0x5> jsr 0+0+ <_rcall>
+0+0005 <_rcall\+0x5> jsr 0x0+0+ <_rcall>
[ ]+5: R_M68HC11_RL_JUMP \*ABS\*
[ ]+6: R_M68HC11_16 toto
-0+0008 <_rcall\+0x8> beq 0+000d <_rcall\+0xd>
+0+0008 <_rcall\+0x8> beq 0x0+000d <_rcall\+0xd>
[ ]+8: R_M68HC11_RL_JUMP \*ABS\*
-0+000a <_rcall\+0xa> jmp 0+0+ <_rcall>
+0+000a <_rcall\+0xa> jmp 0x0+0+ <_rcall>
[ ]+b: R_M68HC11_16 toto
-0+000d <_rcall\+0xd> bne 0+0012 <_rcall\+0x12>
+0+000d <_rcall\+0xd> bne 0x0+0012 <_rcall\+0x12>
[ ]+d: R_M68HC11_RL_JUMP \*ABS\*
-0+000f <_rcall\+0xf> jmp 0+0+ <_rcall>
+0+000f <_rcall\+0xf> jmp 0x0+0+ <_rcall>
[ ]+10: R_M68HC11_16 toto
-0+0012 <_rcall\+0x12> bcc 0+0017 <_rcall\+0x17>
+0+0012 <_rcall\+0x12> bcc 0x0+0017 <_rcall\+0x17>
[ ]+12: R_M68HC11_RL_JUMP \*ABS\*
-0+0014 <_rcall\+0x14> jmp 0+0+ <_rcall>
+0+0014 <_rcall\+0x14> jmp 0x0+0+ <_rcall>
[ ]+15: R_M68HC11_16 toto
-0+0017 <_rcall\+0x17> bcs 0+001c <_rcall\+0x1c>
+0+0017 <_rcall\+0x17> bcs 0x0+001c <_rcall\+0x1c>
[ ]+17: R_M68HC11_RL_JUMP \*ABS\*
-0+0019 <_rcall\+0x19> jmp 0+0+ <_rcall>
+0+0019 <_rcall\+0x19> jmp 0x0+0+ <_rcall>
[ ]+1a: R_M68HC11_16 toto
0+001c <_rcall\+0x1c> xgdx
0+001d <_rcall\+0x1d> xgdx
-0+001e <_rcall\+0x1e> bne 0+0023 <_rcall\+0x23>
+0+001e <_rcall\+0x1e> bne 0x0+0023 <_rcall\+0x23>
[ ]+1e: R_M68HC11_RL_JUMP \*ABS\*
-0+0020 <_rcall\+0x20> jmp 0+0+ <_rcall>
+0+0020 <_rcall\+0x20> jmp 0x0+0+ <_rcall>
[ ]+21: R_M68HC11_16 bidule
-0+0023 <_rcall\+0x23> bcc 0+0028 <_rcall\+0x28>
+0+0023 <_rcall\+0x23> bcc 0x0+0028 <_rcall\+0x28>
[ ]+23: R_M68HC11_RL_JUMP \*ABS\*
-0+0025 <_rcall\+0x25> jmp 0+0+ <_rcall>
+0+0025 <_rcall\+0x25> jmp 0x0+0+ <_rcall>
[ ]+26: R_M68HC11_16 bidule
-0+0028 <_rcall\+0x28> bcs 0+002d <_rcall\+0x2d>
+0+0028 <_rcall\+0x28> bcs 0x0+002d <_rcall\+0x2d>
[ ]+28: R_M68HC11_RL_JUMP \*ABS\*
-0+002a <_rcall\+0x2a> jmp 0+0+ <_rcall>
+0+002a <_rcall\+0x2a> jmp 0x0+0+ <_rcall>
[ ]+2b: R_M68HC11_16 bidule
0+002d <_rcall\+0x2d> xgdx
-0+002e <_rcall\+0x2e> jmp 0+00c8 <_rcall\+0xc8>
+0+002e <_rcall\+0x2e> jmp 0x0+00c8 <_rcall\+0xc8>
[ ]+2e: R_M68HC11_RL_JUMP \*ABS\*
-0+0031 <_rcall\+0x31> jsr 0+0783 <bidule\+0x603>
+0+0031 <_rcall\+0x31> jsr 0x0+0783 <bidule\+0x603>
[ ]+31: R_M68HC11_RL_JUMP \*ABS\*
-0+0034 <_rcall\+0x34> beq 0+0039 <_rcall\+0x39>
+0+0034 <_rcall\+0x34> beq 0x0+0039 <_rcall\+0x39>
[ ]+34: R_M68HC11_RL_JUMP \*ABS\*
-0+0036 <_rcall\+0x36> jmp 0+0+ <_rcall>
+0+0036 <_rcall\+0x36> jmp 0x0+0+ <_rcall>
[ ]+37: R_M68HC11_16 Lend
-0+0039 <_rcall\+0x39> jsr 0+0+ <_rcall>
+0+0039 <_rcall\+0x39> jsr 0x0+0+ <_rcall>
[ ]+39: R_M68HC11_RL_JUMP \*ABS\*
[ ]+3a: R_M68HC11_16 toto
-0+003c <_rcall\+0x3c> bne 0+0041 <_rcall\+0x41>
+0+003c <_rcall\+0x3c> bne 0x0+0041 <_rcall\+0x41>
[ ]+3c: R_M68HC11_RL_JUMP \*ABS\*
-0+003e <_rcall\+0x3e> jmp 0+0+ <_rcall>
+0+003e <_rcall\+0x3e> jmp 0x0+0+ <_rcall>
[ ]+3f: R_M68HC11_16 toto
...
-0+0109 <_rcall\+0x109> ldaa \*0+0+ <_rcall>
+0+0109 <_rcall\+0x109> ldaa \*0x0+0+ <_rcall>
[ ]+10a: R_M68HC11_8 .page0
-0+010b <Lend> bls 0+0110 <Lend\+0x5>
+0+010b <Lend> bls 0x0+0110 <Lend\+0x5>
[ ]+10b: R_M68HC11_RL_JUMP \*ABS\*
-0+010d <Lend\+0x2> jmp 0+0+ <_rcall>
+0+010d <Lend\+0x2> jmp 0x0+0+ <_rcall>
[ ]+10e: R_M68HC11_16 external_op
-0+0110 <Lend\+0x5> bhi 0+0115 <Lend\+0xa>
+0+0110 <Lend\+0x5> bhi 0x0+0115 <Lend\+0xa>
[ ]+110: R_M68HC11_RL_JUMP \*ABS\*
-0+0112 <Lend\+0x7> jmp 0+0+ <_rcall>
+0+0112 <Lend\+0x7> jmp 0x0+0+ <_rcall>
[ ]+113: R_M68HC11_16 external_op
-0+0115 <Lend\+0xa> jsr 0+0+ <_rcall>
+0+0115 <Lend\+0xa> jsr 0x0+0+ <_rcall>
[ ]+115: R_M68HC11_RL_JUMP \*ABS\*
[ ]+116: R_M68HC11_16 out
-0+0118 <Lend\+0xd> ldx #0+000c <_rcall\+0xc>
+0+0118 <Lend\+0xd> ldx #0x0+000c <_rcall\+0xc>
0+011b <toto> rts
...
0+0180 <bidule> rts
diff --git a/gas/testsuite/gas/m68hc11/m68hc11.exp b/gas/testsuite/gas/m68hc11/m68hc11.exp
index 84dc83d..a4f908b 100644
--- a/gas/testsuite/gas/m68hc11/m68hc11.exp
+++ b/gas/testsuite/gas/m68hc11/m68hc11.exp
@@ -29,6 +29,8 @@
gas_m68hc11_opcode_list "-m68hc11" 149
gas_m68hc11_opcode_list "-m68hc12" 192
gas_m68hc11_opcode_list "-m68hcs12" 192
+gas_m68hc11_opcode_list "-mm9s12x" 266
+gas_m68hc11_opcode_list "-mm9s12xg" 74
# Test for a message produced when assembling a file
@@ -97,6 +99,9 @@
gas_m68hc11_error "" "bar\n" "Opcode .bar. is not recognized."
gas_m68hc11_error "--print-insn-syntax" "bne\n" \
"Instruction formats for .bne..*"
+#Check that 9s12x opcodes are rejected
+gas_m68hc11_error "-m68hc11" "subx\n" "Opcode .subx. is not recognized"
+gas_m68hc11_error "-m68hc11" "roly\n" "Opcode .roly. is not recognized"
# ------------------
# 68HC12 error tests
@@ -148,14 +153,28 @@
"Offset out of 5-bit range for movw/movb insn: 300"
gas_m68hc11_error "-m68hc12" "movb bar,pc,2,x\nbar=300\n" \
"Offset out of 5-bit range for movw/movb insn: 300"
+#check the 9s12x opcodes not supported
+gas_m68hc11_error "-m68hc12" "subx\n" "Opcode .subx. is not recognized"
+gas_m68hc11_error "-m68hc12" "roly\n" "Opcode .roly. is not recognized"
+gas_m68hc11_error "-m68hc12" "sex d,x\n" \
+ "Invalid source register for this instruction, use .tfr."
+gas_m68hc11_error "-m68hc12" "sex d,y\n" \
+ "Invalid source register for this instruction, use .tfr."
+
+#m9s12x tests
+gas_m68hc11_error "-mm9s12x" "par r3\n" "Opcode .par. is not recognized"
+gas_m68hc11_error "-mm9s12x" "csem #1\n" "Opcode .csem. is not recognized"
+
+#m9s12xg tests
+gas_m68hc11_error "-mm9s12xg" "roly\n" "Opcode .roly. is not recognized"
+gas_m68hc11_error "-mm9s12xg" "ldab #1\n" "Opcode .ldab. is not recognized"
# ------------------
# Specific commands
-gas_m68hc11_warning "" ".mode \"bar\"\n" "Invalid mode: .bar."
-gas_m68hc11_error "" ".relax 23\n" "bad .relax format"
-gas_m68hc11_error "" ".relax bar-23\n" "bad .relax format"
-gas_m68hc11_error "" ".far bar bar\n" "junk at end of line"
-
+gas_m68hc11_warning "-m68hc11" ".mode \"bar\"\n" "Invalid mode: .bar."
+gas_m68hc11_error "-m68hc11" ".relax 23\n" "bad .relax format"
+gas_m68hc11_error "-m68hc11" ".relax bar-23\n" "bad .relax format"
+gas_m68hc11_error "-m68hc11" ".far bar bar\n" "junk at end of line"
run_dump_test insns
run_dump_test lbranch
@@ -177,3 +196,15 @@
run_dump_test indexed12
run_dump_test bug-1825
run_dump_test movb
+
+# Some m9s12x tests
+run_dump_test insns9s12x
+run_dump_test 9s12x-exg-sex-tfr
+run_dump_test 9s12x-mov
+
+# Some m9s12xg tests
+run_dump_test insns9s12xg
+
+# Confirm hex prefixes
+run_dump_test hexprefix
+
diff --git a/gas/testsuite/gas/m68hc11/malis.d b/gas/testsuite/gas/m68hc11/malis.d
index 8f5ad40..7a4c852 100644
--- a/gas/testsuite/gas/m68hc11/malis.d
+++ b/gas/testsuite/gas/m68hc11/malis.d
@@ -7,31 +7,31 @@
.*: +file format elf32\-m68hc11
Disassembly of section .text:
-0+000 <L0> ldaa 1,x
-0+002 <L1> ldaa #44
-0+004 <L_txt2> ldx #0+000 <L0>
-0+007 <L_constant> ldaa #123
-0+009 <L_constant\+0x2> ldaa #233
-0+00b <L_constant\+0x4> ldab #138
-0+00d <L_constant\+0x6> ldab #7
-0+00f <L_constant\+0x8> ldaa #60
-0+011 <L_constant\+0xa> ldaa #255
-0+013 <L12> ldaa #174
-0+015 <L13> ldaa #178
-0+017 <L11> ldx #0+0af <entry\+0x6c>
-0+01a <L11\+0x3> ldx #0+001 <L0\+0x1>
-0+01d <L11\+0x6> ldx #0+001 <L0\+0x1>
-0+020 <L11\+0x9> ldx #0+000 <L0>
-0+023 <L11\+0xc> ldab #210
-0+025 <L_if> ldx #0+001 <L0\+0x1>
-0+028 <L_if\+0x3> ldaa #31
-0+02a <L_if\+0x5> ldaa #4
-0+02c <L_if\+0x7> ldx #0+017 <L11>
-0+02f <L_if\+0xa> ldx #0+004 <L_txt2>
-0+032 <L_if\+0xd> ldy #0+001 <L0\+0x1>
-0+036 <L_if\+0x11> ldy #0+001 <L0\+0x1>
-0+03a <L_if\+0x15> ldaa #23
-0+03c <L_if\+0x17> staa 0+018 <L11\+0x1>
+0+000 <L0> ldaa 0x1,x
+0+002 <L1> ldaa #0x2c
+0+004 <L_txt2> ldx #0x0+000 <L0>
+0+007 <L_constant> ldaa #0x7b
+0+009 <L_constant\+0x2> ldaa #0xe9
+0+00b <L_constant\+0x4> ldab #0x8a
+0+00d <L_constant\+0x6> ldab #0x7
+0+00f <L_constant\+0x8> ldaa #0x3c
+0+011 <L_constant\+0xa> ldaa #0xff
+0+013 <L12> ldaa #0xae
+0+015 <L13> ldaa #0xb2
+0+017 <L11> ldx #0x0+0af <entry\+0x6c>
+0+01a <L11\+0x3> ldx #0x0+001 <L0\+0x1>
+0+01d <L11\+0x6> ldx #0x0+001 <L0\+0x1>
+0+020 <L11\+0x9> ldx #0x0+000 <L0>
+0+023 <L11\+0xc> ldab #0xd2
+0+025 <L_if> ldx #0x0+001 <L0\+0x1>
+0+028 <L_if\+0x3> ldaa #0x1f
+0+02a <L_if\+0x5> ldaa #0x4
+0+02c <L_if\+0x7> ldx #0x0+017 <L11>
+0+02f <L_if\+0xa> ldx #0x0+004 <L_txt2>
+0+032 <L_if\+0xd> ldy #0x0+001 <L0\+0x1>
+0+036 <L_if\+0x11> ldy #0x0+001 <L0\+0x1>
+0+03a <L_if\+0x15> ldaa #0x17
+0+03c <L_if\+0x17> staa 0x0+018 <L11\+0x1>
0+03f <L_if\+0x1a> rts
-0+040 <L_if\+0x1b> ldaa 0+017 <L11>
+0+040 <L_if\+0x1b> ldaa 0x0+017 <L11>
0+043 <entry> rts
diff --git a/gas/testsuite/gas/m68hc11/movb.d b/gas/testsuite/gas/m68hc11/movb.d
index 4ef5e81..b3501ef 100644
--- a/gas/testsuite/gas/m68hc11/movb.d
+++ b/gas/testsuite/gas/m68hc11/movb.d
@@ -7,445 +7,445 @@
Disassembly of section .text:
0+00 <\.text>:
-[ ]+ 0: 86 00[ ]+ ldaa #0
-[ ]+ 2: 18 0a 0f 0f movb 15,X, 15,X
-[ ]+ 6: 18 0a 0f 0f movb 15,X, 15,X
-[ ]+ a: 18 0a 0f 0f movb 15,X, 15,X
-[ ]+ e: 86 01[ ]+ ldaa #1
-[ ]+10: 18 0a 0f 0f movb 15,X, 15,X
-[ ]+14: 18 0a 0f 0f movb 15,X, 15,X
-[ ]+18: 18 0a 0f 0f movb 15,X, 15,X
-[ ]+1c: 86 02[ ]+ ldaa #2
-[ ]+1e: 18 0a 0f 10 movb 15,X, \-16,X
-[ ]+22: 18 0a 0f 10 movb 15,X, \-16,X
-[ ]+26: 18 0a 0f 10 movb 15,X, \-16,X
-[ ]+2a: 86 03[ ]+ ldaa #3
-[ ]+2c: 18 0a 10 0f movb \-16,X, 15,X
-[ ]+30: 18 0a 10 0f movb \-16,X, 15,X
-[ ]+34: 18 0a 10 0f movb \-16,X, 15,X
-[ ]+38: 86 04[ ]+ ldaa #4
-[ ]+3a: 18 02 0f 0f movw 15,X, 15,X
-[ ]+3e: 18 02 0f 0f movw 15,X, 15,X
-[ ]+42: 18 02 0f 0f movw 15,X, 15,X
-[ ]+46: 86 05[ ]+ ldaa #5
-[ ]+48: 18 02 0f 0f movw 15,X, 15,X
-[ ]+4c: 18 02 0f 0f movw 15,X, 15,X
-[ ]+50: 18 02 0f 0f movw 15,X, 15,X
-[ ]+54: 86 06[ ]+ ldaa #6
-[ ]+56: 18 02 0f 10 movw 15,X, \-16,X
-[ ]+5a: 18 02 0f 10 movw 15,X, \-16,X
-[ ]+5e: 18 02 0f 10 movw 15,X, \-16,X
-[ ]+62: 86 07[ ]+ ldaa #7
-[ ]+64: 18 02 10 0f movw \-16,X, 15,X
-[ ]+68: 18 02 10 0f movw \-16,X, 15,X
-[ ]+6c: 18 02 10 0f movw \-16,X, 15,X
-[ ]+70: 86 08[ ]+ ldaa #8
-[ ]+72: 18 0a 4f 4f movb 15,Y, 15,Y
-[ ]+76: 18 0a 4f 4f movb 15,Y, 15,Y
-[ ]+7a: 18 0a 4f 4f movb 15,Y, 15,Y
-[ ]+7e: 86 09[ ]+ ldaa #9
-[ ]+80: 18 0a 4f 4f movb 15,Y, 15,Y
-[ ]+84: 18 0a 4f 4f movb 15,Y, 15,Y
-[ ]+88: 18 0a 4f 4f movb 15,Y, 15,Y
-[ ]+8c: 86 0a[ ]+ ldaa #10
-[ ]+8e: 18 0a 4f 50 movb 15,Y, \-16,Y
-[ ]+92: 18 0a 4f 50 movb 15,Y, \-16,Y
-[ ]+96: 18 0a 4f 50 movb 15,Y, \-16,Y
-[ ]+9a: 86 0b[ ]+ ldaa #11
-[ ]+9c: 18 0a 50 4f movb \-16,Y, 15,Y
-[ ]+a0: 18 0a 50 4f movb \-16,Y, 15,Y
-[ ]+a4: 18 0a 50 4f movb \-16,Y, 15,Y
-[ ]+a8: 86 0c[ ]+ ldaa #12
-[ ]+aa: 18 02 4f 4f movw 15,Y, 15,Y
-[ ]+ae: 18 02 4f 4f movw 15,Y, 15,Y
-[ ]+b2: 18 02 4f 4f movw 15,Y, 15,Y
-[ ]+b6: 86 0d[ ]+ ldaa #13
-[ ]+b8: 18 02 4f 4f movw 15,Y, 15,Y
-[ ]+bc: 18 02 4f 4f movw 15,Y, 15,Y
-[ ]+c0: 18 02 4f 4f movw 15,Y, 15,Y
-[ ]+c4: 86 0e[ ]+ ldaa #14
-[ ]+c6: 18 02 4f 50 movw 15,Y, \-16,Y
-[ ]+ca: 18 02 4f 50 movw 15,Y, \-16,Y
-[ ]+ce: 18 02 4f 50 movw 15,Y, \-16,Y
-[ ]+d2: 86 0f[ ]+ ldaa #15
-[ ]+d4: 18 02 50 4f movw \-16,Y, 15,Y
-[ ]+d8: 18 02 50 4f movw \-16,Y, 15,Y
-[ ]+dc: 18 02 50 4f movw \-16,Y, 15,Y
-[ ]+e0: 86 10[ ]+ ldaa #16
-[ ]+e2: 18 0a 4f cf movb 15,Y, 15,PC \{f5 <cat2\+0xe6>\}
-[ ]+e6: 18 0a 4f cf movb 15,Y, 15,PC \{f9 <cat2\+0xea>\}
-[ ]+ea: 18 0a 4f cf movb 15,Y, 15,PC \{fd <cat2\+0xee>\}
-[ ]+ee: 86 11[ ]+ ldaa #17
-[ ]+f0: 18 0a 4f cf movb 15,Y, 15,PC \{103 <cat2\+0xf4>\}
-[ ]+f4: 18 0a 4f cf movb 15,Y, 15,PC \{107 <cat2\+0xf8>\}
-[ ]+f8: 18 0a 4f cf movb 15,Y, 15,PC \{10b <cat2\+0xfc>\}
-[ ]+fc: 86 12[ ]+ ldaa #18
-[ ]+fe: 18 0a 4f d0 movb 15,Y, \-16,PC \{f2 <cat2\+0xe3>\}
- 102: 18 0a 4f d0 movb 15,Y, \-16,PC \{f6 <cat2\+0xe7>\}
- 106: 18 0a 4f d0 movb 15,Y, \-16,PC \{fa <cat2\+0xeb>\}
- 10a: 86 13[ ]+ ldaa #19
- 10c: 18 0a 50 cf movb \-16,Y, 15,PC \{11f <cat2\+0x110>\}
- 110: 18 0a 50 cf movb \-16,Y, 15,PC \{123 <cat2\+0x114>\}
- 114: 18 0a 50 cf movb \-16,Y, 15,PC \{127 <cat2\+0x118>\}
- 118: 86 14[ ]+ ldaa #20
- 11a: 18 02 4f cf movw 15,Y, 15,PC \{12d <cat2\+0x11e>\}
- 11e: 18 02 4f cf movw 15,Y, 15,PC \{131 <cat2\+0x122>\}
- 122: 18 02 4f cf movw 15,Y, 15,PC \{135 <cat2\+0x126>\}
- 126: 86 15[ ]+ ldaa #21
- 128: 18 02 4f cf movw 15,Y, 15,PC \{13b <cat2\+0x12c>\}
- 12c: 18 02 4f cf movw 15,Y, 15,PC \{13f <cat2\+0x130>\}
- 130: 18 02 4f cf movw 15,Y, 15,PC \{143 <cat2\+0x134>\}
- 134: 86 16[ ]+ ldaa #22
- 136: 18 02 4f d0 movw 15,Y, \-16,PC \{12a <cat2\+0x11b>\}
- 13a: 18 02 4f d0 movw 15,Y, \-16,PC \{12e <cat2\+0x11f>\}
- 13e: 18 02 4f d0 movw 15,Y, \-16,PC \{132 <cat2\+0x123>\}
- 142: 86 17[ ]+ ldaa #23
- 144: 18 02 50 cf movw \-16,Y, 15,PC \{157 <cat2\+0x148>\}
- 148: 18 02 50 cf movw \-16,Y, 15,PC \{15b <cat2\+0x14c>\}
- 14c: 18 02 50 cf movw \-16,Y, 15,PC \{15f <cat2\+0x150>\}
- 150: 86 18[ ]+ ldaa #24
- 152: 18 0a 8f cf movb 15,SP, 15,PC \{165 <cat2\+0x156>\}
- 156: 18 0a 8f cf movb 15,SP, 15,PC \{169 <cat2\+0x15a>\}
- 15a: 18 0a 8f cf movb 15,SP, 15,PC \{16d <cat2\+0x15e>\}
- 15e: 86 19[ ]+ ldaa #25
- 160: 18 0a 8f cf movb 15,SP, 15,PC \{173 <cat2\+0x164>\}
- 164: 18 0a 8f cf movb 15,SP, 15,PC \{177 <cat2\+0x168>\}
- 168: 18 0a 8f cf movb 15,SP, 15,PC \{17b <cat2\+0x16c>\}
- 16c: 86 1a[ ]+ ldaa #26
- 16e: 18 0a 8f d0 movb 15,SP, \-16,PC \{162 <cat2\+0x153>\}
- 172: 18 0a 8f d0 movb 15,SP, \-16,PC \{166 <cat2\+0x157>\}
- 176: 18 0a 8f d0 movb 15,SP, \-16,PC \{16a <cat2\+0x15b>\}
- 17a: 86 1b[ ]+ ldaa #27
- 17c: 18 0a 90 cf movb \-16,SP, 15,PC \{18f <cat2\+0x180>\}
- 180: 18 0a 90 cf movb \-16,SP, 15,PC \{193 <cat2\+0x184>\}
- 184: 18 0a 90 cf movb \-16,SP, 15,PC \{197 <cat2\+0x188>\}
- 188: 86 1c[ ]+ ldaa #28
- 18a: 18 02 8f cf movw 15,SP, 15,PC \{19d <cat2\+0x18e>\}
- 18e: 18 02 8f cf movw 15,SP, 15,PC \{1a1 <cat2\+0x192>\}
- 192: 18 02 8f cf movw 15,SP, 15,PC \{1a5 <cat2\+0x196>\}
- 196: 86 1d[ ]+ ldaa #29
- 198: 18 02 8f cf movw 15,SP, 15,PC \{1ab <cat2\+0x19c>\}
- 19c: 18 02 8f cf movw 15,SP, 15,PC \{1af <cat2\+0x1a0>\}
- 1a0: 18 02 8f cf movw 15,SP, 15,PC \{1b3 <cat2\+0x1a4>\}
- 1a4: 86 1e[ ]+ ldaa #30
- 1a6: 18 02 8f d0 movw 15,SP, \-16,PC \{19a <cat2\+0x18b>\}
- 1aa: 18 02 8f d0 movw 15,SP, \-16,PC \{19e <cat2\+0x18f>\}
- 1ae: 18 02 8f d0 movw 15,SP, \-16,PC \{1a2 <cat2\+0x193>\}
- 1b2: 86 1f[ ]+ ldaa #31
- 1b4: 18 02 90 cf movw \-16,SP, 15,PC \{1c7 <cat2\+0x1b8>\}
- 1b8: 18 02 90 cf movw \-16,SP, 15,PC \{1cb <cat2\+0x1bc>\}
- 1bc: 18 02 90 cf movw \-16,SP, 15,PC \{1cf <cat2\+0x1c0>\}
- 1c0: 86 20[ ]+ ldaa #32
- 1c2: 18 09 0f 10 movb 1000 <cat2\+0xff1>, 15,X
+[ ]+ 0: 86 00[ ]+ ldaa #0x0
+[ ]+ 2: 18 0a 0f 0f movb 0xf,X, 0xf,X
+[ ]+ 6: 18 0a 0f 0f movb 0xf,X, 0xf,X
+[ ]+ a: 18 0a 0f 0f movb 0xf,X, 0xf,X
+[ ]+ e: 86 01[ ]+ ldaa #0x1
+[ ]+10: 18 0a 0f 0f movb 0xf,X, 0xf,X
+[ ]+14: 18 0a 0f 0f movb 0xf,X, 0xf,X
+[ ]+18: 18 0a 0f 0f movb 0xf,X, 0xf,X
+[ ]+1c: 86 02[ ]+ ldaa #0x2
+[ ]+1e: 18 0a 0f 10 movb 0xf,X, 0xfff0,X
+[ ]+22: 18 0a 0f 10 movb 0xf,X, 0xfff0,X
+[ ]+26: 18 0a 0f 10 movb 0xf,X, 0xfff0,X
+[ ]+2a: 86 03[ ]+ ldaa #0x3
+[ ]+2c: 18 0a 10 0f movb 0xfff0,X, 0xf,X
+[ ]+30: 18 0a 10 0f movb 0xfff0,X, 0xf,X
+[ ]+34: 18 0a 10 0f movb 0xfff0,X, 0xf,X
+[ ]+38: 86 04[ ]+ ldaa #0x4
+[ ]+3a: 18 02 0f 0f movw 0xf,X, 0xf,X
+[ ]+3e: 18 02 0f 0f movw 0xf,X, 0xf,X
+[ ]+42: 18 02 0f 0f movw 0xf,X, 0xf,X
+[ ]+46: 86 05[ ]+ ldaa #0x5
+[ ]+48: 18 02 0f 0f movw 0xf,X, 0xf,X
+[ ]+4c: 18 02 0f 0f movw 0xf,X, 0xf,X
+[ ]+50: 18 02 0f 0f movw 0xf,X, 0xf,X
+[ ]+54: 86 06[ ]+ ldaa #0x6
+[ ]+56: 18 02 0f 10 movw 0xf,X, 0xfff0,X
+[ ]+5a: 18 02 0f 10 movw 0xf,X, 0xfff0,X
+[ ]+5e: 18 02 0f 10 movw 0xf,X, 0xfff0,X
+[ ]+62: 86 07[ ]+ ldaa #0x7
+[ ]+64: 18 02 10 0f movw 0xfff0,X, 0xf,X
+[ ]+68: 18 02 10 0f movw 0xfff0,X, 0xf,X
+[ ]+6c: 18 02 10 0f movw 0xfff0,X, 0xf,X
+[ ]+70: 86 08[ ]+ ldaa #0x8
+[ ]+72: 18 0a 4f 4f movb 0xf,Y, 0xf,Y
+[ ]+76: 18 0a 4f 4f movb 0xf,Y, 0xf,Y
+[ ]+7a: 18 0a 4f 4f movb 0xf,Y, 0xf,Y
+[ ]+7e: 86 09[ ]+ ldaa #0x9
+[ ]+80: 18 0a 4f 4f movb 0xf,Y, 0xf,Y
+[ ]+84: 18 0a 4f 4f movb 0xf,Y, 0xf,Y
+[ ]+88: 18 0a 4f 4f movb 0xf,Y, 0xf,Y
+[ ]+8c: 86 0a[ ]+ ldaa #0xa
+[ ]+8e: 18 0a 4f 50 movb 0xf,Y, 0xfff0,Y
+[ ]+92: 18 0a 4f 50 movb 0xf,Y, 0xfff0,Y
+[ ]+96: 18 0a 4f 50 movb 0xf,Y, 0xfff0,Y
+[ ]+9a: 86 0b[ ]+ ldaa #0xb
+[ ]+9c: 18 0a 50 4f movb 0xfff0,Y, 0xf,Y
+[ ]+a0: 18 0a 50 4f movb 0xfff0,Y, 0xf,Y
+[ ]+a4: 18 0a 50 4f movb 0xfff0,Y, 0xf,Y
+[ ]+a8: 86 0c[ ]+ ldaa #0xc
+[ ]+aa: 18 02 4f 4f movw 0xf,Y, 0xf,Y
+[ ]+ae: 18 02 4f 4f movw 0xf,Y, 0xf,Y
+[ ]+b2: 18 02 4f 4f movw 0xf,Y, 0xf,Y
+[ ]+b6: 86 0d[ ]+ ldaa #0xd
+[ ]+b8: 18 02 4f 4f movw 0xf,Y, 0xf,Y
+[ ]+bc: 18 02 4f 4f movw 0xf,Y, 0xf,Y
+[ ]+c0: 18 02 4f 4f movw 0xf,Y, 0xf,Y
+[ ]+c4: 86 0e[ ]+ ldaa #0xe
+[ ]+c6: 18 02 4f 50 movw 0xf,Y, 0xfff0,Y
+[ ]+ca: 18 02 4f 50 movw 0xf,Y, 0xfff0,Y
+[ ]+ce: 18 02 4f 50 movw 0xf,Y, 0xfff0,Y
+[ ]+d2: 86 0f[ ]+ ldaa #0xf
+[ ]+d4: 18 02 50 4f movw 0xfff0,Y, 0xf,Y
+[ ]+d8: 18 02 50 4f movw 0xfff0,Y, 0xf,Y
+[ ]+dc: 18 02 50 4f movw 0xfff0,Y, 0xf,Y
+[ ]+e0: 86 10[ ]+ ldaa #0x10
+[ ]+e2: 18 0a 4f cf movb 0xf,Y, 0xf,PC \{0xf5 <cat2\+0xe6>\}
+[ ]+e6: 18 0a 4f cf movb 0xf,Y, 0xf,PC \{0xf9 <cat2\+0xea>\}
+[ ]+ea: 18 0a 4f cf movb 0xf,Y, 0xf,PC \{0xfd <cat2\+0xee>\}
+[ ]+ee: 86 11[ ]+ ldaa #0x11
+[ ]+f0: 18 0a 4f cf movb 0xf,Y, 0xf,PC \{0x103 <cat2\+0xf4>\}
+[ ]+f4: 18 0a 4f cf movb 0xf,Y, 0xf,PC \{0x107 <cat2\+0xf8>\}
+[ ]+f8: 18 0a 4f cf movb 0xf,Y, 0xf,PC \{0x10b <cat2\+0xfc>\}
+[ ]+fc: 86 12[ ]+ ldaa #0x12
+[ ]+fe: 18 0a 4f d0 movb 0xf,Y, 0xfff0,PC \{0xf2 <cat2\+0xe3>\}
+ 102: 18 0a 4f d0 movb 0xf,Y, 0xfff0,PC \{0xf6 <cat2\+0xe7>\}
+ 106: 18 0a 4f d0 movb 0xf,Y, 0xfff0,PC \{0xfa <cat2\+0xeb>\}
+ 10a: 86 13[ ]+ ldaa #0x13
+ 10c: 18 0a 50 cf movb 0xfff0,Y, 0xf,PC \{0x11f <cat2\+0x110>\}
+ 110: 18 0a 50 cf movb 0xfff0,Y, 0xf,PC \{0x123 <cat2\+0x114>\}
+ 114: 18 0a 50 cf movb 0xfff0,Y, 0xf,PC \{0x127 <cat2\+0x118>\}
+ 118: 86 14[ ]+ ldaa #0x14
+ 11a: 18 02 4f cf movw 0xf,Y, 0xf,PC \{0x12d <cat2\+0x11e>\}
+ 11e: 18 02 4f cf movw 0xf,Y, 0xf,PC \{0x131 <cat2\+0x122>\}
+ 122: 18 02 4f cf movw 0xf,Y, 0xf,PC \{0x135 <cat2\+0x126>\}
+ 126: 86 15[ ]+ ldaa #0x15
+ 128: 18 02 4f cf movw 0xf,Y, 0xf,PC \{0x13b <cat2\+0x12c>\}
+ 12c: 18 02 4f cf movw 0xf,Y, 0xf,PC \{0x13f <cat2\+0x130>\}
+ 130: 18 02 4f cf movw 0xf,Y, 0xf,PC \{0x143 <cat2\+0x134>\}
+ 134: 86 16[ ]+ ldaa #0x16
+ 136: 18 02 4f d0 movw 0xf,Y, 0xfff0,PC \{0x12a <cat2\+0x11b>\}
+ 13a: 18 02 4f d0 movw 0xf,Y, 0xfff0,PC \{0x12e <cat2\+0x11f>\}
+ 13e: 18 02 4f d0 movw 0xf,Y, 0xfff0,PC \{0x132 <cat2\+0x123>\}
+ 142: 86 17[ ]+ ldaa #0x17
+ 144: 18 02 50 cf movw 0xfff0,Y, 0xf,PC \{0x157 <cat2\+0x148>\}
+ 148: 18 02 50 cf movw 0xfff0,Y, 0xf,PC \{0x15b <cat2\+0x14c>\}
+ 14c: 18 02 50 cf movw 0xfff0,Y, 0xf,PC \{0x15f <cat2\+0x150>\}
+ 150: 86 18[ ]+ ldaa #0x18
+ 152: 18 0a 8f cf movb 0xf,SP, 0xf,PC \{0x165 <cat2\+0x156>\}
+ 156: 18 0a 8f cf movb 0xf,SP, 0xf,PC \{0x169 <cat2\+0x15a>\}
+ 15a: 18 0a 8f cf movb 0xf,SP, 0xf,PC \{0x16d <cat2\+0x15e>\}
+ 15e: 86 19[ ]+ ldaa #0x19
+ 160: 18 0a 8f cf movb 0xf,SP, 0xf,PC \{0x173 <cat2\+0x164>\}
+ 164: 18 0a 8f cf movb 0xf,SP, 0xf,PC \{0x177 <cat2\+0x168>\}
+ 168: 18 0a 8f cf movb 0xf,SP, 0xf,PC \{0x17b <cat2\+0x16c>\}
+ 16c: 86 1a[ ]+ ldaa #0x1a
+ 16e: 18 0a 8f d0 movb 0xf,SP, 0xfff0,PC \{0x162 <cat2\+0x153>\}
+ 172: 18 0a 8f d0 movb 0xf,SP, 0xfff0,PC \{0x166 <cat2\+0x157>\}
+ 176: 18 0a 8f d0 movb 0xf,SP, 0xfff0,PC \{0x16a <cat2\+0x15b>\}
+ 17a: 86 1b[ ]+ ldaa #0x1b
+ 17c: 18 0a 90 cf movb 0xfff0,SP, 0xf,PC \{0x18f <cat2\+0x180>\}
+ 180: 18 0a 90 cf movb 0xfff0,SP, 0xf,PC \{0x193 <cat2\+0x184>\}
+ 184: 18 0a 90 cf movb 0xfff0,SP, 0xf,PC \{0x197 <cat2\+0x188>\}
+ 188: 86 1c[ ]+ ldaa #0x1c
+ 18a: 18 02 8f cf movw 0xf,SP, 0xf,PC \{0x19d <cat2\+0x18e>\}
+ 18e: 18 02 8f cf movw 0xf,SP, 0xf,PC \{0x1a1 <cat2\+0x192>\}
+ 192: 18 02 8f cf movw 0xf,SP, 0xf,PC \{0x1a5 <cat2\+0x196>\}
+ 196: 86 1d[ ]+ ldaa #0x1d
+ 198: 18 02 8f cf movw 0xf,SP, 0xf,PC \{0x1ab <cat2\+0x19c>\}
+ 19c: 18 02 8f cf movw 0xf,SP, 0xf,PC \{0x1af <cat2\+0x1a0>\}
+ 1a0: 18 02 8f cf movw 0xf,SP, 0xf,PC \{0x1b3 <cat2\+0x1a4>\}
+ 1a4: 86 1e[ ]+ ldaa #0x1e
+ 1a6: 18 02 8f d0 movw 0xf,SP, 0xfff0,PC \{0x19a <cat2\+0x18b>\}
+ 1aa: 18 02 8f d0 movw 0xf,SP, 0xfff0,PC \{0x19e <cat2\+0x18f>\}
+ 1ae: 18 02 8f d0 movw 0xf,SP, 0xfff0,PC \{0x1a2 <cat2\+0x193>\}
+ 1b2: 86 1f[ ]+ ldaa #0x1f
+ 1b4: 18 02 90 cf movw 0xfff0,SP, 0xf,PC \{0x1c7 <cat2\+0x1b8>\}
+ 1b8: 18 02 90 cf movw 0xfff0,SP, 0xf,PC \{0x1cb <cat2\+0x1bc>\}
+ 1bc: 18 02 90 cf movw 0xfff0,SP, 0xf,PC \{0x1cf <cat2\+0x1c0>\}
+ 1c0: 86 20[ ]+ ldaa #0x20
+ 1c2: 18 09 0f 10 movb 0x1000 <cat2\+0xff1>, 0xf,X
1c6: 00
- 1c7: 18 09 0f 10 movb 1000 <cat2\+0xff1>, 15,X
+ 1c7: 18 09 0f 10 movb 0x1000 <cat2\+0xff1>, 0xf,X
1cb: 00
- 1cc: 18 09 0f 10 movb 1000 <cat2\+0xff1>, 15,X
+ 1cc: 18 09 0f 10 movb 0x1000 <cat2\+0xff1>, 0xf,X
1d0: 00
- 1d1: 86 21[ ]+ ldaa #33
- 1d3: 18 0d 0f 10 movb 15,X, 1000 <cat2\+0xff1>
+ 1d1: 86 21[ ]+ ldaa #0x21
+ 1d3: 18 0d 0f 10 movb 0xf,X, 0x1000 <cat2\+0xff1>
1d7: 00
- 1d8: 18 0d 0f 10 movb 15,X, 1000 <cat2\+0xff1>
+ 1d8: 18 0d 0f 10 movb 0xf,X, 0x1000 <cat2\+0xff1>
1dc: 00
- 1dd: 18 0d 0f 10 movb 15,X, 1000 <cat2\+0xff1>
+ 1dd: 18 0d 0f 10 movb 0xf,X, 0x1000 <cat2\+0xff1>
1e1: 00
- 1e2: 86 22[ ]+ ldaa #34
- 1e4: 18 09 10 10 movb 1000 <cat2\+0xff1>, \-16,X
+ 1e2: 86 22[ ]+ ldaa #0x22
+ 1e4: 18 09 10 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,X
1e8: 00
- 1e9: 18 09 10 10 movb 1000 <cat2\+0xff1>, \-16,X
+ 1e9: 18 09 10 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,X
1ed: 00
- 1ee: 18 09 10 10 movb 1000 <cat2\+0xff1>, \-16,X
+ 1ee: 18 09 10 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,X
1f2: 00
- 1f3: 86 23[ ]+ ldaa #35
- 1f5: 18 0d 10 10 movb \-16,X, 1000 <cat2\+0xff1>
+ 1f3: 86 23[ ]+ ldaa #0x23
+ 1f5: 18 0d 10 10 movb 0xfff0,X, 0x1000 <cat2\+0xff1>
1f9: 00
- 1fa: 18 0d 10 10 movb \-16,X, 1000 <cat2\+0xff1>
+ 1fa: 18 0d 10 10 movb 0xfff0,X, 0x1000 <cat2\+0xff1>
1fe: 00
- 1ff: 18 0d 10 10 movb \-16,X, 1000 <cat2\+0xff1>
+ 1ff: 18 0d 10 10 movb 0xfff0,X, 0x1000 <cat2\+0xff1>
203: 00
- 204: 86 24[ ]+ ldaa #36
- 206: 18 01 0f 10 movw 1002 <cat2\+0xff3>, 15,X
+ 204: 86 24[ ]+ ldaa #0x24
+ 206: 18 01 0f 10 movw 0x1002 <cat2\+0xff3>, 0xf,X
20a: 02
- 20b: 18 01 0f 10 movw 1002 <cat2\+0xff3>, 15,X
+ 20b: 18 01 0f 10 movw 0x1002 <cat2\+0xff3>, 0xf,X
20f: 02
- 210: 18 01 0f 10 movw 1002 <cat2\+0xff3>, 15,X
+ 210: 18 01 0f 10 movw 0x1002 <cat2\+0xff3>, 0xf,X
214: 02
- 215: 86 25[ ]+ ldaa #37
- 217: 18 05 0f 10 movw 15,X, 1002 <cat2\+0xff3>
+ 215: 86 25[ ]+ ldaa #0x25
+ 217: 18 05 0f 10 movw 0xf,X, 0x1002 <cat2\+0xff3>
21b: 02
- 21c: 18 05 0f 10 movw 15,X, 1002 <cat2\+0xff3>
+ 21c: 18 05 0f 10 movw 0xf,X, 0x1002 <cat2\+0xff3>
220: 02
- 221: 18 05 0f 10 movw 15,X, 1002 <cat2\+0xff3>
+ 221: 18 05 0f 10 movw 0xf,X, 0x1002 <cat2\+0xff3>
225: 02
- 226: 86 26[ ]+ ldaa #38
- 228: 18 01 10 10 movw 1002 <cat2\+0xff3>, \-16,X
+ 226: 86 26[ ]+ ldaa #0x26
+ 228: 18 01 10 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,X
22c: 02
- 22d: 18 01 10 10 movw 1002 <cat2\+0xff3>, \-16,X
+ 22d: 18 01 10 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,X
231: 02
- 232: 18 01 10 10 movw 1002 <cat2\+0xff3>, \-16,X
+ 232: 18 01 10 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,X
236: 02
- 237: 86 27[ ]+ ldaa #39
- 239: 18 05 10 10 movw \-16,X, 1002 <cat2\+0xff3>
+ 237: 86 27[ ]+ ldaa #0x27
+ 239: 18 05 10 10 movw 0xfff0,X, 0x1002 <cat2\+0xff3>
23d: 02
- 23e: 18 05 10 10 movw \-16,X, 1002 <cat2\+0xff3>
+ 23e: 18 05 10 10 movw 0xfff0,X, 0x1002 <cat2\+0xff3>
242: 02
- 243: 18 05 10 10 movw \-16,X, 1002 <cat2\+0xff3>
+ 243: 18 05 10 10 movw 0xfff0,X, 0x1002 <cat2\+0xff3>
247: 02
- 248: 86 28[ ]+ ldaa #40
- 24a: 18 09 4f 10 movb 1000 <cat2\+0xff1>, 15,Y
+ 248: 86 28[ ]+ ldaa #0x28
+ 24a: 18 09 4f 10 movb 0x1000 <cat2\+0xff1>, 0xf,Y
24e: 00
- 24f: 18 09 4f 10 movb 1000 <cat2\+0xff1>, 15,Y
+ 24f: 18 09 4f 10 movb 0x1000 <cat2\+0xff1>, 0xf,Y
253: 00
- 254: 18 09 4f 10 movb 1000 <cat2\+0xff1>, 15,Y
+ 254: 18 09 4f 10 movb 0x1000 <cat2\+0xff1>, 0xf,Y
258: 00
- 259: 86 29[ ]+ ldaa #41
- 25b: 18 0d 4f 10 movb 15,Y, 1000 <cat2\+0xff1>
+ 259: 86 29[ ]+ ldaa #0x29
+ 25b: 18 0d 4f 10 movb 0xf,Y, 0x1000 <cat2\+0xff1>
25f: 00
- 260: 18 0d 4f 10 movb 15,Y, 1000 <cat2\+0xff1>
+ 260: 18 0d 4f 10 movb 0xf,Y, 0x1000 <cat2\+0xff1>
264: 00
- 265: 18 0d 4f 10 movb 15,Y, 1000 <cat2\+0xff1>
+ 265: 18 0d 4f 10 movb 0xf,Y, 0x1000 <cat2\+0xff1>
269: 00
- 26a: 86 2a[ ]+ ldaa #42
- 26c: 18 09 50 10 movb 1000 <cat2\+0xff1>, \-16,Y
+ 26a: 86 2a[ ]+ ldaa #0x2a
+ 26c: 18 09 50 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,Y
270: 00
- 271: 18 09 50 10 movb 1000 <cat2\+0xff1>, \-16,Y
+ 271: 18 09 50 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,Y
275: 00
- 276: 18 09 50 10 movb 1000 <cat2\+0xff1>, \-16,Y
+ 276: 18 09 50 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,Y
27a: 00
- 27b: 86 2b[ ]+ ldaa #43
- 27d: 18 0d 50 10 movb \-16,Y, 1000 <cat2\+0xff1>
+ 27b: 86 2b[ ]+ ldaa #0x2b
+ 27d: 18 0d 50 10 movb 0xfff0,Y, 0x1000 <cat2\+0xff1>
281: 00
- 282: 18 0d 50 10 movb \-16,Y, 1000 <cat2\+0xff1>
+ 282: 18 0d 50 10 movb 0xfff0,Y, 0x1000 <cat2\+0xff1>
286: 00
- 287: 18 0d 50 10 movb \-16,Y, 1000 <cat2\+0xff1>
+ 287: 18 0d 50 10 movb 0xfff0,Y, 0x1000 <cat2\+0xff1>
28b: 00
- 28c: 86 2c[ ]+ ldaa #44
- 28e: 18 01 4f 10 movw 1002 <cat2\+0xff3>, 15,Y
+ 28c: 86 2c[ ]+ ldaa #0x2c
+ 28e: 18 01 4f 10 movw 0x1002 <cat2\+0xff3>, 0xf,Y
292: 02
- 293: 18 01 4f 10 movw 1002 <cat2\+0xff3>, 15,Y
+ 293: 18 01 4f 10 movw 0x1002 <cat2\+0xff3>, 0xf,Y
297: 02
- 298: 18 01 4f 10 movw 1002 <cat2\+0xff3>, 15,Y
+ 298: 18 01 4f 10 movw 0x1002 <cat2\+0xff3>, 0xf,Y
29c: 02
- 29d: 86 2d[ ]+ ldaa #45
- 29f: 18 05 4f 10 movw 15,Y, 1002 <cat2\+0xff3>
+ 29d: 86 2d[ ]+ ldaa #0x2d
+ 29f: 18 05 4f 10 movw 0xf,Y, 0x1002 <cat2\+0xff3>
2a3: 02
- 2a4: 18 05 4f 10 movw 15,Y, 1002 <cat2\+0xff3>
+ 2a4: 18 05 4f 10 movw 0xf,Y, 0x1002 <cat2\+0xff3>
2a8: 02
- 2a9: 18 05 4f 10 movw 15,Y, 1002 <cat2\+0xff3>
+ 2a9: 18 05 4f 10 movw 0xf,Y, 0x1002 <cat2\+0xff3>
2ad: 02
- 2ae: 86 2e[ ]+ ldaa #46
- 2b0: 18 01 50 10 movw 1002 <cat2\+0xff3>, \-16,Y
+ 2ae: 86 2e[ ]+ ldaa #0x2e
+ 2b0: 18 01 50 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,Y
2b4: 02
- 2b5: 18 01 50 10 movw 1002 <cat2\+0xff3>, \-16,Y
+ 2b5: 18 01 50 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,Y
2b9: 02
- 2ba: 18 01 50 10 movw 1002 <cat2\+0xff3>, \-16,Y
+ 2ba: 18 01 50 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,Y
2be: 02
- 2bf: 86 2f[ ]+ ldaa #47
- 2c1: 18 05 50 10 movw \-16,Y, 1002 <cat2\+0xff3>
+ 2bf: 86 2f[ ]+ ldaa #0x2f
+ 2c1: 18 05 50 10 movw 0xfff0,Y, 0x1002 <cat2\+0xff3>
2c5: 02
- 2c6: 18 05 50 10 movw \-16,Y, 1002 <cat2\+0xff3>
+ 2c6: 18 05 50 10 movw 0xfff0,Y, 0x1002 <cat2\+0xff3>
2ca: 02
- 2cb: 18 05 50 10 movw \-16,Y, 1002 <cat2\+0xff3>
+ 2cb: 18 05 50 10 movw 0xfff0,Y, 0x1002 <cat2\+0xff3>
2cf: 02
- 2d0: 86 30[ ]+ ldaa #48
- 2d2: 18 09 cf 10 movb 1000 <cat2\+0xff1>, 15,PC \{2e4 <cat2\+0x2d5>\}
+ 2d0: 86 30[ ]+ ldaa #0x30
+ 2d2: 18 09 cf 10 movb 0x1000 <cat2\+0xff1>, 0xf,PC \{0x2e4 <cat2\+0x2d5>\}
2d6: 00
- 2d7: 18 09 cf 10 movb 1000 <cat2\+0xff1>, 15,PC \{2e9 <cat2\+0x2da>\}
+ 2d7: 18 09 cf 10 movb 0x1000 <cat2\+0xff1>, 0xf,PC \{0x2e9 <cat2\+0x2da>\}
2db: 00
- 2dc: 18 09 cf 10 movb 1000 <cat2\+0xff1>, 15,PC \{2ee <cat2\+0x2df>\}
+ 2dc: 18 09 cf 10 movb 0x1000 <cat2\+0xff1>, 0xf,PC \{0x2ee <cat2\+0x2df>\}
2e0: 00
- 2e1: 86 31[ ]+ ldaa #49
- 2e3: 18 0d cf 10 movb 15,PC \{2f5 <cat2\+0x2e6>\}, 1000 <cat2\+0xff1>
+ 2e1: 86 31[ ]+ ldaa #0x31
+ 2e3: 18 0d cf 10 movb 0xf,PC \{0x2f5 <cat2\+0x2e6>\}, 0x1000 <cat2\+0xff1>
2e7: 00
- 2e8: 18 0d cf 10 movb 15,PC \{2fa <cat2\+0x2eb>\}, 1000 <cat2\+0xff1>
+ 2e8: 18 0d cf 10 movb 0xf,PC \{0x2fa <cat2\+0x2eb>\}, 0x1000 <cat2\+0xff1>
2ec: 00
- 2ed: 18 0d cf 10 movb 15,PC \{2ff <cat2\+0x2f0>\}, 1000 <cat2\+0xff1>
+ 2ed: 18 0d cf 10 movb 0xf,PC \{0x2ff <cat2\+0x2f0>\}, 0x1000 <cat2\+0xff1>
2f1: 00
- 2f2: 86 32[ ]+ ldaa #50
- 2f4: 18 09 d0 10 movb 1000 <cat2\+0xff1>, \-16,PC \{2e7 <cat2\+0x2d8>\}
+ 2f2: 86 32[ ]+ ldaa #0x32
+ 2f4: 18 09 d0 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,PC \{0x2e7 <cat2\+0x2d8>\}
2f8: 00
- 2f9: 18 09 d0 10 movb 1000 <cat2\+0xff1>, \-16,PC \{2ec <cat2\+0x2dd>\}
+ 2f9: 18 09 d0 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,PC \{0x2ec <cat2\+0x2dd>\}
2fd: 00
- 2fe: 18 09 d0 10 movb 1000 <cat2\+0xff1>, \-16,PC \{2f1 <cat2\+0x2e2>\}
+ 2fe: 18 09 d0 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,PC \{0x2f1 <cat2\+0x2e2>\}
302: 00
- 303: 86 33[ ]+ ldaa #51
- 305: 18 0d d0 10 movb \-16,PC \{2f8 <cat2\+0x2e9>\}, 1000 <cat2\+0xff1>
+ 303: 86 33[ ]+ ldaa #0x33
+ 305: 18 0d d0 10 movb 0xfff0,PC \{0x2f8 <cat2\+0x2e9>\}, 0x1000 <cat2\+0xff1>
309: 00
- 30a: 18 0d d0 10 movb \-16,PC \{2fd <cat2\+0x2ee>\}, 1000 <cat2\+0xff1>
+ 30a: 18 0d d0 10 movb 0xfff0,PC \{0x2fd <cat2\+0x2ee>\}, 0x1000 <cat2\+0xff1>
30e: 00
- 30f: 18 0d d0 10 movb \-16,PC \{302 <cat2\+0x2f3>\}, 1000 <cat2\+0xff1>
+ 30f: 18 0d d0 10 movb 0xfff0,PC \{0x302 <cat2\+0x2f3>\}, 0x1000 <cat2\+0xff1>
313: 00
- 314: 86 34[ ]+ ldaa #52
- 316: 18 01 cf 10 movw 1002 <cat2\+0xff3>, 15,PC \{328 <cat2\+0x319>\}
+ 314: 86 34[ ]+ ldaa #0x34
+ 316: 18 01 cf 10 movw 0x1002 <cat2\+0xff3>, 0xf,PC \{0x328 <cat2\+0x319>\}
31a: 02
- 31b: 18 01 cf 10 movw 1002 <cat2\+0xff3>, 15,PC \{32d <cat2\+0x31e>\}
+ 31b: 18 01 cf 10 movw 0x1002 <cat2\+0xff3>, 0xf,PC \{0x32d <cat2\+0x31e>\}
31f: 02
- 320: 18 01 cf 10 movw 1002 <cat2\+0xff3>, 15,PC \{332 <cat2\+0x323>\}
+ 320: 18 01 cf 10 movw 0x1002 <cat2\+0xff3>, 0xf,PC \{0x332 <cat2\+0x323>\}
324: 02
- 325: 86 35[ ]+ ldaa #53
- 327: 18 05 cf 10 movw 15,PC \{339 <cat2\+0x32a>\}, 1002 <cat2\+0xff3>
+ 325: 86 35[ ]+ ldaa #0x35
+ 327: 18 05 cf 10 movw 0xf,PC \{0x339 <cat2\+0x32a>\}, 0x1002 <cat2\+0xff3>
32b: 02
- 32c: 18 05 cf 10 movw 15,PC \{33e <cat2\+0x32f>\}, 1002 <cat2\+0xff3>
+ 32c: 18 05 cf 10 movw 0xf,PC \{0x33e <cat2\+0x32f>\}, 0x1002 <cat2\+0xff3>
330: 02
- 331: 18 05 cf 10 movw 15,PC \{343 <cat2\+0x334>\}, 1002 <cat2\+0xff3>
+ 331: 18 05 cf 10 movw 0xf,PC \{0x343 <cat2\+0x334>\}, 0x1002 <cat2\+0xff3>
335: 02
- 336: 86 36[ ]+ ldaa #54
- 338: 18 01 d0 10 movw 1002 <cat2\+0xff3>, \-16,PC \{32b <cat2\+0x31c>\}
+ 336: 86 36[ ]+ ldaa #0x36
+ 338: 18 01 d0 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,PC \{0x32b <cat2\+0x31c>\}
33c: 02
- 33d: 18 01 d0 10 movw 1002 <cat2\+0xff3>, \-16,PC \{330 <cat2\+0x321>\}
+ 33d: 18 01 d0 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,PC \{0x330 <cat2\+0x321>\}
341: 02
- 342: 18 01 d0 10 movw 1002 <cat2\+0xff3>, \-16,PC \{335 <cat2\+0x326>\}
+ 342: 18 01 d0 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,PC \{0x335 <cat2\+0x326>\}
346: 02
- 347: 86 37[ ]+ ldaa #55
- 349: 18 05 d0 10 movw \-16,PC \{33c <cat2\+0x32d>\}, 1002 <cat2\+0xff3>
+ 347: 86 37[ ]+ ldaa #0x37
+ 349: 18 05 d0 10 movw 0xfff0,PC \{0x33c <cat2\+0x32d>\}, 0x1002 <cat2\+0xff3>
34d: 02
- 34e: 18 05 d0 10 movw \-16,PC \{341 <cat2\+0x332>\}, 1002 <cat2\+0xff3>
+ 34e: 18 05 d0 10 movw 0xfff0,PC \{0x341 <cat2\+0x332>\}, 0x1002 <cat2\+0xff3>
352: 02
- 353: 18 05 d0 10 movw \-16,PC \{346 <cat2\+0x337>\}, 1002 <cat2\+0xff3>
+ 353: 18 05 d0 10 movw 0xfff0,PC \{0x346 <cat2\+0x337>\}, 0x1002 <cat2\+0xff3>
357: 02
- 358: 86 38[ ]+ ldaa #56
- 35a: 18 09 8f 10 movb 1000 <cat2\+0xff1>, 15,SP
+ 358: 86 38[ ]+ ldaa #0x38
+ 35a: 18 09 8f 10 movb 0x1000 <cat2\+0xff1>, 0xf,SP
35e: 00
- 35f: 18 09 8f 10 movb 1000 <cat2\+0xff1>, 15,SP
+ 35f: 18 09 8f 10 movb 0x1000 <cat2\+0xff1>, 0xf,SP
363: 00
- 364: 18 09 8f 10 movb 1000 <cat2\+0xff1>, 15,SP
+ 364: 18 09 8f 10 movb 0x1000 <cat2\+0xff1>, 0xf,SP
368: 00
- 369: 86 39[ ]+ ldaa #57
- 36b: 18 0d 8f 10 movb 15,SP, 1000 <cat2\+0xff1>
+ 369: 86 39[ ]+ ldaa #0x39
+ 36b: 18 0d 8f 10 movb 0xf,SP, 0x1000 <cat2\+0xff1>
36f: 00
- 370: 18 0d 8f 10 movb 15,SP, 1000 <cat2\+0xff1>
+ 370: 18 0d 8f 10 movb 0xf,SP, 0x1000 <cat2\+0xff1>
374: 00
- 375: 18 0d 8f 10 movb 15,SP, 1000 <cat2\+0xff1>
+ 375: 18 0d 8f 10 movb 0xf,SP, 0x1000 <cat2\+0xff1>
379: 00
- 37a: 86 3a[ ]+ ldaa #58
- 37c: 18 09 90 10 movb 1000 <cat2\+0xff1>, \-16,SP
+ 37a: 86 3a[ ]+ ldaa #0x3a
+ 37c: 18 09 90 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,SP
380: 00
- 381: 18 09 90 10 movb 1000 <cat2\+0xff1>, \-16,SP
+ 381: 18 09 90 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,SP
385: 00
- 386: 18 09 90 10 movb 1000 <cat2\+0xff1>, \-16,SP
+ 386: 18 09 90 10 movb 0x1000 <cat2\+0xff1>, 0xfff0,SP
38a: 00
- 38b: 86 3b[ ]+ ldaa #59
- 38d: 18 0d 90 10 movb \-16,SP, 1000 <cat2\+0xff1>
+ 38b: 86 3b[ ]+ ldaa #0x3b
+ 38d: 18 0d 90 10 movb 0xfff0,SP, 0x1000 <cat2\+0xff1>
391: 00
- 392: 18 0d 90 10 movb \-16,SP, 1000 <cat2\+0xff1>
+ 392: 18 0d 90 10 movb 0xfff0,SP, 0x1000 <cat2\+0xff1>
396: 00
- 397: 18 0d 90 10 movb \-16,SP, 1000 <cat2\+0xff1>
+ 397: 18 0d 90 10 movb 0xfff0,SP, 0x1000 <cat2\+0xff1>
39b: 00
- 39c: 86 3c[ ]+ ldaa #60
- 39e: 18 01 8f 10 movw 1002 <cat2\+0xff3>, 15,SP
+ 39c: 86 3c[ ]+ ldaa #0x3c
+ 39e: 18 01 8f 10 movw 0x1002 <cat2\+0xff3>, 0xf,SP
3a2: 02
- 3a3: 18 01 8f 10 movw 1002 <cat2\+0xff3>, 15,SP
+ 3a3: 18 01 8f 10 movw 0x1002 <cat2\+0xff3>, 0xf,SP
3a7: 02
- 3a8: 18 01 8f 10 movw 1002 <cat2\+0xff3>, 15,SP
+ 3a8: 18 01 8f 10 movw 0x1002 <cat2\+0xff3>, 0xf,SP
3ac: 02
- 3ad: 86 3d[ ]+ ldaa #61
- 3af: 18 05 8f 10 movw 15,SP, 1002 <cat2\+0xff3>
+ 3ad: 86 3d[ ]+ ldaa #0x3d
+ 3af: 18 05 8f 10 movw 0xf,SP, 0x1002 <cat2\+0xff3>
3b3: 02
- 3b4: 18 05 8f 10 movw 15,SP, 1002 <cat2\+0xff3>
+ 3b4: 18 05 8f 10 movw 0xf,SP, 0x1002 <cat2\+0xff3>
3b8: 02
- 3b9: 18 05 8f 10 movw 15,SP, 1002 <cat2\+0xff3>
+ 3b9: 18 05 8f 10 movw 0xf,SP, 0x1002 <cat2\+0xff3>
3bd: 02
- 3be: 86 3e[ ]+ ldaa #62
- 3c0: 18 01 90 10 movw 1002 <cat2\+0xff3>, \-16,SP
+ 3be: 86 3e[ ]+ ldaa #0x3e
+ 3c0: 18 01 90 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,SP
3c4: 02
- 3c5: 18 01 90 10 movw 1002 <cat2\+0xff3>, \-16,SP
+ 3c5: 18 01 90 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,SP
3c9: 02
- 3ca: 18 01 90 10 movw 1002 <cat2\+0xff3>, \-16,SP
+ 3ca: 18 01 90 10 movw 0x1002 <cat2\+0xff3>, 0xfff0,SP
3ce: 02
- 3cf: 86 3f[ ]+ ldaa #63
- 3d1: 18 05 90 10 movw \-16,SP, 1002 <cat2\+0xff3>
+ 3cf: 86 3f[ ]+ ldaa #0x3f
+ 3d1: 18 05 90 10 movw 0xfff0,SP, 0x1002 <cat2\+0xff3>
3d5: 02
- 3d6: 18 05 90 10 movw \-16,SP, 1002 <cat2\+0xff3>
+ 3d6: 18 05 90 10 movw 0xfff0,SP, 0x1002 <cat2\+0xff3>
3da: 02
- 3db: 18 05 90 10 movw \-16,SP, 1002 <cat2\+0xff3>
+ 3db: 18 05 90 10 movw 0xfff0,SP, 0x1002 <cat2\+0xff3>
3df: 02
- 3e0: 86 40[ ]+ ldaa #64
- 3e2: 18 08 07 aa movb #170, 7,X
- 3e6: 18 08 07 aa movb #170, 7,X
- 3ea: 18 08 07 aa movb #170, 7,X
- 3ee: 86 41[ ]+ ldaa #65
- 3f0: 18 08 18 aa movb #170, \-8,X
- 3f4: 18 08 18 aa movb #170, \-8,X
- 3f8: 18 08 18 aa movb #170, \-8,X
- 3fc: 86 42[ ]+ ldaa #66
- 3fe: 18 00 07 00 movw #44 <cat2\+0x35>, 7,X
+ 3e0: 86 40[ ]+ ldaa #0x40
+ 3e2: 18 08 07 aa movb #0xaa, 0x7,X
+ 3e6: 18 08 07 aa movb #0xaa, 0x7,X
+ 3ea: 18 08 07 aa movb #0xaa, 0x7,X
+ 3ee: 86 41[ ]+ ldaa #0x41
+ 3f0: 18 08 18 aa movb #0xaa, 0xfff8,X
+ 3f4: 18 08 18 aa movb #0xaa, 0xfff8,X
+ 3f8: 18 08 18 aa movb #0xaa, 0xfff8,X
+ 3fc: 86 42[ ]+ ldaa #0x42
+ 3fe: 18 00 07 00 movw #0x44 <cat2\+0x35>, 0x7,X
402: 44
- 403: 18 00 07 00 movw #44 <cat2\+0x35>, 7,X
+ 403: 18 00 07 00 movw #0x44 <cat2\+0x35>, 0x7,X
407: 44
- 408: 18 00 07 00 movw #44 <cat2\+0x35>, 7,X
+ 408: 18 00 07 00 movw #0x44 <cat2\+0x35>, 0x7,X
40c: 44
- 40d: 86 43[ ]+ ldaa #67
- 40f: 18 00 18 00 movw #44 <cat2\+0x35>, \-8,X
+ 40d: 86 43[ ]+ ldaa #0x43
+ 40f: 18 00 18 00 movw #0x44 <cat2\+0x35>, 0xfff8,X
413: 44
- 414: 18 00 18 00 movw #44 <cat2\+0x35>, \-8,X
+ 414: 18 00 18 00 movw #0x44 <cat2\+0x35>, 0xfff8,X
418: 44
- 419: 18 00 18 00 movw #44 <cat2\+0x35>, \-8,X
+ 419: 18 00 18 00 movw #0x44 <cat2\+0x35>, 0xfff8,X
41d: 44
- 41e: 86 44[ ]+ ldaa #68
- 420: 18 08 47 aa movb #170, 7,Y
- 424: 18 08 47 aa movb #170, 7,Y
- 428: 18 08 47 aa movb #170, 7,Y
- 42c: 86 45[ ]+ ldaa #69
- 42e: 18 08 58 aa movb #170, \-8,Y
- 432: 18 08 58 aa movb #170, \-8,Y
- 436: 18 08 58 aa movb #170, \-8,Y
- 43a: 86 46[ ]+ ldaa #70
- 43c: 18 00 47 00 movw #44 <cat2\+0x35>, 7,Y
+ 41e: 86 44[ ]+ ldaa #0x44
+ 420: 18 08 47 aa movb #0xaa, 0x7,Y
+ 424: 18 08 47 aa movb #0xaa, 0x7,Y
+ 428: 18 08 47 aa movb #0xaa, 0x7,Y
+ 42c: 86 45[ ]+ ldaa #0x45
+ 42e: 18 08 58 aa movb #0xaa, 0xfff8,Y
+ 432: 18 08 58 aa movb #0xaa, 0xfff8,Y
+ 436: 18 08 58 aa movb #0xaa, 0xfff8,Y
+ 43a: 86 46[ ]+ ldaa #0x46
+ 43c: 18 00 47 00 movw #0x44 <cat2\+0x35>, 0x7,Y
440: 44
- 441: 18 00 47 00 movw #44 <cat2\+0x35>, 7,Y
+ 441: 18 00 47 00 movw #0x44 <cat2\+0x35>, 0x7,Y
445: 44
- 446: 18 00 47 00 movw #44 <cat2\+0x35>, 7,Y
+ 446: 18 00 47 00 movw #0x44 <cat2\+0x35>, 0x7,Y
44a: 44
- 44b: 86 47[ ]+ ldaa #71
- 44d: 18 00 58 00 movw #44 <cat2\+0x35>, \-8,Y
+ 44b: 86 47[ ]+ ldaa #0x47
+ 44d: 18 00 58 00 movw #0x44 <cat2\+0x35>, 0xfff8,Y
451: 44
- 452: 18 00 58 00 movw #44 <cat2\+0x35>, \-8,Y
+ 452: 18 00 58 00 movw #0x44 <cat2\+0x35>, 0xfff8,Y
456: 44
- 457: 18 00 58 00 movw #44 <cat2\+0x35>, \-8,Y
+ 457: 18 00 58 00 movw #0x44 <cat2\+0x35>, 0xfff8,Y
45b: 44
- 45c: 86 48[ ]+ ldaa #72
- 45e: 18 08 c7 aa movb #170, 7,PC \{468 <cat2\+0x459>\}
- 462: 18 08 c7 aa movb #170, 7,PC \{46c <cat2\+0x45d>\}
- 466: 18 08 c7 aa movb #170, 7,PC \{470 <cat2\+0x461>\}
- 46a: 86 49[ ]+ ldaa #73
- 46c: 18 08 d8 aa movb #170, \-8,PC \{467 <cat2\+0x458>\}
- 470: 18 08 d8 aa movb #170, \-8,PC \{46b <cat2\+0x45c>\}
- 474: 18 08 d8 aa movb #170, \-8,PC \{46f <cat2\+0x460>\}
- 478: 86 4a[ ]+ ldaa #74
- 47a: 18 00 c7 00 movw #44 <cat2\+0x35>, 7,PC \{484 <cat2\+0x475>\}
+ 45c: 86 48[ ]+ ldaa #0x48
+ 45e: 18 08 c7 aa movb #0xaa, 0x7,PC \{0x468 <cat2\+0x459>\}
+ 462: 18 08 c7 aa movb #0xaa, 0x7,PC \{0x46c <cat2\+0x45d>\}
+ 466: 18 08 c7 aa movb #0xaa, 0x7,PC \{0x470 <cat2\+0x461>\}
+ 46a: 86 49[ ]+ ldaa #0x49
+ 46c: 18 08 d8 aa movb #0xaa, 0xfff8,PC \{0x467 <cat2\+0x458>\}
+ 470: 18 08 d8 aa movb #0xaa, 0xfff8,PC \{0x46b <cat2\+0x45c>\}
+ 474: 18 08 d8 aa movb #0xaa, 0xfff8,PC \{0x46f <cat2\+0x460>\}
+ 478: 86 4a[ ]+ ldaa #0x4a
+ 47a: 18 00 c7 00 movw #0x44 <cat2\+0x35>, 0x7,PC \{0x484 <cat2\+0x475>\}
47e: 44
- 47f: 18 00 c7 00 movw #44 <cat2\+0x35>, 7,PC \{489 <cat2\+0x47a>\}
+ 47f: 18 00 c7 00 movw #0x44 <cat2\+0x35>, 0x7,PC \{0x489 <cat2\+0x47a>\}
483: 44
- 484: 18 00 c7 00 movw #44 <cat2\+0x35>, 7,PC \{48e <cat2\+0x47f>\}
+ 484: 18 00 c7 00 movw #0x44 <cat2\+0x35>, 0x7,PC \{0x48e <cat2\+0x47f>\}
488: 44
- 489: 86 4b[ ]+ ldaa #75
- 48b: 18 00 d8 00 movw #44 <cat2\+0x35>, \-8,PC \{486 <cat2\+0x477>\}
+ 489: 86 4b[ ]+ ldaa #0x4b
+ 48b: 18 00 d8 00 movw #0x44 <cat2\+0x35>, 0xfff8,PC \{0x486 <cat2\+0x477>\}
48f: 44
- 490: 18 00 d8 00 movw #44 <cat2\+0x35>, \-8,PC \{48b <cat2\+0x47c>\}
+ 490: 18 00 d8 00 movw #0x44 <cat2\+0x35>, 0xfff8,PC \{0x48b <cat2\+0x47c>\}
494: 44
- 495: 18 00 d8 00 movw #44 <cat2\+0x35>, \-8,PC \{490 <cat2\+0x481>\}
+ 495: 18 00 d8 00 movw #0x44 <cat2\+0x35>, 0xfff8,PC \{0x490 <cat2\+0x481>\}
499: 44
- 49a: 86 4c[ ]+ ldaa #76
- 49c: 18 08 87 aa movb #170, 7,SP
- 4a0: 18 08 87 aa movb #170, 7,SP
- 4a4: 18 08 87 aa movb #170, 7,SP
- 4a8: 86 4d[ ]+ ldaa #77
- 4aa: 18 08 98 aa movb #170, \-8,SP
- 4ae: 18 08 98 aa movb #170, \-8,SP
- 4b2: 18 08 98 aa movb #170, \-8,SP
- 4b6: 86 4e[ ]+ ldaa #78
- 4b8: 18 00 87 00 movw #44 <cat2\+0x35>, 7,SP
+ 49a: 86 4c[ ]+ ldaa #0x4c
+ 49c: 18 08 87 aa movb #0xaa, 0x7,SP
+ 4a0: 18 08 87 aa movb #0xaa, 0x7,SP
+ 4a4: 18 08 87 aa movb #0xaa, 0x7,SP
+ 4a8: 86 4d[ ]+ ldaa #0x4d
+ 4aa: 18 08 98 aa movb #0xaa, 0xfff8,SP
+ 4ae: 18 08 98 aa movb #0xaa, 0xfff8,SP
+ 4b2: 18 08 98 aa movb #0xaa, 0xfff8,SP
+ 4b6: 86 4e[ ]+ ldaa #0x4e
+ 4b8: 18 00 87 00 movw #0x44 <cat2\+0x35>, 0x7,SP
4bc: 44
- 4bd: 18 00 87 00 movw #44 <cat2\+0x35>, 7,SP
+ 4bd: 18 00 87 00 movw #0x44 <cat2\+0x35>, 0x7,SP
4c1: 44
- 4c2: 18 00 87 00 movw #44 <cat2\+0x35>, 7,SP
+ 4c2: 18 00 87 00 movw #0x44 <cat2\+0x35>, 0x7,SP
4c6: 44
- 4c7: 86 4f[ ]+ ldaa #79
- 4c9: 18 00 98 00 movw #44 <cat2\+0x35>, \-8,SP
+ 4c7: 86 4f[ ]+ ldaa #0x4f
+ 4c9: 18 00 98 00 movw #0x44 <cat2\+0x35>, 0xfff8,SP
4cd: 44
- 4ce: 18 00 98 00 movw #44 <cat2\+0x35>, \-8,SP
+ 4ce: 18 00 98 00 movw #0x44 <cat2\+0x35>, 0xfff8,SP
4d2: 44
- 4d3: 18 00 98 00 movw #44 <cat2\+0x35>, \-8,SP
+ 4d3: 18 00 98 00 movw #0x44 <cat2\+0x35>, 0xfff8,SP
4d7: 44
- 4d8: 86 50[ ]+ ldaa #80
+ 4d8: 86 50[ ]+ ldaa #0x50
diff --git a/gas/testsuite/gas/m68hc11/opers12-dwarf2.d b/gas/testsuite/gas/m68hc11/opers12-dwarf2.d
index 9542460..8faaf4c 100644
--- a/gas/testsuite/gas/m68hc11/opers12-dwarf2.d
+++ b/gas/testsuite/gas/m68hc11/opers12-dwarf2.d
@@ -14,49 +14,49 @@
start:
anda \[12,x\] ; Indexed indirect
- 0: a4 e3 00 0c anda \[12,X\]
+ 0: a4 e3 00 0c anda \[0xc,X\]
ldaa #10
- 4: 86 0a ldaa #10
+ 4: 86 0a ldaa #0xa
ldx L1
- 6: fe 00 00 ldx 0 <start>
+ 6: fe 00 00 ldx 0x0 <start>
0+09 <L1>:
L1: ldy ,x
- 9: ed 00 ldy 0,X
+ 9: ed 00 ldy 0x0,X
addd 1,y ; Offset from register
- b: e3 41 addd 1,Y
+ b: e3 41 addd 0x1,Y
subd \-1,y
- d: a3 5f subd \-1,Y
+ d: a3 5f subd 0xffff,Y
eora 15,y
- f: a8 4f eora 15,Y
+ f: a8 4f eora 0xf,Y
eora \-16,y
- 11: a8 50 eora \-16,Y
+ 11: a8 50 eora 0xfff0,Y
eorb 16,y
- 13: e8 e8 10 eorb 16,Y
+ 13: e8 e8 10 eorb 0x10,Y
eorb \-17,y
- 16: e8 e9 ef eorb \-17,Y
+ 16: e8 e9 ef eorb 0xffef,Y
oraa 128,sp
- 19: aa f0 80 oraa 128,SP
+ 19: aa f0 80 oraa 0x80,SP
orab \-128,sp
- 1c: ea f1 80 orab \-128,SP
+ 1c: ea f1 80 orab 0xff80,SP
orab 255,x
- 1f: ea e0 ff orab 255,X
+ 1f: ea e0 ff orab 0xff,X
orab \-256,x
- 22: ea e1 00 orab \-256,X
+ 22: ea e1 00 orab 0xff00,X
anda 256,x
- 25: a4 e2 01 00 anda 256,X
+ 25: a4 e2 01 00 anda 0x100,X
andb \-257,x
- 29: e4 e2 fe ff andb \-257,X
+ 29: e4 e2 fe ff andb 0xfeff,X
anda \[12,x\] ; Indexed indirect \(16\-bit offset\)
- 2d: a4 e3 00 0c anda \[12,X\]
+ 2d: a4 e3 00 0c anda \[0xc,X\]
ldaa \[257,y\]
- 31: a6 eb 01 01 ldaa \[257,Y\]
+ 31: a6 eb 01 01 ldaa \[0x101,Y\]
ldab \[32767,sp\]
- 35: e6 f3 7f ff ldab \[32767,SP\]
+ 35: e6 f3 7f ff ldab \[0x7fff,SP\]
ldd \[32768,pc\]
- 39: ec fb 80 00 ldd \[32768,PC\]
+ 39: ec fb 80 00 ldd \[0x8000,PC\]
ldd L1,pc
- 3d: ec f9 c9 ldd -55,PC \{9 <L1>\}
+ 3d: ec f9 c9 ldd 0xffc9,PC \{0x9 <L1>\}
std a,x ; Two\-reg index
40: 6c e4 std A,X
ldx b,x
@@ -96,92 +96,92 @@
std \[d,pc\]
64: 6c ff std \[D,PC\]
beq L1
- 66: 27 a1 beq 9 <L1>
+ 66: 27 a1 beq 0x9 <L1>
lbeq start
- 68: 18 27 ff 94 lbeq 0 <start>
+ 68: 18 27 ff 94 lbeq 0x0 <start>
lbcc L2
- 6c: 18 24 00 4c lbcc bc <L2>
+ 6c: 18 24 00 4c lbcc 0xbc <L2>
;;
;; Move insn with various operands
;;
movb start, 1,x
- 70: 18 09 01 00 movb 0 <start>, 1,X
+ 70: 18 09 01 00 movb 0x0 <start>, 0x1,X
74: 00
movw 1,x, start
- 75: 18 05 01 00 movw 1,X, 0 <start>
+ 75: 18 05 01 00 movw 0x1,X, 0x0 <start>
79: 00
movb start, 1,\+x
- 7a: 18 09 20 00 movb 0 <start>, 1,\+X
+ 7a: 18 09 20 00 movb 0x0 <start>, 1,\+X
7e: 00
movb start, 1,\-x
- 7f: 18 09 2f 00 movb 0 <start>, 1,\-X
+ 7f: 18 09 2f 00 movb 0x0 <start>, 1,\-X
83: 00
movb #23, 1,\-sp
- 84: 18 08 af 17 movb #23, 1,\-SP
+ 84: 18 08 af 17 movb #0x17, 1,\-SP
movb L1, L2
- 88: 18 0c 00 00 movb 0 <start>, 0 <start>
+ 88: 18 0c 00 00 movb 0x0 <start>, 0x0 <start>
8c: 00 00
movb L1, a,x
- 8e: 18 09 e4 00 movb 0 <start>, A,X
+ 8e: 18 09 e4 00 movb 0x0 <start>, A,X
92: 00
movw L1, b,x
- 93: 18 01 e5 00 movw 0 <start>, B,X
+ 93: 18 01 e5 00 movw 0x0 <start>, B,X
97: 00
movw L1, d,x
- 98: 18 01 e6 00 movw 0 <start>, D,X
+ 98: 18 01 e6 00 movw 0x0 <start>, D,X
9c: 00
movw d,x, a,x
9d: 18 02 e6 e4 movw D,X, A,X
movw b,sp, d,pc
a1: 18 02 f5 fe movw B,SP, D,PC
movw b,sp, L1
- a5: 18 05 f5 00 movw B,SP, 0 <start>
+ a5: 18 05 f5 00 movw B,SP, 0x0 <start>
a9: 00
movw b,sp, 1,x
- aa: 18 02 f5 01 movw B,SP, 1,X
+ aa: 18 02 f5 01 movw B,SP, 0x1,X
movw d,x, a,y
ae: 18 02 e6 ec movw D,X, A,Y
trap #0x30
- b2: 18 30 trap #48
+ b2: 18 30 trap #0x30
trap #0x39
- b4: 18 39 trap #57
+ b4: 18 39 trap #0x39
trap #0x40
- b6: 18 40 trap #64
+ b6: 18 40 trap #0x40
trap #0x80
- b8: 18 80 trap #128
+ b8: 18 80 trap #0x80
trap #255
- ba: 18 ff trap #255
+ ba: 18 ff trap #0xff
0+bc <L2>:
L2:
movw 1,x,2,x
- bc: 18 02 01 02 movw 1,X, 2,X
+ bc: 18 02 01 02 movw 0x1,X, 0x2,X
movw \-1,\-1
- c0: 18 04 ff ff movw ffff <bb\+0xd7ff>, ffff <bb\+0xd7ff>
+ c0: 18 04 ff ff movw 0xffff <bb\+0xd7ff>, 0xffff <bb\+0xd7ff>
c4: ff ff
movw \-1,1,x
- c6: 18 01 01 ff movw ffff <bb\+0xd7ff>, 1,X
+ c6: 18 01 01 ff movw 0xffff <bb\+0xd7ff>, 0x1,X
ca: ff
movw #\-1,1,x
- cb: 18 00 01 ff movw #ffff <bb\+0xd7ff>, 1,X
+ cb: 18 00 01 ff movw #0xffff <bb\+0xd7ff>, 0x1,X
cf: ff
movw 3,8
- d0: 18 04 00 03 movw 3 <start\+0x3>, 8 <start\+0x8>
+ d0: 18 04 00 03 movw 0x3 <start\+0x3>, 0x8 <start\+0x8>
d4: 00 08
movw #3,3
- d6: 18 03 00 03 movw #3 <start\+0x3>, 3 <start\+0x3>
+ d6: 18 03 00 03 movw #0x3 <start\+0x3>, 0x3 <start\+0x3>
da: 00 03
movw #3,1,x
- dc: 18 00 01 00 movw #3 <start\+0x3>, 1,X
+ dc: 18 00 01 00 movw #0x3 <start\+0x3>, 0x1,X
e0: 03
movw 3,1,x
- e1: 18 01 01 00 movw 3 <start\+0x3>, 1,X
+ e1: 18 01 01 00 movw 0x3 <start\+0x3>, 0x1,X
e5: 03
movw 3,\+2,x
- e6: 18 01 02 00 movw 3 <start\+0x3>, 2,X
+ e6: 18 01 02 00 movw 0x3 <start\+0x3>, 0x2,X
ea: 03
movw 4,\-2,x
- eb: 18 01 1e 00 movw 4 <start\+0x4>, \-2,X
+ eb: 18 01 1e 00 movw 0x4 <start\+0x4>, 0xfffe,X
ef: 04
rts
f0: 3d rts
@@ -193,50 +193,50 @@
post_indexed_pb:
t1:
leas abort,x
- f1: 1b e2 00 00 leas 0,X
+ f1: 1b e2 00 00 leas 0x0,X
0+f5 <t2>:
t2:
leax t2\-t1,y
- f5: 1a 44 leax 4,Y
+ f5: 1a 44 leax 0x4,Y
leax toto,x
- f7: 1a e0 64 leax 100,X
+ f7: 1a e0 64 leax 0x64,X
leas toto\+titi,sp
- fa: 1b f0 6e leas 110,SP
+ fa: 1b f0 6e leas 0x6e,SP
leay titi,x
- fd: 19 0a leay 10,X
+ fd: 19 0a leay 0xa,X
leas bb,y
- ff: 1b ea 28 00 leas 10240,Y
+ ff: 1b ea 28 00 leas 0x2800,Y
leas min5b,pc
- 103: 1b d0 leas -16,PC \{f5 <t2>\}
+ 103: 1b d0 leas 0xfff0,PC \{0xf5 <t2>\}
leas max5b,pc
- 105: 1b cf leas 15,PC \{116 <t2\+0x21>\}
+ 105: 1b cf leas 0xf,PC \{0x116 <t2\+0x21>\}
leas min9b,pc
- 107: 1b fa ff 00 leas -256,PC \{b <L1\+0x2>\}
+ 107: 1b fa ff 00 leas 0xff00,PC \{0xb <L1\+0x2>\}
leas max9b,pc
- 10b: 1b f8 ff leas 255,PC \{20d <L0\+0xd9>\}
+ 10b: 1b f8 ff leas 0xff,PC \{0x20d <L0\+0xd9>\}
;;
;; Disassembler bug with movb
;;
movb #23,0x2345
- 10e: 18 0b 17 23 movb #23, 2345 <L0\+0x2211>
+ 10e: 18 0b 17 23 movb #0x17, 0x2345 <L0\+0x2211>
112: 45
movb #40,12,sp
- 113: 18 08 8c 28 movb #40, 12,SP
+ 113: 18 08 8c 28 movb #0x28, 0xc,SP
movb #39,3,\+sp
- 117: 18 08 a2 27 movb #39, 3,\+SP
+ 117: 18 08 a2 27 movb #0x27, 3,\+SP
movb #20,14,sp
- 11b: 18 08 8e 14 movb #20, 14,SP
+ 11b: 18 08 8e 14 movb #0x14, 0xe,SP
movw #0x3210,0x3456
- 11f: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
+ 11f: 18 03 32 10 movw #0x3210 <bb\+0xa10>, 0x3456 <bb\+0xc56>
123: 34 56
movw #0x4040,12,sp
- 125: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
+ 125: 18 00 8c 40 movw #0x4040 <bb\+0x1840>, 0xc,SP
129: 40
movw #0x3900,3,\+sp
- 12a: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
+ 12a: 18 00 a2 39 movw #0x3900 <bb\+0x1100>, 3,\+SP
12e: 00
movw #0x2000,14,sp
- 12f: 18 00 8e 20 movw #2000 <L0\+0x1ecc>, 14,SP
+ 12f: 18 00 8e 20 movw #0x2000 <L0\+0x1ecc>, 0xe,SP
133: 00
diff --git a/gas/testsuite/gas/m68hc11/opers12.d b/gas/testsuite/gas/m68hc11/opers12.d
index 8f6de24..9f31bda 100644
--- a/gas/testsuite/gas/m68hc11/opers12.d
+++ b/gas/testsuite/gas/m68hc11/opers12.d
@@ -5,28 +5,28 @@
.*: +file format elf32\-m68hc12
Disassembly of section .text:
-0+0+ <start> anda \[12,X\]
-0+0004 <start\+0x4> ldaa #10
-0+0006 <start\+0x6> ldx 0+0+ <start>
+0+0+ <start> anda \[0xc,X\]
+0+0004 <start\+0x4> ldaa #0xa
+0+0006 <start\+0x6> ldx 0x0+0+ <start>
[ ]+7: R_M68HC12_16 L1
-0+0009 <L1> ldy 0,X
-0+000b <L1\+0x2> addd 1,Y
-0+000d <L1\+0x4> subd \-1,Y
-0+000f <L1\+0x6> eora 15,Y
-0+0011 <L1\+0x8> eora \-16,Y
-0+0013 <L1\+0xa> eorb 16,Y
-0+0016 <L1\+0xd> eorb \-17,Y
-0+0019 <L1\+0x10> oraa 128,SP
-0+001c <L1\+0x13> orab \-128,SP
-0+001f <L1\+0x16> orab 255,X
-0+0022 <L1\+0x19> orab \-256,X
-0+0025 <L1\+0x1c> anda 256,X
-0+0029 <L1\+0x20> andb \-257,X
-0+002d <L1\+0x24> anda \[12,X\]
-0+0031 <L1\+0x28> ldaa \[257,Y\]
-0+0035 <L1\+0x2c> ldab \[32767,SP\]
-0+0039 <L1\+0x30> ldd \[32768,PC\]
-0+003d <L1\+0x34> ldd \-55,PC \{0+9 <L1>\}
+0+0009 <L1> ldy 0x0,X
+0+000b <L1\+0x2> addd 0x1,Y
+0+000d <L1\+0x4> subd 0xffff,Y
+0+000f <L1\+0x6> eora 0xf,Y
+0+0011 <L1\+0x8> eora 0xfff0,Y
+0+0013 <L1\+0xa> eorb 0x10,Y
+0+0016 <L1\+0xd> eorb 0xffef,Y
+0+0019 <L1\+0x10> oraa 0x80,SP
+0+001c <L1\+0x13> orab 0xff80,SP
+0+001f <L1\+0x16> orab 0xff,X
+0+0022 <L1\+0x19> orab 0xff00,X
+0+0025 <L1\+0x1c> anda 0x100,X
+0+0029 <L1\+0x20> andb 0xfeff,X
+0+002d <L1\+0x24> anda \[0xc,X\]
+0+0031 <L1\+0x28> ldaa \[0x101,Y\]
+0+0035 <L1\+0x2c> ldab \[0x7fff,SP\]
+0+0039 <L1\+0x30> ldd \[0x8000,PC\]
+0+003d <L1\+0x34> ldd 0xffc9,PC \{0x0+9 <L1>\}
0+0040 <L1\+0x37> std A,X
0+0042 <L1\+0x39> ldx B,X
0+0044 <L1\+0x3b> stx D,Y
@@ -46,68 +46,68 @@
0+0060 <L1\+0x57> std \[D,Y\]
0+0062 <L1\+0x59> std \[D,SP\]
0+0064 <L1\+0x5b> std \[D,PC\]
-0+0066 <L1\+0x5d> beq 0+0009 <L1>
+0+0066 <L1\+0x5d> beq 0x0+0009 <L1>
[ ]+66: R_M68HC12_RL_JUMP \*ABS\*
-0+0068 <L1\+0x5f> lbeq 0+0+ <start>
+0+0068 <L1\+0x5f> lbeq 0x0+0 <start>
[ ]+68: R_M68HC12_RL_JUMP \*ABS\*
-0+006c <L1\+0x63> lbcc 0+00bc <L2>
+0+006c <L1\+0x63> lbcc 0x0+00bc <L2>
[ ]+6c: R_M68HC12_RL_JUMP \*ABS\*
-0+0070 <L1\+0x67> movb 0+0+ <start>, 1,X
+0+0070 <L1\+0x67> movb 0x0+0+ <start>, 0x1,X
[ ]+73: R_M68HC12_16 start
-0+0075 <L1\+0x6c> movw 1,X, 0+0+ <start>
+0+0075 <L1\+0x6c> movw 0x1,X, 0x0+0+ <start>
[ ]+78: R_M68HC12_16 start
-0+007a <L1\+0x71> movb 0+0+ <start>, 1,\+X
+0+007a <L1\+0x71> movb 0x0+0+ <start>, 1,\+X
[ ]+7d: R_M68HC12_16 start
-0+007f <L1\+0x76> movb 0+0+ <start>, 1,\-X
+0+007f <L1\+0x76> movb 0x0+0+ <start>, 1,\-X
[ ]+82: R_M68HC12_16 start
-0+0084 <L1\+0x7b> movb #23, 1,\-SP
-0+0088 <L1\+0x7f> movb 0+0+ <start>, 0+0+ <start>
+0+0084 <L1\+0x7b> movb #0x17, 1,\-SP
+0+0088 <L1\+0x7f> movb 0x0+0+ <start>, 0x0+0+ <start>
[ ]+8a: R_M68HC12_16 L1
[ ]+8c: R_M68HC12_16 L2
-0+008e <L1\+0x85> movb 0+0+ <start>, A,X
+0+008e <L1\+0x85> movb 0x0+0+ <start>, A,X
[ ]+91: R_M68HC12_16 L1
-0+0093 <L1\+0x8a> movw 0+0+ <start>, B,X
+0+0093 <L1\+0x8a> movw 0x0+0+ <start>, B,X
[ ]+96: R_M68HC12_16 L1
-0+0098 <L1\+0x8f> movw 0+0+ <start>, D,X
+0+0098 <L1\+0x8f> movw 0x0+0+ <start>, D,X
[ ]+9b: R_M68HC12_16 L1
0+009d <L1\+0x94> movw D,X, A,X
0+00a1 <L1\+0x98> movw B,SP, D,PC
-0+00a5 <L1\+0x9c> movw B,SP, 0+0+ <start>
+0+00a5 <L1\+0x9c> movw B,SP, 0x0+0+ <start>
[ ]+a8: R_M68HC12_16 L1
-0+00aa <L1\+0xa1> movw B,SP, 1,X
+0+00aa <L1\+0xa1> movw B,SP, 0x1,X
0+00ae <L1\+0xa5> movw D,X, A,Y
-0+00b2 <L1\+0xa9> trap #48
-0+00b4 <L1\+0xab> trap #57
-0+00b6 <L1\+0xad> trap #64
-0+00b8 <L1\+0xaf> trap #128
-0+00ba <L1\+0xb1> trap #255
-0+00bc <L2> movw 1,X, 2,X
-0+00c0 <L2\+0x4> movw 0+ffff <bb\+0xd7ff>, 0+ffff <bb\+0xd7ff>
-0+00c6 <L2\+0xa> movw 0+ffff <bb\+0xd7ff>, 1,X
-0+00cb <L2\+0xf> movw #0+ffff <bb\+0xd7ff>, 1,X
-0+00d0 <L2\+0x14> movw 0+0003 <start\+0x3>, 0+0008 <start\+0x8>
-0+00d6 <L2\+0x1a> movw #0+0003 <start\+0x3>, 0+0003 <start\+0x3>
-0+00dc <L2\+0x20> movw #0+0003 <start\+0x3>, 1,X
-0+00e1 <L2\+0x25> movw 0+0003 <start\+0x3>, 1,X
-0+00e6 <L2\+0x2a> movw 0+0003 <start\+0x3>, 2,X
-0+00eb <L2\+0x2f> movw 0+0004 <start\+0x4>, \-2,X
+0+00b2 <L1\+0xa9> trap #0x30
+0+00b4 <L1\+0xab> trap #0x39
+0+00b6 <L1\+0xad> trap #0x40
+0+00b8 <L1\+0xaf> trap #0x80
+0+00ba <L1\+0xb1> trap #0xff
+0+00bc <L2> movw 0x1,X, 0x2,X
+0+00c0 <L2\+0x4> movw 0x0+ffff <bb\+0xd7ff>, 0x0+ffff <bb\+0xd7ff>
+0+00c6 <L2\+0xa> movw 0x0+ffff <bb\+0xd7ff>, 0x1,X
+0+00cb <L2\+0xf> movw #0x0+ffff <bb\+0xd7ff>, 0x1,X
+0+00d0 <L2\+0x14> movw 0x0+0003 <start\+0x3>, 0x0+0008 <start\+0x8>
+0+00d6 <L2\+0x1a> movw #0x0+0003 <start\+0x3>, 0x0+0003 <start\+0x3>
+0+00dc <L2\+0x20> movw #0x0+0003 <start\+0x3>, 0x1,X
+0+00e1 <L2\+0x25> movw 0x0+0003 <start\+0x3>, 0x1,X
+0+00e6 <L2\+0x2a> movw 0x0+0003 <start\+0x3>, 0x2,X
+0+00eb <L2\+0x2f> movw 0x0+0004 <start\+0x4>, 0xfffe,X
0+00f0 <L2\+0x34> rts
-0+00f1 <post_indexed_pb> leas 0,X
+0+00f1 <post_indexed_pb> leas 0x0,X
[ ]+f3: R_M68HC12_16 abort
-0+00f5 <t2> leax 4,Y
-0+00f7 <t2\+0x2> leax 100,X
-0+00fa <t2\+0x5> leas 110,SP
-0+00fd <t2\+0x8> leay 10,X
-0+00ff <t2\+0xa> leas 10240,Y
-0+0103 <t2\+0xe> leas -16,PC \{0+f5 <t2>\}
-0+0105 <t2\+0x10> leas 15,PC \{0+116 <t2\+0x21>\}
-0+0107 <t2\+0x12> leas -256,PC \{0+b <L1\+0x2>\}
-0+010b <t2\+0x16> leas 255,PC \{0+20d <max9b\+0x10e>\}
-0+010e <t2\+0x19> movb #23, 0+2345 <max9b\+0x2246>
-0+0113 <t2\+0x1e> movb #40, 12,SP
-0+0117 <t2\+0x22> movb #39, 3,\+SP
-0+011b <t2\+0x26> movb #20, 14,SP
-0+011f <t2\+0x2a> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56>
-0+0125 <t2\+0x30> movw #0+4040 <bb\+0x1840>, 12,SP
-0+012a <t2\+0x35> movw #0+3900 <bb\+0x1100>, 3,\+SP
-0+012f <t2\+0x3a> movw #0+2000 <max9b\+0x1f01>, 14,SP
+0+00f5 <t2> leax 0x4,Y
+0+00f7 <t2\+0x2> leax 0x64,X
+0+00fa <t2\+0x5> leas 0x6e,SP
+0+00fd <t2\+0x8> leay 0xa,X
+0+00ff <t2\+0xa> leas 0x2800,Y
+0+0103 <t2\+0xe> leas 0xfff0,PC \{0x0+f5 <t2>\}
+0+0105 <t2\+0x10> leas 0xf,PC \{0x0+116 <t2\+0x21>\}
+0+0107 <t2\+0x12> leas 0xff00,PC \{0x0+b <L1\+0x2>\}
+0+010b <t2\+0x16> leas 0xff,PC \{0x0+20d <max9b\+0x10e>\}
+0+010e <t2\+0x19> movb #0x17, 0x0+2345 <max9b\+0x2246>
+0+0113 <t2\+0x1e> movb #0x28, 0xc,SP
+0+0117 <t2\+0x22> movb #0x27, 3,\+SP
+0+011b <t2\+0x26> movb #0x14, 0xe,SP
+0+011f <t2\+0x2a> movw #0x0+3210 <bb\+0xa10>, 0x0+3456 <bb\+0xc56>
+0+0125 <t2\+0x30> movw #0x0+4040 <bb\+0x1840>, 0xc,SP
+0+012a <t2\+0x35> movw #0x0+3900 <bb\+0x1100>, 3,\+SP
+0+012f <t2\+0x3a> movw #0x0+2000 <max9b\+0x1f01>, 0xe,SP
diff --git a/gas/testsuite/gas/mips/branch-misc-4-64.d b/gas/testsuite/gas/mips/branch-misc-4-64.d
index 13c77d7..b432fe0 100644
--- a/gas/testsuite/gas/mips/branch-misc-4-64.d
+++ b/gas/testsuite/gas/mips/branch-misc-4-64.d
@@ -10,9 +10,9 @@
Disassembly of section \.text:
\.\.\.
[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <foo\+0x[0-9a-f]+>
-[ ]*[0-9a-f]+: R_MIPS_PC16 bar\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
+[ ]*[0-9a-f]+: R_MIPS_PC16 bar\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <foo\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MIPS_PC16 \.init\+0x4
@@ -23,9 +23,9 @@
Disassembly of section \.init:
[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <bar\+0x[0-9a-f]+>
-[ ]*[0-9a-f]+: R_MIPS_PC16 foo\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
+[ ]*[0-9a-f]+: R_MIPS_PC16 foo\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <bar\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MIPS_PC16 \.text\+0x40004
diff --git a/gas/testsuite/gas/mips/ecoff@ld.d b/gas/testsuite/gas/mips/ecoff@ld.d
index 57d8dbb..0e0fbe8 100644
--- a/gas/testsuite/gas/mips/ecoff@ld.d
+++ b/gas/testsuite/gas/mips/ecoff@ld.d
@@ -30,9 +30,9 @@
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-23131\(a0\)
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> ld a0,4096\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
@@ -46,15 +46,15 @@
[0-9a-f]+ <[^>]*> ld a0,0\(gp\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,8192\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,-16384\(gp\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> ld a0,4097\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> ld a0,1\(a0\)
@@ -68,15 +68,15 @@
[0-9a-f]+ <[^>]*> ld a0,1\(gp\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,8193\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,-16383\(gp\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> ld a0,-32768\(a0\)
@@ -94,17 +94,17 @@
[0-9a-f]+ <[^>]*> ld a0,-32768\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,-24576\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> ld a0,-32768\(a0\)
@@ -122,17 +122,17 @@
[0-9a-f]+ <[^>]*> ld a0,-32768\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,-24576\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> ld a0,4096\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
@@ -150,17 +150,17 @@
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,8192\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> ld a0,4096\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x2
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> ld a0,-19035\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x2
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> ld a0,-23131\(a0\)
@@ -178,18 +178,18 @@
[0-9a-f]+ <[^>]*> ld a0,-23131\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x2
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> ld a0,-14939\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x2
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> ld a0,-19035\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,4096\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu a0,a0,a1
@@ -207,18 +207,18 @@
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,8192\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a1,gp
[0-9a-f]+ <[^>]*> ld a0,-16384\(a0\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,4097\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu a0,a0,a1
@@ -236,18 +236,18 @@
[0-9a-f]+ <[^>]*> ld a0,1\(a0\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,8193\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a1,gp
[0-9a-f]+ <[^>]*> ld a0,-16383\(a0\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu a0,a0,a1
@@ -269,20 +269,20 @@
[0-9a-f]+ <[^>]*> ld a0,-32768\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-24576\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu a0,a0,a1
@@ -304,20 +304,20 @@
[0-9a-f]+ <[^>]*> ld a0,-32768\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-24576\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-28672\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,4096\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu a0,a0,a1
@@ -339,20 +339,20 @@
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,8192\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,4096\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x2
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-19035\(a0\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui a0,0x2
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu a0,a0,a1
@@ -374,13 +374,13 @@
[0-9a-f]+ <[^>]*> ld a0,-23131\(a0\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui a0,0x2
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-14939\(a0\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui a0,0x2
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,-19035\(a0\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
\.\.\.
diff --git a/gas/testsuite/gas/mips/ecoff@sd.d b/gas/testsuite/gas/mips/ecoff@sd.d
index a43ba94..88d1bf6 100644
--- a/gas/testsuite/gas/mips/ecoff@sd.d
+++ b/gas/testsuite/gas/mips/ecoff@sd.d
@@ -30,9 +30,9 @@
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-23131\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> sd a0,4096\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
@@ -46,15 +46,15 @@
[0-9a-f]+ <[^>]*> sd a0,0\(gp\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,8192\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,-16384\(gp\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> sd a0,4097\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> sd a0,1\(at\)
@@ -68,15 +68,15 @@
[0-9a-f]+ <[^>]*> sd a0,1\(gp\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,8193\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,-16383\(gp\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> sd a0,-32768\(at\)
@@ -94,17 +94,17 @@
[0-9a-f]+ <[^>]*> sd a0,-32768\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,-24576\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> sd a0,-32768\(at\)
@@ -122,17 +122,17 @@
[0-9a-f]+ <[^>]*> sd a0,-32768\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,-24576\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> sd a0,4096\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
@@ -150,17 +150,17 @@
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,8192\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> sd a0,4096\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> sd a0,-19035\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> sd a0,-23131\(at\)
@@ -178,18 +178,18 @@
[0-9a-f]+ <[^>]*> sd a0,-23131\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> sd a0,-14939\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> sd a0,-19035\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,4096\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -207,18 +207,18 @@
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,8192\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> sd a0,-16384\(at\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,4097\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -236,18 +236,18 @@
[0-9a-f]+ <[^>]*> sd a0,1\(at\)
[ ]*[0-9a-f]+: GPREL small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,8193\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> sd a0,-16383\(at\)
[ ]*[0-9a-f]+: GPREL \.sbss\+0x4000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -269,20 +269,20 @@
[0-9a-f]+ <[^>]*> sd a0,-32768\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-24576\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -304,20 +304,20 @@
[0-9a-f]+ <[^>]*> sd a0,-32768\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-24576\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-28672\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,4096\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -339,20 +339,20 @@
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,8192\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,4096\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: REFHI \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.data-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-19035\(at\)
-[ ]*[0-9a-f]+: REFLO \.data\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.data-0x1000
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: REFHI big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -374,13 +374,13 @@
[0-9a-f]+ <[^>]*> sd a0,-23131\(at\)
[ ]*[0-9a-f]+: REFLO small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: REFHI \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFHI \.bss-0x2000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-14939\(at\)
-[ ]*[0-9a-f]+: REFLO \.bss\+0xffffe000
+[ ]*[0-9a-f]+: REFLO \.bss-0x2000
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: REFHI \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFHI \.sbss-0x1000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,-19035\(at\)
-[ ]*[0-9a-f]+: REFLO \.sbss\+0xfffff000
+[ ]*[0-9a-f]+: REFLO \.sbss-0x1000
\.\.\.
diff --git a/gas/testsuite/gas/mips/elf-rel10.d b/gas/testsuite/gas/mips/elf-rel10.d
index 8fd3b79..c416f33 100644
--- a/gas/testsuite/gas/mips/elf-rel10.d
+++ b/gas/testsuite/gas/mips/elf-rel10.d
@@ -5,17 +5,17 @@
Relocation section '\.rela\.text' at offset .* contains 22 entries:
*Offset * Info * Type * Sym\.Value * Sym\. Name \+ Addend
0+0000 * 0+..07 * R_MIPS_GPREL16 * 0+0000 * foo \+ 0
-0+0000 * 0+0018 * R_MIPS_SUB * 0+0000
-0+0000 * 0+0005 * R_MIPS_HI16 * 0+0000
+0+0000 * 0+0018 * R_MIPS_SUB * 0
+0+0000 * 0+0005 * R_MIPS_HI16 * 0
0+0004 * 0+..07 * R_MIPS_GPREL16 * 0+0000 * foo \+ 0
-0+0004 * 0+0018 * R_MIPS_SUB * 0+0000
-0+0004 * 0+0006 * R_MIPS_LO16 * 0+0000
+0+0004 * 0+0018 * R_MIPS_SUB * 0
+0+0004 * 0+0006 * R_MIPS_LO16 * 0
0+000c * 0+..07 * R_MIPS_GPREL16 * 0+0000 * \.text \+ c
-0+000c * 0+0018 * R_MIPS_SUB * 0+0000
-0+000c * 0+0005 * R_MIPS_HI16 * 0+0000
+0+000c * 0+0018 * R_MIPS_SUB * 0
+0+000c * 0+0005 * R_MIPS_HI16 * 0
0+0010 * 0+..07 * R_MIPS_GPREL16 * 0+0000 * \.text \+ c
-0+0010 * 0+0018 * R_MIPS_SUB * 0+0000
-0+0010 * 0+0006 * R_MIPS_LO16 * 0+0000
+0+0010 * 0+0018 * R_MIPS_SUB * 0
+0+0010 * 0+0006 * R_MIPS_LO16 * 0
0+0018 * 0+..14 * R_MIPS_GOT_PAGE * 0+0000 * foo \+ 0
0+001c * 0+..15 * R_MIPS_GOT_OFST * 0+0000 * foo \+ 0
0+0020 * 0+..14 * R_MIPS_GOT_PAGE * 0+0000 * foo \+ 1234
diff --git a/gas/testsuite/gas/mips/elf-rel22.d b/gas/testsuite/gas/mips/elf-rel22.d
index 14ab1a8..c4e85e5 100644
--- a/gas/testsuite/gas/mips/elf-rel22.d
+++ b/gas/testsuite/gas/mips/elf-rel22.d
@@ -4,6 +4,6 @@
Relocation section '\.rela\.text' .*:
.*
-.* R_MIPS_LO16 * 0+04
+.* R_MIPS_LO16 * 4
* Type2: R_MIPS_SUB *
* Type3: R_MIPS_LO16 *
diff --git a/gas/testsuite/gas/mips/l_d-n32.d b/gas/testsuite/gas/mips/l_d-n32.d
index d474362..18ceefd 100644
--- a/gas/testsuite/gas/mips/l_d-n32.d
+++ b/gas/testsuite/gas/mips/l_d-n32.d
@@ -102,33 +102,33 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
@@ -279,40 +279,40 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> addu at,at,a1
diff --git a/gas/testsuite/gas/mips/l_d-n64.d b/gas/testsuite/gas/mips/l_d-n64.d
index 3096443..f4064f1 100644
--- a/gas/testsuite/gas/mips/l_d-n64.d
+++ b/gas/testsuite/gas/mips/l_d-n64.d
@@ -324,131 +324,131 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
@@ -1017,138 +1017,138 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
diff --git a/gas/testsuite/gas/mips/l_d.d b/gas/testsuite/gas/mips/l_d.d
index 788c61e..9cff000 100644
--- a/gas/testsuite/gas/mips/l_d.d
+++ b/gas/testsuite/gas/mips/l_d.d
@@ -30,9 +30,9 @@
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
@@ -46,15 +46,15 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\)
@@ -68,15 +68,15 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,1\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
@@ -94,17 +94,17 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
@@ -122,17 +122,17 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
@@ -150,17 +150,17 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\)
@@ -178,18 +178,18 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -207,18 +207,18 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|-16384)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -236,18 +236,18 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,1\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> ldc1 \$f4,(1|-16383)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -269,20 +269,20 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -304,20 +304,20 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -339,20 +339,20 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -374,13 +374,13 @@
[0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> ldc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/ld-n32.d b/gas/testsuite/gas/mips/ld-n32.d
index 405ce35..5dd1085 100644
--- a/gas/testsuite/gas/mips/ld-n32.d
+++ b/gas/testsuite/gas/mips/ld-n32.d
@@ -102,33 +102,33 @@
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
@@ -279,40 +279,40 @@
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> addu a0,a0,a1
diff --git a/gas/testsuite/gas/mips/ld-n64.d b/gas/testsuite/gas/mips/ld-n64.d
index 485298d..a111135 100644
--- a/gas/testsuite/gas/mips/ld-n64.d
+++ b/gas/testsuite/gas/mips/ld-n64.d
@@ -324,131 +324,131 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
@@ -1017,138 +1017,138 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu a0,a0,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> dsll32 a0,a0,0x0
[0-9a-f]+ <[^>]*> daddu a0,a0,at
[0-9a-f]+ <[^>]*> ld a0,0\(a0\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
diff --git a/gas/testsuite/gas/mips/ld.d b/gas/testsuite/gas/mips/ld.d
index bf2bd8d..c43ff37 100644
--- a/gas/testsuite/gas/mips/ld.d
+++ b/gas/testsuite/gas/mips/ld.d
@@ -42,11 +42,11 @@
[0-9a-f]+ <[^>]*> lw a0,-23131\(at\)
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,0\(at\)
@@ -68,21 +68,21 @@
[0-9a-f]+ <[^>]*> lw a1,4\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,1\(at\)
@@ -104,21 +104,21 @@
[0-9a-f]+ <[^>]*> lw a1,5\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-32768\(at\)
@@ -144,23 +144,23 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-32768\(at\)
@@ -186,23 +186,23 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,0\(at\)
@@ -228,23 +228,23 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-23131\(at\)
@@ -270,24 +270,24 @@
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -313,24 +313,24 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -356,24 +356,24 @@
[0-9a-f]+ <[^>]*> lw a1,5\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -403,26 +403,26 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -452,26 +452,26 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -501,26 +501,26 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -550,17 +550,17 @@
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d b/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d
index 3a265b1..61f27f7 100644
--- a/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d
+++ b/gas/testsuite/gas/mips/micromips@branch-misc-2-64.d
@@ -12,52 +12,52 @@
\.\.\.
\.\.\.
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0040 <x\+0x4>
- 3c: R_MICROMIPS_PC16_S1 g1\+0xf+fffc
- 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 3c: R_MICROMIPS_PC16_S1 g1\-0x4
+ 3c: R_MIPS_NONE \*ABS\*\-0x4
+ 3c: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0048 <x\+0xc>
- 44: R_MICROMIPS_PC16_S1 g2\+0xf+fffc
- 44: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 44: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 44: R_MICROMIPS_PC16_S1 g2\-0x4
+ 44: R_MIPS_NONE \*ABS\*\-0x4
+ 44: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0050 <x\+0x14>
- 4c: R_MICROMIPS_PC16_S1 g3\+0xf+fffc
- 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 4c: R_MICROMIPS_PC16_S1 g3\-0x4
+ 4c: R_MIPS_NONE \*ABS\*\-0x4
+ 4c: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0058 <x\+0x1c>
- 54: R_MICROMIPS_PC16_S1 g4\+0xf+fffc
- 54: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 54: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 54: R_MICROMIPS_PC16_S1 g4\-0x4
+ 54: R_MIPS_NONE \*ABS\*\-0x4
+ 54: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0060 <x\+0x24>
- 5c: R_MICROMIPS_PC16_S1 g5\+0xf+fffc
- 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 5c: R_MICROMIPS_PC16_S1 g5\-0x4
+ 5c: R_MIPS_NONE \*ABS\*\-0x4
+ 5c: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0068 <x\+0x2c>
- 64: R_MICROMIPS_PC16_S1 g6\+0xf+fffc
- 64: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 64: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 64: R_MICROMIPS_PC16_S1 g6\-0x4
+ 64: R_MIPS_NONE \*ABS\*\-0x4
+ 64: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
\.\.\.
\.\.\.
\.\.\.
[0-9a-f]+ <[^>]*> 9400 0000 b 0+00ac <g6\+0x4>
- a8: R_MICROMIPS_PC16_S1 x1\+0xf+fffc
- a8: R_MIPS_NONE \*ABS\*\+0xf+fffc
- a8: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ a8: R_MICROMIPS_PC16_S1 x1\-0x4
+ a8: R_MIPS_NONE \*ABS\*\-0x4
+ a8: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b2 <g6\+0xa>
- ae: R_MICROMIPS_PC16_S1 x2\+0xf+fffc
- ae: R_MIPS_NONE \*ABS\*\+0xf+fffc
- ae: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ ae: R_MICROMIPS_PC16_S1 x2\-0x4
+ ae: R_MIPS_NONE \*ABS\*\-0x4
+ ae: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b8 <g6\+0x10>
- b4: R_MICROMIPS_PC16_S1 \.data\+0xf+fffc
- b4: R_MIPS_NONE \*ABS\*\+0xf+fffc
- b4: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ b4: R_MICROMIPS_PC16_S1 \.data\-0x4
+ b4: R_MIPS_NONE \*ABS\*\-0x4
+ b4: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d b/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d
index 609daa4..7b8b40a 100644
--- a/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d
+++ b/gas/testsuite/gas/mips/micromips@branch-misc-2pic-64.d
@@ -12,52 +12,52 @@
\.\.\.
\.\.\.
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0040 <x\+0x4>
- 3c: R_MICROMIPS_PC16_S1 g1\+0xf+fffc
- 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 3c: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 3c: R_MICROMIPS_PC16_S1 g1\-0x4
+ 3c: R_MIPS_NONE \*ABS\*\-0x4
+ 3c: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0048 <x\+0xc>
- 44: R_MICROMIPS_PC16_S1 g2\+0xf+fffc
- 44: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 44: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 44: R_MICROMIPS_PC16_S1 g2\-0x4
+ 44: R_MIPS_NONE \*ABS\*\-0x4
+ 44: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0050 <x\+0x14>
- 4c: R_MICROMIPS_PC16_S1 g3\+0xf+fffc
- 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 4c: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 4c: R_MICROMIPS_PC16_S1 g3\-0x4
+ 4c: R_MIPS_NONE \*ABS\*\-0x4
+ 4c: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0058 <x\+0x1c>
- 54: R_MICROMIPS_PC16_S1 g4\+0xf+fffc
- 54: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 54: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 54: R_MICROMIPS_PC16_S1 g4\-0x4
+ 54: R_MIPS_NONE \*ABS\*\-0x4
+ 54: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0060 <x\+0x24>
- 5c: R_MICROMIPS_PC16_S1 g5\+0xf+fffc
- 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 5c: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 5c: R_MICROMIPS_PC16_S1 g5\-0x4
+ 5c: R_MIPS_NONE \*ABS\*\-0x4
+ 5c: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
[0-9a-f]+ <[^>]*> 4060 0000 bal 0+0068 <x\+0x2c>
- 64: R_MICROMIPS_PC16_S1 g6\+0xf+fffc
- 64: R_MIPS_NONE \*ABS\*\+0xf+fffc
- 64: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ 64: R_MICROMIPS_PC16_S1 g6\-0x4
+ 64: R_MIPS_NONE \*ABS\*\-0x4
+ 64: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0000 0000 nop
\.\.\.
\.\.\.
\.\.\.
[0-9a-f]+ <[^>]*> 9400 0000 b 0+00ac <g6\+0x4>
- a8: R_MICROMIPS_PC16_S1 x1\+0xf+fffc
- a8: R_MIPS_NONE \*ABS\*\+0xf+fffc
- a8: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ a8: R_MICROMIPS_PC16_S1 x1\-0x4
+ a8: R_MIPS_NONE \*ABS\*\-0x4
+ a8: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b2 <g6\+0xa>
- ae: R_MICROMIPS_PC16_S1 x2\+0xf+fffc
- ae: R_MIPS_NONE \*ABS\*\+0xf+fffc
- ae: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ ae: R_MICROMIPS_PC16_S1 x2\-0x4
+ ae: R_MIPS_NONE \*ABS\*\-0x4
+ ae: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 9400 0000 b 0+00b8 <g6\+0x10>
- b4: R_MICROMIPS_PC16_S1 \.data\+0xf+fffc
- b4: R_MIPS_NONE \*ABS\*\+0xf+fffc
- b4: R_MIPS_NONE \*ABS\*\+0xf+fffc
+ b4: R_MICROMIPS_PC16_S1 \.data\-0x4
+ b4: R_MIPS_NONE \*ABS\*\-0x4
+ b4: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d b/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d
index 80cfce9..008dac0 100644
--- a/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d
+++ b/gas/testsuite/gas/mips/micromips@branch-misc-4-64.d
@@ -10,9 +10,9 @@
Disassembly of section \.text:
\.\.\.
[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ <foo\+0x[0-9a-f]+>
-[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ <foo\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \.init\+0x2
@@ -23,9 +23,9 @@
Disassembly of section \.init:
[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ <bar\+0x[0-9a-f]+>
-[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xf+fffc
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 foo\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\-0x4
[0-9a-f]+ <[^>]*> 0c00 nop
[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ <bar\+0x[0-9a-f]+>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \.text\+0x40002
diff --git a/gas/testsuite/gas/mips/mips1@l_d.d b/gas/testsuite/gas/mips/mips1@l_d.d
index f61cde3..e399aac 100644
--- a/gas/testsuite/gas/mips/mips1@l_d.d
+++ b/gas/testsuite/gas/mips/mips1@l_d.d
@@ -42,11 +42,11 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-23131\(at\)
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-23127\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lwc1 \$f[45],0\(at\)
@@ -68,21 +68,21 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],4\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|-16380)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lwc1 \$f[45],1\(at\)
@@ -104,21 +104,21 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],5\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(5|-16379)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-32768\(at\)
@@ -144,23 +144,23 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-32768\(at\)
@@ -186,23 +186,23 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lwc1 \$f[45],0\(at\)
@@ -228,23 +228,23 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-23131\(at\)
@@ -270,24 +270,24 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -313,24 +313,24 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|-16384)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|-16380)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -356,24 +356,24 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],5\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(1|-16383)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(5|-16379)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -403,26 +403,26 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -452,26 +452,26 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -501,26 +501,26 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -550,17 +550,17 @@
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lwc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lwc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/mips1@ld-forward.d b/gas/testsuite/gas/mips/mips1@ld-forward.d
index 80b3afb..99b5242 100644
--- a/gas/testsuite/gas/mips/mips1@ld-forward.d
+++ b/gas/testsuite/gas/mips/mips1@ld-forward.d
@@ -45,11 +45,11 @@
[0-9a-f]+ <[^>]*> lw a0,-23131\(at\)
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,0\(at\)
@@ -71,21 +71,21 @@
[0-9a-f]+ <[^>]*> lw a1,4\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,1\(at\)
@@ -107,21 +107,21 @@
[0-9a-f]+ <[^>]*> lw a1,5\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-32768\(at\)
@@ -147,23 +147,23 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-32768\(at\)
@@ -189,23 +189,23 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,0\(at\)
@@ -231,23 +231,23 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-23131\(at\)
@@ -273,25 +273,25 @@
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
@@ -322,12 +322,12 @@
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(at\)
@@ -336,12 +336,12 @@
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
@@ -372,12 +372,12 @@
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(at\)
@@ -385,12 +385,12 @@
[0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -420,26 +420,26 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -469,26 +469,26 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -518,26 +518,26 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -567,17 +567,17 @@
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/mips1@ld.d b/gas/testsuite/gas/mips/mips1@ld.d
index 7d25147..b55e08e 100644
--- a/gas/testsuite/gas/mips/mips1@ld.d
+++ b/gas/testsuite/gas/mips/mips1@ld.d
@@ -45,11 +45,11 @@
[0-9a-f]+ <[^>]*> lw a0,-23131\(at\)
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,0\(at\)
@@ -71,21 +71,21 @@
[0-9a-f]+ <[^>]*> lw a1,4\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,1\(at\)
@@ -107,21 +107,21 @@
[0-9a-f]+ <[^>]*> lw a1,5\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-32768\(at\)
@@ -147,23 +147,23 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-32768\(at\)
@@ -189,23 +189,23 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,0\(at\)
@@ -231,23 +231,23 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> lw a0,-23131\(at\)
@@ -273,24 +273,24 @@
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -318,12 +318,12 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lw a0,(0|-16384)\(at\)
@@ -331,12 +331,12 @@
[0-9a-f]+ <[^>]*> lw a1,(4|-16380)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -364,12 +364,12 @@
[0-9a-f]+ <[^>]*> lw a1,5\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> lw a0,(1|-16383)\(at\)
@@ -377,12 +377,12 @@
[0-9a-f]+ <[^>]*> lw a1,(5|-16379)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -412,26 +412,26 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -461,26 +461,26 @@
[0-9a-f]+ <[^>]*> lw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -510,26 +510,26 @@
[0-9a-f]+ <[^>]*> lw a1,4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -559,17 +559,17 @@
[0-9a-f]+ <[^>]*> lw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> lw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/mips1@s_d.d b/gas/testsuite/gas/mips/mips1@s_d.d
index d00afa0..2e3bd0c 100644
--- a/gas/testsuite/gas/mips/mips1@s_d.d
+++ b/gas/testsuite/gas/mips/mips1@s_d.d
@@ -42,11 +42,11 @@
[0-9a-f]+ <[^>]*> swc1 \$f[45],-23131\(at\)
[0-9a-f]+ <[^>]*> swc1 \$f[54],-23127\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> swc1 \$f[45],0\(at\)
@@ -68,21 +68,21 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],4\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|-16380)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> swc1 \$f[45],1\(at\)
@@ -104,21 +104,21 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],5\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(5|-16379)\(gp\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> swc1 \$f[45],-32768\(at\)
@@ -144,23 +144,23 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> swc1 \$f[45],-32768\(at\)
@@ -186,23 +186,23 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> swc1 \$f[45],0\(at\)
@@ -228,23 +228,23 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> swc1 \$f[45],-23131\(at\)
@@ -270,24 +270,24 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -313,24 +313,24 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|-16384)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|-16380)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -356,24 +356,24 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],5\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> swc1 \$f[45],(1|-16383)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(5|-16379)\(at\)
[ ]*[0-9a-f]+: (R_MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -403,26 +403,26 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -452,26 +452,26 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],-32764\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -501,26 +501,26 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],4\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -550,17 +550,17 @@
[0-9a-f]+ <[^>]*> swc1 \$f[54],-23127\(at\)
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> swc1 \$f[45],-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> swc1 \$f[54],-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/s_d-n32.d b/gas/testsuite/gas/mips/s_d-n32.d
index 7848573..045864c 100644
--- a/gas/testsuite/gas/mips/s_d-n32.d
+++ b/gas/testsuite/gas/mips/s_d-n32.d
@@ -102,33 +102,33 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
@@ -279,40 +279,40 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> addu at,at,a1
diff --git a/gas/testsuite/gas/mips/s_d-n64.d b/gas/testsuite/gas/mips/s_d-n64.d
index 84c2550..c190bde 100644
--- a/gas/testsuite/gas/mips/s_d-n64.d
+++ b/gas/testsuite/gas/mips/s_d-n64.d
@@ -324,131 +324,131 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
@@ -1017,138 +1017,138 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
diff --git a/gas/testsuite/gas/mips/s_d.d b/gas/testsuite/gas/mips/s_d.d
index 7395a1c..b9157ac 100644
--- a/gas/testsuite/gas/mips/s_d.d
+++ b/gas/testsuite/gas/mips/s_d.d
@@ -30,9 +30,9 @@
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
@@ -46,15 +46,15 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\)
@@ -68,15 +68,15 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,1\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
@@ -94,17 +94,17 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
@@ -122,17 +122,17 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
@@ -150,17 +150,17 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\)
@@ -178,18 +178,18 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -207,18 +207,18 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|-16384)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -236,18 +236,18 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,1\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> sdc1 \$f4,(1|-16383)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -269,20 +269,20 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -304,20 +304,20 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -339,20 +339,20 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,at,a1
@@ -374,13 +374,13 @@
[0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sdc1 \$f4,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mips/sd-n32.d b/gas/testsuite/gas/mips/sd-n32.d
index 9de0f0b..58fe0c6 100644
--- a/gas/testsuite/gas/mips/sd-n32.d
+++ b/gas/testsuite/gas/mips/sd-n32.d
@@ -102,33 +102,33 @@
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
@@ -279,40 +279,40 @@
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> addu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0x10000
[0-9a-f]+ <[^>]*> addu at,at,a1
diff --git a/gas/testsuite/gas/mips/sd-n64.d b/gas/testsuite/gas/mips/sd-n64.d
index 600c8f2..d523bf4 100644
--- a/gas/testsuite/gas/mips/sd-n64.d
+++ b/gas/testsuite/gas/mips/sd-n64.d
@@ -324,131 +324,131 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
@@ -1017,138 +1017,138 @@
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHER \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddiu at,at,0
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> dsll at,at,0x10
[0-9a-f]+ <[^>]*> daddu at,at,a1
[0-9a-f]+ <[^>]*> sd a0,0\(at\)
-[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
-[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0xffffffffffff8000
+[ ]*[0-9a-f]+: R_(MICRO)?MIPS_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*-0x8000
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_(MICRO)?MIPS_HIGHEST \.data\+0x10000
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x10000
diff --git a/gas/testsuite/gas/mips/sd.d b/gas/testsuite/gas/mips/sd.d
index 629ca96..19ab825 100644
--- a/gas/testsuite/gas/mips/sd.d
+++ b/gas/testsuite/gas/mips/sd.d
@@ -42,11 +42,11 @@
[0-9a-f]+ <[^>]*> sw a0,-23131\(at\)
[0-9a-f]+ <[^>]*> sw a1,-23127\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sw a0,0\(at\)
@@ -68,21 +68,21 @@
[0-9a-f]+ <[^>]*> sw a1,4\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,(0|-16384)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> sw a1,(4|-16380)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sw a0,1\(at\)
@@ -104,21 +104,21 @@
[0-9a-f]+ <[^>]*> sw a1,5\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,(1|-16383)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> sw a1,(5|-16379)\(gp\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sw a0,-32768\(at\)
@@ -144,23 +144,23 @@
[0-9a-f]+ <[^>]*> sw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sw a0,-32768\(at\)
@@ -186,23 +186,23 @@
[0-9a-f]+ <[^>]*> sw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sw a0,0\(at\)
@@ -228,23 +228,23 @@
[0-9a-f]+ <[^>]*> sw a1,4\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> sw a0,-23131\(at\)
@@ -270,24 +270,24 @@
[0-9a-f]+ <[^>]*> sw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -313,24 +313,24 @@
[0-9a-f]+ <[^>]*> sw a1,4\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> sw a0,(0|-16384)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> sw a1,(4|-16380)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(1|4097)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(5|4101)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -356,24 +356,24 @@
[0-9a-f]+ <[^>]*> sw a1,5\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(1|8193)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,(5|8197)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,gp
[0-9a-f]+ <[^>]*> sw a0,(1|-16383)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> sw a1,(5|-16379)\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_GPREL16|GPREL) \.sbss(\+0x4000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -403,26 +403,26 @@
[0-9a-f]+ <[^>]*> sw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -452,26 +452,26 @@
[0-9a-f]+ <[^>]*> sw a1,-32764\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(32768|24576)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|24572)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x0
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(32768|28672)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(32764|28668)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x1
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -501,26 +501,26 @@
[0-9a-f]+ <[^>]*> sw a1,4\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(0|8192)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,(4|8196)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x1
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,(0|4096)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,(4|4100)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.data(-0x1000)?
[0-9a-f]+ <[^>]*> lui at,0x2
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) big_external_data_label
[0-9a-f]+ <[^>]*> addu at,a1,at
@@ -550,17 +550,17 @@
[0-9a-f]+ <[^>]*> sw a1,-23127\(at\)
[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) small_external_common
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(23131|14939)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> sw a1,-(23127|14935)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(\+0xffffe000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.bss(-0x2000)?
[0-9a-f]+ <[^>]*> lui at,0x2
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_HI16|REFHI) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> addu at,a1,at
[0-9a-f]+ <[^>]*> sw a0,-(23131|19035)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
[0-9a-f]+ <[^>]*> sw a1,-(23127|19031)\(at\)
-[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(\+0xfffff000)?
+[ ]*[0-9a-f]+: (R_(MICRO)?MIPS_LO16|REFLO) \.sbss(-0x1000)?
\.\.\.
diff --git a/gas/testsuite/gas/mmix/bz-c.d b/gas/testsuite/gas/mmix/bz-c.d
index 24113b6..8616e5a 100644
--- a/gas/testsuite/gas/mmix/bz-c.d
+++ b/gas/testsuite/gas/mmix/bz-c.d
@@ -15,7 +15,7 @@
0+ <Main>:
0: 42ff0000 bz \$255,0 <Main>
- 0: R_MMIX_CBRANCH \*ABS\*\+0xffff0000ffff0000
+ 0: R_MMIX_CBRANCH \*ABS\*-0xffff00010000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
diff --git a/gas/testsuite/gas/mmix/comment-1.d b/gas/testsuite/gas/mmix/comment-1.d
index 75b69bf..82559fe 100644
--- a/gas/testsuite/gas/mmix/comment-1.d
+++ b/gas/testsuite/gas/mmix/comment-1.d
@@ -13,7 +13,7 @@
0+46 +.* R_MMIX_16 +0+ +target2 +\+ 30
0+48 +.* R_MMIX_ADDR27 +0+ +target3 +\+ 38
0+54 +.* R_MMIX_ADDR19 +0+ +target3 +\+ 0
-0+78 +.* R_MMIX_LOCAL +0+30
+0+78 +.* R_MMIX_LOCAL +30
Symbol table '\.symtab' contains 12 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
diff --git a/gas/testsuite/gas/mmix/geta-c.d b/gas/testsuite/gas/mmix/geta-c.d
index 5e7bf2b..55d0da0 100644
--- a/gas/testsuite/gas/mmix/geta-c.d
+++ b/gas/testsuite/gas/mmix/geta-c.d
@@ -15,7 +15,7 @@
0+ <Main>:
0: f4ff0000 geta \$255,0 <Main>
- 0: R_MMIX_GETA \*ABS\*\+0xffff0000ffff0000
+ 0: R_MMIX_GETA \*ABS\*-0xffff00010000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
diff --git a/gas/testsuite/gas/mmix/jump-c.d b/gas/testsuite/gas/mmix/jump-c.d
index d0c2437..41dccbb 100644
--- a/gas/testsuite/gas/mmix/jump-c.d
+++ b/gas/testsuite/gas/mmix/jump-c.d
@@ -15,7 +15,7 @@
0+ <Main>:
0: f0000000 jmp 0 <Main>
- 0: R_MMIX_JMP \*ABS\*\+0xffff0000ffff0000
+ 0: R_MMIX_JMP \*ABS\*-0xffff00010000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
diff --git a/gas/testsuite/gas/mmix/pushj-c.d b/gas/testsuite/gas/mmix/pushj-c.d
index af3281d..2c1f3dd 100644
--- a/gas/testsuite/gas/mmix/pushj-c.d
+++ b/gas/testsuite/gas/mmix/pushj-c.d
@@ -15,7 +15,7 @@
0+ <Main>:
0: f2010000 pushj \$1,0 <Main>
- 0: R_MMIX_PUSHJ \*ABS\*\+0xffff0000ffff0000
+ 0: R_MMIX_PUSHJ \*ABS\*-0xffff00010000
4: fd000000 swym 0,0,0
8: fd000000 swym 0,0,0
c: fd000000 swym 0,0,0
diff --git a/gas/testsuite/gas/mmix/pushj-cs.d b/gas/testsuite/gas/mmix/pushj-cs.d
index b2ac35a..937c3df 100644
--- a/gas/testsuite/gas/mmix/pushj-cs.d
+++ b/gas/testsuite/gas/mmix/pushj-cs.d
@@ -13,6 +13,6 @@
Disassembly of section \.text:
0+ <Main>:
0: f2010000 pushj \$1,0 <Main>
- 0: R_MMIX_PUSHJ_STUBBABLE \*ABS\*\+0xffff0000ffff0000
+ 0: R_MMIX_PUSHJ_STUBBABLE \*ABS\*-0xffff00010000
4: f2020000 pushj \$2,4 <Main\+0x4>
4: R_MMIX_PUSHJ_STUBBABLE i2
diff --git a/gas/testsuite/gas/mmix/reloc16-n.d b/gas/testsuite/gas/mmix/reloc16-n.d
index f37c0b7..19dace3 100644
--- a/gas/testsuite/gas/mmix/reloc16-n.d
+++ b/gas/testsuite/gas/mmix/reloc16-n.d
@@ -11,4 +11,4 @@
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
- a: R_MMIX_16 baz\+0xfffffffffffff6d7
+ a: R_MMIX_16 baz-0x929
diff --git a/gas/testsuite/gas/mmix/reloc16-r.d b/gas/testsuite/gas/mmix/reloc16-r.d
index c56552f..2ba4046 100644
--- a/gas/testsuite/gas/mmix/reloc16-r.d
+++ b/gas/testsuite/gas/mmix/reloc16-r.d
@@ -11,4 +11,4 @@
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
- a: R_MMIX_16 baz\+0xfffffffffffff6d7
+ a: R_MMIX_16 baz-0x929
diff --git a/gas/testsuite/gas/mmix/reloc16.d b/gas/testsuite/gas/mmix/reloc16.d
index 7b5cc84..5b0480a 100644
--- a/gas/testsuite/gas/mmix/reloc16.d
+++ b/gas/testsuite/gas/mmix/reloc16.d
@@ -9,4 +9,4 @@
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
- a: R_MMIX_16 baz\+0xfffffffffffff6d7
+ a: R_MMIX_16 baz-0x929
diff --git a/gas/testsuite/gas/mmix/reloc8-r.d b/gas/testsuite/gas/mmix/reloc8-r.d
index e6394e5..7186325 100644
--- a/gas/testsuite/gas/mmix/reloc8-r.d
+++ b/gas/testsuite/gas/mmix/reloc8-r.d
@@ -11,9 +11,9 @@
4: 372f002a negu \$47,0,42
6: R_MMIX_8 bar\+0x30
8: fd00b26e swym 0,178,110
- 9: R_MMIX_8 baz\+0xfffffffffffffffe
+ 9: R_MMIX_8 baz-0x2
c: ff000000 trip 0,0,0
- d: R_MMIX_8 fee\+0xffffffffffffffff
+ d: R_MMIX_8 fee-0x1
e: R_MMIX_8 fie\+0x1
f: R_MMIX_8 foe\+0x3
10: f9000000 resume 0
diff --git a/gas/testsuite/gas/mmix/reloc8.d b/gas/testsuite/gas/mmix/reloc8.d
index b3f1ed6..0cf7f17 100644
--- a/gas/testsuite/gas/mmix/reloc8.d
+++ b/gas/testsuite/gas/mmix/reloc8.d
@@ -9,9 +9,9 @@
4: 372f002a negu \$47,0,42
6: R_MMIX_8 bar\+0x30
8: fd00b26e swym 0,178,110
- 9: R_MMIX_8 baz\+0xfffffffffffffffe
+ 9: R_MMIX_8 baz-0x2
c: ff000000 trip 0,0,0
- d: R_MMIX_8 fee\+0xffffffffffffffff
+ d: R_MMIX_8 fee-0x1
e: R_MMIX_8 fie\+0x1
f: R_MMIX_8 foe\+0x3
10: f9000000 resume 0
diff --git a/gas/testsuite/gas/mmix/relocxrn.d b/gas/testsuite/gas/mmix/relocxrn.d
index ff7f1db..4484935 100644
--- a/gas/testsuite/gas/mmix/relocxrn.d
+++ b/gas/testsuite/gas/mmix/relocxrn.d
@@ -11,4 +11,4 @@
4: f82d0000 pop 45,0
6: R_MMIX_16 bar\+0x2a
8: fd2a0000 swym 42,0,0
- a: R_MMIX_16 baz\+0xfffffffffffff6d7
+ a: R_MMIX_16 baz-0x929
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index ecff355..aac92b6 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -55,5 +55,13 @@
run_dump_test "vsx"
run_dump_test "476"
run_dump_test "titan"
+ run_dump_test "vle"
+ run_dump_test "vle-reloc"
+ run_dump_test "vle-simple-1"
+ run_dump_test "vle-simple-2"
+ run_dump_test "vle-simple-3"
+ run_dump_test "vle-simple-4"
+ run_dump_test "vle-simple-5"
+ run_dump_test "vle-simple-6"
}
}
diff --git a/gas/testsuite/gas/ppc/vle-reloc.d b/gas/testsuite/gas/ppc/vle-reloc.d
new file mode 100644
index 0000000..01eba4a
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-reloc.d
@@ -0,0 +1,172 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE relocations
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section \.text:
+
+00000000 <.text>:
+ 0: e8 00 se_b 0x0
+ 0: R_PPC_VLE_REL8 sub1
+ 2: e9 00 se_bl 0x2
+ 2: R_PPC_VLE_REL8 sub1
+ 4: e1 00 se_ble 0x4
+ 4: R_PPC_VLE_REL8 sub2
+ 6: e6 00 se_beq 0x6
+ 6: R_PPC_VLE_REL8 sub2
+ 8: 78 00 00 00 e_b 0x8
+ 8: R_PPC_VLE_REL24 sub3
+ c: 78 00 00 01 e_bl 0xc
+ c: R_PPC_VLE_REL24 sub4
+ 10: 7a 05 00 00 e_ble cr1,0x10
+ 10: R_PPC_VLE_REL15 sub5
+ 14: 7a 1a 00 01 e_beql cr2,0x14
+ 14: R_PPC_VLE_REL15 sub5
+
+ 18: 70 20 c0 00 e_or2i r1,0
+ 18: R_PPC_VLE_LO16D low
+ 1c: 70 40 c0 00 e_or2i r2,0
+ 1c: R_PPC_VLE_HI16D high
+ 20: 70 60 c0 00 e_or2i r3,0
+ 20: R_PPC_VLE_HA16D high_adjust
+ 24: 70 80 c0 00 e_or2i r4,0
+ 24: R_PPC_VLE_SDAREL_LO16D low_sdarel
+ 28: 70 a0 c0 00 e_or2i r5,0
+ 28: R_PPC_VLE_SDAREL_HI16D high_sdarel
+ 2c: 70 40 c0 00 e_or2i r2,0
+ 2c: R_PPC_VLE_SDAREL_HA16D high_adjust_sdarel
+ 30: 70 20 c8 00 e_and2i. r1,0
+ 30: R_PPC_VLE_LO16D low
+ 34: 70 40 c8 00 e_and2i. r2,0
+ 34: R_PPC_VLE_HI16D high
+ 38: 70 60 c8 00 e_and2i. r3,0
+ 38: R_PPC_VLE_HA16D high_adjust
+ 3c: 70 80 c8 00 e_and2i. r4,0
+ 3c: R_PPC_VLE_SDAREL_LO16D low_sdarel
+ 40: 70 a0 c8 00 e_and2i. r5,0
+ 40: R_PPC_VLE_SDAREL_HI16D high_sdarel
+ 44: 70 40 c8 00 e_and2i. r2,0
+ 44: R_PPC_VLE_SDAREL_HA16D high_adjust_sdarel
+ 48: 70 40 c8 00 e_and2i. r2,0
+ 48: R_PPC_VLE_SDAREL_HA16D high_adjust_sdarel
+ 4c: 70 20 d0 00 e_or2is r1,0
+ 4c: R_PPC_VLE_LO16D low
+ 50: 70 40 d0 00 e_or2is r2,0
+ 50: R_PPC_VLE_HI16D high
+ 54: 70 60 d0 00 e_or2is r3,0
+ 54: R_PPC_VLE_HA16D high_adjust
+ 58: 70 80 d0 00 e_or2is r4,0
+ 58: R_PPC_VLE_SDAREL_LO16D low_sdarel
+ 5c: 70 a0 d0 00 e_or2is r5,0
+ 5c: R_PPC_VLE_SDAREL_HI16D high_sdarel
+ 60: 70 40 d0 00 e_or2is r2,0
+ 60: R_PPC_VLE_SDAREL_HA16D high_adjust_sdarel
+ 64: 70 20 e0 00 e_lis r1,0
+ 64: R_PPC_VLE_LO16D low
+ 68: 70 40 e0 00 e_lis r2,0
+ 68: R_PPC_VLE_HI16D high
+ 6c: 70 60 e0 00 e_lis r3,0
+ 6c: R_PPC_VLE_HA16D high_adjust
+ 70: 70 80 e0 00 e_lis r4,0
+ 70: R_PPC_VLE_SDAREL_LO16D low_sdarel
+ 74: 70 a0 e0 00 e_lis r5,0
+ 74: R_PPC_VLE_SDAREL_HI16D high_sdarel
+ 78: 70 40 e0 00 e_lis r2,0
+ 78: R_PPC_VLE_SDAREL_HA16D high_adjust_sdarel
+ 7c: 70 20 e8 00 e_and2is. r1,0
+ 7c: R_PPC_VLE_LO16D low
+ 80: 70 40 e8 00 e_and2is. r2,0
+ 80: R_PPC_VLE_HI16D high
+ 84: 70 60 e8 00 e_and2is. r3,0
+ 84: R_PPC_VLE_HA16D high_adjust
+ 88: 70 80 e8 00 e_and2is. r4,0
+ 88: R_PPC_VLE_SDAREL_LO16D low_sdarel
+ 8c: 70 a0 e8 00 e_and2is. r5,0
+ 8c: R_PPC_VLE_SDAREL_HI16D high_sdarel
+ 90: 70 40 e8 00 e_and2is. r2,0
+ 90: R_PPC_VLE_SDAREL_HA16D high_adjust_sdarel
+ 94: 70 01 98 00 e_cmp16i r1,0
+ 94: R_PPC_VLE_LO16A low
+ 98: 70 02 98 00 e_cmp16i r2,0
+ 98: R_PPC_VLE_HI16A high
+ 9c: 70 03 98 00 e_cmp16i r3,0
+ 9c: R_PPC_VLE_HA16A high_adjust
+ a0: 70 04 98 00 e_cmp16i r4,0
+ a0: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ a4: 70 05 98 00 e_cmp16i r5,0
+ a4: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ a8: 70 02 98 00 e_cmp16i r2,0
+ a8: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
+ ac: 70 01 a8 00 e_cmpl16i r1,0
+ ac: R_PPC_VLE_LO16A low
+ b0: 70 02 a8 00 e_cmpl16i r2,0
+ b0: R_PPC_VLE_HI16A high
+ b4: 70 03 a8 00 e_cmpl16i r3,0
+ b4: R_PPC_VLE_HA16A high_adjust
+ b8: 70 04 a8 00 e_cmpl16i r4,0
+ b8: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ bc: 70 05 a8 00 e_cmpl16i r5,0
+ bc: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ c0: 70 02 a8 00 e_cmpl16i r2,0
+ c0: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
+ c4: 70 01 b0 00 e_cmph16i r1,0
+ c4: R_PPC_VLE_LO16A low
+ c8: 70 02 b0 00 e_cmph16i r2,0
+ c8: R_PPC_VLE_HI16A high
+ cc: 70 03 b0 00 e_cmph16i r3,0
+ cc: R_PPC_VLE_HA16A high_adjust
+ d0: 70 04 b0 00 e_cmph16i r4,0
+ d0: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ d4: 70 05 b0 00 e_cmph16i r5,0
+ d4: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ d8: 70 02 b0 00 e_cmph16i r2,0
+ d8: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
+ dc: 70 01 b8 00 e_cmphl16i r1,0
+ dc: R_PPC_VLE_LO16A low
+ e0: 70 02 b8 00 e_cmphl16i r2,0
+ e0: R_PPC_VLE_HI16A high
+ e4: 70 03 b8 00 e_cmphl16i r3,0
+ e4: R_PPC_VLE_HA16A high_adjust
+ e8: 70 04 b8 00 e_cmphl16i r4,0
+ e8: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ ec: 70 05 b8 00 e_cmphl16i r5,0
+ ec: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ f0: 70 02 b8 00 e_cmphl16i r2,0
+ f0: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
+ f4: 70 01 88 00 e_add2i. r1,0
+ f4: R_PPC_VLE_LO16A low
+ f8: 70 02 88 00 e_add2i. r2,0
+ f8: R_PPC_VLE_HI16A high
+ fc: 70 03 88 00 e_add2i. r3,0
+ fc: R_PPC_VLE_HA16A high_adjust
+ 100: 70 04 88 00 e_add2i. r4,0
+ 100: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ 104: 70 05 88 00 e_add2i. r5,0
+ 104: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ 108: 70 02 88 00 e_add2i. r2,0
+ 108: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
+ 10c: 70 01 90 00 e_add2is r1,0
+ 10c: R_PPC_VLE_LO16A low
+ 110: 70 02 90 00 e_add2is r2,0
+ 110: R_PPC_VLE_HI16A high
+ 114: 70 03 90 00 e_add2is r3,0
+ 114: R_PPC_VLE_HA16A high_adjust
+ 118: 70 04 90 00 e_add2is r4,0
+ 118: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ 11c: 70 05 90 00 e_add2is r5,0
+ 11c: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ 120: 70 02 90 00 e_add2is r2,0
+ 120: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
+ 124: 70 01 a0 00 e_mull2i r1,0
+ 124: R_PPC_VLE_LO16A low
+ 128: 70 02 a0 00 e_mull2i r2,0
+ 128: R_PPC_VLE_HI16A high
+ 12c: 70 03 a0 00 e_mull2i r3,0
+ 12c: R_PPC_VLE_HA16A high_adjust
+ 130: 70 04 a0 00 e_mull2i r4,0
+ 130: R_PPC_VLE_SDAREL_LO16A low_sdarel
+ 134: 70 05 a0 00 e_mull2i r5,0
+ 134: R_PPC_VLE_SDAREL_HI16A high_sdarel
+ 138: 70 02 a0 00 e_mull2i r2,0
+ 138: R_PPC_VLE_SDAREL_HA16A high_adjust_sdarel
diff --git a/gas/testsuite/gas/ppc/vle-reloc.s b/gas/testsuite/gas/ppc/vle-reloc.s
new file mode 100644
index 0000000..fb2a01a
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-reloc.s
@@ -0,0 +1,95 @@
+ .section .text
+ se_b sub1
+ se_bl sub1
+ se_bc 0,1,sub2
+ se_bc 1,2,sub2
+
+ e_b sub3
+ e_bl sub4
+ e_bc 0,5,sub5
+ e_bcl 1,10,sub5
+
+ e_or2i 1, low@l
+ e_or2i 2, high@h
+ e_or2i 3, high_adjust@ha
+ e_or2i 4, low_sdarel@sdarel@l
+ e_or2i 5, high_sdarel@sdarel@h
+ e_or2i 2, high_adjust_sdarel@sdarel@ha
+
+ e_and2i. 1, low@l
+ e_and2i. 2, high@h
+ e_and2i. 3, high_adjust@ha
+ e_and2i. 4, low_sdarel@sdarel@l
+ e_and2i. 5, high_sdarel@sdarel@h
+ e_and2i. 2, high_adjust_sdarel@sdarel@ha
+ e_and2i. 2, high_adjust_sdarel@sdarel@ha
+
+ e_or2is 1, low@l
+ e_or2is 2, high@h
+ e_or2is 3, high_adjust@ha
+ e_or2is 4, low_sdarel@sdarel@l
+ e_or2is 5, high_sdarel@sdarel@h
+ e_or2is 2, high_adjust_sdarel@sdarel@ha
+
+ e_lis 1, low@l
+ e_lis 2, high@h
+ e_lis 3, high_adjust@ha
+ e_lis 4, low_sdarel@sdarel@l
+ e_lis 5, high_sdarel@sdarel@h
+ e_lis 2, high_adjust_sdarel@sdarel@ha
+
+ e_and2is. 1, low@l
+ e_and2is. 2, high@h
+ e_and2is. 3, high_adjust@ha
+ e_and2is. 4, low_sdarel@sdarel@l
+ e_and2is. 5, high_sdarel@sdarel@h
+ e_and2is. 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmp16i 1, low@l
+ e_cmp16i 2, high@h
+ e_cmp16i 3, high_adjust@ha
+ e_cmp16i 4, low_sdarel@sdarel@l
+ e_cmp16i 5, high_sdarel@sdarel@h
+ e_cmp16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmpl16i 1, low@l
+ e_cmpl16i 2, high@h
+ e_cmpl16i 3, high_adjust@ha
+ e_cmpl16i 4, low_sdarel@sdarel@l
+ e_cmpl16i 5, high_sdarel@sdarel@h
+ e_cmpl16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmph16i 1, low@l
+ e_cmph16i 2, high@h
+ e_cmph16i 3, high_adjust@ha
+ e_cmph16i 4, low_sdarel@sdarel@l
+ e_cmph16i 5, high_sdarel@sdarel@h
+ e_cmph16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmphl16i 1, low@l
+ e_cmphl16i 2, high@h
+ e_cmphl16i 3, high_adjust@ha
+ e_cmphl16i 4, low_sdarel@sdarel@l
+ e_cmphl16i 5, high_sdarel@sdarel@h
+ e_cmphl16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_add2i. 1, low@l
+ e_add2i. 2, high@h
+ e_add2i. 3, high_adjust@ha
+ e_add2i. 4, low_sdarel@sdarel@l
+ e_add2i. 5, high_sdarel@sdarel@h
+ e_add2i. 2, high_adjust_sdarel@sdarel@ha
+
+ e_add2is 1, low@l
+ e_add2is 2, high@h
+ e_add2is 3, high_adjust@ha
+ e_add2is 4, low_sdarel@sdarel@l
+ e_add2is 5, high_sdarel@sdarel@h
+ e_add2is 2, high_adjust_sdarel@sdarel@ha
+
+ e_mull2i 1, low@l
+ e_mull2i 2, high@h
+ e_mull2i 3, high_adjust@ha
+ e_mull2i 4, low_sdarel@sdarel@l
+ e_mull2i 5, high_sdarel@sdarel@h
+ e_mull2i 2, high_adjust_sdarel@sdarel@ha
diff --git a/gas/testsuite/gas/ppc/vle-simple-1.d b/gas/testsuite/gas/ppc/vle-simple-1.d
new file mode 100644
index 0000000..fee4054
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-1.d
@@ -0,0 +1,39 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE Simplified mnemonics 1
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section \.text:
+
+0+0 <target0>:
+ 0: e6 03 se_beq 6 <target3>
+
+0+2 <target1>:
+ 2: e1 03 se_ble 8 <target4>
+
+0+4 <target2>:
+ 4: e0 0+0 se_bge 4 <target2>
+
+0+6 <target3>:
+ 6: e5 fe se_bgt 2 <target1>
+
+0+8 <target4>:
+ 8: e1 ff se_ble 6 <target3>
+ a: e4 03 se_blt 10 <target6>
+
+0+c <target5>:
+ c: e2 fb se_bne 2 <target1>
+ e: e1 01 se_ble 10 <target6>
+
+0+10 <target6>:
+ 10: e0 fc se_bge 8 <target4>
+ 12: e3 fd se_bns c <target5>
+
+0+14 <target8>:
+ 14: e3 f8 se_bns 4 <target2>
+ 16: e7 ff se_bso 14 <target8>
+
+0+18 <target9>:
+ 18: e6 fc se_beq 10 <target6>
+ 1a: e7 ff se_bso 18 <target9>
diff --git a/gas/testsuite/gas/ppc/vle-simple-1.s b/gas/testsuite/gas/ppc/vle-simple-1.s
new file mode 100644
index 0000000..bbd7c7b
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-1.s
@@ -0,0 +1,34 @@
+ .section .text
+
+target0:
+ se_beq target3
+
+target1:
+ se_bf cr1, target4
+
+target2:
+ se_bge target2
+
+target3:
+ se_bgt target1
+
+target4:
+ se_ble target3
+ se_blt target6
+
+target5:
+ se_bne target1
+ se_bng target6
+
+target6:
+ se_bnl target4
+ se_bns target5
+
+target8:
+ se_bnu target2
+ se_bso target8
+
+target9:
+ se_bt cr2, target6
+ se_bun target9
+
diff --git a/gas/testsuite/gas/ppc/vle-simple-2.d b/gas/testsuite/gas/ppc/vle-simple-2.d
new file mode 100644
index 0000000..291f6ea
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-2.d
@@ -0,0 +1,83 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE Simplified mnemonics 2
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section .text:
+
+0+0 <target0>:
+ 0: 7a 20 00 0c e_bdnz c <target1>
+ 4: 7a 20 00 09 e_bdnzl c <target1>
+ 8: 7a 30 00 10 e_bdz 18 <target2>
+
+0+c <target1>:
+ c: 7a 30 ff f5 e_bdzl 0 <target0>
+ 10: 7a 12 ff f0 e_beq 0 <target0>
+ 14: 7a 16 00 8c e_beq cr1,a0 <target8>
+
+0+18 <target2>:
+ 18: 7a 12 ff f5 e_beql c <target1>
+ 1c: 7a 12 00 4d e_beql 68 <target6>
+ 20: 7a 01 00 04 e_ble 24 <target3>
+
+0+24 <target3>:
+ 24: 7a 03 ff dd e_bnsl 0 <target0>
+ 28: 7a 04 ff e4 e_bge cr1,c <target1>
+ 2c: 7a 00 00 24 e_bge 50 <target5>
+
+0+30 <target4>:
+ 30: 7a 08 ff f5 e_bgel cr2,24 <target3>
+ 34: 7a 00 ff fd e_bgel 30 <target4>
+ 38: 7a 11 ff c8 e_bgt 0 <target0>
+ 3c: 7a 11 ff c4 e_bgt 0 <target0>
+ 40: 7a 19 ff d9 e_bgtl cr2,18 <target2>
+ 44: 7a 11 ff d5 e_bgtl 18 <target2>
+ 48: 7a 0d 00 08 e_ble cr3,50 <target5>
+ 4c: 7a 01 00 04 e_ble 50 <target5>
+
+0+50 <target5>:
+ 50: 7a 01 ff e1 e_blel 30 <target4>
+ 54: 7a 01 ff dd e_blel 30 <target4>
+ 58: 7a 14 ff cc e_blt cr1,24 <target3>
+ 5c: 7a 10 ff c8 e_blt 24 <target3>
+ 60: 7a 10 ff a1 e_bltl 0 <target0>
+ 64: 7a 14 ff 9d e_bltl cr1,0 <target0>
+
+0+68 <target6>:
+ 68: 7a 02 00 18 e_bne 80 <target7>
+ 6c: 7a 06 ff 94 e_bne cr1,0 <target0>
+ 70: 7a 02 ff e1 e_bnel 50 <target5>
+ 74: 7a 02 ff dd e_bnel 50 <target5>
+ 78: 7a 01 00 48 e_ble c0 <target9>
+ 7c: 7a 05 ff b4 e_ble cr1,30 <target4>
+
+0+80 <target7>:
+ 80: 7a 09 ff e9 e_blel cr2,68 <target6>
+ 84: 7a 01 00 1d e_blel a0 <target8>
+ 88: 7a 04 ff c8 e_bge cr1,50 <target5>
+ 8c: 7a 00 ff c4 e_bge 50 <target5>
+ 90: 7a 0c ff 95 e_bgel cr3,24 <target3>
+ 94: 7a 00 ff 91 e_bgel 24 <target3>
+ 98: 7a 03 ff 80 e_bns 18 <target2>
+ 9c: 7a 03 ff 7c e_bns 18 <target2>
+
+0+a0 <target8>:
+ a0: 7a 0b ff 61 e_bnsl cr2,0 <target0>
+ a4: 7a 03 ff c5 e_bnsl 68 <target6>
+ a8: 7a 07 ff 64 e_bns cr1,c <target1>
+ ac: 7a 03 ff 60 e_bns c <target1>
+ b0: 7a 03 ff d1 e_bnsl 80 <target7>
+ b4: 7a 03 ff 71 e_bnsl 24 <target3>
+ b8: 7a 17 ff 78 e_bso cr1,30 <target4>
+ bc: 7a 13 ff 74 e_bso 30 <target4>
+
+0+c0 <target9>:
+ c0: 7a 13 ff e1 e_bsol a0 <target8>
+ c4: 7a 13 ff dd e_bsol a0 <target8>
+ c8: 7a 11 ff b8 e_bgt 80 <target7>
+ cc: 7a 10 ff 85 e_bltl 50 <target5>
+ d0: 7a 17 ff 60 e_bso cr1,30 <target4>
+ d4: 7a 13 ff 5c e_bso 30 <target4>
+ d8: 7a 1b ff 29 e_bsol cr2,0 <target0>
+ dc: 7a 13 ff e5 e_bsol c0 <target9>
diff --git a/gas/testsuite/gas/ppc/vle-simple-2.s b/gas/testsuite/gas/ppc/vle-simple-2.s
new file mode 100644
index 0000000..73b3277
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-2.s
@@ -0,0 +1,78 @@
+ .section .text
+
+target0:
+ e_bdnz target1
+ e_bdnzl target1
+ e_bdz target2
+
+target1:
+ e_bdzl target0
+ e_beq target0
+ e_beq cr1, target8
+
+target2:
+ e_beql cr0, target1
+ e_beql target6
+ e_bf cr1, target3
+
+target3:
+ e_bfl cr3, target0
+ e_bge cr1, target1
+ e_bge target5
+
+target4:
+ e_bgel cr2, target3
+ e_bgel target4
+ e_bgt cr0, target0
+ e_bgt target0
+ e_bgtl cr2, target2
+ e_bgtl target2
+ e_ble cr3, target5
+ e_ble target5
+
+target5:
+ e_blel cr0, target4
+ e_blel target4
+ e_blt cr1, target3
+ e_blt target3
+ e_bltl target0
+ e_bltl cr1, target0
+
+target6:
+ e_bne target7
+ e_bne cr1, target0
+ e_bnel cr0, target5
+ e_bnel target5
+ e_bng target9
+ e_bng cr1, target4
+
+target7:
+ e_bngl cr2, target6
+ e_bngl target8
+ e_bnl cr1, target5
+ e_bnl target5
+ e_bnll cr3, target3
+ e_bnll target3
+ e_bns target2
+ e_bns cr0, target2
+
+target8:
+ e_bnsl cr2, target0
+ e_bnsl target6
+ e_bnu cr1, target1
+ e_bnu target1
+ e_bnul target7
+ e_bnul cr0, target3
+ e_bso cr1, target4
+ e_bso target4
+
+target9:
+ e_bsol cr0, target8
+ e_bsol target8
+ e_bt cr1, target7
+ e_btl cr0, target5
+ e_bun cr1, target4
+ e_bun target4
+ e_bunl cr2, target0
+ e_bunl target9
+
diff --git a/gas/testsuite/gas/ppc/vle-simple-3.d b/gas/testsuite/gas/ppc/vle-simple-3.d
new file mode 100644
index 0000000..7b3ddb2
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-3.d
@@ -0,0 +1,24 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE Simplified mnemonics 3
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section .text:
+
+0+0 <trap>:
+ 0: 7f e0 00 08 trap
+ 4: 7e 01 10 08 twlt r1,r2
+ 8: 7e 83 20 08 twle r3,r4
+ c: 7c 80 08 08 tweq r0,r1
+ 10: 7d 82 18 08 twge r2,r3
+ 14: 7d 02 20 08 twgt r2,r4
+ 18: 7d 82 28 08 twge r2,r5
+ 1c: 7f 02 30 08 twne r2,r6
+ 20: 7e 82 38 08 twle r2,r7
+ 24: 7c 42 40 08 twllt r2,r8
+ 28: 7c c2 48 08 twlle r2,r9
+ 2c: 7c a2 50 08 twlge r2,r10
+ 30: 7c 22 58 08 twlgt r2,r11
+ 34: 7c a2 60 08 twlge r2,r12
+ 38: 7c c2 68 08 twlle r2,r13
diff --git a/gas/testsuite/gas/ppc/vle-simple-3.s b/gas/testsuite/gas/ppc/vle-simple-3.s
new file mode 100644
index 0000000..a0d7d80
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-3.s
@@ -0,0 +1,18 @@
+ .section .text
+trap:
+ trap
+ twlt 1, 2
+ twle 3, 4
+ tweq 0, 1
+ twge 2, 3
+ twgt 2, 4
+ twnl 2, 5
+ twne 2, 6
+ twng 2, 7
+ twllt 2, 8
+ twlle 2, 9
+ twlge 2, 10
+ twlgt 2, 11
+ twlnl 2, 12
+ twlng 2, 13
+
diff --git a/gas/testsuite/gas/ppc/vle-simple-4.d b/gas/testsuite/gas/ppc/vle-simple-4.d
new file mode 100644
index 0000000..9d9ae38
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-4.d
@@ -0,0 +1,23 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE Simplified mnemonics 4
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section .text:
+
+0+0 <subtract>:
+ 0: 7c 23 10 50 subf r1,r3,r2
+ 4: 7c a3 20 51 subf. r5,r3,r4
+ 8: 7c 21 14 50 subfo r1,r1,r2
+ c: 7c 01 14 51 subfo. r0,r1,r2
+ 10: 7c 65 20 10 subfc r3,r5,r4
+ 14: 7c 65 20 11 subfc. r3,r5,r4
+ 18: 7c 23 14 10 subfco r1,r3,r2
+ 1c: 7c a7 34 11 subfco. r5,r7,r6
+ 20: 18 85 84 d0 e_addi r4,r5,-48
+ 24: 18 66 94 fe e_addic r3,r6,-2
+ 28: 18 e8 9c f0 e_addic. r7,r8,-16
+ 2c: 1c 22 ff f1 e_add16i r1,r2,-15
+ 30: 73 e5 8f ff e_add2i. r5,-1
+ 34: 73 ea 97 00 e_add2is r10,-256
diff --git a/gas/testsuite/gas/ppc/vle-simple-4.s b/gas/testsuite/gas/ppc/vle-simple-4.s
new file mode 100755
index 0000000..5a7befd
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-4.s
@@ -0,0 +1,19 @@
+ .section .text
+
+subtract:
+ sub 1, 2, 3
+ sub. 5, 4, 3
+ subo 1, 2, 1
+ subo. 0, 2, 1
+ subc 3, 4, 5
+ subc. 3, 4, 5
+ subco 1, 2, 3
+ subco. 5, 6, 7
+
+ e_subi 4, 5, 0x30
+ e_subic 3, 6, 0x2
+ e_subic. 7, 8, 0x10
+
+ e_sub16i 1, 2, 0xf
+ e_sub2i. 5, 0x1
+ e_sub2is 10, 0x100
diff --git a/gas/testsuite/gas/ppc/vle-simple-5.d b/gas/testsuite/gas/ppc/vle-simple-5.d
new file mode 100644
index 0000000..8e98145
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-5.d
@@ -0,0 +1,20 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE Simplified mnemonics 5
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section .text:
+
+0+0 <.text>:
+ 0: 74 42 00 01 e_rlwinm r2,r2,0,0,0
+ 4: 74 62 7d bf e_rlwinm r2,r3,15,22,31
+ 8: 74 a4 f8 48 e_rlwimi r4,r5,31,1,4
+ c: 74 e6 c9 4c e_rlwimi r6,r7,25,5,6
+ 10: 74 41 50 3f e_rlwinm r1,r2,10,0,31
+ 14: 74 83 c0 3f e_rlwinm r3,r4,24,0,31
+ 18: 7c 62 f8 70 e_slwi r2,r3,31
+ 1c: 7c 25 f4 70 e_srwi r5,r1,30
+ 20: 74 64 07 7f e_rlwinm r4,r3,0,29,31
+ 24: 74 41 00 07 e_rlwinm r1,r2,0,0,3
+ 28: 74 e6 d8 49 e_rlwinm r6,r7,27,1,4
diff --git a/gas/testsuite/gas/ppc/vle-simple-5.s b/gas/testsuite/gas/ppc/vle-simple-5.s
new file mode 100644
index 0000000..e7a2d9b
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-5.s
@@ -0,0 +1,13 @@
+ .section .text
+
+ e_extlwi 2, 2, 1, 0
+ e_extrwi 2, 3, 10, 5
+ e_inslwi 4, 5, 4, 1
+ e_insrwi 6, 7, 2, 5
+ e_rotlwi 1, 2, 10
+ e_rotrwi 3, 4, 8
+ e_slwi 2, 3, 31
+ e_srwi 5, 1, 30
+ e_clrlwi 4, 3, 29
+ e_clrrwi 1, 2, 28
+ e_clrlslwi 6, 7, 28, 27
diff --git a/gas/testsuite/gas/ppc/vle-simple-6.d b/gas/testsuite/gas/ppc/vle-simple-6.d
new file mode 100644
index 0000000..64c9a2d
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-6.d
@@ -0,0 +1,60 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: VLE Simplified mnemonics 6
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section .text:
+
+0+0 <.text>:
+ 0: 7c b1 9b a6 mtmas1 r5
+ 4: 7c 3a 0b a6 mtcsrr0 r1
+ 8: 7c 5b 0b a6 mtcsrr1 r2
+ c: 7c b0 62 a6 mfivor0 r5
+ 10: 7c b1 62 a6 mfivor1 r5
+ 14: 7c b2 62 a6 mfivor2 r5
+ 18: 7c b3 62 a6 mfivor3 r5
+ 1c: 7c b4 62 a6 mfivor4 r5
+ 20: 7c b5 62 a6 mfivor5 r5
+ 24: 7c b6 62 a6 mfivor6 r5
+ 28: 7c b7 62 a6 mfivor7 r5
+ 2c: 7c b8 62 a6 mfivor8 r5
+ 30: 7c b9 62 a6 mfivor9 r5
+ 34: 7c ba 62 a6 mfivor10 r5
+ 38: 7c bb 62 a6 mfivor11 r5
+ 3c: 7c bc 62 a6 mfivor12 r5
+ 40: 7c bd 62 a6 mfivor13 r5
+ 44: 7c be 62 a6 mfivor14 r5
+ 48: 7c bf 62 a6 mfivor15 r5
+ 4c: 7d 50 43 a6 mtsprg 0,r10
+ 50: 7d 51 43 a6 mtsprg 1,r10
+ 54: 7d 52 43 a6 mtsprg 2,r10
+ 58: 7d 53 43 a6 mtsprg 3,r10
+ 5c: 7d 54 43 a6 mtsprg 4,r10
+ 60: 7d 55 43 a6 mtsprg 5,r10
+ 64: 7d 56 43 a6 mtsprg 6,r10
+ 68: 7d 57 43 a6 mtsprg 7,r10
+ 6c: 7d 50 43 a6 mtsprg 0,r10
+ 70: 7d 51 43 a6 mtsprg 1,r10
+ 74: 7d 52 43 a6 mtsprg 2,r10
+ 78: 7d 53 43 a6 mtsprg 3,r10
+ 7c: 7d 54 43 a6 mtsprg 4,r10
+ 80: 7d 55 43 a6 mtsprg 5,r10
+ 84: 7d 56 43 a6 mtsprg 6,r10
+ 88: 7d 57 43 a6 mtsprg 7,r10
+ 8c: 7d 30 42 a6 mfsprg r9,0
+ 90: 7d 31 42 a6 mfsprg r9,1
+ 94: 7d 32 42 a6 mfsprg r9,2
+ 98: 7d 33 42 a6 mfsprg r9,3
+ 9c: 7d 24 42 a6 mfsprg r9,4
+ a0: 7d 25 42 a6 mfsprg r9,5
+ a4: 7d 26 42 a6 mfsprg r9,6
+ a8: 7d 27 42 a6 mfsprg r9,7
+ ac: 7d 30 42 a6 mfsprg r9,0
+ b0: 7d 31 42 a6 mfsprg r9,1
+ b4: 7d 32 42 a6 mfsprg r9,2
+ b8: 7d 33 42 a6 mfsprg r9,3
+ bc: 7d 24 42 a6 mfsprg r9,4
+ c0: 7d 25 42 a6 mfsprg r9,5
+ c4: 7d 26 42 a6 mfsprg r9,6
+ c8: 7d 27 42 a6 mfsprg r9,7
diff --git a/gas/testsuite/gas/ppc/vle-simple-6.s b/gas/testsuite/gas/ppc/vle-simple-6.s
new file mode 100644
index 0000000..4d10dd7
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle-simple-6.s
@@ -0,0 +1,59 @@
+ .section .text
+
+ mtmas1 5
+
+ mtcsrr0 1
+ mtcsrr1 2
+
+ mfivor0 5
+ mfivor1 5
+ mfivor2 5
+ mfivor3 5
+ mfivor4 5
+ mfivor5 5
+ mfivor6 5
+ mfivor7 5
+ mfivor8 5
+ mfivor9 5
+ mfivor10 5
+ mfivor11 5
+ mfivor12 5
+ mfivor13 5
+ mfivor14 5
+ mfivor15 5
+
+ mtsprg 0, 10
+ mtsprg 1, 10
+ mtsprg 2, 10
+ mtsprg 3, 10
+ mtsprg 4, 10
+ mtsprg 5, 10
+ mtsprg 6, 10
+ mtsprg 7, 10
+
+ mtsprg0 10
+ mtsprg1 10
+ mtsprg2 10
+ mtsprg3 10
+ mtsprg4 10
+ mtsprg5 10
+ mtsprg6 10
+ mtsprg7 10
+
+ mfsprg 9, 0
+ mfsprg 9, 1
+ mfsprg 9, 2
+ mfsprg 9, 3
+ mfsprg 9, 4
+ mfsprg 9, 5
+ mfsprg 9, 6
+ mfsprg 9, 7
+
+ mfsprg0 9
+ mfsprg1 9
+ mfsprg2 9
+ mfsprg3 9
+ mfsprg4 9
+ mfsprg5 9
+ mfsprg6 9
+ mfsprg7 9
diff --git a/gas/testsuite/gas/ppc/vle.d b/gas/testsuite/gas/ppc/vle.d
new file mode 100755
index 0000000..ea75658
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle.d
@@ -0,0 +1,150 @@
+#as: -a32 -mvle
+#objdump: -dr -Mvle
+#name: Validate VLE instructions
+
+.*: +file format elf.*-powerpc.*
+
+Disassembly of section \.text:
+
+0+00 <.*>:
+ 0: 1c 83 00 1b e_add16i r4,r3,27
+ 4: 70 c0 8c 56 e_add2i\. r0,13398
+ 8: 71 01 93 21 e_add2is r1,17185
+ c: 18 46 88 37 e_addi\. r2,r6,55
+ 10: 18 65 81 37 e_addi r3,r5,14080
+ 14: 18 84 9a 37 e_addic\. r4,r4,3604480
+ 18: 18 e8 93 37 e_addic r7,r8,922746880
+ 1c: 71 3f ce ed e_and2i\. r9,65261
+ 20: 71 40 e8 05 e_and2is\. r10,5
+ 24: 19 ab c8 39 e_andi\. r11,r13,57
+ 28: 19 ec c2 37 e_andi r12,r15,3604480
+ 2c: 78 00 00 ec e_b 118 <middle_label>
+ 30: 78 00 00 01 e_bl 30 <start_label\+0x30>
+ 30: R_PPC_VLE_REL24 extern_subr
+ 34: 7a 03 ff cc e_bns 0 <start_label>
+ 38: 7a 1f 00 01 e_bsol cr3,38 <start_label\+0x38>
+ 38: R_PPC_VLE_REL15 extern_subr
+ 3c: 70 c2 9b 33 e_cmp16i r2,13107
+ 40: 18 46 a9 37 e_cmpi cr2,r6,14080
+ 44: 7c 87 58 1c e_cmph cr1,r7,r11
+ 48: 73 ec b5 ef e_cmph16i r12,-529
+ 4c: 7c 06 40 5c e_cmphl cr0,r6,r8
+ 50: 70 4d ba 34 e_cmphl16i r13,4660
+ 54: 73 e1 ae e0 e_cmpl16i r1,65248
+ 58: 18 a3 ab 37 e_cmpli cr1,r3,922746880
+ 5c: 7f a3 02 02 e_crand 4\*cr7\+gt,so,lt
+ 60: 7c 02 e9 02 e_crandc lt,eq,4\*cr7\+gt
+ 64: 7d f0 8a 42 e_creqv 4\*cr3\+so,4\*cr4\+lt,4\*cr4\+gt
+ 68: 7d e0 19 c2 e_crnand 4\*cr3\+so,lt,so
+ 6c: 7d e0 18 42 e_crnor 4\*cr3\+so,lt,so
+ 70: 7d 8d 73 82 e_cror 4\*cr3\+lt,4\*cr3\+gt,4\*cr3\+eq
+ 74: 7e 72 8b 42 e_crorc 4\*cr4\+so,4\*cr4\+eq,4\*cr4\+gt
+ 78: 7c 00 01 82 e_crclr lt
+ 7c: 30 e3 cc 0d e_lbz r7,-13299\(r3\)
+ 80: 18 e5 00 cc e_lbzu r7,-52\(r5\)
+ 84: 39 0a 01 ff e_lha r8,511\(r10\)
+ 88: 19 01 03 ff e_lhau r8,-1\(r1\)
+ 8c: 58 e0 18 38 e_lhz r7,6200\(0\)
+ 90: 18 e0 01 3e e_lhzu r7,62\(0\)
+ 94: 70 06 1b 33 e_li r0,209715
+ 98: 70 26 e3 33 e_lis r1,13107
+ 9c: 18 a3 08 18 e_lmw r5,24\(r3\)
+ a0: 50 a3 27 28 e_lwz r5,10024\(r3\)
+ a4: 18 c2 02 72 e_lwzu r6,114\(r2\)
+ a8: 7c 98 00 20 e_mcrf cr1,cr6
+ ac: 19 2a a0 37 e_mulli r9,r10,55
+ b0: 70 01 a6 68 e_mull2i r1,1640
+ b4: 70 a4 c3 45 e_or2i r5,9029
+ b8: 70 b4 d3 45 e_or2is r5,41797
+ bc: 19 27 d8 37 e_ori\. r7,r9,55
+ c0: 19 07 d1 37 e_ori r7,r8,14080
+ c4: 7e d2 02 30 e_rlw r18,r22,r0
+ c8: 7c 48 02 31 e_rlw\. r8,r2,r0
+ cc: 7c 74 aa 70 e_rlwi r20,r3,21
+ d0: 7c 62 aa 71 e_rlwi\. r2,r3,21
+ d4: 76 64 6a 1e e_rlwimi r4,r19,13,8,15
+ d8: 74 24 68 63 e_rlwinm r4,r1,13,1,17
+ dc: 7e 6c 30 70 e_slwi r12,r19,6
+ e0: 7d 4c a0 71 e_slwi\. r12,r10,20
+ e4: 7c 20 84 70 e_srwi r0,r1,16
+ e8: 7c 20 5c 71 e_srwi\. r0,r1,11
+ ec: 34 61 55 f0 e_stb r3,22000\(r1\)
+ f0: 1a 76 04 fc e_stbu r19,-4\(r22\)
+ f4: 5c 15 02 9a e_sth r0,666\(r21\)
+ f8: 18 37 05 ff e_sthu r1,-1\(r23\)
+ fc: 18 03 09 04 e_stmw r0,4\(r3\)
+ 100: 54 60 3f 21 e_stw r3,16161\(0\)
+ 104: 1a c4 06 ee e_stwu r22,-18\(r4\)
+ 108: 18 15 b2 37 e_subfic r0,r21,3604480
+ 10c: 1a c0 bb 37 e_subfic\. r22,r0,922746880
+ 110: 18 75 e1 37 e_xori r21,r3,14080
+ 114: 1a 80 e8 37 e_xori\. r0,r20,55
+0+0000118 <middle_label>:
+ 118: 04 7f se_add r31,r7
+ 11a: 21 ec se_addi r28,31
+ 11c: 46 10 se_and r0,r1
+ 11e: 47 01 se_and\. r1,r0
+ 120: 45 32 se_andc r2,r3
+ 122: 2f 14 se_andi r4,17
+ 124: e8 fa se_b 118 <middle_label>
+ 126: e9 00 se_bl 126 <middle_label\+0xe>
+ 126: R_PPC_VLE_REL8 extern_subr
+ 128: e7 14 se_bso 150 <not_end_label>
+ 12a: 61 2b se_bclri r27,18
+ 12c: 00 06 se_bctr
+ 12e: 00 07 se_bctrl
+ 130: 63 17 se_bgeni r7,17
+ 132: 00 04 se_blr
+ 134: 00 05 se_blrl
+ 136: 2c 06 se_bmaski r6,0
+ 138: 64 10 se_bseti r0,1
+ 13a: 66 74 se_btsti r4,7
+ 13c: 0c 10 se_cmp r0,r1
+ 13e: 0e cf se_cmph r31,r28
+ 140: 0f 91 se_cmphl r1,r25
+ 142: 2b 63 se_cmpi r3,22
+ 144: 0d 76 se_cmpl r6,r7
+ 146: 22 bc se_cmpli r28,12
+ 148: 00 d1 se_extsb r1
+ 14a: 00 f2 se_extsh r2
+ 14c: 00 ce se_extzb r30
+ 14e: 00 e8 se_extzh r24
+0+0000150 <not_end_label>:
+ 150: 00 00 se_illegal
+ 152: 00 01 se_isync
+ 154: 88 18 se_lbz r1,8\(r24\)
+ 156: a9 84 se_lhz r24,18\(r4\)
+ 158: 4c f4 se_li r4,79
+ 15a: cf 60 se_lwz r6,60\(r0\)
+ 15c: 03 07 se_mfar r7,r8
+ 15e: 00 a3 se_mfctr r3
+ 160: 00 84 se_mflr r4
+ 162: 01 0f se_mr r31,r0
+ 164: 02 2f se_mtar r23,r2
+ 166: 00 b6 se_mtctr r6
+ 168: 00 9f se_mtlr r31
+ 16a: 05 43 se_mullw r3,r4
+ 16c: 00 38 se_neg r24
+ 16e: 00 29 se_not r25
+ 170: 44 10 se_or r0,r1
+ 172: 00 09 se_rfci
+ 174: 00 0a se_rfdi
+ 176: 00 08 se_rfi
+ 178: 00 02 se_sc
+ 17a: 42 65 se_slw r5,r6
+ 17c: 6c 77 se_slwi r7,7
+ 17e: 41 e6 se_sraw r6,r30
+ 180: 6a 89 se_srawi r25,8
+ 182: 40 0e se_srw r30,r0
+ 184: 69 9d se_srwi r29,25
+ 186: 9a 02 se_stb r0,10\(r2\)
+ 188: b6 1e se_sth r1,12\(r30\)
+ 18a: d0 7d se_stw r7,0\(r29\)
+ 18c: 06 21 se_sub r1,r2
+ 18e: 07 ad se_subf r29,r26
+ 190: 25 77 se_subi r7,24
+0+0000192 <end_label>:
+ 192: 27 29 se_subi\. r25,19
+ 194: e9 c2 se_bl 118 <middle_label>
+ 196: 79 ff ff 82 e_b 118 <middle_label>
+ 19a: 79 ff fe 67 e_bl 0 <start_label>
diff --git a/gas/testsuite/gas/ppc/vle.s b/gas/testsuite/gas/ppc/vle.s
new file mode 100755
index 0000000..698d618
--- /dev/null
+++ b/gas/testsuite/gas/ppc/vle.s
@@ -0,0 +1,184 @@
+# Freescale PowerPC VLE instruction tests
+#as: -mvle
+ .section .text
+ .extern extern_subr
+ .equ UI8,0x37
+ .equ SCI0,UI8<<0
+ .equ SCI1,UI8<<8
+ .equ SCI2,UI8<<16
+ .equ SCI3,UI8<<24
+ .equ r0,0
+ .equ r1,1
+ .equ r2,2
+ .equ r3,3
+ .equ r4,4
+ .equ r5,5
+ .equ r6,6
+ .equ r7,7
+ .equ r8,8
+ .equ r9,9
+ .equ r10,10
+ .equ r11,11
+ .equ r12,12
+ .equ r13,13
+ .equ r14,14
+ .equ r15,15
+ .equ r16,16
+ .equ r17,17
+ .equ r18,18
+ .equ r19,19
+ .equ r20,20
+ .equ r21,21
+ .equ r22,22
+ .equ r23,23
+ .equ r24,24
+ .equ r25,25
+ .equ r26,26
+ .equ r27,27
+ .equ r28,28
+ .equ r29,29
+ .equ r30,30
+ .equ r31,31
+ .equ r32,32
+ .equ rsp,r1
+
+
+start_label:
+ e_add16i r4,r3,27
+ e_add2i. r0,0x3456
+ e_add2is r1,0x4321
+ e_addi. r2,r6,SCI0
+ e_addi r3,r5,SCI1
+ e_addic. r4,r4,SCI2
+ e_addic r7,r8,SCI3
+ e_and2i. r9,0xfeed
+ e_and2is. r10,5
+ e_andi. r11,r13,0x39
+ e_andi r12,r15,SCI2
+ e_b middle_label
+ e_bl extern_subr
+ e_bc 0,3,start_label
+ e_bcl 1,15,extern_subr
+ e_cmp16i r2,0x3333
+ e_cmpi 2,r6,SCI1
+ e_cmph 1,r7,r11
+ e_cmph16i r12,0xfdef
+ e_cmphl 0,r6,r8
+ e_cmphl16i r13,0x1234
+ e_cmpl16i r1, 0xfee0
+ e_cmpli 1,r3,SCI3
+ e_crand 0x1d,3,0
+ e_crandc 0,2,0x1d
+ e_creqv 15,16,17
+ e_crnand 0xf,0,3
+ e_crnor 0xf,0,3
+ e_cror 12,13,14
+ e_crorc 19,18,17
+ e_crxor 0,0,0
+ e_lbz r7,0xffffcc0d(r3)
+ e_lbzu r7,-52(r5)
+ e_lha r8,0x1ff(r10)
+ e_lhau r8,-1(r1)
+ e_lhz r7,6200(r0)
+ e_lhzu r7,62(r0)
+ e_li r0,0x33333
+ e_lis r1,0x3333
+ e_lmw r5,24(r3)
+ e_lwz r5,10024(r3)
+ e_lwzu r6,0x72(r2)
+ e_mcrf 1,6
+ e_mulli r9,r10,SCI0
+ e_mull2i r1,0x668
+ e_or2i r5,0x2345
+ e_or2is r5,0xa345
+ e_ori. r7,r9,SCI0
+ e_ori r7,r8,SCI1
+ e_rlw r18, r22,r0
+ e_rlw. r8, r2,r0
+ e_rlwi r20,r3,21
+ e_rlwi. r2,r3,21
+ e_rlwimi r4,r19,13,8,15
+ e_rlwinm r4,r1,13,1,17
+ e_slwi r12,r19,6
+ e_slwi. r12,r10,20
+ e_srwi r0,r1,16
+ e_srwi. r0,r1,11
+ e_stb r3,22000(r1)
+ e_stbu r19,-4(r22)
+ e_sth r0,666(r21)
+ e_sthu r1,-1(r23)
+ e_stmw r0,4(r3)
+ e_stw r3,16161(r0)
+ e_stwu r22,0xffffffee(r4)
+ e_subfic r0,r21,SCI2
+ e_subfic. r22,r0,SCI3
+ e_xori r21,r3,SCI1
+ e_xori. r0,r20,SCI0
+middle_label:
+ se_add r31,r7
+ se_addi r28,0x1f
+ se_and r0,r1
+ se_and. r1,r0
+ se_andc r2, r3
+ se_andi r4,0x11
+ se_b middle_label
+ se_bl extern_subr
+ se_bc 1,3,not_end_label
+ se_bclri r27,0x12
+ se_bctr
+ se_bctrl
+ se_bgeni r7,17
+ se_blr
+ se_blrl
+ se_bmaski r6,0
+ se_bseti r0,1
+ se_btsti r4,7
+ se_cmp r0,r1
+ se_cmph r31,r28
+ se_cmphl r1,r25
+ se_cmpi r3,22
+ se_cmpl r6,r7
+ se_cmpli r28,0xc
+ se_extsb r1
+ se_extsh r2
+ se_extzb r30
+ se_extzh r24
+not_end_label:
+ se_illegal
+ se_isync
+ se_lbz r1,8(r24)
+ se_lhz r24,18(r4)
+ se_li r4,0x4f
+ se_lwz r6,60(r0)
+ se_mfar r7,r8
+ se_mfctr r3
+ se_mflr r4
+ se_mr r31,r0
+ se_mtar r23,r2
+ se_mtctr r6
+ se_mtlr r31
+ se_mullw r3,r4
+ se_neg r24
+ se_not r25
+ se_or r0,r1
+ se_rfci
+ se_rfdi
+ se_rfi
+ se_sc
+ se_slw r5,r6
+ se_slwi r7,7
+ se_sraw r6,r30
+ se_srawi r25,8
+ se_srw r30,r0
+ se_srwi r29,25
+ se_stb r0,10(r2)
+ se_sth r1,12(r30)
+ se_stw r7,0(r29)
+ se_sub r1,r2
+ se_subf r29,r26
+ se_subi r7,24
+end_label:
+ se_subi. r25,19
+ se_bl middle_label
+ e_b middle_label
+ e_bl start_label
diff --git a/gas/testsuite/gas/sh/sh64/case-1.d b/gas/testsuite/gas/sh/sh64/case-1.d
index adf51cb..8d1d009 100644
--- a/gas/testsuite/gas/sh/sh64/case-1.d
+++ b/gas/testsuite/gas/sh/sh64/case-1.d
@@ -10,14 +10,14 @@
[ ]+0:[ ]+6ff0fff0[ ]+nop
[ ]+4:[ ]+6ff0fff0[ ]+nop
[ ]+8:[ ]+cc000190[ ]+movi 0,r25
-[ ]+8:[ ]+R_SH_IMM_MEDLOW16_PCREL foo\+0xf*ff8
+[ ]+8:[ ]+R_SH_IMM_MEDLOW16_PCREL foo-0x8
[ ]+c:[ ]+c8000190[ ]+shori 0,r25
-[ ]+c:[ ]+R_SH_IMM_LOW16_PCREL foo\+0xf*ffc
+[ ]+c:[ ]+R_SH_IMM_LOW16_PCREL foo-0x4
[ ]+10:[ ]+6bf56440[ ]+ptrel/u r25,tr4
[ ]+14:[ ]+cc000190[ ]+movi 0,r25
-[ ]+14:[ ]+R_SH_IMM_MEDLOW16_PCREL bar\+0xf*ff8
+[ ]+14:[ ]+R_SH_IMM_MEDLOW16_PCREL bar-0x8
[ ]+18:[ ]+c8000190[ ]+shori 0,r25
-[ ]+18:[ ]+R_SH_IMM_LOW16_PCREL bar\+0xf*ffc
+[ ]+18:[ ]+R_SH_IMM_LOW16_PCREL bar-0x4
[ ]+1c:[ ]+6bf56630[ ]+ptrel/l r25,tr3
[ ]+20:[ ]+cc00a820[ ]+movi 42,r2
[ ]+24:[ ]+ebffde20[ ]+pta/l 0 <start>,tr2
diff --git a/gas/testsuite/gas/sh/sh64/mix-1.d b/gas/testsuite/gas/sh/sh64/mix-1.d
index 86c0cf3..45fbefb 100644
--- a/gas/testsuite/gas/sh/sh64/mix-1.d
+++ b/gas/testsuite/gas/sh/sh64/mix-1.d
@@ -19,12 +19,12 @@
0+ <mediacode>:
[ ]+0:[ ]+cc000190[ ]+movi 0,r25
-[ ]+0:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\+0xf*fffffffe
+[ ]+0:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text-0x2
[ ]+4:[ ]+c8000190[ ]+shori 0,r25
[ ]+4:[ ]+R_SH_IMM_LOW16_PCREL \.text\+0x2
[ ]+8:[ ]+6bf56640[ ]+ptrel/l r25,tr4
[ ]+c:[ ]+cc000190[ ]+movi 0,r25
-[ ]+c:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\+0xf*fffffffc
+[ ]+c:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text-0x4
[ ]+10:[ ]+c8000190[ ]+shori 0,r25
[ ]+10:[ ]+R_SH_IMM_LOW16_PCREL \.text
[ ]+14:[ ]+6bf56650[ ]+ptrel/l r25,tr5
diff --git a/gas/testsuite/gas/sh/sh64/pt32-1.d b/gas/testsuite/gas/sh/sh64/pt32-1.d
index f9610eb..0b738a7 100644
--- a/gas/testsuite/gas/sh/sh64/pt32-1.d
+++ b/gas/testsuite/gas/sh/sh64/pt32-1.d
@@ -16,7 +16,7 @@
[ ]+8:[ ]+ebfffe50[ ]+pta/l 4 <start1>,tr5
[ ]+c:[ ]+6ff0fff0[ ]+nop
[ ]+10:[ ]+cc000190[ ]+movi 0,r25
-[ ]+10:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\.other\+0xf*fffffffd
+[ ]+10:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\.other-0x3
[ ]+14:[ ]+c8000190[ ]+shori 0,r25
[ ]+14:[ ]+R_SH_IMM_LOW16_PCREL \.text\.other\+0x1
[ ]+18:[ ]+6bf56670[ ]+ptrel/l r25,tr7
diff --git a/gas/testsuite/gas/sh/sh64/pt64-1.d b/gas/testsuite/gas/sh/sh64/pt64-1.d
index 9303c4f..b0b61ca 100644
--- a/gas/testsuite/gas/sh/sh64/pt64-1.d
+++ b/gas/testsuite/gas/sh/sh64/pt64-1.d
@@ -16,11 +16,11 @@
[ ]+8:[ ]+ebfffe50[ ]+pta/l 4 <start1>,tr5
[ ]+c:[ ]+6ff0fff0[ ]+nop
[ ]+10:[ ]+cc000190[ ]+movi 0,r25
-[ ]+10:[ ]+R_SH_IMM_HI16_PCREL \.text\.other\+0xfffffffffffffff5
+[ ]+10:[ ]+R_SH_IMM_HI16_PCREL \.text\.other-0xb
[ ]+14:[ ]+c8000190[ ]+shori 0,r25
-[ ]+14:[ ]+R_SH_IMM_MEDHI16_PCREL \.text\.other\+0xfffffffffffffff9
+[ ]+14:[ ]+R_SH_IMM_MEDHI16_PCREL \.text\.other-0x7
[ ]+18:[ ]+c8000190[ ]+shori 0,r25
-[ ]+18:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\.other\+0xfffffffffffffffd
+[ ]+18:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\.other-0x3
[ ]+1c:[ ]+c8000190[ ]+shori 0,r25
[ ]+1c:[ ]+R_SH_IMM_LOW16_PCREL \.text\.other\+0x1
[ ]+20:[ ]+6bf56670[ ]+ptrel/l r25,tr7
@@ -36,9 +36,9 @@
0+c <start3>:
[ ]+c:[ ]+cc000190[ ]+movi 0,r25
-[ ]+c:[ ]+R_SH_IMM_HI16_PCREL \.text\+0xfffffffffffffff9
+[ ]+c:[ ]+R_SH_IMM_HI16_PCREL \.text-0x7
[ ]+10:[ ]+c8000190[ ]+shori 0,r25
-[ ]+10:[ ]+R_SH_IMM_MEDHI16_PCREL \.text\+0xfffffffffffffffd
+[ ]+10:[ ]+R_SH_IMM_MEDHI16_PCREL \.text-0x3
[ ]+14:[ ]+c8000190[ ]+shori 0,r25
[ ]+14:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\+0x1
[ ]+18:[ ]+c8000190[ ]+shori 0,r25
diff --git a/gas/testsuite/gas/sh/sh64/pt64-32-2.d b/gas/testsuite/gas/sh/sh64/pt64-32-2.d
index 1aee7bf..096f4eb 100644
--- a/gas/testsuite/gas/sh/sh64/pt64-32-2.d
+++ b/gas/testsuite/gas/sh/sh64/pt64-32-2.d
@@ -16,7 +16,7 @@
[ ]+8:[ ]+ebfffe50[ ]+pta/l 4 <start1>,tr5
[ ]+c:[ ]+6ff0fff0[ ]+nop
[ ]+10:[ ]+cc000190[ ]+movi 0,r25
-[ ]+10:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\.other\+0xfffffffffffffffd
+[ ]+10:[ ]+R_SH_IMM_MEDLOW16_PCREL \.text\.other-0x3
[ ]+14:[ ]+c8000190[ ]+shori 0,r25
[ ]+14:[ ]+R_SH_IMM_LOW16_PCREL \.text\.other\+0x1
[ ]+18:[ ]+6bf56670[ ]+ptrel/l r25,tr7
diff --git a/gas/testsuite/gas/sh/sh64/rel32-2.d b/gas/testsuite/gas/sh/sh64/rel32-2.d
index 5bafc68..314f2ca 100644
--- a/gas/testsuite/gas/sh/sh64/rel32-2.d
+++ b/gas/testsuite/gas/sh/sh64/rel32-2.d
@@ -19,21 +19,21 @@
0+44 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+28
0+48 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+28
0+4c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+24
-0+58 R_SH_IMM_LOW16_PCREL extern2\+0xf*ffffffff
-0+5c R_SH_IMM_LOW16_PCREL extern3\+0xf*ffffffff
-0+60 R_SH_IMM_MEDLOW16_PCREL extern4\+0xf*ffffffff
+0+58 R_SH_IMM_LOW16_PCREL extern2-0x0+1
+0+5c R_SH_IMM_LOW16_PCREL extern3-0x0+1
+0+60 R_SH_IMM_MEDLOW16_PCREL extern4-0x0+1
0+6c R_SH_IMM_LOW16_PCREL extern6\+0x0+f
0+70 R_SH_IMM_LOW16_PCREL extern7\+0x0+b
0+74 R_SH_IMM_MEDLOW16_PCREL extern8\+0x0+3
-0+80 R_SH_IMM_LOW16_PCREL gdata2\+0xf*ffffffff
-0+84 R_SH_IMM_LOW16_PCREL gdata3\+0xf*ffffffff
-0+88 R_SH_IMM_MEDLOW16_PCREL gdata4\+0xf*ffffffff
+0+80 R_SH_IMM_LOW16_PCREL gdata2-0x0+1
+0+84 R_SH_IMM_LOW16_PCREL gdata3-0x0+1
+0+88 R_SH_IMM_MEDLOW16_PCREL gdata4-0x0+1
0+94 R_SH_IMM_LOW16_PCREL gdata6\+0x0+f
0+98 R_SH_IMM_LOW16_PCREL gdata7\+0x0+b
0+9c R_SH_IMM_MEDLOW16_PCREL gdata8\+0x0+3
-0+a8 R_SH_IMM_LOW16_PCREL gothertext2\+0xf*ffffffff
-0+ac R_SH_IMM_LOW16_PCREL gothertext3\+0xf*ffffffff
-0+b0 R_SH_IMM_MEDLOW16_PCREL gothertext4\+0xf*ffffffff
+0+a8 R_SH_IMM_LOW16_PCREL gothertext2-0x0+1
+0+ac R_SH_IMM_LOW16_PCREL gothertext3-0x0+1
+0+b0 R_SH_IMM_MEDLOW16_PCREL gothertext4-0x0+1
0+bc R_SH_IMM_LOW16_PCREL gothertext6\+0x0+f
0+c0 R_SH_IMM_LOW16_PCREL gothertext7\+0x0+b
0+c4 R_SH_IMM_MEDLOW16_PCREL gothertext8\+0x0+3
@@ -45,15 +45,15 @@
0+2c R_SH_IMM_LOW16_PCREL \.othertext\+0x0+8
0+3c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+1c
0+40 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+20
-0+50 R_SH_IMM_MEDLOW16_PCREL extern1\+0xf*ffffffff
+0+50 R_SH_IMM_MEDLOW16_PCREL extern1-0x0+1
0+54 R_SH_IMM_LOW16_PCREL extern1\+0x0+3
0+64 R_SH_IMM_MEDLOW16_PCREL extern5\+0x0+7
0+68 R_SH_IMM_LOW16_PCREL extern5\+0x0+b
-0+78 R_SH_IMM_MEDLOW16_PCREL gdata1\+0xf*ffffffff
+0+78 R_SH_IMM_MEDLOW16_PCREL gdata1-0x0+1
0+7c R_SH_IMM_LOW16_PCREL gdata1\+0x0+3
0+8c R_SH_IMM_MEDLOW16_PCREL gdata5\+0x0+7
0+90 R_SH_IMM_LOW16_PCREL gdata5\+0x0+b
-0+a0 R_SH_IMM_MEDLOW16_PCREL gothertext1\+0xf*ffffffff
+0+a0 R_SH_IMM_MEDLOW16_PCREL gothertext1-0x0+1
0+a4 R_SH_IMM_LOW16_PCREL gothertext1\+0x0+3
0+b4 R_SH_IMM_MEDLOW16_PCREL gothertext5\+0x0+7
0+b8 R_SH_IMM_LOW16_PCREL gothertext5\+0x0+b
diff --git a/gas/testsuite/gas/sh/sh64/rel32-4.d b/gas/testsuite/gas/sh/sh64/rel32-4.d
index 496edb8..29d716a 100644
--- a/gas/testsuite/gas/sh/sh64/rel32-4.d
+++ b/gas/testsuite/gas/sh/sh64/rel32-4.d
@@ -19,21 +19,21 @@
0+44 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+27
0+48 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+27
0+4c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+23
-0+58 R_SH_IMM_LOW16_PCREL extern2\+0xf*ffffffff
-0+5c R_SH_IMM_LOW16_PCREL extern3\+0xf*ffffffff
-0+60 R_SH_IMM_MEDLOW16_PCREL extern4\+0xf*ffffffff
+0+58 R_SH_IMM_LOW16_PCREL extern2-0x0+1
+0+5c R_SH_IMM_LOW16_PCREL extern3-0x0+1
+0+60 R_SH_IMM_MEDLOW16_PCREL extern4-0x0+1
0+6c R_SH_IMM_LOW16_PCREL extern6\+0x0+f
0+70 R_SH_IMM_LOW16_PCREL extern7\+0x0+b
0+74 R_SH_IMM_MEDLOW16_PCREL extern8\+0x0+3
-0+80 R_SH_IMM_LOW16_PCREL gdata2\+0xf*ffffffff
-0+84 R_SH_IMM_LOW16_PCREL gdata3\+0xf*ffffffff
-0+88 R_SH_IMM_MEDLOW16_PCREL gdata4\+0xf*ffffffff
+0+80 R_SH_IMM_LOW16_PCREL gdata2-0x0+1
+0+84 R_SH_IMM_LOW16_PCREL gdata3-0x0+1
+0+88 R_SH_IMM_MEDLOW16_PCREL gdata4-0x0+1
0+94 R_SH_IMM_LOW16_PCREL gdata6\+0x0+f
0+98 R_SH_IMM_LOW16_PCREL gdata7\+0x0+b
0+9c R_SH_IMM_MEDLOW16_PCREL gdata8\+0x0+3
-0+a8 R_SH_IMM_LOW16_PCREL gothertext2\+0xf*ffffffff
-0+ac R_SH_IMM_LOW16_PCREL gothertext3\+0xf*ffffffff
-0+b0 R_SH_IMM_MEDLOW16_PCREL gothertext4\+0xf*ffffffff
+0+a8 R_SH_IMM_LOW16_PCREL gothertext2-0x0+1
+0+ac R_SH_IMM_LOW16_PCREL gothertext3-0x0+1
+0+b0 R_SH_IMM_MEDLOW16_PCREL gothertext4-0x0+1
0+bc R_SH_IMM_LOW16_PCREL gothertext6\+0x0+f
0+c0 R_SH_IMM_LOW16_PCREL gothertext7\+0x0+b
0+c4 R_SH_IMM_MEDLOW16_PCREL gothertext8\+0x0+3
@@ -45,15 +45,15 @@
0+2c R_SH_IMM_LOW16_PCREL \.othertext\+0x0+7
0+3c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+1b
0+40 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+1f
-0+50 R_SH_IMM_MEDLOW16_PCREL extern1\+0xf*ffffffff
+0+50 R_SH_IMM_MEDLOW16_PCREL extern1-0x0+1
0+54 R_SH_IMM_LOW16_PCREL extern1\+0x0+3
0+64 R_SH_IMM_MEDLOW16_PCREL extern5\+0x0+7
0+68 R_SH_IMM_LOW16_PCREL extern5\+0x0+b
-0+78 R_SH_IMM_MEDLOW16_PCREL gdata1\+0xf*ffffffff
+0+78 R_SH_IMM_MEDLOW16_PCREL gdata1-0x0+1
0+7c R_SH_IMM_LOW16_PCREL gdata1\+0x0+3
0+8c R_SH_IMM_MEDLOW16_PCREL gdata5\+0x0+7
0+90 R_SH_IMM_LOW16_PCREL gdata5\+0x0+b
-0+a0 R_SH_IMM_MEDLOW16_PCREL gothertext1\+0xf*ffffffff
+0+a0 R_SH_IMM_MEDLOW16_PCREL gothertext1-0x0+1
0+a4 R_SH_IMM_LOW16_PCREL gothertext1\+0x0+3
0+b4 R_SH_IMM_MEDLOW16_PCREL gothertext5\+0x0+7
0+b8 R_SH_IMM_LOW16_PCREL gothertext5\+0x0+b
diff --git a/gas/testsuite/gas/sh/sh64/rel64-2.d b/gas/testsuite/gas/sh/sh64/rel64-2.d
index eaecfbb..7d5ca54 100644
--- a/gas/testsuite/gas/sh/sh64/rel64-2.d
+++ b/gas/testsuite/gas/sh/sh64/rel64-2.d
@@ -19,21 +19,21 @@
0+64 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+28
0+68 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+28
0+6c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+24
-0+80 R_SH_IMM_LOW16_PCREL extern2\+0xffffffffffffffff
-0+84 R_SH_IMM_LOW16_PCREL extern3\+0xffffffffffffffff
-0+88 R_SH_IMM_MEDLOW16_PCREL extern4\+0xffffffffffffffff
+0+80 R_SH_IMM_LOW16_PCREL extern2-0x0+1
+0+84 R_SH_IMM_LOW16_PCREL extern3-0x0+1
+0+88 R_SH_IMM_MEDLOW16_PCREL extern4-0x0+1
0+9c R_SH_IMM_LOW16_PCREL extern6\+0x0+f
0+a0 R_SH_IMM_LOW16_PCREL extern7\+0x0+b
0+a4 R_SH_IMM_MEDLOW16_PCREL extern8\+0x0+3
-0+b8 R_SH_IMM_LOW16_PCREL gdata2\+0xffffffffffffffff
-0+bc R_SH_IMM_LOW16_PCREL gdata3\+0xffffffffffffffff
-0+c0 R_SH_IMM_MEDLOW16_PCREL gdata4\+0xffffffffffffffff
+0+b8 R_SH_IMM_LOW16_PCREL gdata2-0x0+1
+0+bc R_SH_IMM_LOW16_PCREL gdata3-0x0+1
+0+c0 R_SH_IMM_MEDLOW16_PCREL gdata4-0x0+1
0+d4 R_SH_IMM_LOW16_PCREL gdata6\+0x0+f
0+d8 R_SH_IMM_LOW16_PCREL gdata7\+0x0+b
0+dc R_SH_IMM_MEDLOW16_PCREL gdata8\+0x0+3
-0+f0 R_SH_IMM_LOW16_PCREL gothertext2\+0xffffffffffffffff
-0+f4 R_SH_IMM_LOW16_PCREL gothertext3\+0xffffffffffffffff
-0+f8 R_SH_IMM_MEDLOW16_PCREL gothertext4\+0xffffffffffffffff
+0+f0 R_SH_IMM_LOW16_PCREL gothertext2-0x0+1
+0+f4 R_SH_IMM_LOW16_PCREL gothertext3-0x0+1
+0+f8 R_SH_IMM_MEDLOW16_PCREL gothertext4-0x0+1
0+10c R_SH_IMM_LOW16_PCREL gothertext6\+0x0+f
0+110 R_SH_IMM_LOW16_PCREL gothertext7\+0x0+b
0+114 R_SH_IMM_MEDLOW16_PCREL gothertext8\+0x0+3
@@ -53,7 +53,7 @@
0+58 R_SH_IMM_MEDHI16_PCREL \.othertext\+0x0+20
0+5c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+24
0+60 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+28
-0+70 R_SH_IMM_HI16_PCREL extern1\+0xffffffffffffffff
+0+70 R_SH_IMM_HI16_PCREL extern1-0x0+1
0+74 R_SH_IMM_MEDHI16_PCREL extern1\+0x0+3
0+78 R_SH_IMM_MEDLOW16_PCREL extern1\+0x0+7
0+7c R_SH_IMM_LOW16_PCREL extern1\+0x0+b
@@ -61,7 +61,7 @@
0+90 R_SH_IMM_MEDHI16_PCREL extern5\+0x0+b
0+94 R_SH_IMM_MEDLOW16_PCREL extern5\+0x0+f
0+98 R_SH_IMM_LOW16_PCREL extern5\+0x0+13
-0+a8 R_SH_IMM_HI16_PCREL gdata1\+0xffffffffffffffff
+0+a8 R_SH_IMM_HI16_PCREL gdata1-0x0+1
0+ac R_SH_IMM_MEDHI16_PCREL gdata1\+0x0+3
0+b0 R_SH_IMM_MEDLOW16_PCREL gdata1\+0x0+7
0+b4 R_SH_IMM_LOW16_PCREL gdata1\+0x0+b
@@ -69,7 +69,7 @@
0+c8 R_SH_IMM_MEDHI16_PCREL gdata5\+0x0+b
0+cc R_SH_IMM_MEDLOW16_PCREL gdata5\+0x0+f
0+d0 R_SH_IMM_LOW16_PCREL gdata5\+0x0+13
-0+e0 R_SH_IMM_HI16_PCREL gothertext1\+0xffffffffffffffff
+0+e0 R_SH_IMM_HI16_PCREL gothertext1-0x0+1
0+e4 R_SH_IMM_MEDHI16_PCREL gothertext1\+0x0+3
0+e8 R_SH_IMM_MEDLOW16_PCREL gothertext1\+0x0+7
0+ec R_SH_IMM_LOW16_PCREL gothertext1\+0x0+b
diff --git a/gas/testsuite/gas/sh/sh64/rel64-4.d b/gas/testsuite/gas/sh/sh64/rel64-4.d
index 6ee35b7..0a3e48e 100644
--- a/gas/testsuite/gas/sh/sh64/rel64-4.d
+++ b/gas/testsuite/gas/sh/sh64/rel64-4.d
@@ -19,21 +19,21 @@
0+64 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+27
0+68 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+27
0+6c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+23
-0+80 R_SH_IMM_LOW16_PCREL extern2\+0xffffffffffffffff
-0+84 R_SH_IMM_LOW16_PCREL extern3\+0xffffffffffffffff
-0+88 R_SH_IMM_MEDLOW16_PCREL extern4\+0xffffffffffffffff
+0+80 R_SH_IMM_LOW16_PCREL extern2-0x0+1
+0+84 R_SH_IMM_LOW16_PCREL extern3-0x0+1
+0+88 R_SH_IMM_MEDLOW16_PCREL extern4-0x0+1
0+9c R_SH_IMM_LOW16_PCREL extern6\+0x0+f
0+a0 R_SH_IMM_LOW16_PCREL extern7\+0x0+b
0+a4 R_SH_IMM_MEDLOW16_PCREL extern8\+0x0+3
-0+b8 R_SH_IMM_LOW16_PCREL gdata2\+0xffffffffffffffff
-0+bc R_SH_IMM_LOW16_PCREL gdata3\+0xffffffffffffffff
-0+c0 R_SH_IMM_MEDLOW16_PCREL gdata4\+0xffffffffffffffff
+0+b8 R_SH_IMM_LOW16_PCREL gdata2-0x0+1
+0+bc R_SH_IMM_LOW16_PCREL gdata3-0x0+1
+0+c0 R_SH_IMM_MEDLOW16_PCREL gdata4-0x0+1
0+d4 R_SH_IMM_LOW16_PCREL gdata6\+0x0+f
0+d8 R_SH_IMM_LOW16_PCREL gdata7\+0x0+b
0+dc R_SH_IMM_MEDLOW16_PCREL gdata8\+0x0+3
-0+f0 R_SH_IMM_LOW16_PCREL gothertext2\+0xffffffffffffffff
-0+f4 R_SH_IMM_LOW16_PCREL gothertext3\+0xffffffffffffffff
-0+f8 R_SH_IMM_MEDLOW16_PCREL gothertext4\+0xffffffffffffffff
+0+f0 R_SH_IMM_LOW16_PCREL gothertext2-0x0+1
+0+f4 R_SH_IMM_LOW16_PCREL gothertext3-0x0+1
+0+f8 R_SH_IMM_MEDLOW16_PCREL gothertext4-0x0+1
0+10c R_SH_IMM_LOW16_PCREL gothertext6\+0x0+f
0+110 R_SH_IMM_LOW16_PCREL gothertext7\+0x0+b
0+114 R_SH_IMM_MEDLOW16_PCREL gothertext8\+0x0+3
@@ -53,7 +53,7 @@
0+58 R_SH_IMM_MEDHI16_PCREL \.othertext\+0x0+1f
0+5c R_SH_IMM_MEDLOW16_PCREL \.othertext\+0x0+23
0+60 R_SH_IMM_LOW16_PCREL \.othertext\+0x0+27
-0+70 R_SH_IMM_HI16_PCREL extern1\+0xffffffffffffffff
+0+70 R_SH_IMM_HI16_PCREL extern1-0x0+1
0+74 R_SH_IMM_MEDHI16_PCREL extern1\+0x0+3
0+78 R_SH_IMM_MEDLOW16_PCREL extern1\+0x0+7
0+7c R_SH_IMM_LOW16_PCREL extern1\+0x0+b
@@ -61,7 +61,7 @@
0+90 R_SH_IMM_MEDHI16_PCREL extern5\+0x0+b
0+94 R_SH_IMM_MEDLOW16_PCREL extern5\+0x0+f
0+98 R_SH_IMM_LOW16_PCREL extern5\+0x0+13
-0+a8 R_SH_IMM_HI16_PCREL gdata1\+0xffffffffffffffff
+0+a8 R_SH_IMM_HI16_PCREL gdata1-0x0+1
0+ac R_SH_IMM_MEDHI16_PCREL gdata1\+0x0+3
0+b0 R_SH_IMM_MEDLOW16_PCREL gdata1\+0x0+7
0+b4 R_SH_IMM_LOW16_PCREL gdata1\+0x0+b
@@ -69,7 +69,7 @@
0+c8 R_SH_IMM_MEDHI16_PCREL gdata5\+0x0+b
0+cc R_SH_IMM_MEDLOW16_PCREL gdata5\+0x0+f
0+d0 R_SH_IMM_LOW16_PCREL gdata5\+0x0+13
-0+e0 R_SH_IMM_HI16_PCREL gothertext1\+0xffffffffffffffff
+0+e0 R_SH_IMM_HI16_PCREL gothertext1-0x0+1
0+e4 R_SH_IMM_MEDHI16_PCREL gothertext1\+0x0+3
0+e8 R_SH_IMM_MEDLOW16_PCREL gothertext1\+0x0+7
0+ec R_SH_IMM_LOW16_PCREL gothertext1\+0x0+b
diff --git a/gas/testsuite/gas/tic6x/data-reloc.d b/gas/testsuite/gas/tic6x/data-reloc.d
index 73ea64d..8a5dc0b 100644
--- a/gas/testsuite/gas/tic6x/data-reloc.d
+++ b/gas/testsuite/gas/tic6x/data-reloc.d
@@ -8,6 +8,6 @@
0+00 R_C6000_ABS32 +ext1
0+04 R_C6000_ABS32 +ext1\+0x0+04
0+08 R_C6000_ABS16 +ext2
-0+0a R_C6000_ABS16 +ext2\+0xf+fe
+0+0a R_C6000_ABS16 +ext2-0x0+2
0+0c R_C6000_ABS8 +ext3
0+0d R_C6000_ABS8 +ext3\+0x0+01
diff --git a/gas/testsuite/gas/tic6x/pcr-relocs.d b/gas/testsuite/gas/tic6x/pcr-relocs.d
index 893def2..6787fdc 100644
--- a/gas/testsuite/gas/tic6x/pcr-relocs.d
+++ b/gas/testsuite/gas/tic6x/pcr-relocs.d
@@ -11,21 +11,21 @@
0+0c <[^>]*> 004003e2[ \t]+mvc \.S2 pce1,b0
0+10 <[^>]*> 01000264[ \t]+ldw \.D1T1 \*\+a0\(0\),a2
0+14 <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2
-[ \t]+14: R_C6000_PCR_L16 S0\+0xfffffff4
+[ \t]+14: R_C6000_PCR_L16 S0-0xc
0+18 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2
-[ \t]+18: R_C6000_PCR_H16 S0\+0xfffffff4
+[ \t]+18: R_C6000_PCR_H16 S0-0xc
0+1c <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2
-[ \t]+1c: R_C6000_PCR_L16 S0\+0xffffffc8
+[ \t]+1c: R_C6000_PCR_L16 S0-0x38
0+20 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2
-[ \t]+20: R_C6000_PCR_H16 S0\+0xffffffe8
+[ \t]+20: R_C6000_PCR_H16 S0-0x18
0+24 <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2
[ \t]+24: R_C6000_PCR_L16 S1\+0x14
0+28 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2
[ \t]+28: R_C6000_PCR_H16 S1\+0x14
0+2c <[^>]*> 0100002a[ \t]+mvk \.S2 0,b2
-[ \t]+2c: R_C6000_PCR_L16 S1\+0xffffffe8
+[ \t]+2c: R_C6000_PCR_L16 S1-0x18
0+30 <[^>]*> 0100006a[ \t]+mvkh \.S2 0,b2
-[ \t]+30: R_C6000_PCR_H16 S1\+0xffffffe8
+[ \t]+30: R_C6000_PCR_H16 S1-0x18
0+34 <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1
0+38 <[^>]*> 004003e2[ \t]+mvc \.S2 pce1,b0
0+3c <[^>]*> 00800264[ \t]+ldw \.D1T1 \*\+a0\(0\),a1
diff --git a/gas/testsuite/gas/tic6x/unwind-1.d b/gas/testsuite/gas/tic6x/unwind-1.d
index 1b240f9..bcfe822 100644
--- a/gas/testsuite/gas/tic6x/unwind-1.d
+++ b/gas/testsuite/gas/tic6x/unwind-1.d
@@ -6,94 +6,94 @@
Unwind table index '.c6xabi.exidx' .*
0x0: 0x83020227
- Compact model 3
+ Compact model index: 3
Stack increment 8
Registers restored: A11, B3
Return register: B3
0x100: 0x808003e7
- Compact model 0
+ Compact model index: 0
0x80 0x03 pop {A10, A11}
0xe7 RETURN
0x200: 0x81008863
- Compact model 1
+ Compact model index: 1
0x88 0x63 pop {A10, A11, B3, B10, B15}
0x300: 0x83020227
- Compact model 3
+ Compact model index: 3
Stack increment 8
Registers restored: A11, B3
Return register: B3
0x400: 0x84000227
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A11, B3
Return register: B3
0x500: 0x80a022e7
- Compact model 0
+ Compact model index: 0
0xa0 0x22 pop compact {A11, B3}
0xe7 RETURN
0x600: 0x84000227
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A11, B3
Return register: B3
0x700: 0x84000637
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A10, A11, B3, B10
Return register: B3
0x800: 0x840002d7
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A10, A12, A13, B3
Return register: B3
0x900: 0x84000c07
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) B10, B11
Return register: B3
0xa00: 0x83ff0027
- Compact model 3
+ Compact model index: 3
Restore stack from frame pointer
Registers restored: A11, A15
Return register: B3
0xb00: 0x84ff0027
- Compact model 4
+ Compact model index: 4
Restore stack from frame pointer
Registers restored: \(compact\) A11, A15
Return register: B3
0xc00: 0x8001c1f7
- Compact model 0
+ Compact model index: 0
0x01 sp = sp \+ 16
0xc1 0xf7 pop frame {B3, \[pad\]}
0xd00: @0x.*
- Compact model 1
+ Compact model index: 1
0x01 sp = sp \+ 16
0xc2 0xf7 0xbf pop frame {\[pad\], A11, B3, \[pad\]}
0xe7 RETURN
0xe7 RETURN
0xe00: @0x.*
- Compact model 1
+ Compact model index: 1
0x01 sp = sp \+ 16
0xc2 0xf7 0xfb pop frame {A11, \[pad\], B3, \[pad\]}
0xe7 RETURN
0xe7 RETURN
0xf00: @0x.*
- Compact model 1
+ Compact model index: 1
0x02 sp = sp \+ 24
0xc2 0x7f 0xff 0xfb pop frame {A11, \[pad\], \[pad\], \[pad\], \[pad\], B3}
0xe7 RETURN
diff --git a/gas/testsuite/gas/tic6x/unwind-2.d b/gas/testsuite/gas/tic6x/unwind-2.d
index c022ec4..af5f387 100644
--- a/gas/testsuite/gas/tic6x/unwind-2.d
+++ b/gas/testsuite/gas/tic6x/unwind-2.d
@@ -6,94 +6,94 @@
Unwind table index '.c6xabi.exidx' .*
0x0: 0x83020227
- Compact model 3
+ Compact model index: 3
Stack increment 8
Registers restored: A11, B3
Return register: B3
0x100: 0x808003e7
- Compact model 0
+ Compact model index: 0
0x80 0x03 pop {A10, A11}
0xe7 RETURN
0x200: 0x81008863
- Compact model 1
+ Compact model index: 1
0x88 0x63 pop {A10, A11, B3, B10, B15}
0x300: 0x83020227
- Compact model 3
+ Compact model index: 3
Stack increment 8
Registers restored: A11, B3
Return register: B3
0x400: 0x84000227
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A11, B3
Return register: B3
0x500: 0x80a022e7
- Compact model 0
+ Compact model index: 0
0xa0 0x22 pop compact {A11, B3}
0xe7 RETURN
0x600: 0x84000227
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A11, B3
Return register: B3
0x700: 0x84000637
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A10, A11, B3, B10
Return register: B3
0x800: 0x840002d7
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) A10, A12, A13, B3
Return register: B3
0x900: 0x84000c07
- Compact model 4
+ Compact model index: 4
Stack increment 0
Registers restored: \(compact\) B10, B11
Return register: B3
0xa00: 0x83ff0027
- Compact model 3
+ Compact model index: 3
Restore stack from frame pointer
Registers restored: A11, A15
Return register: B3
0xb00: 0x84ff0027
- Compact model 4
+ Compact model index: 4
Restore stack from frame pointer
Registers restored: \(compact\) A11, A15
Return register: B3
0xc00: 0x8001c1f7
- Compact model 0
+ Compact model index: 0
0x01 sp = sp \+ 16
0xc1 0xf7 pop frame {B3, \[pad\]}
0xd00: @0x.*
- Compact model 1
+ Compact model index: 1
0x01 sp = sp \+ 16
0xc2 0xf7 0xbf pop frame {\[pad\], A11, B3, \[pad\]}
0xe7 RETURN
0xe7 RETURN
0xe00: @0x.*
- Compact model 1
+ Compact model index: 1
0x01 sp = sp \+ 16
0xc2 0xf7 0xfb pop frame {A11, \[pad\], B3, \[pad\]}
0xe7 RETURN
0xe7 RETURN
0xf00: @0x.*
- Compact model 1
+ Compact model index: 1
0x02 sp = sp \+ 24
0xc2 0x7f 0xff 0xfb pop frame {A11, \[pad\], \[pad\], \[pad\], \[pad\], B3}
0xe7 RETURN
diff --git a/gas/testsuite/gas/tic6x/unwind-3.d b/gas/testsuite/gas/tic6x/unwind-3.d
index d03243d..13f5a51 100644
--- a/gas/testsuite/gas/tic6x/unwind-3.d
+++ b/gas/testsuite/gas/tic6x/unwind-3.d
@@ -5,7 +5,7 @@
Unwind table index '.c6xabi.exidx.text.bar' .*
0x0: 0x830e2807
- Compact model 3
+ Compact model index: 3
Stack increment 56
Registers restored: B11, B13
Return register: B3
@@ -13,6 +13,6 @@
Unwind table index '.c6xabi.exidx' .*
0x0: 0x80008021
- Compact model 0
+ Compact model index: 0
0x00 sp = sp \+ 8
0x80 0x21 pop {A10, B3}
diff --git a/gas/testsuite/gas/xstormy16/allinsn.d b/gas/testsuite/gas/xstormy16/allinsn.d
index a96354d..7ede588 100644
--- a/gas/testsuite/gas/xstormy16/allinsn.d
+++ b/gas/testsuite/gas/xstormy16/allinsn.d
@@ -1237,33 +1237,33 @@
9d0: 08 70 00 00 mov\.b r0,\(r0,0\)
9d2: R_XSTORMY16_12 extsym
9d4: ff 71 00 00 mov\.w r7,\(r15,0\)
- 9d6: R_XSTORMY16_12 extsym\+0xffffffff
+ 9d6: R_XSTORMY16_12 extsym-0x1
9d8: 8c 71 00 00 mov\.w r4,\(r8,0\)
- 9da: R_XSTORMY16_12 extsym\+0xfffff800
+ 9da: R_XSTORMY16_12 extsym-0x800
9dc: 7b 70 00 00 mov\.b r3,\(r7,0\)
9de: R_XSTORMY16_12 extsym\+0x7ff
9e0: 19 71 00 00 mov\.w r1,\(r1,0\)
9e2: R_XSTORMY16_12 extsym\+0x1
9e4: 8e 71 00 00 mov\.w r6,\(r8,0\)
- 9e6: R_XSTORMY16_12 extsym\+0xfffffe3c
+ 9e6: R_XSTORMY16_12 extsym-0x1c4
9e8: bc 71 00 00 mov\.w r4,\(r11,0\)
9ea: R_XSTORMY16_12 extsym\+0x23c
9ec: 19 70 00 00 mov\.b r1,\(r1,0\)
- 9ee: R_XSTORMY16_12 extsym\+0xfffff94a
+ 9ee: R_XSTORMY16_12 extsym-0x6b6
000009f0 <movgrgrsipostinc>:
9f0: 08 60 00 00 mov\.b r0,\(r0\+\+,0\)
9f2: R_XSTORMY16_12 extsym
9f4: ff 61 00 00 mov\.w r7,\(r15\+\+,0\)
- 9f6: R_XSTORMY16_12 extsym\+0xffffffff
+ 9f6: R_XSTORMY16_12 extsym-0x1
9f8: 8c 61 00 00 mov\.w r4,\(r8\+\+,0\)
- 9fa: R_XSTORMY16_12 extsym\+0xfffff800
+ 9fa: R_XSTORMY16_12 extsym-0x800
9fc: 7b 60 00 00 mov\.b r3,\(r7\+\+,0\)
9fe: R_XSTORMY16_12 extsym\+0x7ff
a00: 19 61 00 00 mov\.w r1,\(r1\+\+,0\)
a02: R_XSTORMY16_12 extsym\+0x1
a04: 0e 61 00 00 mov\.w r6,\(r0\+\+,0\)
- a06: R_XSTORMY16_12 extsym\+0xffffffc0
+ a06: R_XSTORMY16_12 extsym-0x40
a08: ff 60 00 00 mov\.b r7,\(r15\+\+,0\)
a0a: R_XSTORMY16_12 extsym\+0x424
a0c: 78 60 00 00 mov\.b r0,\(r7\+\+,0\)
@@ -1273,9 +1273,9 @@
a10: 08 68 00 00 mov\.b r0,\(--r0,0\)
a12: R_XSTORMY16_12 extsym
a14: ff 69 00 00 mov\.w r7,\(--r15,0\)
- a16: R_XSTORMY16_12 extsym\+0xffffffff
+ a16: R_XSTORMY16_12 extsym-0x1
a18: 8c 69 00 00 mov\.w r4,\(--r8,0\)
- a1a: R_XSTORMY16_12 extsym\+0xfffff800
+ a1a: R_XSTORMY16_12 extsym-0x800
a1c: 7b 68 00 00 mov\.b r3,\(--r7,0\)
a1e: R_XSTORMY16_12 extsym\+0x7ff
a20: 19 69 00 00 mov\.w r1,\(--r1,0\)
@@ -1285,15 +1285,15 @@
a28: 1e 69 00 00 mov\.w r6,\(--r1,0\)
a2a: R_XSTORMY16_12 extsym\+0x5e2
a2c: 3f 69 00 00 mov\.w r7,\(--r3,0\)
- a2e: R_XSTORMY16_12 extsym\+0xfffff80f
+ a2e: R_XSTORMY16_12 extsym-0x7f1
00000a30 <movgrsigr>:
a30: 08 72 00 00 mov\.b \(r0,0\),r0
a32: R_XSTORMY16_12 extsym
a34: ff 73 00 00 mov\.w \(r15,0\),r7
- a36: R_XSTORMY16_12 extsym\+0xffffffff
+ a36: R_XSTORMY16_12 extsym-0x1
a38: 8c 73 00 00 mov\.w \(r8,0\),r4
- a3a: R_XSTORMY16_12 extsym\+0xfffff800
+ a3a: R_XSTORMY16_12 extsym-0x800
a3c: 7b 72 00 00 mov\.b \(r7,0\),r3
a3e: R_XSTORMY16_12 extsym\+0x7ff
a40: 19 73 00 00 mov\.w \(r1,0\),r1
@@ -1301,7 +1301,7 @@
a44: 7d 73 00 00 mov\.w \(r7,0\),r5
a46: R_XSTORMY16_12 extsym\+0x79c
a48: 3c 72 00 00 mov\.b \(r3,0\),r4
- a4a: R_XSTORMY16_12 extsym\+0xfffffcb4
+ a4a: R_XSTORMY16_12 extsym-0x34c
a4c: f8 73 00 00 mov\.w \(r15,0\),r0
a4e: R_XSTORMY16_12 extsym\+0x6a8
@@ -1309,15 +1309,15 @@
a50: 08 62 00 00 mov\.b \(r0\+\+,0\),r0
a52: R_XSTORMY16_12 extsym
a54: ff 63 00 00 mov\.w \(r15\+\+,0\),r7
- a56: R_XSTORMY16_12 extsym\+0xffffffff
+ a56: R_XSTORMY16_12 extsym-0x1
a58: 8c 63 00 00 mov\.w \(r8\+\+,0\),r4
- a5a: R_XSTORMY16_12 extsym\+0xfffff800
+ a5a: R_XSTORMY16_12 extsym-0x800
a5c: 7b 62 00 00 mov\.b \(r7\+\+,0\),r3
a5e: R_XSTORMY16_12 extsym\+0x7ff
a60: 19 63 00 00 mov\.w \(r1\+\+,0\),r1
a62: R_XSTORMY16_12 extsym\+0x1
a64: 2f 63 00 00 mov\.w \(r2\+\+,0\),r7
- a66: R_XSTORMY16_12 extsym\+0xffffff50
+ a66: R_XSTORMY16_12 extsym-0xb0
a68: 8c 63 00 00 mov\.w \(r8\+\+,0\),r4
a6a: R_XSTORMY16_12 extsym\+0x56d
a6c: 38 62 00 00 mov\.b \(r3\+\+,0\),r0
@@ -1327,9 +1327,9 @@
a70: 08 6a 00 00 mov\.b \(--r0,0\),r0
a72: R_XSTORMY16_12 extsym
a74: ff 6b 00 00 mov\.w \(--r15,0\),r7
- a76: R_XSTORMY16_12 extsym\+0xffffffff
+ a76: R_XSTORMY16_12 extsym-0x1
a78: 8c 6b 00 00 mov\.w \(--r8,0\),r4
- a7a: R_XSTORMY16_12 extsym\+0xfffff800
+ a7a: R_XSTORMY16_12 extsym-0x800
a7c: 7b 6a 00 00 mov\.b \(--r7,0\),r3
a7e: R_XSTORMY16_12 extsym\+0x7ff
a80: 19 6b 00 00 mov\.w \(--r1,0\),r1
@@ -1337,6 +1337,6 @@
a84: 8c 6a 00 00 mov\.b \(--r8,0\),r4
a86: R_XSTORMY16_12 extsym\+0x3ec
a88: ea 6b 00 00 mov\.w \(--r14,0\),r2
- a8a: R_XSTORMY16_12 extsym\+0xfffffa5c
+ a8a: R_XSTORMY16_12 extsym-0x5a4
a8c: 5c 6a 00 00 mov\.b \(--r5,0\),r4
- a8e: R_XSTORMY16_12 extsym\+0xfffffc61
+ a8e: R_XSTORMY16_12 extsym-0x39f
diff --git a/gas/testsuite/gas/xstormy16/reloc-1.d b/gas/testsuite/gas/xstormy16/reloc-1.d
index 21ff86e..ac72eee 100644
--- a/gas/testsuite/gas/xstormy16/reloc-1.d
+++ b/gas/testsuite/gas/xstormy16/reloc-1.d
@@ -8,14 +8,14 @@
OFFSET TYPE VALUE
0*000 R_XSTORMY16_16 global
0*002 R_XSTORMY16_16 global\+0x00000003
-0*004 R_XSTORMY16_PC16 global\+0xfffffffc
+0*004 R_XSTORMY16_PC16 global-0x00000004
0*006 R_XSTORMY16_32 global
0*00a R_XSTORMY16_32 global\+0x00000003
-0*00e R_XSTORMY16_PC32 global\+0xfffffff2
+0*00e R_XSTORMY16_PC32 global-0x0000000e
0*012 R_XSTORMY16_8 global
-0*013 R_XSTORMY16_8 global\+0xffff8100
+0*013 R_XSTORMY16_8 global-0x00007f00
0*014 R_XSTORMY16_8 global\+0x00000003
-0*015 R_XSTORMY16_PC8 global\+0xffffffeb
+0*015 R_XSTORMY16_PC8 global-0x00000015
0*016 R_XSTORMY16_16 dglobal
0*018 R_XSTORMY16_16 dwglobal
diff --git a/gas/testsuite/gas/xstormy16/reloc-2.d b/gas/testsuite/gas/xstormy16/reloc-2.d
index 3f07897..9e43448 100644
--- a/gas/testsuite/gas/xstormy16/reloc-2.d
+++ b/gas/testsuite/gas/xstormy16/reloc-2.d
@@ -27,13 +27,13 @@
30: 00 79 00 00 mov\.w 0x0,#0x0
32: R_XSTORMY16_16 global
34: fe d0 bge 0x34
- 34: R_XSTORMY16_PC8 global\+0xfffffffe
+ 34: R_XSTORMY16_PC8 global-0x2
36: fc c0 00 00 bge Rx,#0x0,0x36
- 36: R_XSTORMY16_PC8 global\+0xfffffffc
+ 36: R_XSTORMY16_PC8 global-0x4
3a: 00 0d fc 0f bge r0,r0,0x3a
- 3c: R_XSTORMY16_REL_12 global\+0xfffffffe
+ 3c: R_XSTORMY16_REL_12 global-0x2
3e: fe 1f br 0x3e
- 3e: R_XSTORMY16_REL_12 global\+0xfffffffe
+ 3e: R_XSTORMY16_REL_12 global-0x2
40: 0a d0 bge 0x4c
42: 06 c0 00 00 bge Rx,#0x0,0x4c
46: 00 0d 02 00 bge r0,r0,0x4c
@@ -49,8 +49,8 @@
60: 00 79 00 00 mov\.w 0x0,#0x0
62: R_XSTORMY16_16 \.text\+0x50
64: 00 79 00 00 mov\.w 0x0,#0x0
- 66: R_XSTORMY16_PC16 global\+0xffffff9c
+ 66: R_XSTORMY16_PC16 global-0x64
68: 00 79 00 00 mov\.w 0x0,#0x0
- 6a: R_XSTORMY16_PC16 global\+0xffffffb4
+ 6a: R_XSTORMY16_PC16 global-0x4c
6c: 00 02 00 00 jmpf 0x0
6c: R_XSTORMY16_24 global
diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp
index 9d89a2e..234789a 100644
--- a/gas/testsuite/lib/gas-defs.exp
+++ b/gas/testsuite/lib/gas-defs.exp
@@ -738,19 +738,9 @@
set redir ""
}
- # Ensure consistent sorting of symbols
- if {[info exists env(LC_ALL)]} {
- set old_lc_all $env(LC_ALL)
- }
- set env(LC_ALL) "C"
send_log "$cmd\n"
set status [gas_host_run "$cmd" "$redir"]
set comp_output [prune_warnings [lindex $status 1]]
- if {[info exists old_lc_all]} {
- set env(LC_ALL) $old_lc_all
- } else {
- unset env(LC_ALL)
- }
set comp_output [prune_warnings $comp_output]
if ![string match "" $comp_output] then {
send_log "$comp_output\n"
diff --git a/gold/ChangeLog b/gold/ChangeLog
index a0a461f..0cd5e27 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,56 @@
+2012-05-25 Sriraman Tallam <tmsriram@google.com>
+
+ * symtab.cc (Symbol_table::define_special_symbol):
+ Initialize *poldsym to prevent uninitialized variable errors.
+
+2012-05-23 Cary Coutant <ccoutant@google.com>
+
+ * layout.cc (Layout::section_name_mapping): Add rules to handle
+ exact match on .data.rel.ro.local or .data.rel.ro.
+ (Layout::output_section_name): Check for exact matches.
+
+2012-05-23 Cary Coutant <ccoutant@google.com>
+
+ * layout.cc (Layout::section_name_mapping): Match .data.rel.ro.*
+ more carefully.
+
+2012-05-22 Cary Coutant <ccoutant@google.com>
+
+ * symtab.cc (Symbol::should_add_dynsym_entry): Check for relocatable
+ object before exporting symbol.
+
+2012-05-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/tls_test.cc: Include "config.h" first.
+ * testsuite/tls_test_c.c: Likewise.
+
+2012-05-17 Daniel Richard G. <skunk@iskunk.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * configure.in: Add check that sysdep.h has been included before
+ any system header files.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+
+2012-05-14 Cary Coutant <ccoutant@google.com>
+
+ * layout.cc (Layout::make_output_section): Mark .tdata section
+ as RELRO.
+ * testsuite/relro_test.cc: Add a TLS variable.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gold/14091
+ * x86_64.cc (Target_x86_64::Scan::local): For x32, generate
+ R_X86_64_RELATIVE64 instead of R_X86_64_RELATIVE in case of
+ R_X86_64_64.
+
+2012-05-08 Cary Coutant <ccoutant@google.com>
+
+ * layout.cc (gdb_sections): Update GDB version, add .debug_addr.
+ (lines_only_debug_sections): Likewise.
+
2012-05-02 Roland McGrath <mcgrathr@google.com>
* nacl.cc: New file.
diff --git a/gold/config.in b/gold/config.in
index dd6d827..dd0a0da 100644
--- a/gold/config.in
+++ b/gold/config.in
@@ -1,5 +1,12 @@
/* config.in. Generated from configure.ac by autoheader. */
+/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1
+
/* Define if building universal (internal helper macro) */
#undef AC_APPLE_UNIVERSAL_BUILD
diff --git a/gold/configure b/gold/configure
index 745e727..dec02dc 100755
--- a/gold/configure
+++ b/gold/configure
@@ -3223,6 +3223,8 @@
+
+
# Check whether --with-sysroot was given.
if test "${with_sysroot+set}" = set; then :
withval=$with_sysroot; sysroot=$withval
diff --git a/gold/configure.ac b/gold/configure.ac
index ee53409..a2c4875 100644
--- a/gold/configure.ac
+++ b/gold/configure.ac
@@ -11,6 +11,15 @@
AM_CONFIG_HEADER(config.h:config.in)
+# PR 14072
+AH_VERBATIM([00_CONFIG_H_CHECK],
+[/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1])
+
AC_ARG_WITH(sysroot,
[ --with-sysroot[=DIR] search for usr/lib et al within DIR],
[sysroot=$withval], [sysroot=no])
diff --git a/gold/layout.cc b/gold/layout.cc
index 7155f22..c7ca322 100644
--- a/gold/layout.cc
+++ b/gold/layout.cc
@@ -455,32 +455,36 @@
// Returns whether the given section is in the list of
// debug-sections-used-by-some-version-of-gdb. Currently,
-// we've checked versions of gdb up to and including 6.7.1.
+// we've checked versions of gdb up to and including 7.4.
static const char* gdb_sections[] =
{ ".debug_abbrev",
- // ".debug_aranges", // not used by gdb as of 6.7.1
+ ".debug_addr", // Fission extension
+ // ".debug_aranges", // not used by gdb as of 7.4
".debug_frame",
".debug_info",
".debug_types",
".debug_line",
".debug_loc",
".debug_macinfo",
- // ".debug_pubnames", // not used by gdb as of 6.7.1
+ // ".debug_pubnames", // not used by gdb as of 7.4
+ // ".debug_pubtypes", // not used by gdb as of 7.4
".debug_ranges",
".debug_str",
};
static const char* lines_only_debug_sections[] =
{ ".debug_abbrev",
- // ".debug_aranges", // not used by gdb as of 6.7.1
+ // ".debug_addr", // Fission extension
+ // ".debug_aranges", // not used by gdb as of 7.4
// ".debug_frame",
".debug_info",
// ".debug_types",
".debug_line",
// ".debug_loc",
// ".debug_macinfo",
- // ".debug_pubnames", // not used by gdb as of 6.7.1
+ // ".debug_pubnames", // not used by gdb as of 7.4
+ // ".debug_pubtypes", // not used by gdb as of 7.4
// ".debug_ranges",
".debug_str",
};
@@ -1426,7 +1430,9 @@
{
if (type == elfcpp::SHT_PROGBITS)
{
- if (strcmp(name, ".data.rel.ro") == 0)
+ if ((flags & elfcpp::SHF_TLS) != 0)
+ is_relro = true;
+ else if (strcmp(name, ".data.rel.ro") == 0)
is_relro = true;
else if (strcmp(name, ".data.rel.ro.local") == 0)
{
@@ -4563,12 +4569,15 @@
// based on the GNU linker default ELF linker script.
#define MAPPING_INIT(f, t) { f, sizeof(f) - 1, t, sizeof(t) - 1 }
+#define MAPPING_INIT_EXACT(f, t) { f, 0, t, sizeof(t) - 1 }
const Layout::Section_name_mapping Layout::section_name_mapping[] =
{
MAPPING_INIT(".text.", ".text"),
MAPPING_INIT(".rodata.", ".rodata"),
- MAPPING_INIT(".data.rel.ro.local", ".data.rel.ro.local"),
- MAPPING_INIT(".data.rel.ro", ".data.rel.ro"),
+ MAPPING_INIT(".data.rel.ro.local.", ".data.rel.ro.local"),
+ MAPPING_INIT_EXACT(".data.rel.ro.local", ".data.rel.ro.local"),
+ MAPPING_INIT(".data.rel.ro.", ".data.rel.ro"),
+ MAPPING_INIT_EXACT(".data.rel.ro", ".data.rel.ro"),
MAPPING_INIT(".data.", ".data"),
MAPPING_INIT(".bss.", ".bss"),
MAPPING_INIT(".tdata.", ".tdata"),
@@ -4607,6 +4616,7 @@
MAPPING_INIT(".gnu.linkonce.armexidx.", ".ARM.exidx"),
};
#undef MAPPING_INIT
+#undef MAPPING_INIT_EXACT
const int Layout::section_name_mapping_count =
(sizeof(Layout::section_name_mapping)
@@ -4658,10 +4668,21 @@
const Section_name_mapping* psnm = section_name_mapping;
for (int i = 0; i < section_name_mapping_count; ++i, ++psnm)
{
- if (strncmp(name, psnm->from, psnm->fromlen) == 0)
+ if (psnm->fromlen > 0)
{
- *plen = psnm->tolen;
- return psnm->to;
+ if (strncmp(name, psnm->from, psnm->fromlen) == 0)
+ {
+ *plen = psnm->tolen;
+ return psnm->to;
+ }
+ }
+ else
+ {
+ if (strcmp(name, psnm->from) == 0)
+ {
+ *plen = psnm->tolen;
+ return psnm->to;
+ }
}
}
diff --git a/gold/symtab.cc b/gold/symtab.cc
index 1edb88d..fd81e8bd 100644
--- a/gold/symtab.cc
+++ b/gold/symtab.cc
@@ -365,8 +365,9 @@
// If the symbol was forced dynamic in a --dynamic-list file
// or an --export-dynamic-symbol option, add it.
- if (parameters->options().in_dynamic_list(this->name())
- || parameters->options().is_export_dynamic_symbol(this->name()))
+ if (!this->is_from_dynobj()
+ && (parameters->options().in_dynamic_list(this->name())
+ || parameters->options().is_export_dynamic_symbol(this->name())))
{
if (!this->is_forced_local())
return true;
@@ -1681,6 +1682,7 @@
bool* resolve_oldsym)
{
*resolve_oldsym = false;
+ *poldsym = NULL;
// If the caller didn't give us a version, see if we get one from
// the version script.
diff --git a/gold/testsuite/relro_test.cc b/gold/testsuite/relro_test.cc
index d741022..795ad39 100644
--- a/gold/testsuite/relro_test.cc
+++ b/gold/testsuite/relro_test.cc
@@ -45,6 +45,9 @@
// P2 is a local relro variable.
int* const p2 __attribute__ ((aligned(64))) = &i2;
+// Add a TLS variable to make sure -z relro works correctly with TLS.
+__thread int i3 = 1;
+
// Test symbol addresses.
bool
@@ -76,6 +79,7 @@
assert(i1page != p2page);
assert(i2page != p1page);
assert(i2page != p2page);
+ assert(i3 == 1);
return true;
}
diff --git a/gold/testsuite/tls_test.cc b/gold/testsuite/tls_test.cc
index 880bf23..c875752 100644
--- a/gold/testsuite/tls_test.cc
+++ b/gold/testsuite/tls_test.cc
@@ -44,8 +44,8 @@
// last Verify that the above tests left the variables set correctly.
-#include <cstdio>
#include "config.h"
+#include <cstdio>
#include "tls_test.h"
#define CHECK_EQ_OR_RETURN(var, expected) \
diff --git a/gold/testsuite/tls_test_c.c b/gold/testsuite/tls_test_c.c
index 730e46d..896191f 100644
--- a/gold/testsuite/tls_test_c.c
+++ b/gold/testsuite/tls_test_c.c
@@ -23,8 +23,8 @@
/* The only way I know to get gcc to generate a TLS common symbol is
to use a C file and an OpenMP directive. */
-#include <stdio.h>
#include "config.h"
+#include <stdio.h>
#define CHECK_EQ_OR_RETURN(var, expected) \
do \
diff --git a/gold/x86_64.cc b/gold/x86_64.cc
index 1339e6f..2ac29bf 100644
--- a/gold/x86_64.cc
+++ b/gold/x86_64.cc
@@ -2299,7 +2299,9 @@
unsigned int r_sym = elfcpp::elf_r_sym<size>(reloc.get_r_info());
Reloc_section* rela_dyn = target->rela_dyn_section(layout);
rela_dyn->add_local_relative(object, r_sym,
- elfcpp::R_X86_64_RELATIVE,
+ (size == 32
+ ? elfcpp::R_X86_64_RELATIVE64
+ : elfcpp::R_X86_64_RELATIVE),
output_section, data_shndx,
reloc.get_r_offset(),
reloc.get_r_addend(), is_ifunc);
diff --git a/gprof/ChangeLog b/gprof/ChangeLog
index ac9c35c..9525010 100644
--- a/gprof/ChangeLog
+++ b/gprof/ChangeLog
@@ -1,3 +1,8 @@
+2012-06-02 Andreas Schwab <schwab@linux-m68k.org>
+
+ * Makefile.am (TEXINFO_TEX): Remove $(top_srcdir) prefix.
+ * Makefile.in: Regenerate.
+
2012-03-06 Tristan Gingold <gingold@adacore.com>
* corefile.c (core_create_function_syms): Do not call bsearch if
diff --git a/gprof/Makefile.am b/gprof/Makefile.am
index a69d06a..edd100a 100644
--- a/gprof/Makefile.am
+++ b/gprof/Makefile.am
@@ -2,7 +2,7 @@
AUTOMAKE_OPTIONS = 1.11 foreign no-dist no-texinfo.tex
ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd
-TEXINFO_TEX = $(top_srcdir)/../texinfo/texinfo.tex
+TEXINFO_TEX = ../texinfo/texinfo.tex
SUFFIXES = .m
diff --git a/gprof/Makefile.in b/gprof/Makefile.in
index a740fea..a9d7073 100644
--- a/gprof/Makefile.in
+++ b/gprof/Makefile.in
@@ -94,7 +94,7 @@
$(LDFLAGS) -o $@
SOURCES = $(gprof_SOURCES)
INFO_DEPS = gprof.info
-am__TEXINFO_TEX_DIR = $(srcdir)/$(top_srcdir)/../texinfo
+am__TEXINFO_TEX_DIR = $(srcdir)/../texinfo
DVIS = gprof.dvi
PDFS = gprof.pdf
PSS = gprof.ps
@@ -277,7 +277,7 @@
top_srcdir = @top_srcdir@
AUTOMAKE_OPTIONS = 1.11 foreign no-dist no-texinfo.tex
ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd
-TEXINFO_TEX = $(top_srcdir)/../texinfo/texinfo.tex
+TEXINFO_TEX = ../texinfo/texinfo.tex
SUFFIXES = .m
SUBDIRS = po
BASEDIR = $(srcdir)/..
diff --git a/include/ChangeLog b/include/ChangeLog
index 7a747a7..e2a420f 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,25 @@
+2012-05-23 Doug Evans <dje@google.com>
+
+ * leb128.h: #include stdint.h, inttypes.h.
+ (read_uleb128_to_uint64): Renamed from read_uleb128_to_ull.
+ Change to take a uint64_t * argument instead of unsigned long long.
+ (read_sleb128_to_uint64): Renamed from read_sleb128_to_ll.
+ Change to take an int64_t * argument instead of long long.
+
+2012-05-22 Doug Evans <dje@google.com>
+
+ * leb128.h: New file.
+
+2012-05-19 Gary Funck <gary@intrepid.com>
+
+ * dwarf2.def: Update comment re: UPC extensions to reference
+ DWARF4 specification.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * dis-asm.h (print_insn_m9s12x): Prototype.
+ (print_insn_m9s12xg): Prototype.
+
2012-05-03 Sean Keys <skeys@ipdatasys.com>
* dis-asm.h (print_insn_xgate): Define.
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 203b113..f9c8ae9 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -260,6 +260,8 @@
extern int print_insn_m32r (bfd_vma, disassemble_info *);
extern int print_insn_m68hc11 (bfd_vma, disassemble_info *);
extern int print_insn_m68hc12 (bfd_vma, disassemble_info *);
+extern int print_insn_m9s12x (bfd_vma, disassemble_info *);
+extern int print_insn_m9s12xg (bfd_vma, disassemble_info *);
extern int print_insn_m68k (bfd_vma, disassemble_info *);
extern int print_insn_m88k (bfd_vma, disassemble_info *);
extern int print_insn_mcore (bfd_vma, disassemble_info *);
diff --git a/include/dwarf2.def b/include/dwarf2.def
index e36ae91..870aecd 100644
--- a/include/dwarf2.def
+++ b/include/dwarf2.def
@@ -167,7 +167,7 @@
are properly part of DWARF 5. */
DW_TAG (DW_TAG_GNU_call_site, 0x4109)
DW_TAG (DW_TAG_GNU_call_site_parameter, 0x410a)
-/* Extensions for UPC. See: http://upc.gwu.edu/~upc. */
+/* Extensions for UPC. See: http://dwarfstd.org/doc/DWARF4.pdf. */
DW_TAG (DW_TAG_upc_shared_type, 0x8765)
DW_TAG (DW_TAG_upc_strict_type, 0x8766)
DW_TAG (DW_TAG_upc_relaxed_type, 0x8767)
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index ab9b2de..af95636 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,3 +1,50 @@
+2012-05-16 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/13503
+ * avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
+ R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
+ (E_M68HC11_XGATE_RAMOFFSET): Define.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+ * ppc.h (SEC_PPC_VLE): Remove.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+ James Lemke <jwlemke@codesourcery.com>
+
+ * ppc.h (R_PPC_VLE_REL8): New reloction.
+ (R_PPC_VLE_REL15): Likewise.
+ (R_PPC_VLE_REL24): Likewise.
+ (R_PPC_VLE_LO16A): Likewise.
+ (R_PPC_VLE_LO16D): Likewise.
+ (R_PPC_VLE_HI16A): Likewise.
+ (R_PPC_VLE_HI16D): Likewise.
+ (R_PPC_VLE_HA16A): Likewise.
+ (R_PPC_VLE_HA16D): Likewise.
+ (R_PPC_VLE_SDA21): Likewise.
+ (R_PPC_VLE_SDA21_LO): Likewise.
+ (R_PPC_VLE_SDAREL_LO16A): Likewise.
+ (R_PPC_VLE_SDAREL_LO16D): Likewise.
+ (R_PPC_VLE_SDAREL_HI16A): Likewise.
+ (R_PPC_VLE_SDAREL_HI16D): Likewise.
+ (R_PPC_VLE_SDAREL_HA16A): Likewise.
+ (R_PPC_VLE_SDAREL_HA16D): Likewise.
+ (SEC_PPC_VLE): Remove.
+ (PF_PPC_VLE): New program header flag.
+ (SHF_PPC_VLE): New section header flag.
+ (vle_opcodes, vle_num_opcodes): New.
+ (VLE_OP): New macro.
+ (VLE_OP_TO_SEG): New macro.
+
+2012-05-11 Georg-Johann Lay <avr@gjlay.de
+
+ PR target/13503
+ * elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
+ R_AVR_8_HI8, R_AVR_8_HHI8.
+
2012-05-03 Sean Keys <skeys@ipdatasys.com>
* xgate.h: Mininal file to support XGATE relocations.
diff --git a/include/elf/avr.h b/include/elf/avr.h
index 11d43f9..b45d902 100644
--- a/include/elf/avr.h
+++ b/include/elf/avr.h
@@ -1,5 +1,6 @@
/* AVR ELF support for BFD.
- Copyright 1999, 2000, 2004, 2006, 2010 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2004, 2006, 2010, 2012
+ Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc@overta.ru>
This file is part of BFD, the Binary File Descriptor library.
@@ -30,16 +31,16 @@
as reference for the relocations so that linker relaxation is possible. */
#define EF_AVR_LINKRELAX_PREPARED 0x80
-#define E_AVR_MACH_AVR1 1
-#define E_AVR_MACH_AVR2 2
-#define E_AVR_MACH_AVR25 25
-#define E_AVR_MACH_AVR3 3
-#define E_AVR_MACH_AVR31 31
-#define E_AVR_MACH_AVR35 35
-#define E_AVR_MACH_AVR4 4
-#define E_AVR_MACH_AVR5 5
-#define E_AVR_MACH_AVR51 51
-#define E_AVR_MACH_AVR6 6
+#define E_AVR_MACH_AVR1 1
+#define E_AVR_MACH_AVR2 2
+#define E_AVR_MACH_AVR25 25
+#define E_AVR_MACH_AVR3 3
+#define E_AVR_MACH_AVR31 31
+#define E_AVR_MACH_AVR35 35
+#define E_AVR_MACH_AVR4 4
+#define E_AVR_MACH_AVR5 5
+#define E_AVR_MACH_AVR51 51
+#define E_AVR_MACH_AVR6 6
#define E_AVR_MACH_XMEGA1 101
#define E_AVR_MACH_XMEGA2 102
#define E_AVR_MACH_XMEGA3 103
@@ -77,6 +78,9 @@
RELOC_NUMBER (R_AVR_LO8_LDI_GS, 24)
RELOC_NUMBER (R_AVR_HI8_LDI_GS, 25)
RELOC_NUMBER (R_AVR_8, 26)
+ RELOC_NUMBER (R_AVR_8_LO8, 27)
+ RELOC_NUMBER (R_AVR_8_HI8, 28)
+ RELOC_NUMBER (R_AVR_8_HLO8, 29)
END_RELOC_NUMBERS (R_AVR_max)
#endif /* _ELF_AVR_H */
diff --git a/include/elf/m68hc11.h b/include/elf/m68hc11.h
index ca325d9..9a37a44 100644
--- a/include/elf/m68hc11.h
+++ b/include/elf/m68hc11.h
@@ -1,5 +1,5 @@
/* m68hc11 & m68hc12 ELF support for BFD.
- Copyright 1999, 2000, 2001, 2002, 2010 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2002, 2010, 2012 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -42,6 +42,12 @@
RELOC_NUMBER (R_M68HC11_LO16, 12)
RELOC_NUMBER (R_M68HC11_PAGE, 13)
+ RELOC_NUMBER (R_M68HC12_16B, 15)
+ RELOC_NUMBER (R_M68HC12_PCREL_9, 16)
+ RELOC_NUMBER (R_M68HC12_PCREL_10, 17)
+ RELOC_NUMBER (R_M68HC12_HI8XG, 18)
+ RELOC_NUMBER (R_M68HC12_LO8XG, 19)
+
/* GNU extension for linker relaxation.
Mark beginning of a jump instruction (any form). */
RELOC_NUMBER (R_M68HC11_RL_JUMP, 20)
@@ -64,6 +70,9 @@
/* Uses 68HC12 memory banks. */
#define E_M68HC12_BANKS 0x000000004
+/* XGATE ram offsetting. */
+#define E_M68HC11_XGATE_RAMOFFSET 0x000000100
+
#define EF_M68HC11_MACH_MASK 0xF0
#define EF_M68HC11_GENERIC 0x00 /* Generic 68HC12/backward compatibility. */
#define EF_M68HC12_MACH 0x10 /* 68HC12 microcontroller. */
@@ -86,10 +95,10 @@
/* Special values for the st_other field in the symbol table. These
are used for 68HC12 to identify far functions (must be called with
'call' and returns with 'rtc'). */
-#define STO_M68HC12_FAR 0x80
+#define STO_M68HC12_FAR 0x80
/* Identify interrupt handlers. This is used by the debugger to
correctly compute the stack frame. */
-#define STO_M68HC12_INTERRUPT 0x40
+#define STO_M68HC12_INTERRUPT 0x40
#endif
diff --git a/include/elf/ppc.h b/include/elf/ppc.h
index 8e27855..f80a1e8 100644
--- a/include/elf/ppc.h
+++ b/include/elf/ppc.h
@@ -131,6 +131,25 @@
RELOC_NUMBER (R_PPC_EMB_BIT_FLD, 115)
RELOC_NUMBER (R_PPC_EMB_RELSDA, 116)
+/* PowerPC VLE relocations. */
+ RELOC_NUMBER (R_PPC_VLE_REL8, 216)
+ RELOC_NUMBER (R_PPC_VLE_REL15, 217)
+ RELOC_NUMBER (R_PPC_VLE_REL24, 218)
+ RELOC_NUMBER (R_PPC_VLE_LO16A, 219)
+ RELOC_NUMBER (R_PPC_VLE_LO16D, 220)
+ RELOC_NUMBER (R_PPC_VLE_HI16A, 221)
+ RELOC_NUMBER (R_PPC_VLE_HI16D, 222)
+ RELOC_NUMBER (R_PPC_VLE_HA16A, 223)
+ RELOC_NUMBER (R_PPC_VLE_HA16D, 224)
+ RELOC_NUMBER (R_PPC_VLE_SDA21, 225)
+ RELOC_NUMBER (R_PPC_VLE_SDA21_LO, 226)
+ RELOC_NUMBER (R_PPC_VLE_SDAREL_LO16A, 227)
+ RELOC_NUMBER (R_PPC_VLE_SDAREL_LO16D, 228)
+ RELOC_NUMBER (R_PPC_VLE_SDAREL_HI16A, 229)
+ RELOC_NUMBER (R_PPC_VLE_SDAREL_HI16D, 230)
+ RELOC_NUMBER (R_PPC_VLE_SDAREL_HA16A, 231)
+ RELOC_NUMBER (R_PPC_VLE_SDAREL_HA16D, 232)
+
/* Support STT_GNU_IFUNC plt calls. */
RELOC_NUMBER (R_PPC_IRELATIVE, 248)
@@ -166,9 +185,11 @@
#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag. */
#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib flag. */
-/* This bit is reserved by BFD for processor specific stuff. Name
- it properly so that we can easily stay consistent elsewhere. */
-#define SEC_PPC_VLE SEC_TIC54X_BLOCK
+/* Processor specific program headers, p_flags field. */
+#define PF_PPC_VLE 0x10000000 /* PowerPC VLE. */
+
+/* Processor specific section headers, sh_flags field. */
+#define SHF_PPC_VLE 0x10000000 /* PowerPC VLE text section. */
/* Processor specific section headers, sh_type field. */
diff --git a/include/gdb/ChangeLog b/include/gdb/ChangeLog
index cb8df1c..3afa67d 100644
--- a/include/gdb/ChangeLog
+++ b/include/gdb/ChangeLog
@@ -1,3 +1,15 @@
+2012-05-24 Pedro Alves <palves@redhat.com>
+
+ PR gdb/7205
+
+ Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
+
+2012-05-24 Pedro Alves <palves@redhat.com>
+
+ PR gdb/7205
+
+ Replace target_signal with gdb_signal throughout.
+
2012-04-12 Mike Frysinger <vapier@gentoo.org>
* callback.h (CB_SYS_argc, CB_SYS_argnlen, CB_SYS_argn): Define.
diff --git a/include/gdb/callback.h b/include/gdb/callback.h
index 5c0d2db..d8d1472 100644
--- a/include/gdb/callback.h
+++ b/include/gdb/callback.h
@@ -314,7 +314,7 @@
int cb_target_to_host_signal (host_callback *, int);
/* Translate host signal number to target. */
-int cb_host_to_target_signal (host_callback *, int);
+int cb_host_to_gdb_signal (host_callback *, int);
/* Translate host stat struct to target.
If stat struct ptr is NULL, just compute target stat struct size.
diff --git a/include/gdb/signals.def b/include/gdb/signals.def
index c01895a..ef4c8d4 100644
--- a/include/gdb/signals.def
+++ b/include/gdb/signals.def
@@ -18,173 +18,173 @@
/* Used some places (e.g. stop_signal) to record the concept that
there is no signal. */
-SET (TARGET_SIGNAL_0, 0, "0", "Signal 0")
-#define TARGET_SIGNAL_FIRST TARGET_SIGNAL_0
-SET (TARGET_SIGNAL_HUP, 1, "SIGHUP", "Hangup")
-SET (TARGET_SIGNAL_INT, 2, "SIGINT", "Interrupt")
-SET (TARGET_SIGNAL_QUIT, 3, "SIGQUIT", "Quit")
-SET (TARGET_SIGNAL_ILL, 4, "SIGILL", "Illegal instruction")
-SET (TARGET_SIGNAL_TRAP, 5, "SIGTRAP", "Trace/breakpoint trap")
-SET (TARGET_SIGNAL_ABRT, 6, "SIGABRT", "Aborted")
-SET (TARGET_SIGNAL_EMT, 7, "SIGEMT", "Emulation trap")
-SET (TARGET_SIGNAL_FPE, 8, "SIGFPE", "Arithmetic exception")
-SET (TARGET_SIGNAL_KILL, 9, "SIGKILL", "Killed")
-SET (TARGET_SIGNAL_BUS, 10, "SIGBUS", "Bus error")
-SET (TARGET_SIGNAL_SEGV, 11, "SIGSEGV", "Segmentation fault")
-SET (TARGET_SIGNAL_SYS, 12, "SIGSYS", "Bad system call")
-SET (TARGET_SIGNAL_PIPE, 13, "SIGPIPE", "Broken pipe")
-SET (TARGET_SIGNAL_ALRM, 14, "SIGALRM", "Alarm clock")
-SET (TARGET_SIGNAL_TERM, 15, "SIGTERM", "Terminated")
-SET (TARGET_SIGNAL_URG, 16, "SIGURG", "Urgent I/O condition")
-SET (TARGET_SIGNAL_STOP, 17, "SIGSTOP", "Stopped (signal)")
-SET (TARGET_SIGNAL_TSTP, 18, "SIGTSTP", "Stopped (user)")
-SET (TARGET_SIGNAL_CONT, 19, "SIGCONT", "Continued")
-SET (TARGET_SIGNAL_CHLD, 20, "SIGCHLD", "Child status changed")
-SET (TARGET_SIGNAL_TTIN, 21, "SIGTTIN", "Stopped (tty input)")
-SET (TARGET_SIGNAL_TTOU, 22, "SIGTTOU", "Stopped (tty output)")
-SET (TARGET_SIGNAL_IO, 23, "SIGIO", "I/O possible")
-SET (TARGET_SIGNAL_XCPU, 24, "SIGXCPU", "CPU time limit exceeded")
-SET (TARGET_SIGNAL_XFSZ, 25, "SIGXFSZ", "File size limit exceeded")
-SET (TARGET_SIGNAL_VTALRM, 26, "SIGVTALRM", "Virtual timer expired")
-SET (TARGET_SIGNAL_PROF, 27, "SIGPROF", "Profiling timer expired")
-SET (TARGET_SIGNAL_WINCH, 28, "SIGWINCH", "Window size changed")
-SET (TARGET_SIGNAL_LOST, 29, "SIGLOST", "Resource lost")
-SET (TARGET_SIGNAL_USR1, 30, "SIGUSR1", "User defined signal 1")
-SET (TARGET_SIGNAL_USR2, 31, "SIGUSR2", "User defined signal 2")
-SET (TARGET_SIGNAL_PWR, 32, "SIGPWR", "Power fail/restart")
+SET (GDB_SIGNAL_0, 0, "0", "Signal 0")
+#define GDB_SIGNAL_FIRST GDB_SIGNAL_0
+SET (GDB_SIGNAL_HUP, 1, "SIGHUP", "Hangup")
+SET (GDB_SIGNAL_INT, 2, "SIGINT", "Interrupt")
+SET (GDB_SIGNAL_QUIT, 3, "SIGQUIT", "Quit")
+SET (GDB_SIGNAL_ILL, 4, "SIGILL", "Illegal instruction")
+SET (GDB_SIGNAL_TRAP, 5, "SIGTRAP", "Trace/breakpoint trap")
+SET (GDB_SIGNAL_ABRT, 6, "SIGABRT", "Aborted")
+SET (GDB_SIGNAL_EMT, 7, "SIGEMT", "Emulation trap")
+SET (GDB_SIGNAL_FPE, 8, "SIGFPE", "Arithmetic exception")
+SET (GDB_SIGNAL_KILL, 9, "SIGKILL", "Killed")
+SET (GDB_SIGNAL_BUS, 10, "SIGBUS", "Bus error")
+SET (GDB_SIGNAL_SEGV, 11, "SIGSEGV", "Segmentation fault")
+SET (GDB_SIGNAL_SYS, 12, "SIGSYS", "Bad system call")
+SET (GDB_SIGNAL_PIPE, 13, "SIGPIPE", "Broken pipe")
+SET (GDB_SIGNAL_ALRM, 14, "SIGALRM", "Alarm clock")
+SET (GDB_SIGNAL_TERM, 15, "SIGTERM", "Terminated")
+SET (GDB_SIGNAL_URG, 16, "SIGURG", "Urgent I/O condition")
+SET (GDB_SIGNAL_STOP, 17, "SIGSTOP", "Stopped (signal)")
+SET (GDB_SIGNAL_TSTP, 18, "SIGTSTP", "Stopped (user)")
+SET (GDB_SIGNAL_CONT, 19, "SIGCONT", "Continued")
+SET (GDB_SIGNAL_CHLD, 20, "SIGCHLD", "Child status changed")
+SET (GDB_SIGNAL_TTIN, 21, "SIGTTIN", "Stopped (tty input)")
+SET (GDB_SIGNAL_TTOU, 22, "SIGTTOU", "Stopped (tty output)")
+SET (GDB_SIGNAL_IO, 23, "SIGIO", "I/O possible")
+SET (GDB_SIGNAL_XCPU, 24, "SIGXCPU", "CPU time limit exceeded")
+SET (GDB_SIGNAL_XFSZ, 25, "SIGXFSZ", "File size limit exceeded")
+SET (GDB_SIGNAL_VTALRM, 26, "SIGVTALRM", "Virtual timer expired")
+SET (GDB_SIGNAL_PROF, 27, "SIGPROF", "Profiling timer expired")
+SET (GDB_SIGNAL_WINCH, 28, "SIGWINCH", "Window size changed")
+SET (GDB_SIGNAL_LOST, 29, "SIGLOST", "Resource lost")
+SET (GDB_SIGNAL_USR1, 30, "SIGUSR1", "User defined signal 1")
+SET (GDB_SIGNAL_USR2, 31, "SIGUSR2", "User defined signal 2")
+SET (GDB_SIGNAL_PWR, 32, "SIGPWR", "Power fail/restart")
/* Similar to SIGIO. Perhaps they should have the same number. */
-SET (TARGET_SIGNAL_POLL, 33, "SIGPOLL", "Pollable event occurred")
-SET (TARGET_SIGNAL_WIND, 34, "SIGWIND", "SIGWIND")
-SET (TARGET_SIGNAL_PHONE, 35, "SIGPHONE", "SIGPHONE")
-SET (TARGET_SIGNAL_WAITING, 36, "SIGWAITING", "Process's LWPs are blocked")
-SET (TARGET_SIGNAL_LWP, 37, "SIGLWP", "Signal LWP")
-SET (TARGET_SIGNAL_DANGER, 38, "SIGDANGER", "Swap space dangerously low")
-SET (TARGET_SIGNAL_GRANT, 39, "SIGGRANT", "Monitor mode granted")
-SET (TARGET_SIGNAL_RETRACT, 40, "SIGRETRACT",
+SET (GDB_SIGNAL_POLL, 33, "SIGPOLL", "Pollable event occurred")
+SET (GDB_SIGNAL_WIND, 34, "SIGWIND", "SIGWIND")
+SET (GDB_SIGNAL_PHONE, 35, "SIGPHONE", "SIGPHONE")
+SET (GDB_SIGNAL_WAITING, 36, "SIGWAITING", "Process's LWPs are blocked")
+SET (GDB_SIGNAL_LWP, 37, "SIGLWP", "Signal LWP")
+SET (GDB_SIGNAL_DANGER, 38, "SIGDANGER", "Swap space dangerously low")
+SET (GDB_SIGNAL_GRANT, 39, "SIGGRANT", "Monitor mode granted")
+SET (GDB_SIGNAL_RETRACT, 40, "SIGRETRACT",
"Need to relinquish monitor mode")
-SET (TARGET_SIGNAL_MSG, 41, "SIGMSG", "Monitor mode data available")
-SET (TARGET_SIGNAL_SOUND, 42, "SIGSOUND", "Sound completed")
-SET (TARGET_SIGNAL_SAK, 43, "SIGSAK", "Secure attention")
-SET (TARGET_SIGNAL_PRIO, 44, "SIGPRIO", "SIGPRIO")
-SET (TARGET_SIGNAL_REALTIME_33, 45, "SIG33", "Real-time event 33")
-SET (TARGET_SIGNAL_REALTIME_34, 46, "SIG34", "Real-time event 34")
-SET (TARGET_SIGNAL_REALTIME_35, 47, "SIG35", "Real-time event 35")
-SET (TARGET_SIGNAL_REALTIME_36, 48, "SIG36", "Real-time event 36")
-SET (TARGET_SIGNAL_REALTIME_37, 49, "SIG37", "Real-time event 37")
-SET (TARGET_SIGNAL_REALTIME_38, 50, "SIG38", "Real-time event 38")
-SET (TARGET_SIGNAL_REALTIME_39, 51, "SIG39", "Real-time event 39")
-SET (TARGET_SIGNAL_REALTIME_40, 52, "SIG40", "Real-time event 40")
-SET (TARGET_SIGNAL_REALTIME_41, 53, "SIG41", "Real-time event 41")
-SET (TARGET_SIGNAL_REALTIME_42, 54, "SIG42", "Real-time event 42")
-SET (TARGET_SIGNAL_REALTIME_43, 55, "SIG43", "Real-time event 43")
-SET (TARGET_SIGNAL_REALTIME_44, 56, "SIG44", "Real-time event 44")
-SET (TARGET_SIGNAL_REALTIME_45, 57, "SIG45", "Real-time event 45")
-SET (TARGET_SIGNAL_REALTIME_46, 58, "SIG46", "Real-time event 46")
-SET (TARGET_SIGNAL_REALTIME_47, 59, "SIG47", "Real-time event 47")
-SET (TARGET_SIGNAL_REALTIME_48, 60, "SIG48", "Real-time event 48")
-SET (TARGET_SIGNAL_REALTIME_49, 61, "SIG49", "Real-time event 49")
-SET (TARGET_SIGNAL_REALTIME_50, 62, "SIG50", "Real-time event 50")
-SET (TARGET_SIGNAL_REALTIME_51, 63, "SIG51", "Real-time event 51")
-SET (TARGET_SIGNAL_REALTIME_52, 64, "SIG52", "Real-time event 52")
-SET (TARGET_SIGNAL_REALTIME_53, 65, "SIG53", "Real-time event 53")
-SET (TARGET_SIGNAL_REALTIME_54, 66, "SIG54", "Real-time event 54")
-SET (TARGET_SIGNAL_REALTIME_55, 67, "SIG55", "Real-time event 55")
-SET (TARGET_SIGNAL_REALTIME_56, 68, "SIG56", "Real-time event 56")
-SET (TARGET_SIGNAL_REALTIME_57, 69, "SIG57", "Real-time event 57")
-SET (TARGET_SIGNAL_REALTIME_58, 70, "SIG58", "Real-time event 58")
-SET (TARGET_SIGNAL_REALTIME_59, 71, "SIG59", "Real-time event 59")
-SET (TARGET_SIGNAL_REALTIME_60, 72, "SIG60", "Real-time event 60")
-SET (TARGET_SIGNAL_REALTIME_61, 73, "SIG61", "Real-time event 61")
-SET (TARGET_SIGNAL_REALTIME_62, 74, "SIG62", "Real-time event 62")
-SET (TARGET_SIGNAL_REALTIME_63, 75, "SIG63", "Real-time event 63")
+SET (GDB_SIGNAL_MSG, 41, "SIGMSG", "Monitor mode data available")
+SET (GDB_SIGNAL_SOUND, 42, "SIGSOUND", "Sound completed")
+SET (GDB_SIGNAL_SAK, 43, "SIGSAK", "Secure attention")
+SET (GDB_SIGNAL_PRIO, 44, "SIGPRIO", "SIGPRIO")
+SET (GDB_SIGNAL_REALTIME_33, 45, "SIG33", "Real-time event 33")
+SET (GDB_SIGNAL_REALTIME_34, 46, "SIG34", "Real-time event 34")
+SET (GDB_SIGNAL_REALTIME_35, 47, "SIG35", "Real-time event 35")
+SET (GDB_SIGNAL_REALTIME_36, 48, "SIG36", "Real-time event 36")
+SET (GDB_SIGNAL_REALTIME_37, 49, "SIG37", "Real-time event 37")
+SET (GDB_SIGNAL_REALTIME_38, 50, "SIG38", "Real-time event 38")
+SET (GDB_SIGNAL_REALTIME_39, 51, "SIG39", "Real-time event 39")
+SET (GDB_SIGNAL_REALTIME_40, 52, "SIG40", "Real-time event 40")
+SET (GDB_SIGNAL_REALTIME_41, 53, "SIG41", "Real-time event 41")
+SET (GDB_SIGNAL_REALTIME_42, 54, "SIG42", "Real-time event 42")
+SET (GDB_SIGNAL_REALTIME_43, 55, "SIG43", "Real-time event 43")
+SET (GDB_SIGNAL_REALTIME_44, 56, "SIG44", "Real-time event 44")
+SET (GDB_SIGNAL_REALTIME_45, 57, "SIG45", "Real-time event 45")
+SET (GDB_SIGNAL_REALTIME_46, 58, "SIG46", "Real-time event 46")
+SET (GDB_SIGNAL_REALTIME_47, 59, "SIG47", "Real-time event 47")
+SET (GDB_SIGNAL_REALTIME_48, 60, "SIG48", "Real-time event 48")
+SET (GDB_SIGNAL_REALTIME_49, 61, "SIG49", "Real-time event 49")
+SET (GDB_SIGNAL_REALTIME_50, 62, "SIG50", "Real-time event 50")
+SET (GDB_SIGNAL_REALTIME_51, 63, "SIG51", "Real-time event 51")
+SET (GDB_SIGNAL_REALTIME_52, 64, "SIG52", "Real-time event 52")
+SET (GDB_SIGNAL_REALTIME_53, 65, "SIG53", "Real-time event 53")
+SET (GDB_SIGNAL_REALTIME_54, 66, "SIG54", "Real-time event 54")
+SET (GDB_SIGNAL_REALTIME_55, 67, "SIG55", "Real-time event 55")
+SET (GDB_SIGNAL_REALTIME_56, 68, "SIG56", "Real-time event 56")
+SET (GDB_SIGNAL_REALTIME_57, 69, "SIG57", "Real-time event 57")
+SET (GDB_SIGNAL_REALTIME_58, 70, "SIG58", "Real-time event 58")
+SET (GDB_SIGNAL_REALTIME_59, 71, "SIG59", "Real-time event 59")
+SET (GDB_SIGNAL_REALTIME_60, 72, "SIG60", "Real-time event 60")
+SET (GDB_SIGNAL_REALTIME_61, 73, "SIG61", "Real-time event 61")
+SET (GDB_SIGNAL_REALTIME_62, 74, "SIG62", "Real-time event 62")
+SET (GDB_SIGNAL_REALTIME_63, 75, "SIG63", "Real-time event 63")
/* Used internally by Solaris threads. See signal(5) on Solaris. */
-SET (TARGET_SIGNAL_CANCEL, 76, "SIGCANCEL", "LWP internal signal")
+SET (GDB_SIGNAL_CANCEL, 76, "SIGCANCEL", "LWP internal signal")
/* Yes, this pains me, too. But LynxOS didn't have SIG32, and now
GNU/Linux does, and we can't disturb the numbering, since it's
part of the remote protocol. Note that in some GDB's
- TARGET_SIGNAL_REALTIME_32 is number 76. */
-SET (TARGET_SIGNAL_REALTIME_32, 77, "SIG32", "Real-time event 32")
+ GDB_SIGNAL_REALTIME_32 is number 76. */
+SET (GDB_SIGNAL_REALTIME_32, 77, "SIG32", "Real-time event 32")
/* Yet another pain, IRIX 6 has SIG64. */
-SET (TARGET_SIGNAL_REALTIME_64, 78, "SIG64", "Real-time event 64")
+SET (GDB_SIGNAL_REALTIME_64, 78, "SIG64", "Real-time event 64")
/* Yet another pain, GNU/Linux MIPS might go up to 128. */
-SET (TARGET_SIGNAL_REALTIME_65, 79, "SIG65", "Real-time event 65")
-SET (TARGET_SIGNAL_REALTIME_66, 80, "SIG66", "Real-time event 66")
-SET (TARGET_SIGNAL_REALTIME_67, 81, "SIG67", "Real-time event 67")
-SET (TARGET_SIGNAL_REALTIME_68, 82, "SIG68", "Real-time event 68")
-SET (TARGET_SIGNAL_REALTIME_69, 83, "SIG69", "Real-time event 69")
-SET (TARGET_SIGNAL_REALTIME_70, 84, "SIG70", "Real-time event 70")
-SET (TARGET_SIGNAL_REALTIME_71, 85, "SIG71", "Real-time event 71")
-SET (TARGET_SIGNAL_REALTIME_72, 86, "SIG72", "Real-time event 72")
-SET (TARGET_SIGNAL_REALTIME_73, 87, "SIG73", "Real-time event 73")
-SET (TARGET_SIGNAL_REALTIME_74, 88, "SIG74", "Real-time event 74")
-SET (TARGET_SIGNAL_REALTIME_75, 89, "SIG75", "Real-time event 75")
-SET (TARGET_SIGNAL_REALTIME_76, 90, "SIG76", "Real-time event 76")
-SET (TARGET_SIGNAL_REALTIME_77, 91, "SIG77", "Real-time event 77")
-SET (TARGET_SIGNAL_REALTIME_78, 92, "SIG78", "Real-time event 78")
-SET (TARGET_SIGNAL_REALTIME_79, 93, "SIG79", "Real-time event 79")
-SET (TARGET_SIGNAL_REALTIME_80, 94, "SIG80", "Real-time event 80")
-SET (TARGET_SIGNAL_REALTIME_81, 95, "SIG81", "Real-time event 81")
-SET (TARGET_SIGNAL_REALTIME_82, 96, "SIG82", "Real-time event 82")
-SET (TARGET_SIGNAL_REALTIME_83, 97, "SIG83", "Real-time event 83")
-SET (TARGET_SIGNAL_REALTIME_84, 98, "SIG84", "Real-time event 84")
-SET (TARGET_SIGNAL_REALTIME_85, 99, "SIG85", "Real-time event 85")
-SET (TARGET_SIGNAL_REALTIME_86, 100, "SIG86", "Real-time event 86")
-SET (TARGET_SIGNAL_REALTIME_87, 101, "SIG87", "Real-time event 87")
-SET (TARGET_SIGNAL_REALTIME_88, 102, "SIG88", "Real-time event 88")
-SET (TARGET_SIGNAL_REALTIME_89, 103, "SIG89", "Real-time event 89")
-SET (TARGET_SIGNAL_REALTIME_90, 104, "SIG90", "Real-time event 90")
-SET (TARGET_SIGNAL_REALTIME_91, 105, "SIG91", "Real-time event 91")
-SET (TARGET_SIGNAL_REALTIME_92, 106, "SIG92", "Real-time event 92")
-SET (TARGET_SIGNAL_REALTIME_93, 107, "SIG93", "Real-time event 93")
-SET (TARGET_SIGNAL_REALTIME_94, 108, "SIG94", "Real-time event 94")
-SET (TARGET_SIGNAL_REALTIME_95, 109, "SIG95", "Real-time event 95")
-SET (TARGET_SIGNAL_REALTIME_96, 110, "SIG96", "Real-time event 96")
-SET (TARGET_SIGNAL_REALTIME_97, 111, "SIG97", "Real-time event 97")
-SET (TARGET_SIGNAL_REALTIME_98, 112, "SIG98", "Real-time event 98")
-SET (TARGET_SIGNAL_REALTIME_99, 113, "SIG99", "Real-time event 99")
-SET (TARGET_SIGNAL_REALTIME_100, 114, "SIG100", "Real-time event 100")
-SET (TARGET_SIGNAL_REALTIME_101, 115, "SIG101", "Real-time event 101")
-SET (TARGET_SIGNAL_REALTIME_102, 116, "SIG102", "Real-time event 102")
-SET (TARGET_SIGNAL_REALTIME_103, 117, "SIG103", "Real-time event 103")
-SET (TARGET_SIGNAL_REALTIME_104, 118, "SIG104", "Real-time event 104")
-SET (TARGET_SIGNAL_REALTIME_105, 119, "SIG105", "Real-time event 105")
-SET (TARGET_SIGNAL_REALTIME_106, 120, "SIG106", "Real-time event 106")
-SET (TARGET_SIGNAL_REALTIME_107, 121, "SIG107", "Real-time event 107")
-SET (TARGET_SIGNAL_REALTIME_108, 122, "SIG108", "Real-time event 108")
-SET (TARGET_SIGNAL_REALTIME_109, 123, "SIG109", "Real-time event 109")
-SET (TARGET_SIGNAL_REALTIME_110, 124, "SIG110", "Real-time event 110")
-SET (TARGET_SIGNAL_REALTIME_111, 125, "SIG111", "Real-time event 111")
-SET (TARGET_SIGNAL_REALTIME_112, 126, "SIG112", "Real-time event 112")
-SET (TARGET_SIGNAL_REALTIME_113, 127, "SIG113", "Real-time event 113")
-SET (TARGET_SIGNAL_REALTIME_114, 128, "SIG114", "Real-time event 114")
-SET (TARGET_SIGNAL_REALTIME_115, 129, "SIG115", "Real-time event 115")
-SET (TARGET_SIGNAL_REALTIME_116, 130, "SIG116", "Real-time event 116")
-SET (TARGET_SIGNAL_REALTIME_117, 131, "SIG117", "Real-time event 117")
-SET (TARGET_SIGNAL_REALTIME_118, 132, "SIG118", "Real-time event 118")
-SET (TARGET_SIGNAL_REALTIME_119, 133, "SIG119", "Real-time event 119")
-SET (TARGET_SIGNAL_REALTIME_120, 134, "SIG120", "Real-time event 120")
-SET (TARGET_SIGNAL_REALTIME_121, 135, "SIG121", "Real-time event 121")
-SET (TARGET_SIGNAL_REALTIME_122, 136, "SIG122", "Real-time event 122")
-SET (TARGET_SIGNAL_REALTIME_123, 137, "SIG123", "Real-time event 123")
-SET (TARGET_SIGNAL_REALTIME_124, 138, "SIG124", "Real-time event 124")
-SET (TARGET_SIGNAL_REALTIME_125, 139, "SIG125", "Real-time event 125")
-SET (TARGET_SIGNAL_REALTIME_126, 140, "SIG126", "Real-time event 126")
-SET (TARGET_SIGNAL_REALTIME_127, 141, "SIG127", "Real-time event 127")
+SET (GDB_SIGNAL_REALTIME_65, 79, "SIG65", "Real-time event 65")
+SET (GDB_SIGNAL_REALTIME_66, 80, "SIG66", "Real-time event 66")
+SET (GDB_SIGNAL_REALTIME_67, 81, "SIG67", "Real-time event 67")
+SET (GDB_SIGNAL_REALTIME_68, 82, "SIG68", "Real-time event 68")
+SET (GDB_SIGNAL_REALTIME_69, 83, "SIG69", "Real-time event 69")
+SET (GDB_SIGNAL_REALTIME_70, 84, "SIG70", "Real-time event 70")
+SET (GDB_SIGNAL_REALTIME_71, 85, "SIG71", "Real-time event 71")
+SET (GDB_SIGNAL_REALTIME_72, 86, "SIG72", "Real-time event 72")
+SET (GDB_SIGNAL_REALTIME_73, 87, "SIG73", "Real-time event 73")
+SET (GDB_SIGNAL_REALTIME_74, 88, "SIG74", "Real-time event 74")
+SET (GDB_SIGNAL_REALTIME_75, 89, "SIG75", "Real-time event 75")
+SET (GDB_SIGNAL_REALTIME_76, 90, "SIG76", "Real-time event 76")
+SET (GDB_SIGNAL_REALTIME_77, 91, "SIG77", "Real-time event 77")
+SET (GDB_SIGNAL_REALTIME_78, 92, "SIG78", "Real-time event 78")
+SET (GDB_SIGNAL_REALTIME_79, 93, "SIG79", "Real-time event 79")
+SET (GDB_SIGNAL_REALTIME_80, 94, "SIG80", "Real-time event 80")
+SET (GDB_SIGNAL_REALTIME_81, 95, "SIG81", "Real-time event 81")
+SET (GDB_SIGNAL_REALTIME_82, 96, "SIG82", "Real-time event 82")
+SET (GDB_SIGNAL_REALTIME_83, 97, "SIG83", "Real-time event 83")
+SET (GDB_SIGNAL_REALTIME_84, 98, "SIG84", "Real-time event 84")
+SET (GDB_SIGNAL_REALTIME_85, 99, "SIG85", "Real-time event 85")
+SET (GDB_SIGNAL_REALTIME_86, 100, "SIG86", "Real-time event 86")
+SET (GDB_SIGNAL_REALTIME_87, 101, "SIG87", "Real-time event 87")
+SET (GDB_SIGNAL_REALTIME_88, 102, "SIG88", "Real-time event 88")
+SET (GDB_SIGNAL_REALTIME_89, 103, "SIG89", "Real-time event 89")
+SET (GDB_SIGNAL_REALTIME_90, 104, "SIG90", "Real-time event 90")
+SET (GDB_SIGNAL_REALTIME_91, 105, "SIG91", "Real-time event 91")
+SET (GDB_SIGNAL_REALTIME_92, 106, "SIG92", "Real-time event 92")
+SET (GDB_SIGNAL_REALTIME_93, 107, "SIG93", "Real-time event 93")
+SET (GDB_SIGNAL_REALTIME_94, 108, "SIG94", "Real-time event 94")
+SET (GDB_SIGNAL_REALTIME_95, 109, "SIG95", "Real-time event 95")
+SET (GDB_SIGNAL_REALTIME_96, 110, "SIG96", "Real-time event 96")
+SET (GDB_SIGNAL_REALTIME_97, 111, "SIG97", "Real-time event 97")
+SET (GDB_SIGNAL_REALTIME_98, 112, "SIG98", "Real-time event 98")
+SET (GDB_SIGNAL_REALTIME_99, 113, "SIG99", "Real-time event 99")
+SET (GDB_SIGNAL_REALTIME_100, 114, "SIG100", "Real-time event 100")
+SET (GDB_SIGNAL_REALTIME_101, 115, "SIG101", "Real-time event 101")
+SET (GDB_SIGNAL_REALTIME_102, 116, "SIG102", "Real-time event 102")
+SET (GDB_SIGNAL_REALTIME_103, 117, "SIG103", "Real-time event 103")
+SET (GDB_SIGNAL_REALTIME_104, 118, "SIG104", "Real-time event 104")
+SET (GDB_SIGNAL_REALTIME_105, 119, "SIG105", "Real-time event 105")
+SET (GDB_SIGNAL_REALTIME_106, 120, "SIG106", "Real-time event 106")
+SET (GDB_SIGNAL_REALTIME_107, 121, "SIG107", "Real-time event 107")
+SET (GDB_SIGNAL_REALTIME_108, 122, "SIG108", "Real-time event 108")
+SET (GDB_SIGNAL_REALTIME_109, 123, "SIG109", "Real-time event 109")
+SET (GDB_SIGNAL_REALTIME_110, 124, "SIG110", "Real-time event 110")
+SET (GDB_SIGNAL_REALTIME_111, 125, "SIG111", "Real-time event 111")
+SET (GDB_SIGNAL_REALTIME_112, 126, "SIG112", "Real-time event 112")
+SET (GDB_SIGNAL_REALTIME_113, 127, "SIG113", "Real-time event 113")
+SET (GDB_SIGNAL_REALTIME_114, 128, "SIG114", "Real-time event 114")
+SET (GDB_SIGNAL_REALTIME_115, 129, "SIG115", "Real-time event 115")
+SET (GDB_SIGNAL_REALTIME_116, 130, "SIG116", "Real-time event 116")
+SET (GDB_SIGNAL_REALTIME_117, 131, "SIG117", "Real-time event 117")
+SET (GDB_SIGNAL_REALTIME_118, 132, "SIG118", "Real-time event 118")
+SET (GDB_SIGNAL_REALTIME_119, 133, "SIG119", "Real-time event 119")
+SET (GDB_SIGNAL_REALTIME_120, 134, "SIG120", "Real-time event 120")
+SET (GDB_SIGNAL_REALTIME_121, 135, "SIG121", "Real-time event 121")
+SET (GDB_SIGNAL_REALTIME_122, 136, "SIG122", "Real-time event 122")
+SET (GDB_SIGNAL_REALTIME_123, 137, "SIG123", "Real-time event 123")
+SET (GDB_SIGNAL_REALTIME_124, 138, "SIG124", "Real-time event 124")
+SET (GDB_SIGNAL_REALTIME_125, 139, "SIG125", "Real-time event 125")
+SET (GDB_SIGNAL_REALTIME_126, 140, "SIG126", "Real-time event 126")
+SET (GDB_SIGNAL_REALTIME_127, 141, "SIG127", "Real-time event 127")
-SET (TARGET_SIGNAL_INFO, 142, "SIGINFO", "Information request")
+SET (GDB_SIGNAL_INFO, 142, "SIGINFO", "Information request")
/* Some signal we don't know about. */
-SET (TARGET_SIGNAL_UNKNOWN, 143, NULL, "Unknown signal")
+SET (GDB_SIGNAL_UNKNOWN, 143, NULL, "Unknown signal")
/* Use whatever signal we use when one is not specifically specified
(for passing to proceed and so on). */
-SET (TARGET_SIGNAL_DEFAULT, 144, NULL,
- "Internal error: printing TARGET_SIGNAL_DEFAULT")
+SET (GDB_SIGNAL_DEFAULT, 144, NULL,
+ "Internal error: printing GDB_SIGNAL_DEFAULT")
/* Mach exceptions. In versions of GDB before 5.2, these were just before
- TARGET_SIGNAL_INFO if you were compiling on a Mach host (and missing
+ GDB_SIGNAL_INFO if you were compiling on a Mach host (and missing
otherwise). */
SET (TARGET_EXC_BAD_ACCESS, 145, "EXC_BAD_ACCESS", "Could not access memory")
SET (TARGET_EXC_BAD_INSTRUCTION, 146, "EXC_BAD_INSTRUCTION",
@@ -197,4 +197,4 @@
/* If you are adding a new signal, add it just above this comment. */
/* Last and unused enum value, for sizing arrays, etc. */
-SET (TARGET_SIGNAL_LAST, 151, NULL, "TARGET_SIGNAL_MAGIC")
+SET (GDB_SIGNAL_LAST, 151, NULL, "GDB_SIGNAL_MAGIC")
diff --git a/include/gdb/signals.h b/include/gdb/signals.h
index 67902c6..a59d3b5 100644
--- a/include/gdb/signals.h
+++ b/include/gdb/signals.h
@@ -45,9 +45,9 @@
etc. are doing to address these issues. */
/* For an explanation of what each signal means, see
- target_signal_to_string. */
+ gdb_signal_to_string. */
-enum target_signal
+enum gdb_signal
{
#define SET(symbol, constant, name, string) \
symbol = constant,
diff --git a/include/leb128.h b/include/leb128.h
new file mode 100644
index 0000000..f584f72
--- /dev/null
+++ b/include/leb128.h
@@ -0,0 +1,136 @@
+/* Utilities for reading leb128 values.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with libiberty; see the file COPYING.LIB. If not, write
+to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/* The functions defined here can be speed critical.
+ Since they are all pretty small we keep things simple and just define
+ them all as "static inline".
+
+ WARNING: This file is used by GDB which is stuck at C90. :-(
+ Though it can use stdint.h, inttypes.h.
+ Therefore if you want to add support for "long long" you need
+ to wrap it in #ifdef CC_HAS_LONG_LONG. */
+
+#ifndef LEB128_H
+#define LEB128_H
+
+/* Get a definition for inline. */
+#include "ansidecl.h"
+
+/* Get a definition for NULL, size_t. */
+#include <stddef.h>
+
+#ifdef HAVE_STDINT_H
+#include <stdint.h>
+#endif
+#ifdef HAVE_INTTYPES_H
+#include <inttypes.h>
+#endif
+
+/* Decode the unsigned LEB128 constant at BUF into the variable pointed to
+ by R, and return the number of bytes read.
+ If we read off the end of the buffer, zero is returned,
+ and nothing is stored in R.
+
+ Note: The result is an int instead of a pointer to the next byte to be
+ read to avoid const-vs-non-const problems. */
+
+static inline size_t
+read_uleb128_to_uint64 (const unsigned char *buf, const unsigned char *buf_end,
+ uint64_t *r)
+{
+ const unsigned char *p = buf;
+ unsigned int shift = 0;
+ uint64_t result = 0;
+ unsigned char byte;
+
+ while (1)
+ {
+ if (p >= buf_end)
+ return 0;
+
+ byte = *p++;
+ result |= ((uint64_t) (byte & 0x7f)) << shift;
+ if ((byte & 0x80) == 0)
+ break;
+ shift += 7;
+ }
+
+ *r = result;
+ return p - buf;
+}
+
+/* Decode the signed LEB128 constant at BUF into the variable pointed to
+ by R, and return the number of bytes read.
+ If we read off the end of the buffer, zero is returned,
+ and nothing is stored in R.
+
+ Note: The result is an int instead of a pointer to the next byte to be
+ read to avoid const-vs-non-const problems. */
+
+static inline size_t
+read_sleb128_to_int64 (const unsigned char *buf, const unsigned char *buf_end,
+ int64_t *r)
+{
+ const unsigned char *p = buf;
+ unsigned int shift = 0;
+ int64_t result = 0;
+ unsigned char byte;
+
+ while (1)
+ {
+ if (p >= buf_end)
+ return 0;
+
+ byte = *p++;
+ result |= ((uint64_t) (byte & 0x7f)) << shift;
+ shift += 7;
+ if ((byte & 0x80) == 0)
+ break;
+ }
+ if (shift < (sizeof (*r) * 8) && (byte & 0x40) != 0)
+ result |= -(((uint64_t) 1) << shift);
+
+ *r = result;
+ return p - buf;
+}
+
+/* Return the number of bytes to read to skip past an LEB128 number in BUF.
+ If the end isn't found before reaching BUF_END, return zero.
+
+ Note: The result is an int instead of a pointer to the next byte to be
+ read to avoid const-vs-non-const problems. */
+
+static inline size_t
+skip_leb128 (const unsigned char *buf, const unsigned char *buf_end)
+{
+ const unsigned char *p = buf;
+ unsigned char byte;
+
+ while (1)
+ {
+ if (p == buf_end)
+ return 0;
+
+ byte = *p++;
+ if ((byte & 0x80) == 0)
+ return p - buf;
+ }
+}
+
+#endif /* LEB128_H */
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index af70340..209a472 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,23 @@
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * m68hc11.h: Add XGate definitions.
+ (struct m68hc11_opcode): Add xg_mask field.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+ Rhonda Wittels <rhonda@codesourcery.com>
+
+ * ppc.h (PPC_OPCODE_VLE): New definition.
+ (PPC_OP_SA): New macro.
+ (PPC_OP_SE_VLE): New macro.
+ (PPC_OP): Use a variable shift amount.
+ (powerpc_operand): Update comments.
+ (PPC_OPSHIFT_INV): New macro.
+ (PPC_OPERAND_CR): Replace with...
+ (PPC_OPERAND_CR_BIT): ...this and
+ (PPC_OPERAND_CR_REG): ...this.
+
+
2012-05-03 Sean Keys <skeys@ipdatasys.com>
* xgate.h: Header file for XGATE assembler.
diff --git a/include/opcode/m68hc11.h b/include/opcode/m68hc11.h
index 83f5a9a..1a00200 100644
--- a/include/opcode/m68hc11.h
+++ b/include/opcode/m68hc11.h
@@ -1,5 +1,6 @@
/* m68hc11.h -- Header file for Motorola 68HC11 & 68HC12 opcode table
- Copyright 1999, 2000, 2002, 2003, 2010 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2002, 2003, 2010, 2012
+ Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GDB, GAS, and the GNU binutils.
@@ -37,8 +38,7 @@
of the M6811_INIT register. At init time, the I/O registers are
mapped at 0x1000. Address of registers is then:
- 0x1000 + M6811_xxx
-*/
+ 0x1000 + M6811_xxx. */
#define M6811_PORTA 0x00 /* Port A register */
#define M6811__RES1 0x01 /* Unused/Reserved */
#define M6811_PIOC 0x02 /* Parallel I/O Control register */
@@ -364,6 +364,26 @@
#define M6812_INDEXED 0x20000000 /* n,r n = 5, 9 or 16-bits */
#define M6812_OP_IDX_P2 0x40000000
+/* XGATE defines.
+ These overlap with HC11/12 as above but not used at the same time. */
+#define M68XG_OP_NONE 0x0001
+#define M68XG_OP_IMM3 0x0002
+#define M68XG_OP_R 0x0004
+#define M68XG_OP_R_R 0x0008
+#define M68XG_OP_R_IMM4 0x0010
+#define M68XG_OP_R_R_R 0x0020
+#define M68XG_OP_REL9 0x0040
+#define M68XG_OP_REL10 0x0080
+#define M68XG_OP_R_R_OFFS5 0x0100
+#define M68XG_OP_RD_RB_RI 0x0200
+#define M68XG_OP_RD_RB_RIp 0x0400
+#define M68XG_OP_RD_RB_mRI 0x0800
+#define M68XG_OP_R_IMM8 0x1000
+#define M68XG_OP_R_IMM16 0x2000
+#define M68XG_OP_REG 0x4000 /* Register operand 1. */
+#define M68XG_OP_REG_2 0x8000 /* Register operand 2. */
+#define M68XG_MAX_OPERANDS 3 /* Max operands of triadic r1, r2, r3. */
+
/* Markers to identify some instructions. */
#define M6812_OP_EXG_MARKER 0x01000000 /* exg r1,r2 */
#define M6812_OP_TFR_MARKER 0x02000000 /* tfr r1,r2 */
@@ -374,35 +394,43 @@
#define M6812_OP_IBCC_MARKER 0x02000000 /* ibeq/ibne */
#define M6812_OP_TBCC_MARKER 0x01000000
+/* XGATE markers. */
+#define M68XG_OP_B_MARKER 0x04000000 /* bXX rel9 */
+#define M68XG_OP_BRA_MARKER 0x02000000 /* bra rel10 */
+
#define M6812_OP_TRAP_ID 0x80000000 /* trap #N */
#define M6811_OP_HIGH_ADDR 0x01000000 /* Used internally by gas. */
#define M6811_OP_LOW_ADDR 0x02000000
-#define M68HC12_BANK_VIRT 0x010000
-#define M68HC12_BANK_MASK 0x00003fff
-#define M68HC12_BANK_BASE 0x00008000
-#define M68HC12_BANK_SHIFT 14
-#define M68HC12_BANK_PAGE_MASK 0x0ff
+#define M68HC12_BANK_VIRT 0x010000
+#define M68HC12_BANK_MASK 0x00003fff
+#define M68HC12_BANK_BASE 0x00008000
+#define M68HC12_BANK_SHIFT 14
+#define M68HC12_BANK_PAGE_MASK 0x0ff
/* CPU identification. */
#define cpu6811 0x01
#define cpu6812 0x02
#define cpu6812s 0x04
+#define cpu9s12x 0x08 /* 9S12X main cpu. */
+#define cpuxgate 0x10 /* The XGATE module itself. */
/* The opcode table is an array of struct m68hc11_opcode. */
-struct m68hc11_opcode {
- const char* name; /* Op-code name */
+struct m68hc11_opcode
+{
+ const char * name; /* Op-code name. */
long format;
unsigned char size;
- unsigned char opcode;
+ unsigned int opcode;
unsigned char cycles_low;
unsigned char cycles_high;
unsigned char set_flags_mask;
unsigned char clr_flags_mask;
unsigned char chg_flags_mask;
unsigned char arch;
+ unsigned int xg_mask; /* Mask with zero in register place for xgate. */
};
/* Alias definition for 68HC12. */
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index e672502..2e789d6 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -65,6 +65,8 @@
instructions. */
extern const struct powerpc_opcode powerpc_opcodes[];
extern const int powerpc_num_opcodes;
+extern const struct powerpc_opcode vle_opcodes[];
+extern const int vle_num_opcodes;
/* Values defined for the flags field of a struct powerpc_opcode. */
@@ -183,8 +185,20 @@
/* Opcode is supported by Thread management APU */
#define PPC_OPCODE_TMR 0x800000000ull
+/* Opcode which is supported by the VLE extension. */
+#define PPC_OPCODE_VLE 0x1000000000ull
+
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)
+
+/* A macro to determine if the instruction is a 2-byte VLE insn. */
+#define PPC_OP_SE_VLE(m) ((m) <= 0xffff)
+
+/* A macro to extract the major opcode from a VLE instruction. */
+#define VLE_OP(i,m) (((i) >> ((m) <= 0xffff ? 10 : 26)) & 0x3f)
+
+/* A macro to convert a VLE opcode to a VLE opcode segment. */
+#define VLE_OP_TO_SEG(i) ((i) >> 1)
/* The operands table is an array of struct powerpc_operand. */
@@ -193,16 +207,22 @@
/* A bitmask of bits in the operand. */
unsigned int bitm;
- /* How far the operand is left shifted in the instruction.
- -1 to indicate that BITM and SHIFT cannot be used to determine
- where the operand goes in the insn. */
+ /* The shift operation to be applied to the operand. No shift
+ is made if this is zero. For positive values, the operand
+ is shifted left by SHIFT. For negative values, the operand
+ is shifted right by -SHIFT. Use PPC_OPSHIFT_INV to indicate
+ that BITM and SHIFT cannot be used to determine where the
+ operand goes in the insn. */
int shift;
/* Insertion function. This is used by the assembler. To insert an
operand value into an instruction, check this field.
If it is NULL, execute
- i |= (op & o->bitm) << o->shift;
+ if (o->shift >= 0)
+ i |= (op & o->bitm) << o->shift;
+ else
+ i |= (op & o->bitm) >> -o->shift;
(i is the instruction which we are filling in, o is a pointer to
this structure, and op is the operand value).
@@ -220,7 +240,10 @@
extract this operand type from an instruction, check this field.
If it is NULL, compute
- op = (i >> o->shift) & o->bitm;
+ if (o->shift >= 0)
+ op = (i >> o->shift) & o->bitm;
+ else
+ op = (i << -o->shift) & o->bitm;
if ((o->flags & PPC_OPERAND_SIGNED) != 0)
sign_extend (op);
(i is the instruction, o is a pointer to this structure, and op
@@ -244,6 +267,11 @@
extern const struct powerpc_operand powerpc_operands[];
extern const unsigned int num_powerpc_operands;
+/* Use with the shift field of a struct powerpc_operand to indicate
+ that BITM and SHIFT cannot be used to determine where the operand
+ goes in the insn. */
+#define PPC_OPSHIFT_INV (-1 << 31)
+
/* Values defined for the flags field of a struct powerpc_operand. */
/* This operand takes signed values. */
@@ -277,7 +305,7 @@
cr4 4 cr5 5 cr6 6 cr7 7
These may be combined arithmetically, as in cr2*4+gt. These are
only supported on the PowerPC, not the POWER. */
-#define PPC_OPERAND_CR (0x10)
+#define PPC_OPERAND_CR_BIT (0x10)
/* This operand names a register. The disassembler uses this to print
register names with a leading 'r'. */
@@ -342,6 +370,9 @@
/* This operand names a vector-scalar unit register. The disassembler
prints these with a leading 'vs'. */
#define PPC_OPERAND_VSR (0x100000)
+
+/* This is a CR FIELD that does not use symbolic names. */
+#define PPC_OPERAND_CR_REG (0x200000)
/* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 354c363..36e548b 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,115 @@
+2012-06-02 Andreas Schwab <schwab@linux-m68k.org>
+
+ * Makefile.am (TEXINFO_TEX): Remove $(top_srcdir) prefix.
+ * Makefile.in: Regenerate.
+
+2012-05-30 Alan Modra <amodra@gmail.com>
+
+ * ldlang.h (lang_output_section_statement_type): Rename
+ "section_relative_symbol" field to "update_dot".
+ * ldlang.c: Update all uses.
+ (strip_excluded_output_sections): Don't test update_dot_tree here..
+ (lang_leave_overlay): ..set update_dot here.
+
+2012-05-26 Alan Modra <amodra@gmail.com>
+
+ * ldlex.h (enum option_values): Move from..
+ * lexsup.c: ..here.
+ * emultempl/ppc32elf.em: Include ldlex.h.
+ (PARSE_AND_LIST_ARGS_CASES): Disable optimisations when
+ --traditional-format.
+ * emultempl/ppc64elf.em: Likewise.
+
+2012-05-25 Alan Modra <amodra@gmail.com>
+
+ PR ld/13909
+ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Handle
+ multiple .eh_frame sections attached to bfd.
+
+2012-05-23 Cary Coutant <ccoutant@google.com>
+
+ * scripttempl/armbpabi.sc: Match .data.rel.ro.* sections more
+ carefully. Fix typo where .rela.data.rel.ro matches
+ .rel.data.rel.ro.
+ * scripttempl/mep.sc: Likewise.
+ * scripttempl/elf.sc: Match .data.rel.ro.* sections more carefully.
+ * scripttempl/elf64hppa.sc: Likewise.
+ * scripttempl/elfxtensa.sc: Likewise.
+
+2012-05-17 Daniel Richard G. <skunk@iskunk.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * configure.in: Add check that sysdep.h has been included before
+ any system header files.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * sysdep.h: Generate an error if included before config.h.
+
+2012-05-16 Sergio Durigan Junior <sergiodj@redhat.com>
+
+ * emultempl/m68hc1xelf.em (hook_in_stub): Pass proper `bfd'
+ as the first argument for `bfd_get_section_name'.
+
+2012-05-16 Samuel Thibault <samuel.thibault@ens-lyon.org>
+
+ PR ld/14069
+ * emultempl/elf32.em: Include *-*-gnu* targets in ld.so.conf
+ support.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * NEWS: Mention the support for S12X processors.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+
+ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
+ Pass it to callback.
+ (walk_wild_section_general): Pass section_flag_list to callback.
+ (lang_add_section): Add sflag_list parm.
+ Move out logic to keep / omit a section & call bfd_lookup_section_flags.
+ (output_section_callback_fast): Add sflag_list parm.
+ Add new parm to lang_add_section calls.
+ (output_section_callback): Likewise.
+ (check_section_callback): Add sflag_list parm.
+ (lang_place_orphans): Add new parm to lang_add_section calls.
+ (gc_section_callback): Add sflag_list parm.
+ (find_relro_section_callback): Likewise.
+ * ldlang.h (callback_t): Add flag_info parm.
+ (lang_add_section): Add sflag_list parm.
+ * emultempl/armelf.em (elf32_arm_add_stub_section):
+ Add lang_add_section parm.
+ * emultempl/beos.em (gld*_place_orphan): Likewise.
+ * emultempl/elf32.em (gld*_place_orphan): Likewise.
+ * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
+ * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
+ * emultempl/mipself.em (mips_add_stub_section): Likewise.
+ * emultempl/mmo.em (mmo_place_orphan): Likewise.
+ * emultempl/pe.em (gld_*_place_orphan): Likewise.
+ * emultempl/pep.em (gld_*_place_orphan): Likewise.
+ * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
+ * emultempl/spuelf.em (spu_place_special_section): Likewise.
+ * emultempl/vms.em (vms_place_orphan): Likewise.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+
+ * NEWS: Mention PowerPC VLE port.
+
+2012-05-11 Daniel Richard G. <skunk@iskunk.org>
+
+ PR binutils/14028
+ * configure.in: Invoke ACX_HEADER_STRING.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * sysdep.h: If STRINGS_WITH_STRING is defined then include both
+ string.h and strings.h.
+
+2012-05-08 Alan Modra <amodra@gmail.com>
+
+ * Makefile.am (check_DEJAGNU): Export LC_ALL=C in place of other
+ LC and LANG environment vars.
+ * Makefile.in: Regenerate.
+
2012-05-07 Tristan Gingold <gingold@adacore.com>
* pe-dll.c (udef_table): Make it static.
@@ -30,14 +142,14 @@
2012-04-24 Alan Modra <amodra@gmail.com>
- * ld/ldlang.c (size_input_section): Use sec_info_type rather than
+ * ldlang.c (size_input_section): Use sec_info_type rather than
usrdata->flags.just_syms.
- * ld/ldwrite.c (build_link_order): Likewise.
- * ld/emultempl/hppaelf.em (build_section_lists): Likewise.
- * ld/emultempl/ppc64elf.em (build_toc_list): Likewise.
- * ld/emultempl/armelf.em (build_section_lists): Likewise.
+ * ldwrite.c (build_link_order): Likewise.
+ * emultempl/hppaelf.em (build_section_lists): Likewise.
+ * emultempl/ppc64elf.em (build_toc_list): Likewise.
+ * emultempl/armelf.em (build_section_lists): Likewise.
(after_allocation): Update for renamed sec_info_type value.
- * ld/emultempl/tic6xdsbt.em: Likewise.
+ * emultempl/tic6xdsbt.em: Likewise.
2012-04-12 Roland McGrath <mcgrathr@google.com>
@@ -113,7 +225,7 @@
2012-03-25 Alan Modra <amodra@gmail.com>
* ldemul.c (before_allocation_default): Revert last change.
- ldlang.c (lang_add_section): Likewise.
+ * ldlang.c (lang_add_section): Likewise.
(strip_excluded_output_sections): Don't strip output sections with
user input sections when emitrelocations, unless all are SEC_EXCLUDE.
diff --git a/ld/Makefile.am b/ld/Makefile.am
index 65bfdcf..f35ba4b 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -2,7 +2,7 @@
AUTOMAKE_OPTIONS = dejagnu no-texinfo.tex no-dist foreign
ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd
-TEXINFO_TEX = $(top_srcdir)/../texinfo/texinfo.tex
+TEXINFO_TEX = ../texinfo/texinfo.tex
SUBDIRS = po
@@ -2113,7 +2113,7 @@
check-DEJAGNU: site.exp
srcroot=`cd $(srcdir) && pwd`; export srcroot; \
r=`pwd`; export r; \
- LC_COLLATE=; LC_ALL=; LANG=; export LC_COLLATE LC_ALL LANG; \
+ LC_ALL=C; export LC_ALL; \
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
diff --git a/ld/Makefile.in b/ld/Makefile.in
index a9fca38..a58151d 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -119,7 +119,7 @@
SOURCES = $(libldtestplug_la_SOURCES) $(ld_new_SOURCES) \
$(EXTRA_ld_new_SOURCES)
INFO_DEPS = ld.info
-am__TEXINFO_TEX_DIR = $(srcdir)/$(top_srcdir)/../texinfo
+am__TEXINFO_TEX_DIR = $(srcdir)/../texinfo
DVIS = ld.dvi
PDFS = ld.pdf
PSS = ld.ps
@@ -344,7 +344,7 @@
use_sysroot = @use_sysroot@
AUTOMAKE_OPTIONS = dejagnu no-texinfo.tex no-dist foreign
ACLOCAL_AMFLAGS = -I .. -I ../config -I ../bfd
-TEXINFO_TEX = $(top_srcdir)/../texinfo/texinfo.tex
+TEXINFO_TEX = ../texinfo/texinfo.tex
SUBDIRS = po
tooldir = $(exec_prefix)/$(target_alias)
@@ -3563,7 +3563,7 @@
check-DEJAGNU: site.exp
srcroot=`cd $(srcdir) && pwd`; export srcroot; \
r=`pwd`; export r; \
- LC_COLLATE=; LC_ALL=; LANG=; export LC_COLLATE LC_ALL LANG; \
+ LC_ALL=C; export LC_ALL; \
EXPECT=$(EXPECT); export EXPECT; \
runtest=$(RUNTEST); \
if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
diff --git a/ld/NEWS b/ld/NEWS
index 0f1b7be..cb2d428 100644
--- a/ld/NEWS
+++ b/ld/NEWS
@@ -1,5 +1,9 @@
-*- text -*-
+* Add support for S12X processor.
+
+* Add support for the VLE extension to the PowerPC architecture.
+
* Add support for the Freescale XGATE architecture.
* Add option -f FILE on AIX (for response file).
diff --git a/ld/config.in b/ld/config.in
index 0a3219e..5fbc4a3 100644
--- a/ld/config.in
+++ b/ld/config.in
@@ -1,5 +1,12 @@
/* config.in. Generated from configure.in by autoheader. */
+/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1
+
/* Define to 1 if translation of program messages to the user's native
language is requested. */
#undef ENABLE_NLS
@@ -178,6 +185,9 @@
/* Define to 1 if you have the ANSI C header files. */
#undef STDC_HEADERS
+/* Define if you can safely include both <string.h> and <strings.h>. */
+#undef STRING_WITH_STRINGS
+
/* Use b modifier when opening binary files? */
#undef USE_BINARY_FOPEN
diff --git a/ld/configure b/ld/configure
index d087605..f4e4bb6 100755
--- a/ld/configure
+++ b/ld/configure
@@ -4750,6 +4750,9 @@
ac_config_headers="$ac_config_headers config.h:config.in"
+# PR 14072
+
+
if test -z "$target" ; then
as_fn_error "Unrecognized target system type; please check config.sub." "$LINENO" 5
fi
@@ -12174,7 +12177,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 12177 "configure"
+#line 12180 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -12280,7 +12283,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 12283 "configure"
+#line 12286 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -16216,6 +16219,38 @@
done
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether string.h and strings.h may both be included" >&5
+$as_echo_n "checking whether string.h and strings.h may both be included... " >&6; }
+if test "${gcc_cv_header_string+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <string.h>
+#include <strings.h>
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ gcc_cv_header_string=yes
+else
+ gcc_cv_header_string=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_header_string" >&5
+$as_echo "$gcc_cv_header_string" >&6; }
+if test $gcc_cv_header_string = yes; then
+
+$as_echo "#define STRING_WITH_STRINGS 1" >>confdefs.h
+
+fi
+
for ac_func in glob mkstemp realpath sbrk setlocale waitpid
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
diff --git a/ld/configure.in b/ld/configure.in
index b29923c..b844927 100644
--- a/ld/configure.in
+++ b/ld/configure.in
@@ -124,6 +124,15 @@
AC_CONFIG_HEADERS([config.h:config.in])
+# PR 14072
+AH_VERBATIM([00_CONFIG_H_CHECK],
+[/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1])
+
if test -z "$target" ; then
AC_MSG_ERROR(Unrecognized target system type; please check config.sub.)
fi
@@ -164,6 +173,7 @@
AC_CHECK_HEADERS(string.h strings.h stdlib.h unistd.h elf-hints.h limits.h locale.h sys/param.h)
AC_CHECK_HEADERS(fcntl.h sys/file.h sys/time.h sys/stat.h)
+ACX_HEADER_STRING
AC_CHECK_FUNCS(glob mkstemp realpath sbrk setlocale waitpid)
AC_CHECK_FUNCS(open lseek close)
AC_HEADER_DIRENT
diff --git a/ld/emultempl/armelf.em b/ld/emultempl/armelf.em
index 0ab2ed1..a37a35d 100644
--- a/ld/emultempl/armelf.em
+++ b/ld/emultempl/armelf.em
@@ -208,7 +208,7 @@
info.input_section = input_section;
lang_list_init (&info.add);
- lang_add_section (&info.add, stub_sec, os);
+ lang_add_section (&info.add, stub_sec, NULL, os);
if (info.add.head == NULL)
goto err_ret;
diff --git a/ld/emultempl/beos.em b/ld/emultempl/beos.em
index cd96729..2071d8e 100644
--- a/ld/emultempl/beos.em
+++ b/ld/emultempl/beos.em
@@ -718,7 +718,7 @@
The sections still have to be sorted, but that has to wait until
all such sections have been processed by us. The sorting is done by
sort_sections. */
- lang_add_section (&l->wild_statement.children, s, os);
+ lang_add_section (&l->wild_statement.children, s, NULL, os);
return os;
}
diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
index 09f54da..9e4c5a6 100644
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -73,7 +73,7 @@
if [ "x${USE_LIBPATH}" = xyes ] ; then
case ${target} in
- *-*-linux-* | *-*-k*bsd*-*)
+ *-*-linux-* | *-*-k*bsd*-* | *-*-gnu*)
fragment <<EOF
#ifdef HAVE_GLOB
#include <glob.h>
@@ -376,7 +376,7 @@
EOF
case ${target} in
- *-*-linux-* | *-*-k*bsd*-*)
+ *-*-linux-* | *-*-k*bsd*-* | *-*-gnu*)
fragment <<EOF
{
struct bfd_link_needed_list *l;
@@ -622,7 +622,7 @@
# FreeBSD
;;
- *-*-linux-* | *-*-k*bsd*-*)
+ *-*-linux-* | *-*-k*bsd*-* | *-*-gnu*)
fragment <<EOF
/* For a native linker, check the file /etc/ld.so.conf for directories
in which we may find shared libraries. /etc/ld.so.conf is really
@@ -1144,10 +1144,11 @@
if (!warn_eh_frame)
{
s = bfd_get_section_by_name (abfd, ".eh_frame");
- warn_eh_frame
- = (s
- && s->size > 8
- && !bfd_is_abs_section (s->output_section));
+ while (s != NULL
+ && (s->size <= 8
+ || bfd_is_abs_section (s->output_section)))
+ s = bfd_get_next_section_by_name (s);
+ warn_eh_frame = s != NULL;
}
if (elfbfd && warn_eh_frame)
break;
@@ -1312,7 +1313,7 @@
# FreeBSD
;;
- *-*-linux-* | *-*-k*bsd*-*)
+ *-*-linux-* | *-*-k*bsd*-* | *-*-gnu*)
# Linux
fragment <<EOF
if (gld${EMULATION_NAME}_check_ld_so_conf (l->name, force))
@@ -1871,7 +1872,7 @@
If the section already exists but does not have any flags
set, then it has been created by the linker, probably as a
result of a --section-start command line switch. */
- lang_add_section (&os->children, s, os);
+ lang_add_section (&os->children, s, NULL, os);
return os;
}
@@ -1885,7 +1886,7 @@
unused one and use that. */
if (match_by_name)
{
- lang_add_section (&match_by_name->children, s, match_by_name);
+ lang_add_section (&match_by_name->children, s, NULL, match_by_name);
return match_by_name;
}
@@ -1918,7 +1919,7 @@
&& hold[orphan_text].os != NULL)
{
os = hold[orphan_text].os;
- lang_add_section (&os->children, s, os);
+ lang_add_section (&os->children, s, NULL, os);
return os;
}
diff --git a/ld/emultempl/hppaelf.em b/ld/emultempl/hppaelf.em
index 41df8a2..65c1ea5 100644
--- a/ld/emultempl/hppaelf.em
+++ b/ld/emultempl/hppaelf.em
@@ -195,7 +195,7 @@
info.input_section = input_section;
lang_list_init (&info.add);
- lang_add_section (&info.add, stub_sec, os);
+ lang_add_section (&info.add, stub_sec, NULL, os);
if (info.add.head == NULL)
goto err_ret;
diff --git a/ld/emultempl/m68hc1xelf.em b/ld/emultempl/m68hc1xelf.em
index 4751346..594b193 100644
--- a/ld/emultempl/m68hc1xelf.em
+++ b/ld/emultempl/m68hc1xelf.em
@@ -204,9 +204,9 @@
case lang_input_section_enum:
if (l->input_section.section == info->input_section
- || strcmp (bfd_get_section_name (output_section,
+ || strcmp (bfd_get_section_name (l->input_section.section->owner,
l->input_section.section),
- bfd_get_section_name (output_section,
+ bfd_get_section_name (info->input_section->owner,
info->input_section)) == 0)
{
/* We've found our section. Insert the stub immediately
@@ -271,7 +271,7 @@
at the correct place. */
info.input_section = tramp_section;
lang_list_init (&info.add);
- lang_add_section (&info.add, stub_sec, os);
+ lang_add_section (&info.add, stub_sec, NULL, os);
if (info.add.head == NULL)
goto err_ret;
diff --git a/ld/emultempl/mipself.em b/ld/emultempl/mipself.em
index ada0786..9ac61a2 100644
--- a/ld/emultempl/mipself.em
+++ b/ld/emultempl/mipself.em
@@ -180,7 +180,7 @@
/* Initialize a statement list that contains only the new statement. */
lang_list_init (&info.add);
- lang_add_section (&info.add, stub_sec, os);
+ lang_add_section (&info.add, stub_sec, NULL, os);
if (info.add.head == NULL)
goto err_ret;
diff --git a/ld/emultempl/mmo.em b/ld/emultempl/mmo.em
index 9b18186..a1d5472 100644
--- a/ld/emultempl/mmo.em
+++ b/ld/emultempl/mmo.em
@@ -75,7 +75,7 @@
(regardless of whether the linker script lists it as input). */
if (os != NULL)
{
- lang_add_section (&os->children, s, os);
+ lang_add_section (&os->children, s, NULL, os);
return os;
}
diff --git a/ld/emultempl/pe.em b/ld/emultempl/pe.em
index fe188f7..947f6ad 100644
--- a/ld/emultempl/pe.em
+++ b/ld/emultempl/pe.em
@@ -1915,7 +1915,7 @@
If the section already exists but does not have any flags set,
then it has been created by the linker, probably as a result of
a --section-start command line switch. */
- lang_add_section (&add_child, s, os);
+ lang_add_section (&add_child, s, NULL, os);
break;
}
@@ -1929,7 +1929,7 @@
unused one and use that. */
if (os == NULL && match_by_name)
{
- lang_add_section (&match_by_name->children, s, match_by_name);
+ lang_add_section (&match_by_name->children, s, NULL, match_by_name);
return match_by_name;
}
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index a24c30a..d3f5c83 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -1651,7 +1651,7 @@
If the section already exists but does not have any flags set,
then it has been created by the linker, probably as a result of
a --section-start command line switch. */
- lang_add_section (&add_child, s, os);
+ lang_add_section (&add_child, s, NULL, os);
break;
}
@@ -1665,7 +1665,7 @@
unused one and use that. */
if (os == NULL && match_by_name)
{
- lang_add_section (&match_by_name->children, s, match_by_name);
+ lang_add_section (&match_by_name->children, s, NULL, match_by_name);
return match_by_name;
}
diff --git a/ld/emultempl/ppc32elf.em b/ld/emultempl/ppc32elf.em
index d9d7c03..6843770 100644
--- a/ld/emultempl/ppc32elf.em
+++ b/ld/emultempl/ppc32elf.em
@@ -1,5 +1,5 @@
# This shell script emits a C file. -*- C -*-
-# Copyright 2003, 2005, 2007, 2008, 2009, 2010, 2011
+# Copyright 2003, 2005, 2007, 2008, 2009, 2010, 2011, 2012
# Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
@@ -27,6 +27,7 @@
#include "libbfd.h"
#include "elf32-ppc.h"
+#include "ldlex.h"
#define is_ppc_elf(bfd) \
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
@@ -237,6 +238,11 @@
case OPTION_OLD_GOT:
old_got = 1;
break;
+
+ case OPTION_TRADITIONAL_FORMAT:
+ notlsopt = 1;
+ no_tls_get_addr_opt = 1;
+ return FALSE;
'
# Put these extra ppc32elf routines in ld_${EMULATION_NAME}_emulation
diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em
index 3b2e4bb..bad3e2c 100644
--- a/ld/emultempl/ppc64elf.em
+++ b/ld/emultempl/ppc64elf.em
@@ -29,6 +29,7 @@
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf64-ppc.h"
+#include "ldlex.h"
/* Fake input file for stubs. */
static lang_input_statement_type *stub_file;
@@ -395,7 +396,7 @@
info.input_section = input_section;
lang_list_init (&info.add);
- lang_add_section (&info.add, stub_sec, os);
+ lang_add_section (&info.add, stub_sec, NULL, os);
if (info.add.head == NULL)
goto err_ret;
@@ -850,6 +851,16 @@
case OPTION_NON_OVERLAPPING_OPD:
non_overlapping_opd = 1;
break;
+
+ case OPTION_TRADITIONAL_FORMAT:
+ no_tls_opt = 1;
+ no_tls_get_addr_opt = 1;
+ no_opd_opt = 1;
+ no_toc_opt = 1;
+ no_multi_toc = 1;
+ no_toc_sort = 1;
+ plt_static_chain = 1;
+ return FALSE;
'
# Put these extra ppc64elf routines in ld_${EMULATION_NAME}_emulation
diff --git a/ld/emultempl/spuelf.em b/ld/emultempl/spuelf.em
index cd1316f..35c4d41 100644
--- a/ld/emultempl/spuelf.em
+++ b/ld/emultempl/spuelf.em
@@ -151,7 +151,7 @@
lang_statement_list_type add;
lang_list_init (&add);
- lang_add_section (&add, s, os);
+ lang_add_section (&add, s, NULL, os);
*add.tail = os->children.head;
os->children.head = add.head;
}
@@ -168,7 +168,7 @@
lang_add_assignment (exp_assign (".", e_size));
pop_stat_ptr ();
}
- lang_add_section (&os->children, s, os);
+ lang_add_section (&os->children, s, NULL, os);
}
s->output_section->size += s->size;
diff --git a/ld/emultempl/vms.em b/ld/emultempl/vms.em
index 98837e3..30c1a16 100644
--- a/ld/emultempl/vms.em
+++ b/ld/emultempl/vms.em
@@ -117,7 +117,7 @@
if (hold_data.os != NULL)
{
- lang_add_section (&hold_data.os->children, s, hold_data.os);
+ lang_add_section (&hold_data.os->children, s, NULL, hold_data.os);
return hold_data.os;
}
else
diff --git a/ld/ldlang.c b/ld/ldlang.c
index 66216c5..9674f2e 100644
--- a/ld/ldlang.c
+++ b/ld/ldlang.c
@@ -247,9 +247,6 @@
{
struct name_list *list_tmp;
- /* Propagate the section_flag_info from the wild statement to the section. */
- s->section_flag_info = ptr->section_flag_list;
-
/* Don't process sections from files which were excluded. */
for (list_tmp = sec->spec.exclude_name_list;
list_tmp;
@@ -276,7 +273,7 @@
return;
}
- (*callback) (ptr, sec, s, file, data);
+ (*callback) (ptr, sec, s, ptr->section_flag_list, file, data);
}
/* Lowest common denominator routine that can handle everything correctly,
@@ -295,7 +292,7 @@
{
sec = ptr->section_list;
if (sec == NULL)
- (*callback) (ptr, sec, s, file, data);
+ (*callback) (ptr, sec, s, ptr->section_flag_list, file, data);
while (sec != NULL)
{
@@ -517,6 +514,7 @@
output_section_callback_fast (lang_wild_statement_type *ptr,
struct wildcard_list *sec,
asection *section,
+ struct flag_info *sflag_list ATTRIBUTE_UNUSED,
lang_input_statement_type *file,
void *output)
{
@@ -549,7 +547,7 @@
if (tree->left)
output_section_callback_tree_to_list (ptr, tree->left, output);
- lang_add_section (&ptr->children, tree->section,
+ lang_add_section (&ptr->children, tree->section, NULL,
(lang_output_section_statement_type *) output);
if (tree->right)
@@ -1824,7 +1822,7 @@
if (add_child == NULL)
add_child = &os->children;
- lang_add_section (add_child, s, os);
+ lang_add_section (add_child, s, NULL, os);
if (after && (s->flags & (SEC_LOAD | SEC_ALLOC)) != 0)
{
@@ -2242,16 +2240,15 @@
foo.o(.text, .data). */
/* Add SECTION to the output section OUTPUT. Do this by creating a
- lang_input_section statement which is placed at PTR. FILE is the
- input file which holds SECTION. */
+ lang_input_section statement which is placed at PTR. */
void
lang_add_section (lang_statement_list_type *ptr,
asection *section,
+ struct flag_info *sflag_info,
lang_output_section_statement_type *output)
{
flagword flags = section->flags;
- struct flag_info *sflag_info = section->section_flag_info;
bfd_boolean discard;
lang_input_section_type *new_section;
@@ -2283,24 +2280,11 @@
if (sflag_info)
{
- if (sflag_info->flags_initialized == FALSE)
- bfd_lookup_section_flags (&link_info, sflag_info);
+ bfd_boolean keep;
- if (sflag_info->only_with_flags != 0
- && sflag_info->not_with_flags != 0
- && ((sflag_info->not_with_flags & flags) != 0
- || (sflag_info->only_with_flags & flags)
- != sflag_info->only_with_flags))
- return;
-
- if (sflag_info->only_with_flags != 0
- && (sflag_info->only_with_flags & flags)
- != sflag_info->only_with_flags)
- return;
-
- if (sflag_info->not_with_flags != 0
- && (sflag_info->not_with_flags & flags) != 0)
- return;
+ keep = bfd_lookup_section_flags (&link_info, sflag_info, section);
+ if (!keep)
+ return;
}
if (section->output_section != NULL)
@@ -2513,6 +2497,7 @@
output_section_callback (lang_wild_statement_type *ptr,
struct wildcard_list *sec,
asection *section,
+ struct flag_info *sflag_info,
lang_input_statement_type *file,
void *output)
{
@@ -2533,14 +2518,14 @@
of the current list. */
if (before == NULL)
- lang_add_section (&ptr->children, section, os);
+ lang_add_section (&ptr->children, section, sflag_info, os);
else
{
lang_statement_list_type list;
lang_statement_union_type **pp;
lang_list_init (&list);
- lang_add_section (&list, section, os);
+ lang_add_section (&list, section, sflag_info, os);
/* If we are discarding the section, LIST.HEAD will
be NULL. */
@@ -2566,6 +2551,7 @@
check_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED,
struct wildcard_list *sec ATTRIBUTE_UNUSED,
asection *section,
+ struct flag_info *sflag_info ATTRIBUTE_UNUSED,
lang_input_statement_type *file ATTRIBUTE_UNUSED,
void *output)
{
@@ -3924,8 +3910,7 @@
{
/* We don't set bfd_section to NULL since bfd_section of the
removed output section statement may still be used. */
- if (!os->section_relative_symbol
- && !os->update_dot_tree)
+ if (!os->update_dot)
os->ignored = TRUE;
output_section->flags |= SEC_EXCLUDE;
bfd_section_list_remove (link_info.output_bfd, output_section);
@@ -5288,7 +5273,7 @@
|| tree->type.node_class == etree_assign)
&& (tree->assign.dst [0] != '.'
|| tree->assign.dst [1] != '\0'))
- output_section_statement->section_relative_symbol = 1;
+ output_section_statement->update_dot = 1;
if (!output_section_statement->ignored)
{
@@ -6031,7 +6016,7 @@
= lang_output_section_statement_lookup (".bss", 0,
TRUE);
lang_add_section (&default_common_section->children, s,
- default_common_section);
+ NULL, default_common_section);
}
}
else
@@ -6053,7 +6038,7 @@
&& (link_info.relocatable
|| (s->flags & (SEC_LOAD | SEC_ALLOC)) == 0))
os->addr_tree = exp_intop (0);
- lang_add_section (&os->children, s, os);
+ lang_add_section (&os->children, s, NULL, os);
}
}
}
@@ -6274,6 +6259,7 @@
gc_section_callback (lang_wild_statement_type *ptr,
struct wildcard_list *sec ATTRIBUTE_UNUSED,
asection *section,
+ struct flag_info *sflag_info ATTRIBUTE_UNUSED,
lang_input_statement_type *file ATTRIBUTE_UNUSED,
void *data ATTRIBUTE_UNUSED)
{
@@ -6345,6 +6331,7 @@
find_relro_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED,
struct wildcard_list *sec ATTRIBUTE_UNUSED,
asection *section,
+ struct flag_info *sflag_info ATTRIBUTE_UNUSED,
lang_input_statement_type *file ATTRIBUTE_UNUSED,
void *data)
{
@@ -7454,8 +7441,11 @@
/* After setting the size of the last section, set '.' to end of the
overlay region. */
if (overlay_list != NULL)
- overlay_list->os->update_dot_tree
- = exp_assign (".", exp_binop ('+', overlay_vma, overlay_max));
+ {
+ overlay_list->os->update_dot = 1;
+ overlay_list->os->update_dot_tree
+ = exp_assign (".", exp_binop ('+', overlay_vma, overlay_max));
+ }
l = overlay_list;
while (l != NULL)
diff --git a/ld/ldlang.h b/ld/ldlang.h
index e2d19b1..a973fcb 100644
--- a/ld/ldlang.h
+++ b/ld/ldlang.h
@@ -163,8 +163,8 @@
unsigned int all_input_readonly : 1;
/* If this section should be ignored. */
unsigned int ignored : 1;
- /* If there is a symbol relative to this section. */
- unsigned int section_relative_symbol : 1;
+ /* If this section should update "dot". Prevents section being ignored. */
+ unsigned int update_dot : 1;
} lang_output_section_statement_type;
typedef struct
@@ -314,7 +314,8 @@
typedef struct lang_wild_statement_struct lang_wild_statement_type;
typedef void (*callback_t) (lang_wild_statement_type *, struct wildcard_list *,
- asection *, lang_input_statement_type *, void *);
+ asection *, struct flag_info *,
+ lang_input_statement_type *, void *);
typedef void (*walk_wild_section_handler_t) (lang_wild_statement_type *,
lang_input_statement_type *,
@@ -616,7 +617,7 @@
(void);
extern void lang_add_section
(lang_statement_list_type *, asection *,
- lang_output_section_statement_type *);
+ struct flag_info *, lang_output_section_statement_type *);
extern void lang_new_phdr
(const char *, etree_type *, bfd_boolean, bfd_boolean, etree_type *,
etree_type *);
diff --git a/ld/ldlex.h b/ld/ldlex.h
index 739a9b0..e14107c 100644
--- a/ld/ldlex.h
+++ b/ld/ldlex.h
@@ -24,6 +24,120 @@
#include <stdio.h>
+/* Codes used for the long options with no short synonyms. 150 isn't
+ special; it's just an arbitrary non-ASCII char value. */
+enum option_values
+{
+ OPTION_ASSERT = 150,
+ OPTION_CALL_SHARED,
+ OPTION_CREF,
+ OPTION_DEFSYM,
+ OPTION_DEMANGLE,
+ OPTION_DYNAMIC_LINKER,
+ OPTION_SYSROOT,
+ OPTION_EB,
+ OPTION_EL,
+ OPTION_EMBEDDED_RELOCS,
+ OPTION_EXPORT_DYNAMIC,
+ OPTION_NO_EXPORT_DYNAMIC,
+ OPTION_HELP,
+ OPTION_IGNORE,
+ OPTION_MAP,
+ OPTION_NO_DEMANGLE,
+ OPTION_NO_KEEP_MEMORY,
+ OPTION_NO_WARN_MISMATCH,
+ OPTION_NO_WARN_SEARCH_MISMATCH,
+ OPTION_NOINHIBIT_EXEC,
+ OPTION_NON_SHARED,
+ OPTION_NO_WHOLE_ARCHIVE,
+ OPTION_OFORMAT,
+ OPTION_RELAX,
+ OPTION_NO_RELAX,
+ OPTION_RETAIN_SYMBOLS_FILE,
+ OPTION_RPATH,
+ OPTION_RPATH_LINK,
+ OPTION_SHARED,
+ OPTION_SONAME,
+ OPTION_SORT_COMMON,
+ OPTION_SORT_SECTION,
+ OPTION_STATS,
+ OPTION_SYMBOLIC,
+ OPTION_SYMBOLIC_FUNCTIONS,
+ OPTION_TASK_LINK,
+ OPTION_TBSS,
+ OPTION_TDATA,
+ OPTION_TTEXT,
+ OPTION_TTEXT_SEGMENT,
+ OPTION_TRADITIONAL_FORMAT,
+ OPTION_UR,
+ OPTION_VERBOSE,
+ OPTION_VERSION,
+ OPTION_VERSION_SCRIPT,
+ OPTION_VERSION_EXPORTS_SECTION,
+ OPTION_DYNAMIC_LIST,
+ OPTION_DYNAMIC_LIST_CPP_NEW,
+ OPTION_DYNAMIC_LIST_CPP_TYPEINFO,
+ OPTION_DYNAMIC_LIST_DATA,
+ OPTION_WARN_COMMON,
+ OPTION_WARN_CONSTRUCTORS,
+ OPTION_WARN_FATAL,
+ OPTION_NO_WARN_FATAL,
+ OPTION_WARN_MULTIPLE_GP,
+ OPTION_WARN_ONCE,
+ OPTION_WARN_SECTION_ALIGN,
+ OPTION_SPLIT_BY_RELOC,
+ OPTION_SPLIT_BY_FILE ,
+ OPTION_WHOLE_ARCHIVE,
+ OPTION_ADD_DT_NEEDED_FOR_DYNAMIC,
+ OPTION_NO_ADD_DT_NEEDED_FOR_DYNAMIC,
+ OPTION_ADD_DT_NEEDED_FOR_REGULAR,
+ OPTION_NO_ADD_DT_NEEDED_FOR_REGULAR,
+ OPTION_WRAP,
+ OPTION_FORCE_EXE_SUFFIX,
+ OPTION_GC_SECTIONS,
+ OPTION_NO_GC_SECTIONS,
+ OPTION_PRINT_GC_SECTIONS,
+ OPTION_NO_PRINT_GC_SECTIONS,
+ OPTION_HASH_SIZE,
+ OPTION_CHECK_SECTIONS,
+ OPTION_NO_CHECK_SECTIONS,
+ OPTION_NO_UNDEFINED,
+ OPTION_INIT,
+ OPTION_FINI,
+ OPTION_SECTION_START,
+ OPTION_UNIQUE,
+ OPTION_TARGET_HELP,
+ OPTION_ALLOW_SHLIB_UNDEFINED,
+ OPTION_NO_ALLOW_SHLIB_UNDEFINED,
+ OPTION_ALLOW_MULTIPLE_DEFINITION,
+ OPTION_NO_UNDEFINED_VERSION,
+ OPTION_DEFAULT_SYMVER,
+ OPTION_DEFAULT_IMPORTED_SYMVER,
+ OPTION_DISCARD_NONE,
+ OPTION_SPARE_DYNAMIC_TAGS,
+ OPTION_NO_DEFINE_COMMON,
+ OPTION_NOSTDLIB,
+ OPTION_NO_OMAGIC,
+ OPTION_STRIP_DISCARDED,
+ OPTION_NO_STRIP_DISCARDED,
+ OPTION_ACCEPT_UNKNOWN_INPUT_ARCH,
+ OPTION_NO_ACCEPT_UNKNOWN_INPUT_ARCH,
+ OPTION_PIE,
+ OPTION_UNRESOLVED_SYMBOLS,
+ OPTION_WARN_UNRESOLVED_SYMBOLS,
+ OPTION_ERROR_UNRESOLVED_SYMBOLS,
+ OPTION_WARN_SHARED_TEXTREL,
+ OPTION_WARN_ALTERNATE_EM,
+ OPTION_REDUCE_MEMORY_OVERHEADS,
+#ifdef ENABLE_PLUGINS
+ OPTION_PLUGIN,
+ OPTION_PLUGIN_OPT,
+ OPTION_PLUGIN_SAVE_TEMPS,
+#endif /* ENABLE_PLUGINS */
+ OPTION_DEFAULT_SCRIPT,
+ OPTION_PRINT_OUTPUT_FORMAT,
+};
+
/* The initial parser states. */
typedef enum input_enum {
input_selected, /* We've set the initial state. */
diff --git a/ld/lexsup.c b/ld/lexsup.c
index a68c9b5..392eb11 100644
--- a/ld/lexsup.c
+++ b/ld/lexsup.c
@@ -62,120 +62,6 @@
static void set_segment_start (const char *, char *);
static void help (void);
-/* Codes used for the long options with no short synonyms. 150 isn't
- special; it's just an arbitrary non-ASCII char value. */
-enum option_values
-{
- OPTION_ASSERT = 150,
- OPTION_CALL_SHARED,
- OPTION_CREF,
- OPTION_DEFSYM,
- OPTION_DEMANGLE,
- OPTION_DYNAMIC_LINKER,
- OPTION_SYSROOT,
- OPTION_EB,
- OPTION_EL,
- OPTION_EMBEDDED_RELOCS,
- OPTION_EXPORT_DYNAMIC,
- OPTION_NO_EXPORT_DYNAMIC,
- OPTION_HELP,
- OPTION_IGNORE,
- OPTION_MAP,
- OPTION_NO_DEMANGLE,
- OPTION_NO_KEEP_MEMORY,
- OPTION_NO_WARN_MISMATCH,
- OPTION_NO_WARN_SEARCH_MISMATCH,
- OPTION_NOINHIBIT_EXEC,
- OPTION_NON_SHARED,
- OPTION_NO_WHOLE_ARCHIVE,
- OPTION_OFORMAT,
- OPTION_RELAX,
- OPTION_NO_RELAX,
- OPTION_RETAIN_SYMBOLS_FILE,
- OPTION_RPATH,
- OPTION_RPATH_LINK,
- OPTION_SHARED,
- OPTION_SONAME,
- OPTION_SORT_COMMON,
- OPTION_SORT_SECTION,
- OPTION_STATS,
- OPTION_SYMBOLIC,
- OPTION_SYMBOLIC_FUNCTIONS,
- OPTION_TASK_LINK,
- OPTION_TBSS,
- OPTION_TDATA,
- OPTION_TTEXT,
- OPTION_TTEXT_SEGMENT,
- OPTION_TRADITIONAL_FORMAT,
- OPTION_UR,
- OPTION_VERBOSE,
- OPTION_VERSION,
- OPTION_VERSION_SCRIPT,
- OPTION_VERSION_EXPORTS_SECTION,
- OPTION_DYNAMIC_LIST,
- OPTION_DYNAMIC_LIST_CPP_NEW,
- OPTION_DYNAMIC_LIST_CPP_TYPEINFO,
- OPTION_DYNAMIC_LIST_DATA,
- OPTION_WARN_COMMON,
- OPTION_WARN_CONSTRUCTORS,
- OPTION_WARN_FATAL,
- OPTION_NO_WARN_FATAL,
- OPTION_WARN_MULTIPLE_GP,
- OPTION_WARN_ONCE,
- OPTION_WARN_SECTION_ALIGN,
- OPTION_SPLIT_BY_RELOC,
- OPTION_SPLIT_BY_FILE ,
- OPTION_WHOLE_ARCHIVE,
- OPTION_ADD_DT_NEEDED_FOR_DYNAMIC,
- OPTION_NO_ADD_DT_NEEDED_FOR_DYNAMIC,
- OPTION_ADD_DT_NEEDED_FOR_REGULAR,
- OPTION_NO_ADD_DT_NEEDED_FOR_REGULAR,
- OPTION_WRAP,
- OPTION_FORCE_EXE_SUFFIX,
- OPTION_GC_SECTIONS,
- OPTION_NO_GC_SECTIONS,
- OPTION_PRINT_GC_SECTIONS,
- OPTION_NO_PRINT_GC_SECTIONS,
- OPTION_HASH_SIZE,
- OPTION_CHECK_SECTIONS,
- OPTION_NO_CHECK_SECTIONS,
- OPTION_NO_UNDEFINED,
- OPTION_INIT,
- OPTION_FINI,
- OPTION_SECTION_START,
- OPTION_UNIQUE,
- OPTION_TARGET_HELP,
- OPTION_ALLOW_SHLIB_UNDEFINED,
- OPTION_NO_ALLOW_SHLIB_UNDEFINED,
- OPTION_ALLOW_MULTIPLE_DEFINITION,
- OPTION_NO_UNDEFINED_VERSION,
- OPTION_DEFAULT_SYMVER,
- OPTION_DEFAULT_IMPORTED_SYMVER,
- OPTION_DISCARD_NONE,
- OPTION_SPARE_DYNAMIC_TAGS,
- OPTION_NO_DEFINE_COMMON,
- OPTION_NOSTDLIB,
- OPTION_NO_OMAGIC,
- OPTION_STRIP_DISCARDED,
- OPTION_NO_STRIP_DISCARDED,
- OPTION_ACCEPT_UNKNOWN_INPUT_ARCH,
- OPTION_NO_ACCEPT_UNKNOWN_INPUT_ARCH,
- OPTION_PIE,
- OPTION_UNRESOLVED_SYMBOLS,
- OPTION_WARN_UNRESOLVED_SYMBOLS,
- OPTION_ERROR_UNRESOLVED_SYMBOLS,
- OPTION_WARN_SHARED_TEXTREL,
- OPTION_WARN_ALTERNATE_EM,
- OPTION_REDUCE_MEMORY_OVERHEADS,
-#ifdef ENABLE_PLUGINS
- OPTION_PLUGIN,
- OPTION_PLUGIN_OPT,
- OPTION_PLUGIN_SAVE_TEMPS,
-#endif /* ENABLE_PLUGINS */
- OPTION_DEFAULT_SCRIPT,
- OPTION_PRINT_OUTPUT_FORMAT,
-};
-
/* The long options. This structure is used for both the option
parsing and the help text. */
@@ -1562,6 +1448,40 @@
einfo (_("%P%F: -r and -shared may not be used together\n"));
}
+ if (link_info.shared)
+ {
+ char *dynamic = getenv ("LD_DYNAMIC_LIST");
+ if (dynamic)
+ {
+ bfd_boolean first = TRUE;
+
+ do
+ {
+ bfd_boolean set;
+
+ dynamic = strtok (dynamic, ":");
+ if (dynamic == NULL)
+ break;
+ set = strcasecmp (dynamic, "cpp_new") == 0;
+ if (set)
+ lang_append_dynamic_list_cpp_new ();
+ if (set && first)
+ {
+ if (command_line.dynamic_list != dynamic_list_data)
+ command_line.dynamic_list = dynamic_list;
+ if (command_line.symbolic == symbolic)
+ command_line.symbolic = symbolic_unset;
+ first = FALSE;
+ }
+ else
+ einfo (_("%P%F: unknown LD_DYNAMIC_LIST option `%s'\n"),
+ dynamic);
+ dynamic = NULL;
+ }
+ while (1);
+ }
+ }
+
/* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data,
--dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and
--dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are
diff --git a/ld/scripttempl/armbpabi.sc b/ld/scripttempl/armbpabi.sc
index 88028f2..43a7018 100644
--- a/ld/scripttempl/armbpabi.sc
+++ b/ld/scripttempl/armbpabi.sc
@@ -29,7 +29,7 @@
INTERP=".interp 0 : { *(.interp) }"
PLT=".plt ${RELOCATING-0} : { *(.plt) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
-DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }"
+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro .data.rel.ro.*) }"
DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".sbss ${RELOCATING-0} :
@@ -380,8 +380,8 @@
.rel.rodata 0 : { *(.rel.rodata${RELOCATING+ .rel.rodata.* .rel.gnu.linkonce.r.*}) }
.rela.rodata 0 : { *(.rela.rodata${RELOCATING+ .rela.rodata.* .rela.gnu.linkonce.r.*}) }
${OTHER_READONLY_RELOC_SECTIONS}
- .rel.data.rel.ro 0 : { *(.rel.data.rel.ro${RELOCATING+*}) }
- .rela.data.rel.ro 0 : { *(.rel.data.rel.ro${RELOCATING+*}) }
+ .rel.data.rel.ro 0 : { *(.rel.data.rel.ro${RELOCATING+ .rel.data.rel.ro.*}) }
+ .rela.data.rel.ro 0 : { *(.rela.data.rel.ro${RELOCATING+ .rela.data.rel.ro.*}) }
.rel.data 0 : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
.rela.data 0 : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
.rel.tdata 0 : { *(.rel.tdata${RELOCATING+ .rel.tdata.* .rel.gnu.linkonce.td.*}) }
diff --git a/ld/scripttempl/elf.sc b/ld/scripttempl/elf.sc
index 4312f4a..c9b3e80 100644
--- a/ld/scripttempl/elf.sc
+++ b/ld/scripttempl/elf.sc
@@ -157,7 +157,7 @@
}"
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".${RODATA_NAME} ${RELOCATING-0} : { *(.${RODATA_NAME}${RELOCATING+ .${RODATA_NAME}.* .gnu.linkonce.r.*}) }"
-DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".${SBSS_NAME} ${RELOCATING-0} :
@@ -411,8 +411,8 @@
.rel.${RODATA_NAME} ${RELOCATING-0} : { *(.rel.${RODATA_NAME}${RELOCATING+ .rel.${RODATA_NAME}.* .rel.gnu.linkonce.r.*}) }
.rela.${RODATA_NAME} ${RELOCATING-0} : { *(.rela.${RODATA_NAME}${RELOCATING+ .rela.${RODATA_NAME}.* .rela.gnu.linkonce.r.*}) }
${OTHER_READONLY_RELOC_SECTIONS}
- .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+* .rel.gnu.linkonce.d.rel.ro.*}) }
- .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+* .rela.gnu.linkonce.d.rel.ro.*}) }
+ .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+ .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*}) }
+ .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+ .rela.data.rel.ro.* .rela.gnu.linkonce.d.rel.ro.*}) }
.rel.data ${RELOCATING-0} : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
.rela.data ${RELOCATING-0} : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
${OTHER_READWRITE_RELOC_SECTIONS}
diff --git a/ld/scripttempl/elf64hppa.sc b/ld/scripttempl/elf64hppa.sc
index bd3035d..1bd82dc 100644
--- a/ld/scripttempl/elf64hppa.sc
+++ b/ld/scripttempl/elf64hppa.sc
@@ -126,7 +126,7 @@
fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
-DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".sbss ${RELOCATING-0} :
@@ -318,8 +318,8 @@
.rel.rodata ${RELOCATING-0} : { *(.rel.rodata${RELOCATING+ .rel.rodata.* .rel.gnu.linkonce.r.*}) }
.rela.rodata ${RELOCATING-0} : { *(.rela.rodata${RELOCATING+ .rela.rodata.* .rela.gnu.linkonce.r.*}) }
${OTHER_READONLY_RELOC_SECTIONS}
- .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+* .rel.gnu.linkonce.d.rel.ro.*}) }
- .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+* .rela.gnu.linkonce.d.rel.ro.*}) }
+ .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+ .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*}) }
+ .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+ .rela.data.rel.ro.* .rela.gnu.linkonce.d.rel.ro.*}) }
.rel.data ${RELOCATING-0} : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
.rela.data ${RELOCATING-0} : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
.rel.tdata ${RELOCATING-0} : { *(.rel.tdata${RELOCATING+ .rel.tdata.* .rel.gnu.linkonce.td.*}) }
diff --git a/ld/scripttempl/elfxtensa.sc b/ld/scripttempl/elfxtensa.sc
index dff245b..532348c 100644
--- a/ld/scripttempl/elfxtensa.sc
+++ b/ld/scripttempl/elfxtensa.sc
@@ -139,7 +139,7 @@
fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
-DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
INIT_LIT=".init.literal 0 : { *(.init.literal) }"
INIT=".init 0 : { *(.init) }"
@@ -329,8 +329,8 @@
.rel.rodata ${RELOCATING-0} : { *(.rel.rodata${RELOCATING+ .rel.rodata.* .rel.gnu.linkonce.r.*}) }
.rela.rodata ${RELOCATING-0} : { *(.rela.rodata${RELOCATING+ .rela.rodata.* .rela.gnu.linkonce.r.*}) }
${OTHER_READONLY_RELOC_SECTIONS}
- .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+* .rel.gnu.linkonce.d.rel.ro.*}) }
- .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+* .rela.gnu.linkonce.d.rel.ro.*}) }
+ .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+ .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*}) }
+ .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+ .rela.data.rel.ro.* .rela.gnu.linkonce.d.rel.ro.*}) }
.rel.data ${RELOCATING-0} : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
.rela.data ${RELOCATING-0} : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
.rel.tdata ${RELOCATING-0} : { *(.rel.tdata${RELOCATING+ .rel.tdata.* .rel.gnu.linkonce.td.*}) }
diff --git a/ld/scripttempl/mep.sc b/ld/scripttempl/mep.sc
index 6c7b451..d7ddae6 100644
--- a/ld/scripttempl/mep.sc
+++ b/ld/scripttempl/mep.sc
@@ -113,7 +113,7 @@
fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
-DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }"
+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro .data.rel.ro.*) }"
DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".sbss ${RELOCATING-0} :
@@ -245,8 +245,8 @@
.rel.rodata ${RELOCATING-0} : { *(.rel.rodata${RELOCATING+ .rel.rodata.* .rel.gnu.linkonce.r.*}) }
.rela.rodata ${RELOCATING-0} : { *(.rela.rodata${RELOCATING+ .rela.rodata.* .rela.gnu.linkonce.r.*}) }
${OTHER_READONLY_RELOC_SECTIONS}
- .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+*}) }
- .rela.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+*}) }
+ .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+ .rel.data.rel.ro.*}) }
+ .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+ .rela.data.rel.ro.*}) }
.rel.data ${RELOCATING-0} : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
.rela.data ${RELOCATING-0} : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
.rel.tdata ${RELOCATING-0} : { *(.rel.tdata${RELOCATING+ .rel.tdata.* .rel.gnu.linkonce.td.*}) }
diff --git a/ld/sysdep.h b/ld/sysdep.h
index b7d5b88..d3495fc 100644
--- a/ld/sysdep.h
+++ b/ld/sysdep.h
@@ -1,5 +1,5 @@
/* sysdep.h -- handle host dependencies for the GNU linker
- Copyright 1995, 1996, 1997, 1999, 2002, 2003, 2005, 2007
+ Copyright 1995, 1996, 1997, 1999, 2002, 2003, 2005, 2007, 2012
Free Software Foundation, Inc.
This file is part of the GNU Binutils.
@@ -22,6 +22,10 @@
#ifndef LD_SYSDEP_H
#define LD_SYSDEP_H
+#ifdef PACKAGE
+#error sysdep.h must be included in lieu of config.h
+#endif
+
#include "config.h"
#include <stdio.h>
@@ -29,6 +33,10 @@
#include <sys/stat.h>
#include <stdarg.h>
+#ifdef STRING_WITH_STRINGS
+#include <string.h>
+#include <strings.h>
+#else
#ifdef HAVE_STRING_H
#include <string.h>
#else
@@ -39,6 +47,7 @@
extern char *strrchr ();
#endif
#endif
+#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index ae46fd0..2e87607 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,330 @@
+2012-05-31 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-ifunc/ifunc-13a-x86-64.s: Add missing "foo" after ".global".
+ * ld-ifunc/ifunc-15-x86-64.s: Likewise.
+
+2012-05-30 Nick Clifton <nickc@redhat.com>
+
+ * ld-tic6x/shlib-1b.rd: Revert previous delta.
+ * ld-tic6x/shlib-1rb.rd: Likewise.
+ * ld-tic6x/shlib-1.rd: Likewise.
+ * ld-tic6x/shlib-1r.rd: Likewise.
+ * ld-tic6x/shlib-app-1b.rd: Likewise.
+ * ld-tic6x/shlib-app-1rb.rd: Likewise.
+ * ld-tic6x/shlib-app-1.rd: Likewise.
+ * ld-tic6x/shlib-app-1r.rd: Likewise.
+ * ld-tic6x/shlib-noindex.rd: Likewise.
+ * ld-tic6x/static-app-1b.rd: Likewise.
+ * ld-tic6x/static-app-1rb.rd: Likewise.
+ * ld-tic6x/static-app-1.rd: Likewise.
+ * ld-tic6x/static-app-1r.rd: Likewise.
+
+2012-05-29 Nick Clifton <nickc@redhat.com>
+
+ * ld-tic6x/shlib-1b.rd: Update expected readelf output.
+ * ld-tic6x/shlib-1rb.rd: Likewise.
+ * ld-tic6x/shlib-1.rd: Likewise.
+ * ld-tic6x/shlib-1r.rd: Likewise.
+ * ld-tic6x/shlib-app-1b.rd: Likewise.
+ * ld-tic6x/shlib-app-1rb.rd: Likewise.
+ * ld-tic6x/shlib-app-1.rd: Likewise.
+ * ld-tic6x/shlib-app-1r.rd: Likewise.
+ * ld-tic6x/shlib-noindex.rd: Likewise.
+ * ld-tic6x/static-app-1b.rd: Likewise.
+ * ld-tic6x/static-app-1rb.rd: Likewise.
+ * ld-tic6x/static-app-1.rd: Likewise.
+ * ld-tic6x/static-app-1r.rd: Likewise.
+
+2012-05-28 Nick Clifton <nickc@redhat.com>
+
+ * ld-ifunc/ifunc-13a-i386.s: Fix use of .global directive.
+ * ld-ifunc/ifunc-15a-i385.s: Likewise.
+
+2012-05-28 Alan Modra <amodra@gmail.com>
+
+ PR ld/14170
+ * ld-elf/pr14170a.s: Put foo, bar address in .data.
+ * ld-elf/elf.exp: Don't run pr14170 test on hppa64-hpux. Ignore
+ tic6x warnings.
+
+2012-05-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/14170
+ * ld-elf/elf.exp: Add a test for PR ld/14170.
+
+ * ld-elf/pr14170a.s: New file.
+ * ld-elf/pr14170b.s: Likewise.
+ * ld-elf/pr14170c.s: Likewise.
+
+2012-05-26 Alan Modra <amodra@gmail.com>
+
+ * ld-srec/srec.exp: Remove powerpc64 flag setting.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-elf/eh1.d: Don't skip x86_64-*-linux-gnux32.
+ * ld-elf/eh2.d: Likewise.
+ * ld-elf/eh3.d: Likewise.
+ * ld-elf/eh4.d: Likewise.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-x86-64/ilp32-11.s Add ".space 0x1000" before func.
+ (func): Make it global and hidden.
+ * ld-x86-64/ilp32-11.d: Updated.
+
+2012-05-22 Roland McGrath <mcgrathr@google.com>
+
+ * ld-elf/eh4.d: Revert last change.
+ Loosen CFI-matching regexps so they match x86_64-*-nacl* variant too.
+
+ * ld-x86-64/pr12570a.d (name): Distinguish it from pr12570b.d case.
+ Loosen CFI-matching regexp so it matches x86_64-*-nacl* variant too.
+ * ld-x86-64/pr12570b.d: Likewise.
+ * ld-x86-64/x86-64.exp: Revert last change.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-elf/eh4.d: Skip x86_64-*-nacl*.
+
+ * ld-x86-64/x86-64.exp: Xfail pr12570a for x86_64-*-nacl*.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/13909
+ * ld-i386/i386.exp: Revert the last change.
+ * ld-x86-64/x86-64.exp: Likewise.
+
+ * ld-i386/dummy.s: Removed.
+ * ld-i386/pr13909.d: Likewise.
+ * ld-x86-64/pr13909.d: Likewise.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/13909
+ * ld-i386/i386.exp: Run pr13909.
+ * ld-x86-64/x86-64.exp: Likewise.
+
+ * ld-i386/dummy.s: New file.
+ * ld-i386/pr13909.d: Likewise.
+ * ld-x86-64/pr13909.d: Likewise.
+
+2012-05-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/14105
+ * ld-elf/eh4.d: Add PLT eh_frame.
+
+ * ld-i386/i386.exp: Run pr12570a and pr12570b.
+ * ld-x86-64/x86-64.exp: Likewise.
+
+ * ld-i386/pr12570a.d: New file.
+ * ld-i386/pr12570a.s: Likewise.
+ * ld-i386/pr12570b.s: Likewise.
+ * ld-i386/pr12570b.s: Likewise.
+ * ld-x86-64/pr12570a.d: Likewise.
+ * ld-x86-64/pr12570a.s: Likewise.
+ * ld-x86-64/pr12570b.d: Likewise.
+ * ld-x86-64/pr12570b.s: Likewise.
+
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * ld-elf/elf.exp (note-3.so): xfail tic6x due to non-pic warnings.
+
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * ld-powerpc/vle.ld: New.
+ * ld-powerpc/powerpc.exp (vle reloc tests): Link using vle.ld.
+
+2012-05-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-i386/tlsdesc-nacl.rd: Update for dynamic sym changes.
+ * ld-i386/tlsdesc.rd: Likewise.
+ * ld-i386/tlsgdesc-nacl.rd: Likewise.
+ * ld-i386/tlsgdesc.rd: Likewise.
+ * ld-i386/tlsnopic-nacl.rd: Likewise.
+ * ld-i386/tlsnopic.rd: Likewise.
+ * ld-i386/tlspic-nacl.rd: Likewise.
+ * ld-i386/tlspic.rd: Likewise.
+ * ld-x86-64/tlsdesc-nacl.rd: Likewise.
+ * ld-x86-64/tlsdesc.rd: Likewise.
+ * ld-x86-64/tlsgdesc-nacl.rd: Likewise.
+ * ld-x86-64/tlsgdesc.rd: Likewise.
+ * ld-x86-64/tlspic-nacl.rd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+
+2012-05-18 Alan Modra <amodra@gmail.com>
+
+ * ld-tic6x/mvk-reloc-local-r.d: Adjust for signed addend.
+ * ld-tic6x/unwind-6.d: Typo fix.
+
+2012-05-18 Alan Modra <amodra@gmail.com>
+
+ * ld-elf/init-mixed.c: Include config.h first.
+
+2012-05-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-arm/emit-relocs1-vxworks.d: Expect addend as signed.
+ * ld-spu/pic.d: Likewise.
+
+2012-05-17 Hans-Peter Nilsson <hp@axis.com>
+
+ * lib/ld-lib.exp (run_dump_test): For options "warning" and
+ "error", append to earlier option values without adding a space.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * ld-m68k/tls-ld-1.d: Update.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * ld-powerpc/tlsso.r: Update for dynamic sym changes.
+ * ld-powerpc/tlsso32.d: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/tlstocso.r: Likewise.
+
+2012-05-16 Meador Inge <meadori@codesourcery.com>
+
+ * ld-arm/gc-hidden-1.d: Fix disassembly pattern.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+
+ * ld-m68hc11/xgate-link.s: New.
+ * ld-m68hc11/xgate-link.d: New.
+ * ld-m68hc11/xgate-offset.s: New.
+ * ld-m68hc11/xgate-offset.d: New.
+ * ld-m68hc11/xgate1.s: New.
+ * ld-m68hc11/xgate1.d: New.
+ * ld-m68hc11/xgate2.s: New.
+ * ld-m68hc11/m68hc11.exp: Updated.
+ * ld-m68hc11/*.d: Brought in line with changed objdump output.
+ * ld-gc/gc.exp: Update CFLAGS for m68hc11.
+ * ld-plugin/plugin.exp: Likewise.
+ * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
+
+2012-05-14 David S. Miller <davem@davemloft.net>
+
+ * ld-sparc/tlssunbin32.rd: Update.
+ * ld-sparc/tlssunbin64.rd: Likewise.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+
+ * ld-powerpc/powerpc.exp: Create ppceabitests.
+ * ld-powerpc/vle-multiseg.s: New.
+ * ld-powerpc/vle-multiseg-1.d: New.
+ * ld-powerpc/vle-multiseg-1.ld: New.
+ * ld-powerpc/vle-multiseg-2.d: New.
+ * ld-powerpc/vle-multiseg-2.ld: New.
+ * ld-powerpc/vle-multiseg-3.d: New.
+ * ld-powerpc/vle-multiseg-3.ld: New.
+ * ld-powerpc/vle-multiseg-4.d: New.
+ * ld-powerpc/vle-multiseg-4.ld: New.
+ * ld-powerpc/vle-multiseg-5.d: New.
+ * ld-powerpc/vle-multiseg-5.ld: New.
+ * ld-powerpc/vle-multiseg-6.d: New.
+ * ld-powerpc/vle-multiseg-6.ld: New.
+ * ld-powerpc/vle-multiseg-6a.s: New.
+ * ld-powerpc/vle-multiseg-6b.s: New.
+ * ld-powerpc/vle-multiseg-6c.s: New.
+ * ld-powerpc/vle-multiseg-6d.s: New.
+ * ld-powerpc/powerpc.exp: Run new tests.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+
+ * ld-powerpc/apuinfo.rd: Update for VLE.
+ * ld-powerpc/vle-reloc-1.d: New.
+ * ld-powerpc/vle-reloc-1.s: New.
+ * ld-powerpc/vle-reloc-2.d: New.
+ * ld-powerpc/vle-reloc-2.s: New.
+ * ld-powerpc/vle-reloc-3.d: New.
+ * ld-powerpc/vle-reloc-3.s: New.
+ * ld-powerpc/vle-reloc-def-1.s: New.
+ * ld-powerpc/vle-reloc-def-2.s: New.
+ * ld-powerpc/vle-reloc-def-3.s: New.
+
+2012-05-13 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * ld-mips-elf/mips-elf.exp (mips16_call_global_test): Use the
+ no-shared-1.ld linker script.
+ * ld-mips-elf/mips16-call-global-1.s: Add alignment directive.
+ * ld-mips-elf/mips16-call-global-2.s: Likewise.
+ * ld-mips-elf/mips16-call-global-3.s: Likewise.
+ * ld-mips-elf/mips16-call-global.d: Use 50000 as the base address.
+
+2012-05-13 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * ld-mips-elf/attr-gnu-4-00.d: Remove assembler options and emulator
+ linker option.
+ * ld-mips-elf/attr-gnu-4-01.d, ld-mips-elf/attr-gnu-4-02.d,
+ ld-mips-elf/attr-gnu-4-03.d, ld-mips-elf/attr-gnu-4-04.d,
+ ld-mips-elf/attr-gnu-4-05.d, ld-mips-elf/attr-gnu-4-10.d,
+ ld-mips-elf/attr-gnu-4-11.d, ld-mips-elf/attr-gnu-4-12.d,
+ ld-mips-elf/attr-gnu-4-13.d, ld-mips-elf/attr-gnu-4-14.d,
+ ld-mips-elf/attr-gnu-4-15.d, ld-mips-elf/attr-gnu-4-20.d,
+ ld-mips-elf/attr-gnu-4-21.d, ld-mips-elf/attr-gnu-4-22.d,
+ ld-mips-elf/attr-gnu-4-23.d, ld-mips-elf/attr-gnu-4-24.d,
+ ld-mips-elf/attr-gnu-4-25.d, ld-mips-elf/attr-gnu-4-30.d,
+ ld-mips-elf/attr-gnu-4-31.d, ld-mips-elf/attr-gnu-4-32.d,
+ ld-mips-elf/attr-gnu-4-33.d, ld-mips-elf/attr-gnu-4-34.d,
+ ld-mips-elf/attr-gnu-4-35.d, ld-mips-elf/attr-gnu-4-40.d,
+ ld-mips-elf/attr-gnu-4-41.d, ld-mips-elf/attr-gnu-4-42.d,
+ ld-mips-elf/attr-gnu-4-43.d, ld-mips-elf/attr-gnu-4-44.d,
+ ld-mips-elf/attr-gnu-4-45.d, ld-mips-elf/attr-gnu-4-51.d: Likewise.
+
+2012-05-13 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * ld-mips-elf/eh-frame1.ld (.gcc_compiled_long32): Add KEEP.
+ * ld-mips-elf/eh-frame3.d: Move definition of foo to the link line
+ and change to a 32-bit value. Expect CIEs to be marged.
+ * ld-mips-elf/eh-frame4.d: Move definition of foo to the link line.
+
+2012-05-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-alpha/tlspic.rd: Updated.
+ * ld-powerpc/tlsso.r: Likewise.
+ * ld-powerpc/tlsso32.r: Likewise.
+ * ld-powerpc/vxworks1-lib.rd: Likewise.
+ * ld-s390/tlspic.rd: Likewise.
+ * ld-s390/tlspic_64.rd: Likewise.
+ * ld-sh/shared-1.d: Likewise.
+ * ld-sh/tlspic-2.d: Likewise.
+ * ld-sparc/tlssunnopic32.rd: Likewise.
+ * ld-sparc/tlssunnopic64.rd: Likewise.
+ * ld-sparc/tlssunpic32.rd: Likewise.
+ * ld-sparc/tlssunpic64.rd: Likewise.
+
+2012-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-cris/hiddef1.d: Updated.
+ * ld-cris/libdso-2.d: Likewise.
+ * ld-cris/tls-js1.d: Likewise.
+ * ld-cris/tls-local-63.d: Likewise.
+ * ld-cris/tls-local-64.d: Likewise.
+
+2012-05-11 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/14088
+ * ld-ia64/tlspic.rd: Updated.
+ * ld-x86-64/tlsdesc-nacl.rd: Likewise.
+ * ld-x86-64/tlsdesc.rd: Likewise.
+ * ld-x86-64/tlspic-nacl.rd: Likewise.
+ * ld-x86-64/tlspic.rd: Likewise.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-x86-64/ilp32-11.d: Updated.
+
+2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-x86-64/pr13082-1a.d: Check RELACOUNT.
+ * ld-x86-64/pr13082-1b.d: Likewise.
+
+2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-x86-64/ilp32-11.d: New file.
+ * ld-x86-64/ilp32-11.s: Likewise.
+
+ * ld-x86-64/x86-64.exp: Run ilp32-11.
+
2012-05-05 H.J. Lu <hongjiu.lu@intel.com>
PR ld/14052
diff --git a/ld/testsuite/ld-alpha/tlspic.rd b/ld/testsuite/ld-alpha/tlspic.rd
index ac6a38a..9a992b4 100644
--- a/ld/testsuite/ld-alpha/tlspic.rd
+++ b/ld/testsuite/ld-alpha/tlspic.rd
@@ -45,10 +45,10 @@
[0-9a-f]+ +[0-9a-f]+ R_ALPHA_DTPMOD64 +0+ sg1 \+ 0
[0-9a-f]+ +[0-9a-f]+ R_ALPHA_DTPREL64 +0+ sg1 \+ 0
[0-9a-f]+ +[0-9a-f]+ R_ALPHA_TPREL64 +0+4 sg2 \+ 0
-[0-9a-f]+ +[0-9a-f]+ R_ALPHA_TPREL64 +0+44
+[0-9a-f]+ +[0-9a-f]+ R_ALPHA_TPREL64 +44
[0-9a-f]+ +[0-9a-f]+ R_ALPHA_DTPMOD64 +0+
[0-9a-f]+ +[0-9a-f]+ R_ALPHA_DTPMOD64 +0+
-[0-9a-f]+ +[0-9a-f]+ R_ALPHA_TPREL64 +0+24
+[0-9a-f]+ +[0-9a-f]+ R_ALPHA_TPREL64 +24
Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
diff --git a/ld/testsuite/ld-arm/emit-relocs1-vxworks.d b/ld/testsuite/ld-arm/emit-relocs1-vxworks.d
index 6d84a4c..2ea2e9a 100644
--- a/ld/testsuite/ld-arm/emit-relocs1-vxworks.d
+++ b/ld/testsuite/ld-arm/emit-relocs1-vxworks.d
@@ -7,6 +7,6 @@
+10008: e1a00000 nop .*
+1000c: e1a00000 nop .*
+10010: eaffeffa b c000 <target>
- +10010: R_ARM_PC24 target\+0xf+8
+ +10010: R_ARM_PC24 target-0x8
+10014: eaffeffd b c010 <target\+0x10>
+10014: R_ARM_PC24 target\+0x8
diff --git a/ld/testsuite/ld-arm/gc-hidden-1.d b/ld/testsuite/ld-arm/gc-hidden-1.d
index 80c7e9e..7d84952 100644
--- a/ld/testsuite/ld-arm/gc-hidden-1.d
+++ b/ld/testsuite/ld-arm/gc-hidden-1.d
@@ -19,7 +19,7 @@
0+124 <_start>:
124: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
128: eb000000 bl 130 <hidfn>
- 12c: e8bd8000 pop {pc}
+ 12c: e8bd8000 ldmfd sp!, {pc}
0+130 <hidfn>:
- 130: e8bd8000 pop {pc}
+ 130: e8bd8000 ldmfd sp!, {pc}
diff --git a/ld/testsuite/ld-cris/hiddef1.d b/ld/testsuite/ld-cris/hiddef1.d
index b3bd87d..1a1cc18 100644
--- a/ld/testsuite/ld-cris/hiddef1.d
+++ b/ld/testsuite/ld-cris/hiddef1.d
@@ -20,7 +20,7 @@
#...
Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
#...
-[0-9a-f]+ 0+c R_CRIS_RELATIVE [0-9a-f]+
+[0-9a-f]+ 0+c R_CRIS_RELATIVE +[0-9a-f]+
#...
Symbol table '\.dynsym' contains 6 entries:
#...
diff --git a/ld/testsuite/ld-cris/libdso-2.d b/ld/testsuite/ld-cris/libdso-2.d
index 165e222..d50cceb 100644
--- a/ld/testsuite/ld-cris/libdso-2.d
+++ b/ld/testsuite/ld-cris/libdso-2.d
@@ -27,7 +27,7 @@
#...
Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
#...
-00002[12][0-9a-f][048c] +0000000c R_CRIS_RELATIVE +00000150
+00002[12][0-9a-f][048c] +0000000c R_CRIS_RELATIVE +150
#...
Symbol table '\.dynsym' contains 4 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
diff --git a/ld/testsuite/ld-cris/tls-js1.d b/ld/testsuite/ld-cris/tls-js1.d
index 0dc4f7c..0c1509f 100644
--- a/ld/testsuite/ld-cris/tls-js1.d
+++ b/ld/testsuite/ld-cris/tls-js1.d
@@ -20,7 +20,7 @@
#...
Relocation section '\.rela\.dyn' at offset 0x20c contains 2 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
-00002354 0000001e R_CRIS_DTPMOD 00000000
+00002354 0000001e R_CRIS_DTPMOD +0
00002364 0000050a R_CRIS_GLOB_DAT 00002368 expobj \+ 0
Relocation section '\.rela\.plt' at offset 0x224 contains 2 entries:
diff --git a/ld/testsuite/ld-cris/tls-local-63.d b/ld/testsuite/ld-cris/tls-local-63.d
index ea86a46..320e717 100644
--- a/ld/testsuite/ld-cris/tls-local-63.d
+++ b/ld/testsuite/ld-cris/tls-local-63.d
@@ -10,7 +10,7 @@
#...
Relocation section '.rela.dyn' at offset 0x.* contains 1 entries:
Offset Info Type Sym.Value Sym. Name \+ Addend
-00002210 0000001c R_CRIS_32_TPREL[ ]+00+
+00002210 0000001c R_CRIS_32_TPREL[ ]+0
The decoding of unwind sections for machine type Axis Communications 32-bit embedded processor is not currently supported.
diff --git a/ld/testsuite/ld-cris/tls-local-64.d b/ld/testsuite/ld-cris/tls-local-64.d
index 7630fdc..1ed741c 100644
--- a/ld/testsuite/ld-cris/tls-local-64.d
+++ b/ld/testsuite/ld-cris/tls-local-64.d
@@ -12,7 +12,7 @@
#...
Relocation section '.rela.dyn' at offset 0x.* contains 1 entries:
Offset Info Type Sym.Value Sym. Name \+ Addend
-00002290 0000001c R_CRIS_32_TPREL[ ]+0+80
+00002290 0000001c R_CRIS_32_TPREL[ ]+80
The decoding of unwind sections for machine type Axis Communications 32-bit embedded processor is not currently supported.
diff --git a/ld/testsuite/ld-elf/eh1.d b/ld/testsuite/ld-elf/eh1.d
index 0fa4146..4455b0d 100644
--- a/ld/testsuite/ld-elf/eh1.d
+++ b/ld/testsuite/ld-elf/eh1.d
@@ -3,7 +3,6 @@
#as: --64
#ld: -melf_x86_64 -Ttext 0x400078
#readelf: -wf
-#notarget: x86_64-*-linux-gnux32
#target: x86_64-*-*
Contents of the .eh_frame section:
diff --git a/ld/testsuite/ld-elf/eh2.d b/ld/testsuite/ld-elf/eh2.d
index c63abb5..c5b5a73 100644
--- a/ld/testsuite/ld-elf/eh2.d
+++ b/ld/testsuite/ld-elf/eh2.d
@@ -3,7 +3,6 @@
#as: --64
#ld: -melf_x86_64 -Ttext 0x400078
#readelf: -wf
-#notarget: x86_64-*-linux-gnux32
#target: x86_64-*-*
Contents of the .eh_frame section:
diff --git a/ld/testsuite/ld-elf/eh3.d b/ld/testsuite/ld-elf/eh3.d
index 3b9ad64..b3bd756 100644
--- a/ld/testsuite/ld-elf/eh3.d
+++ b/ld/testsuite/ld-elf/eh3.d
@@ -3,7 +3,6 @@
#as: --64
#ld: -melf_x86_64 -Ttext 0x400078
#readelf: -wf
-#notarget: x86_64-*-linux-gnux32
#target: x86_64-*-*
Contents of the .eh_frame section:
diff --git a/ld/testsuite/ld-elf/eh4.d b/ld/testsuite/ld-elf/eh4.d
index b482d03..fe3e84b 100644
--- a/ld/testsuite/ld-elf/eh4.d
+++ b/ld/testsuite/ld-elf/eh4.d
@@ -3,7 +3,6 @@
#as: --64
#ld: -melf_x86_64 -shared -Ttext 0x400
#readelf: -wf
-#notarget: x86_64-*-linux-gnux32
#target: x86_64-*-*
Contents of the .eh_frame section:
@@ -29,6 +28,14 @@
DW_CFA_set_loc: 00000417
DW_CFA_def_cfa_offset: 80
-00000048 ZERO terminator
-#pass
+00000048 00000024 0000004c FDE cie=00000000 pc=[0-9a-f]+\.\.[0-9a-f]+
+ DW_CFA_def_cfa_offset: 16
+ DW_CFA_advance_loc: [0-9a-f]+ to [0-9a-f]+
+ DW_CFA_def_cfa_offset: 24
+ DW_CFA_advance_loc: [0-9a-f]+ to [0-9a-f]+
+ DW_CFA_def_cfa_expression \(DW_OP_breg7 \(rsp\): 8; DW_OP_breg16 \(rip\): 0;.*
+ DW_CFA_nop
+#...
+[0-9a-f]+ ZERO terminator
+#pass
diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp
index e40078a..9964ccd 100644
--- a/ld/testsuite/ld-elf/elf.exp
+++ b/ld/testsuite/ld-elf/elf.exp
@@ -57,6 +57,20 @@
"" ""
{symbol3w.s} {} "symbol3w.a"}
}
+
+ if { [check_shared_lib_support] } then {
+ run_ld_link_tests {
+ {"Build pr14170a.o" "" "" "pr14170a.s" {} "pr14170.a" }
+ }
+ setup_xfail "tic6x-*-*"
+ run_ld_link_tests {
+ {"Build shared library for pr14170"
+ "-shared" "" "pr14170b.s" {} "pr14170.so" }
+ {"PR ld/14170"
+ "tmpdir/pr14170a.o tmpdir/pr14170.so" "" "pr14170c.s"
+ { } "pr14170" }
+ }
+ }
}
# Run a test to check linking a shared library with a broken linker
@@ -66,14 +80,15 @@
#
# Only run the test on targets thats support creating shared libraries.
if { [check_shared_lib_support] } then {
- run_ld_link_tests {
- {"Build shared library for next test"
- "-shared" "" "note-3.s" {} "note-3.so" }
- {"Link using broken linker script"
- "--script note-3.t tmpdir/note-3.so" "" ""
- { { ld "note-3.l" } }
- "a.out" }
- }
+ setup_xfail "tic6x-*-*"
+ run_ld_link_tests {
+ {"Build shared library for next test"
+ "-shared" "" "note-3.s" {} "note-3.so" }
+ {"Link using broken linker script"
+ "--script note-3.t tmpdir/note-3.so" "" ""
+ { { ld "note-3.l" } }
+ "a.out" }
+ }
}
set test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
diff --git a/ld/testsuite/ld-elf/init-mixed.c b/ld/testsuite/ld-elf/init-mixed.c
index 770a4b5..f401ded 100644
--- a/ld/testsuite/ld-elf/init-mixed.c
+++ b/ld/testsuite/ld-elf/init-mixed.c
@@ -1,8 +1,7 @@
+#include "config.h"
#include <stdio.h>
#include <stdlib.h>
-#include "config.h"
-
#ifdef HAVE_INITFINI_ARRAY
static int count;
diff --git a/ld/testsuite/ld-elf/pr14170a.s b/ld/testsuite/ld-elf/pr14170a.s
new file mode 100644
index 0000000..4264eee
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr14170a.s
@@ -0,0 +1,13 @@
+
+ .global start /* Used by SH targets. */
+start:
+ .global _start
+_start:
+ .global __start
+__start:
+ .global main /* Used by HPPA targets. */
+main:
+
+ .data
+ .dc.a foo
+ .dc.a bar
diff --git a/ld/testsuite/ld-elf/pr14170b.s b/ld/testsuite/ld-elf/pr14170b.s
new file mode 100644
index 0000000..818f975
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr14170b.s
@@ -0,0 +1,11 @@
+ .data
+ .type foo,%object
+ .globl foo
+foo:
+ .dc.a 0
+ .size foo, . - foo
+ .type foo,%object
+ .globl bar
+bar:
+ .dc.a 0
+ .size bar, . - bar
diff --git a/ld/testsuite/ld-elf/pr14170c.s b/ld/testsuite/ld-elf/pr14170c.s
new file mode 100644
index 0000000..a47b67b
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr14170c.s
@@ -0,0 +1,2 @@
+ .hidden foo
+ .comm foo,4,4
diff --git a/ld/testsuite/ld-gc/gc.exp b/ld/testsuite/ld-gc/gc.exp
index 996eac4..7a59ad3 100644
--- a/ld/testsuite/ld-gc/gc.exp
+++ b/ld/testsuite/ld-gc/gc.exp
@@ -32,6 +32,11 @@
set cflags "$cflags -mminimal-toc"
}
+if { [istarget m681*-*-*] || [istarget m68hc1*-*-*] } {
+ # Otherwise tests FAIL due to _.frame
+ set cflags "$cflags -fomit-frame-pointer -mshort"
+}
+
if { [is_remote host] || [which $CC] != 0 } {
ld_compile "$CC -c $CFLAGS $cflags" $srcdir/$subdir/gc.c $objfile
}
diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp
index d1031c5..47f918f 100644
--- a/ld/testsuite/ld-i386/i386.exp
+++ b/ld/testsuite/ld-i386/i386.exp
@@ -231,6 +231,8 @@
run_dump_test "discarded1"
run_dump_test "pr12718"
run_dump_test "pr12921"
+run_dump_test "pr12570a"
+run_dump_test "pr12570b"
if { !([istarget "i?86-*-linux*"]
|| [istarget "i?86-*-gnu*"]
diff --git a/ld/testsuite/ld-i386/pr12570a.d b/ld/testsuite/ld-i386/pr12570a.d
new file mode 100644
index 0000000..03aeb7b
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr12570a.d
@@ -0,0 +1,8 @@
+#name: PR ld/12570
+#as: --32
+#ld: -melf_i386 -shared
+#readelf: -wf --wide
+
+#...
+ DW_CFA_def_cfa_expression \(DW_OP_breg4 \(esp\): 4; DW_OP_breg8 \(eip\): 0; DW_OP_lit15; DW_OP_and; DW_OP_lit11; DW_OP_ge; DW_OP_lit2; DW_OP_shl; DW_OP_plus\)
+#...
diff --git a/ld/testsuite/ld-i386/pr12570a.s b/ld/testsuite/ld-i386/pr12570a.s
new file mode 100644
index 0000000..38e0593
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr12570a.s
@@ -0,0 +1,8 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ .cfi_startproc
+ jmp bar@PLT
+ .cfi_endproc
+ .size foo, .-foo
diff --git a/ld/testsuite/ld-i386/pr12570b.d b/ld/testsuite/ld-i386/pr12570b.d
new file mode 100644
index 0000000..0532aac
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr12570b.d
@@ -0,0 +1,9 @@
+#name: PR ld/12570
+#as: --32
+#ld: -melf_i386 -shared
+#readelf: -wf --wide
+
+#failif
+#...
+ DW_CFA_def_cfa_expression \(DW_OP_breg4 \(esp\): 4; DW_OP_breg8 \(eip\): 0; DW_OP_lit15; DW_OP_and; DW_OP_lit11; DW_OP_ge; DW_OP_lit2; DW_OP_shl; DW_OP_plus\)
+#...
diff --git a/ld/testsuite/ld-i386/pr12570b.s b/ld/testsuite/ld-i386/pr12570b.s
new file mode 100644
index 0000000..e76b9f1
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr12570b.s
@@ -0,0 +1,8 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ .cfi_startproc
+ ret
+ .cfi_endproc
+ .size foo, .-foo
diff --git a/ld/testsuite/ld-i386/tlsdesc-nacl.rd b/ld/testsuite/ld-i386/tlsdesc-nacl.rd
index a9e602c..cb06394 100644
--- a/ld/testsuite/ld-i386/tlsdesc-nacl.rd
+++ b/ld/testsuite/ld-i386/tlsdesc-nacl.rd
@@ -120,7 +120,7 @@
+[0-9]+: 0+3c +0 +TLS +LOCAL +DEFAULT +7 sl8
+[0-9]+: 0+60 +0 +TLS +LOCAL +DEFAULT +8 sH1
+[0-9]+: 0+ +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
+[0-9]+: 0+48 +0 +TLS +LOCAL +DEFAULT +7 sh3
+[0-9]+: 0+64 +0 +TLS +LOCAL +DEFAULT +8 sH2
+[0-9]+: 0+78 +0 +TLS +LOCAL +DEFAULT +8 sH7
@@ -134,7 +134,7 @@
+[0-9]+: 0+74 +0 +TLS +LOCAL +DEFAULT +8 sH6
+[0-9]+: 0+7c +0 +TLS +LOCAL +DEFAULT +8 sH8
+[0-9]+: 0+40 +0 +TLS +LOCAL +DEFAULT +7 sh1
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+44 +0 +TLS +LOCAL +DEFAULT +7 sh2
+[0-9]+: 0+54 +0 +TLS +LOCAL +DEFAULT +7 sh6
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8
diff --git a/ld/testsuite/ld-i386/tlsdesc.rd b/ld/testsuite/ld-i386/tlsdesc.rd
index c7c41c6..afe9f4f 100644
--- a/ld/testsuite/ld-i386/tlsdesc.rd
+++ b/ld/testsuite/ld-i386/tlsdesc.rd
@@ -118,7 +118,7 @@
+[0-9]+: 0+3c +0 +TLS +LOCAL +DEFAULT +7 sl8
+[0-9]+: 0+60 +0 +TLS +LOCAL +DEFAULT +8 sH1
+[0-9]+: 0+ +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
+[0-9]+: 0+48 +0 +TLS +LOCAL +DEFAULT +7 sh3
+[0-9]+: 0+64 +0 +TLS +LOCAL +DEFAULT +8 sH2
+[0-9]+: 0+78 +0 +TLS +LOCAL +DEFAULT +8 sH7
@@ -132,7 +132,7 @@
+[0-9]+: 0+74 +0 +TLS +LOCAL +DEFAULT +8 sH6
+[0-9]+: 0+7c +0 +TLS +LOCAL +DEFAULT +8 sH8
+[0-9]+: 0+40 +0 +TLS +LOCAL +DEFAULT +7 sh1
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+44 +0 +TLS +LOCAL +DEFAULT +7 sh2
+[0-9]+: 0+54 +0 +TLS +LOCAL +DEFAULT +7 sh6
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8
diff --git a/ld/testsuite/ld-i386/tlsgdesc-nacl.rd b/ld/testsuite/ld-i386/tlsgdesc-nacl.rd
index 77ad08f..a610d57 100644
--- a/ld/testsuite/ld-i386/tlsgdesc-nacl.rd
+++ b/ld/testsuite/ld-i386/tlsgdesc-nacl.rd
@@ -90,8 +90,8 @@
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +8 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +9 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +10 *
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +8 _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG3
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG5
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG2
diff --git a/ld/testsuite/ld-i386/tlsgdesc.rd b/ld/testsuite/ld-i386/tlsgdesc.rd
index fa0eeb9..c539890 100644
--- a/ld/testsuite/ld-i386/tlsgdesc.rd
+++ b/ld/testsuite/ld-i386/tlsgdesc.rd
@@ -88,8 +88,8 @@
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +8 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +9 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +10 *
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +8 _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG3
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG5
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG2
diff --git a/ld/testsuite/ld-i386/tlsnopic-nacl.rd b/ld/testsuite/ld-i386/tlsnopic-nacl.rd
index 9c8f4c2..fe169cd 100644
--- a/ld/testsuite/ld-i386/tlsnopic-nacl.rd
+++ b/ld/testsuite/ld-i386/tlsnopic-nacl.rd
@@ -101,11 +101,11 @@
+[0-9]+: 0+08 +0 +TLS +LOCAL +DEFAULT +6 bl3
+[0-9]+: 0+0c +0 +TLS +LOCAL +DEFAULT +6 bl4
+[0-9]+: 0+10 +0 +TLS +LOCAL +DEFAULT +6 bl5
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +7 _DYNAMIC
+[0-9]+: 0+1c +0 +TLS +LOCAL +DEFAULT +6 sh3
+[0-9]+: 0+20 +0 +TLS +LOCAL +DEFAULT +6 sh4
+[0-9]+: 0+14 +0 +TLS +LOCAL +DEFAULT +6 sh1
- +[0-9]+: 0*1001031c +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0*1001031c +0 +OBJECT +LOCAL +DEFAULT +9 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+18 +0 +TLS +LOCAL +DEFAULT +6 sh2
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sg3
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sg4
diff --git a/ld/testsuite/ld-i386/tlsnopic.rd b/ld/testsuite/ld-i386/tlsnopic.rd
index 2396fc5..da725b9 100644
--- a/ld/testsuite/ld-i386/tlsnopic.rd
+++ b/ld/testsuite/ld-i386/tlsnopic.rd
@@ -99,11 +99,11 @@
+[0-9]+: 0+08 +0 +TLS +LOCAL +DEFAULT +6 bl3
+[0-9]+: 0+0c +0 +TLS +LOCAL +DEFAULT +6 bl4
+[0-9]+: 0+10 +0 +TLS +LOCAL +DEFAULT +6 bl5
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +7 _DYNAMIC
+[0-9]+: 0+1c +0 +TLS +LOCAL +DEFAULT +6 sh3
+[0-9]+: 0+20 +0 +TLS +LOCAL +DEFAULT +6 sh4
+[0-9]+: 0+14 +0 +TLS +LOCAL +DEFAULT +6 sh1
- +[0-9]+: 0+218c +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+218c +0 +OBJECT +LOCAL +DEFAULT +9 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+18 +0 +TLS +LOCAL +DEFAULT +6 sh2
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sg3
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sg4
diff --git a/ld/testsuite/ld-i386/tlspic-nacl.rd b/ld/testsuite/ld-i386/tlspic-nacl.rd
index 3ea30b1..4e91b24 100644
--- a/ld/testsuite/ld-i386/tlspic-nacl.rd
+++ b/ld/testsuite/ld-i386/tlspic-nacl.rd
@@ -124,7 +124,7 @@
+[0-9]+: 0+38 +0 +TLS +LOCAL +DEFAULT +8 sl7
+[0-9]+: 0+3c +0 +TLS +LOCAL +DEFAULT +8 sl8
+[0-9]+: 0+60 +0 +TLS +LOCAL +DEFAULT +9 sH1
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +10 _DYNAMIC
+[0-9]+: 0+48 +0 +TLS +LOCAL +DEFAULT +8 sh3
+[0-9]+: 0+64 +0 +TLS +LOCAL +DEFAULT +9 sH2
+[0-9]+: 0+78 +0 +TLS +LOCAL +DEFAULT +9 sH7
@@ -138,7 +138,7 @@
+[0-9]+: 0+74 +0 +TLS +LOCAL +DEFAULT +9 sH6
+[0-9]+: 0+7c +0 +TLS +LOCAL +DEFAULT +9 sH8
+[0-9]+: 0+40 +0 +TLS +LOCAL +DEFAULT +8 sh1
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +12 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+44 +0 +TLS +LOCAL +DEFAULT +8 sh2
+[0-9]+: 0+54 +0 +TLS +LOCAL +DEFAULT +8 sh6
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +8 sg8
diff --git a/ld/testsuite/ld-i386/tlspic.rd b/ld/testsuite/ld-i386/tlspic.rd
index 7fe042e..3594fd9 100644
--- a/ld/testsuite/ld-i386/tlspic.rd
+++ b/ld/testsuite/ld-i386/tlspic.rd
@@ -122,7 +122,7 @@
+[0-9]+: 0+38 +0 +TLS +LOCAL +DEFAULT +8 sl7
+[0-9]+: 0+3c +0 +TLS +LOCAL +DEFAULT +8 sl8
+[0-9]+: 0+60 +0 +TLS +LOCAL +DEFAULT +9 sH1
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +10 _DYNAMIC
+[0-9]+: 0+48 +0 +TLS +LOCAL +DEFAULT +8 sh3
+[0-9]+: 0+64 +0 +TLS +LOCAL +DEFAULT +9 sH2
+[0-9]+: 0+78 +0 +TLS +LOCAL +DEFAULT +9 sH7
@@ -136,7 +136,7 @@
+[0-9]+: 0+74 +0 +TLS +LOCAL +DEFAULT +9 sH6
+[0-9]+: 0+7c +0 +TLS +LOCAL +DEFAULT +9 sH8
+[0-9]+: 0+40 +0 +TLS +LOCAL +DEFAULT +8 sh1
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +12 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+44 +0 +TLS +LOCAL +DEFAULT +8 sh2
+[0-9]+: 0+54 +0 +TLS +LOCAL +DEFAULT +8 sh6
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +8 sg8
diff --git a/ld/testsuite/ld-ia64/tlspic.rd b/ld/testsuite/ld-ia64/tlspic.rd
index 8320365..bb2c8da 100644
--- a/ld/testsuite/ld-ia64/tlspic.rd
+++ b/ld/testsuite/ld-ia64/tlspic.rd
@@ -48,9 +48,9 @@
[0-9a-f ]+R_IA64_DTPMOD64LSB +0+ sg1 \+ 0
[0-9a-f ]+R_IA64_DTPREL64LSB +0+ sg1 \+ 0
[0-9a-f ]+R_IA64_TPREL64LSB +0+4 sg2 \+ 0
-[0-9a-f ]+R_IA64_DTPMOD64LSB +0+
-[0-9a-f ]+R_IA64_TPREL64LSB +0+44
-[0-9a-f ]+R_IA64_TPREL64LSB +0+24
+[0-9a-f ]+R_IA64_DTPMOD64LSB +0
+[0-9a-f ]+R_IA64_TPREL64LSB +44
+[0-9a-f ]+R_IA64_TPREL64LSB +24
Relocation section '.rela.IA_64.pltoff' at offset 0x[0-9a-f]+ contains 1 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
diff --git a/ld/testsuite/ld-ifunc/ifunc-13a-i386.s b/ld/testsuite/ld-ifunc/ifunc-13a-i386.s
index eb893af..5bda920 100644
--- a/ld/testsuite/ld-ifunc/ifunc-13a-i386.s
+++ b/ld/testsuite/ld-ifunc/ifunc-13a-i386.s
@@ -1,6 +1,6 @@
.text
.type foo, @function
- .global
+ .global foo
foo:
movl xxx@GOT(%ebx), %eax
ret
diff --git a/ld/testsuite/ld-ifunc/ifunc-13a-x86-64.s b/ld/testsuite/ld-ifunc/ifunc-13a-x86-64.s
index 5bfc9e0..45df09a 100644
--- a/ld/testsuite/ld-ifunc/ifunc-13a-x86-64.s
+++ b/ld/testsuite/ld-ifunc/ifunc-13a-x86-64.s
@@ -1,6 +1,6 @@
.text
.type foo, @function
- .global
+ .global foo
foo:
movl xxx(%rip), %eax
ret
diff --git a/ld/testsuite/ld-ifunc/ifunc-15-i386.s b/ld/testsuite/ld-ifunc/ifunc-15-i386.s
index 5ee4fab..ea541e2 100644
--- a/ld/testsuite/ld-ifunc/ifunc-15-i386.s
+++ b/ld/testsuite/ld-ifunc/ifunc-15-i386.s
@@ -1,6 +1,6 @@
.text
.type foo, @function
- .global
+ .global foo
foo:
movl ifunc@GOT(%ebx), %eax
ret
diff --git a/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s b/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s
index ee336de..837f250 100644
--- a/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s
+++ b/ld/testsuite/ld-ifunc/ifunc-15-x86-64.s
@@ -1,6 +1,6 @@
.text
.type foo, @function
- .global
+ .global foo
foo:
movl ifunc@GOTPCREL(%rip), %eax
ret
diff --git a/ld/testsuite/ld-m68hc11/adj-brset.d b/ld/testsuite/ld-m68hc11/adj-brset.d
index a6306cf..fbda304 100644
--- a/ld/testsuite/ld-m68hc11/adj-brset.d
+++ b/ld/testsuite/ld-m68hc11/adj-brset.d
@@ -6,26 +6,26 @@
.*: +file format elf32\-m68hc11
Disassembly of section .text:
-0+8000 <_start> brclr 140,x \#\$c8 0+804a <L8>
-0+8004 <L1> addd \*0+4 <_toto>
-0+8006 <L1\+0x2> brclr 20,x \#\$03 0+8004 <L1>
-0+800a <L1\+0x6> brclr 90,x \#\$63 0+801a <L3>
-0+800e <L2> addd \*0+4 <_toto>
-0+8010 <L2\+0x2> brclr 19,y \#\$04 0+800e <L2>
-0+8015 <L2\+0x7> brclr 91,y \#\$62 0+8024 <L4>
-0+801a <L3> addd \*0+4 <_toto>
-0+801c <L3\+0x2> brset 18,x \#\$05 0+801a <L3>
-0+8020 <L3\+0x6> brset 92,x \#\$61 0+8030 <L5>
-0+8024 <L4> addd \*0+4 <_toto>
-0+8026 <L4\+0x2> brset 17,y \#\$06 0+8024 <L4>
-0+802b <L4\+0x7> brset 93,y \#\$60 0+8030 <L5>
-0+8030 <L5> addd \*0+4 <_toto>
-0+8032 <L5\+0x2> brset \*0+32 <_table> \#\$07 0+8030 <L5>
-0+8036 <L5\+0x6> brset \*0+3c <_table\+0xa> \#\$5f 0+8044 <L7>
-0+803a <L6> addd \*0+4 <_toto>
-0+803c <L6\+0x2> brclr \*0+33 <_table\+0x1> \#\$08 0+803a <L6>
-0+8040 <L6\+0x6> brset \*0+3d <_table\+0xb> \#\$5e 0+804a <L8>
-0+8044 <L7> addd \*0+4 <_toto>
-0+8046 <L7\+0x2> brclr \*0+33 <_table\+0x1> \#\$08 0+803a <L6>
-0+804a <L8> brclr 140,x \#\$c8 0+8000 <_start>
+0+8000 <_start> brclr 0x8c,x, #0xc8, 0x0+804a <L8>
+0+8004 <L1> addd \*0x0+4 <_toto>
+0+8006 <L1\+0x2> brclr 0x14,x, \#0x03, 0x0+8004 <L1>
+0+800a <L1\+0x6> brclr 0x5a,x, \#0x63, 0x0+801a <L3>
+0+800e <L2> addd \*0x0+4 <_toto>
+0+8010 <L2\+0x2> brclr 0x13,y, \#0x04, 0x0+800e <L2>
+0+8015 <L2\+0x7> brclr 0x5b,y, \#0x62, 0x0+8024 <L4>
+0+801a <L3> addd \*0x0+4 <_toto>
+0+801c <L3\+0x2> brset 0x12,x, \#0x05, 0x0+801a <L3>
+0+8020 <L3\+0x6> brset 0x5c,x, \#0x61, 0x0+8030 <L5>
+0+8024 <L4> addd \*0x0+4 <_toto>
+0+8026 <L4\+0x2> brset 0x11,y, \#0x06, 0x0+8024 <L4>
+0+802b <L4\+0x7> brset 0x5d,y, \#0x60, 0x0+8030 <L5>
+0+8030 <L5> addd \*0x0+4 <_toto>
+0+8032 <L5\+0x2> brset \*0x0+32 <_table>, \#0x07, 0x0+8030 <L5>
+0+8036 <L5\+0x6> brset \*0x0+3c <_table\+0xa>, \#0x5f, 0x0+8044 <L7>
+0+803a <L6> addd \*0x0+4 <_toto>
+0+803c <L6\+0x2> brclr \*0x0+33 <_table\+0x1>, \#0x08, 0x0+803a <L6>
+0+8040 <L6\+0x6> brset \*0x0+3d <_table\+0xb>, \#0x5e, 0x0+804a <L8>
+0+8044 <L7> addd \*0x0+4 <_toto>
+0+8046 <L7\+0x2> brclr \*0x0+33 <_table\+0x1>, \#0x08, 0x0+803a <L6>
+0+804a <L8> brclr 0x8c,x, \#0xc8, 0x0+8000 <_start>
0+804e <L8\+0x4> rts
diff --git a/ld/testsuite/ld-m68hc11/adj-jump.d b/ld/testsuite/ld-m68hc11/adj-jump.d
index da181bd..cca407f 100644
--- a/ld/testsuite/ld-m68hc11/adj-jump.d
+++ b/ld/testsuite/ld-m68hc11/adj-jump.d
@@ -6,54 +6,54 @@
.*: +file format elf32\-m68hc11
Disassembly of section .text:
-0+8000 <_start> bra 0+8074 <L3>
+0+8000 <_start> bra 0x0+8074 <L3>
...
-0+8016 <_start\+0x16> bra 0+8074 <L3>
-0+8018 <L1> addd 0,x
-0+801a <L1\+0x2> bne 0+8018 <L1>
-0+801c <L1\+0x4> addd \*0+4 <_toto>
-0+801e <L1\+0x6> beq 0+8018 <L1>
-0+8020 <L1\+0x8> addd \*0+5 <_toto\+0x1>
-0+8022 <L1\+0xa> bne 0+8018 <L1>
-0+8024 <L1\+0xc> bgt 0+8018 <L1>
-0+8026 <L1\+0xe> bge 0+8018 <L1>
-0+8028 <L1\+0x10> beq 0+8018 <L1>
-0+802a <L1\+0x12> ble 0+8018 <L1>
-0+802c <L1\+0x14> blt 0+8018 <L1>
-0+802e <L1\+0x16> bhi 0+8018 <L1>
-0+8030 <L1\+0x18> bcc 0+8018 <L1>
-0+8032 <L1\+0x1a> beq 0+8018 <L1>
-0+8034 <L1\+0x1c> bls 0+8018 <L1>
-0+8036 <L1\+0x1e> bcs 0+8018 <L1>
-0+8038 <L1\+0x20> bcs 0+8018 <L1>
-0+803a <L1\+0x22> bmi 0+8018 <L1>
-0+803c <L1\+0x24> bvs 0+8018 <L1>
-0+803e <L1\+0x26> bcc 0+8018 <L1>
-0+8040 <L1\+0x28> bpl 0+8018 <L1>
-0+8042 <L1\+0x2a> bvc 0+8018 <L1>
-0+8044 <L1\+0x2c> bne 0+8018 <L1>
-0+8046 <L1\+0x2e> brn 0+8018 <L1>
-0+8048 <L1\+0x30> bra 0+8018 <L1>
-0+804a <L1\+0x32> addd \*0+4 <_toto>
-0+804c <L1\+0x34> addd \*0+4 <_toto>
-0+804e <L1\+0x36> addd \*0+4 <_toto>
-0+8050 <L1\+0x38> addd \*0+4 <_toto>
-0+8052 <L1\+0x3a> addd \*0+4 <_toto>
-0+8054 <L1\+0x3c> addd \*0+4 <_toto>
-0+8056 <L1\+0x3e> addd \*0+4 <_toto>
-0+8058 <L1\+0x40> addd \*0+4 <_toto>
-0+805a <L1\+0x42> addd \*0+4 <_toto>
-0+805c <L1\+0x44> addd \*0+4 <_toto>
-0+805e <L1\+0x46> addd \*0+4 <_toto>
-0+8060 <L1\+0x48> addd \*0+4 <_toto>
-0+8062 <L1\+0x4a> addd \*0+4 <_toto>
-0+8064 <L1\+0x4c> addd \*0+4 <_toto>
-0+8066 <L1\+0x4e> addd \*0+4 <_toto>
-0+8068 <L2> bra 0+8000 <_start>
-0+806a <L2\+0x2> bne 0+8068 <L2>
-0+806c <L2\+0x4> beq 0+8074 <L3>
-0+806e <L2\+0x6> addd \*0+4 <_toto>
-0+8070 <L2\+0x8> beq 0+8074 <L3>
-0+8072 <L2\+0xa> addd \*0+4 <_toto>
-0+8074 <L3> addd \*0+4 <_toto>
+0+8016 <_start\+0x16> bra 0x0+8074 <L3>
+0+8018 <L1> addd 0x0,x
+0+801a <L1\+0x2> bne 0x0+8018 <L1>
+0+801c <L1\+0x4> addd \*0x0+4 <_toto>
+0+801e <L1\+0x6> beq 0x0+8018 <L1>
+0+8020 <L1\+0x8> addd \*0x0+5 <_toto\+0x1>
+0+8022 <L1\+0xa> bne 0x0+8018 <L1>
+0+8024 <L1\+0xc> bgt 0x0+8018 <L1>
+0+8026 <L1\+0xe> bge 0x0+8018 <L1>
+0+8028 <L1\+0x10> beq 0x0+8018 <L1>
+0+802a <L1\+0x12> ble 0x0+8018 <L1>
+0+802c <L1\+0x14> blt 0x0+8018 <L1>
+0+802e <L1\+0x16> bhi 0x0+8018 <L1>
+0+8030 <L1\+0x18> bcc 0x0+8018 <L1>
+0+8032 <L1\+0x1a> beq 0x0+8018 <L1>
+0+8034 <L1\+0x1c> bls 0x0+8018 <L1>
+0+8036 <L1\+0x1e> bcs 0x0+8018 <L1>
+0+8038 <L1\+0x20> bcs 0x0+8018 <L1>
+0+803a <L1\+0x22> bmi 0x0+8018 <L1>
+0+803c <L1\+0x24> bvs 0x0+8018 <L1>
+0+803e <L1\+0x26> bcc 0x0+8018 <L1>
+0+8040 <L1\+0x28> bpl 0x0+8018 <L1>
+0+8042 <L1\+0x2a> bvc 0x0+8018 <L1>
+0+8044 <L1\+0x2c> bne 0x0+8018 <L1>
+0+8046 <L1\+0x2e> brn 0x0+8018 <L1>
+0+8048 <L1\+0x30> bra 0x0+8018 <L1>
+0+804a <L1\+0x32> addd \*0x0+4 <_toto>
+0+804c <L1\+0x34> addd \*0x0+4 <_toto>
+0+804e <L1\+0x36> addd \*0x0+4 <_toto>
+0+8050 <L1\+0x38> addd \*0x0+4 <_toto>
+0+8052 <L1\+0x3a> addd \*0x0+4 <_toto>
+0+8054 <L1\+0x3c> addd \*0x0+4 <_toto>
+0+8056 <L1\+0x3e> addd \*0x0+4 <_toto>
+0+8058 <L1\+0x40> addd \*0x0+4 <_toto>
+0+805a <L1\+0x42> addd \*0x0+4 <_toto>
+0+805c <L1\+0x44> addd \*0x0+4 <_toto>
+0+805e <L1\+0x46> addd \*0x0+4 <_toto>
+0+8060 <L1\+0x48> addd \*0x0+4 <_toto>
+0+8062 <L1\+0x4a> addd \*0x0+4 <_toto>
+0+8064 <L1\+0x4c> addd \*0x0+4 <_toto>
+0+8066 <L1\+0x4e> addd \*0x0+4 <_toto>
+0+8068 <L2> bra 0x0+8000 <_start>
+0+806a <L2\+0x2> bne 0x0+8068 <L2>
+0+806c <L2\+0x4> beq 0x0+8074 <L3>
+0+806e <L2\+0x6> addd \*0x0+4 <_toto>
+0+8070 <L2\+0x8> beq 0x0+8074 <L3>
+0+8072 <L2\+0xa> addd \*0x0+4 <_toto>
+0+8074 <L3> addd \*0x0+4 <_toto>
0+8076 <L3\+0x2> rts
diff --git a/ld/testsuite/ld-m68hc11/bug-1403.d b/ld/testsuite/ld-m68hc11/bug-1403.d
index dfd69b0..16f6e19 100644
--- a/ld/testsuite/ld-m68hc11/bug-1403.d
+++ b/ld/testsuite/ld-m68hc11/bug-1403.d
@@ -6,6 +6,6 @@
.*: +file format elf32-m68hc11
Disassembly of section .text:
-0+8000 <_start> bset \*0+ <__bss_size> \#\$04
-0+8003 <L1> bra 0+8005 <toto>
+0+8000 <_start> bset \*0x0+ <__bss_size>, \#0x04
+0+8003 <L1> bra 0x0+8005 <toto>
0+8005 <toto> rts
diff --git a/ld/testsuite/ld-m68hc11/bug-1417.d b/ld/testsuite/ld-m68hc11/bug-1417.d
index 1947506..942ba63 100644
--- a/ld/testsuite/ld-m68hc11/bug-1417.d
+++ b/ld/testsuite/ld-m68hc11/bug-1417.d
@@ -6,9 +6,9 @@
.*: +file format elf32-m68hc11
Disassembly of section .text:
-0+8000 <_start> tst 0+ <__bss_size>
-0+8003 <_start\+0x3> bne 0+8007 <L1>
-0+8005 <_start\+0x5> bsr 0+800b <foo>
-0+8007 <L1> bset \*0+ <__bss_size> \#\$04
+0+8000 <_start> tst 0x0+ <__bss_size>
+0+8003 <_start\+0x3> bne 0x0+8007 <L1>
+0+8005 <_start\+0x5> bsr 0x0+800b <foo>
+0+8007 <L1> bset \*0x0+ <__bss_size>, \#0x04
0+800a <L2> rts
0+800b <foo> rts
diff --git a/ld/testsuite/ld-m68hc11/bug-3331.d b/ld/testsuite/ld-m68hc11/bug-3331.d
index cee93ab..6f72313 100644
--- a/ld/testsuite/ld-m68hc11/bug-3331.d
+++ b/ld/testsuite/ld-m68hc11/bug-3331.d
@@ -6,8 +6,8 @@
.*: +file format elf32-m68hc11
Disassembly of section .text:
-0+8000 <_start> ldx #0+1100 <__data_section_start>
-0+8003 <_start\+0x3> bset 0,x \#\$04
-0+8006 <L1> ldd \#0+2 <__bss_size\+0x2>
-0+8009 <L1\+0x3> std \*0+ <__bss_size>
+0+8000 <_start> ldx #0x0+1100 <__data_section_start>
+0+8003 <_start\+0x3> bset 0x0,x, \#0x04
+0+8006 <L1> ldd \#0x0+2 <__bss_size\+0x2>
+0+8009 <L1\+0x3> std \*0x0+ <__bss_size>
0+800b <L1\+0x5> rts
diff --git a/ld/testsuite/ld-m68hc11/far-hc11.d b/ld/testsuite/ld-m68hc11/far-hc11.d
index d563356..b93bb63 100644
--- a/ld/testsuite/ld-m68hc11/far-hc11.d
+++ b/ld/testsuite/ld-m68hc11/far-hc11.d
@@ -7,66 +7,66 @@
Disassembly of section .text:
0+8000 <tramp._far_foo> pshb
-0+8001 <tramp._far_foo\+0x1> ldab \#0
-0+8003 <tramp._far_foo\+0x3> ldy \#0+8072 <_far_foo>
-0+8007 <tramp._far_foo\+0x7> jmp 0+8056 <__far_trampoline>
+0+8001 <tramp._far_foo\+0x1> ldab \#0x0
+0+8003 <tramp._far_foo\+0x3> ldy \#0x0+8072 <_far_foo>
+0+8007 <tramp._far_foo\+0x7> jmp 0x0+8056 <__far_trampoline>
0+800a <tramp._far_bar> pshb
-0+800b <tramp._far_bar\+0x1> ldab \#0
-0+800d <tramp._far_bar\+0x3> ldy \#0+806a .*
-0+8011 <tramp._far_bar\+0x7> jmp 0+8056 <__far_trampoline>
-0+8014 <_start> lds \#0+64 <stack>
-0+8017 <_start\+0x3> ldx \#0+abcd .*
+0+800b <tramp._far_bar\+0x1> ldab \#0x0
+0+800d <tramp._far_bar\+0x3> ldy \#0x0+806a .*
+0+8011 <tramp._far_bar\+0x7> jmp 0x0+8056 <__far_trampoline>
+0+8014 <_start> lds \#0x0+64 <stack>
+0+8017 <_start\+0x3> ldx \#0x0+abcd .*
0+801a <_start\+0x6> pshx
-0+801b <_start\+0x7> ldd \#0+1234 .*
-0+801e <_start\+0xa> ldx \#0+5678 .*
-0+8021 <_start\+0xd> jsr 0+800a <tramp._far_bar>
-0+8024 <_start\+0x10> cpx \#0+1234 .*
-0+8027 <_start\+0x13> bne 0+804e <fail>
-0+8029 <_start\+0x15> cpd \#0+5678 .*
-0+802d <_start\+0x19> bne 0+804e <fail>
+0+801b <_start\+0x7> ldd \#0x0+1234 .*
+0+801e <_start\+0xa> ldx \#0x0+5678 .*
+0+8021 <_start\+0xd> jsr 0x0+800a <tramp._far_bar>
+0+8024 <_start\+0x10> cpx \#0x0+1234 .*
+0+8027 <_start\+0x13> bne 0x0+804e <fail>
+0+8029 <_start\+0x15> cpd \#0x0+5678 .*
+0+802d <_start\+0x19> bne 0x0+804e <fail>
0+802f <_start\+0x1b> pulx
-0+8030 <_start\+0x1c> cpx \#0+abcd .*
-0+8033 <_start\+0x1f> bne 0+804e <fail>
-0+8035 <_start\+0x21> ldd \#0+8000 <tramp._far_foo>
+0+8030 <_start\+0x1c> cpx \#0x0+abcd .*
+0+8033 <_start\+0x1f> bne 0x0+804e <fail>
+0+8035 <_start\+0x21> ldd \#0x0+8000 <tramp._far_foo>
0+8038 <_start\+0x24> xgdx
-0+8039 <_start\+0x25> jsr 0,x
-0+803b <_start\+0x27> ldd \#0+800a <tramp._far_bar>
+0+8039 <_start\+0x25> jsr 0x0,x
+0+803b <_start\+0x27> ldd \#0x0+800a <tramp._far_bar>
0+803e <_start\+0x2a> xgdy
-0+8040 <_start\+0x2c> jsr 0,y
-0+8043 <_start\+0x2f> ldaa \#0
-0+8045 <_start\+0x31> ldy \#0+8079 <_far_no_tramp>
-0+8049 <_start\+0x35> bsr 0+8066 <__call_a16>
+0+8040 <_start\+0x2c> jsr 0x0,y
+0+8043 <_start\+0x2f> ldaa \#0x0
+0+8045 <_start\+0x31> ldy \#0x0+8079 <_far_no_tramp>
+0+8049 <_start\+0x35> bsr 0x0+8066 <__call_a16>
0+804b <_start\+0x37> clra
0+804c <_start\+0x38> clrb
0+804d <_start\+0x39> wai
-0+804e <fail> ldd \#0+1 <__bss_size\+0x1>
+0+804e <fail> ldd \#0x0+1 <__bss_size\+0x1>
0+8051 <fail\+0x3> wai
-0+8052 <fail\+0x4> bra 0+8014 <_start>
+0+8052 <fail\+0x4> bra 0x0+8014 <_start>
0+8054 <__return> ins
0+8055 <__return\+0x1> rts
0+8056 <__far_trampoline> psha
0+8057 <__far_trampoline\+0x1> psha
0+8058 <__far_trampoline\+0x2> pshx
0+8059 <__far_trampoline\+0x3> tsx
-0+805a <__far_trampoline\+0x4> ldab 4,x
-0+805c <__far_trampoline\+0x6> ldaa 2,x
-0+805e <__far_trampoline\+0x8> staa 4,x
+0+805a <__far_trampoline\+0x4> ldab 0x4,x
+0+805c <__far_trampoline\+0x6> ldaa 0x2,x
+0+805e <__far_trampoline\+0x8> staa 0x4,x
0+8060 <__far_trampoline\+0xa> pulx
0+8061 <__far_trampoline\+0xb> pula
0+8062 <__far_trampoline\+0xc> pula
-0+8063 <__far_trampoline\+0xd> jmp 0,y
+0+8063 <__far_trampoline\+0xd> jmp 0x0,y
0+8066 <__call_a16> psha
-0+8067 <__call_a16\+0x1> jmp 0,y
+0+8067 <__call_a16\+0x1> jmp 0x0,y
Disassembly of section .bank1:
-0+806a <_far_bar> jsr 0+8071 <local_bank1>
+0+806a <_far_bar> jsr 0x0+8071 <local_bank1>
0+806d <_far_bar\+0x3> xgdx
-0+806e <_far_bar\+0x4> jmp 0+8054 <__return>
+0+806e <_far_bar\+0x4> jmp 0x0+8054 <__return>
0+8071 <local_bank1> rts
Disassembly of section .bank2:
-0+8072 <_far_foo> jsr 0+8078 <local_bank2>
-0+8075 <_far_foo\+0x3> jmp 0+8054 <__return>
+0+8072 <_far_foo> jsr 0x0+8078 <local_bank2>
+0+8075 <_far_foo\+0x3> jmp 0x0+8054 <__return>
0+8078 <local_bank2> rts
Disassembly of section .bank3:
-0+8079 <_far_no_tramp> jsr 0+807f <local_bank3>
-0+807c <_far_no_tramp\+0x3> jmp 0+8054 <__return>
+0+8079 <_far_no_tramp> jsr 0x0+807f <local_bank3>
+0+807c <_far_no_tramp\+0x3> jmp 0x0+8054 <__return>
0+807f <local_bank3> rts
diff --git a/ld/testsuite/ld-m68hc11/far-hc12.d b/ld/testsuite/ld-m68hc11/far-hc12.d
index 09b3fec..7d99089 100644
--- a/ld/testsuite/ld-m68hc11/far-hc12.d
+++ b/ld/testsuite/ld-m68hc11/far-hc12.d
@@ -6,49 +6,49 @@
.*: file format elf32\-m68hc12
Disassembly of section .text:
-0+c000 <tramp\._far_foo> ldy \#0+8000 <__bank_start>
-0+c003 <tramp\._far_foo\+0x3> call 0+c049 <__far_trampoline> \{0+c049 <__far_trampoline>, 1\}
-0+c007 <tramp\._far_bar> ldy \#0+8000 <__bank_start>
-0+c00a <tramp\._far_bar\+0x3> call 0+c049 <__far_trampoline> \{0+c049 <__far_trampoline>, 0\}
-0+c00e <_start> lds \#0+2063 <stack-0x1>
-0+c011 <_start\+0x3> ldx \#0+abcd <__bank_start\+0x2bcd>
+0+c000 <tramp\._far_foo> ldy \#0x0+8000 <__bank_start>
+0+c003 <tramp\._far_foo\+0x3> call 0x0+c049 <__far_trampoline> \{0x0+c049 <__far_trampoline>, 0x1\}
+0+c007 <tramp\._far_bar> ldy \#0x0+8000 <__bank_start>
+0+c00a <tramp\._far_bar\+0x3> call 0x0+c049 <__far_trampoline> \{0x0+c049 <__far_trampoline>, 0x0\}
+0+c00e <_start> lds \#0x0+2063 <stack-0x1>
+0+c011 <_start\+0x3> ldx \#0x0+abcd <__bank_start\+0x2bcd>
0+c014 <_start\+0x6> pshx
-0+c015 <_start\+0x7> ldd \#0+1234 <stack\-0xe30>
-0+c018 <_start\+0xa> ldx \#0+5678 <__bank_size\+0x1678>
-0+c01b <_start\+0xd> jsr 0+c007 <tramp._far_bar>
-0+c01e <_start\+0x10> cpx \#0+1234 <stack\-0xe30>
-0+c021 <_start\+0x13> bne 0+c043 <fail>
-0+c023 <_start\+0x15> cpd \#0+5678 <__bank_size\+0x1678>
-0+c026 <_start\+0x18> bne 0+c043 <fail>
+0+c015 <_start\+0x7> ldd \#0x0+1234 <stack\-0xe30>
+0+c018 <_start\+0xa> ldx \#0x0+5678 <__bank_size\+0x1678>
+0+c01b <_start\+0xd> jsr 0x0+c007 <tramp._far_bar>
+0+c01e <_start\+0x10> cpx \#0x0+1234 <stack\-0xe30>
+0+c021 <_start\+0x13> bne 0x0+c043 <fail>
+0+c023 <_start\+0x15> cpd \#0x0+5678 <__bank_size\+0x1678>
+0+c026 <_start\+0x18> bne 0x0+c043 <fail>
0+c028 <_start\+0x1a> pulx
-0+c029 <_start\+0x1b> cpx \#0+abcd <__bank_start\+0x2bcd>
-0+c02c <_start\+0x1e> bne 0+c043 <fail>
-0+c02e <_start\+0x20> ldd \#0+c000 <tramp._far_foo>
+0+c029 <_start\+0x1b> cpx \#0x0+abcd <__bank_start\+0x2bcd>
+0+c02c <_start\+0x1e> bne 0x0+c043 <fail>
+0+c02e <_start\+0x20> ldd \#0x0+c000 <tramp._far_foo>
0+c031 <_start\+0x23> xgdx
-0+c033 <_start\+0x25> jsr 0,X
-0+c035 <_start\+0x27> ldd \#0+c007 <tramp._far_bar>
+0+c033 <_start\+0x25> jsr 0x0,X
+0+c035 <_start\+0x27> ldd \#0x0+c007 <tramp._far_bar>
0+c038 <_start\+0x2a> xgdy
-0+c03a <_start\+0x2c> jsr 0,Y
-0+c03c <_start\+0x2e> call 0+18000 <_far_no_tramp> \{0+8000 <__bank_start>, 2\}
+0+c03a <_start\+0x2c> jsr 0x0,Y
+0+c03c <_start\+0x2e> call 0x0+18000 <_far_no_tramp> \{0x0+8000 <__bank_start>, 0x2\}
0+c040 <_start\+0x32> clra
0+c041 <_start\+0x33> clrb
0+c042 <_start\+0x34> wai
-0+c043 <fail> ldd \#0+1 <stack\-0x2063>
+0+c043 <fail> ldd \#0x0+1 <stack\-0x2063>
0+c046 <fail\+0x3> wai
-0+c047 <fail\+0x4> bra 0+c00e <_start>
-0+c049 <__far_trampoline> movb 0,SP, 2,SP
-0+c04d <__far_trampoline\+0x4> leas 2,SP
-0+c04f <__far_trampoline\+0x6> jmp 0,Y
+0+c047 <fail\+0x4> bra 0x0+c00e <_start>
+0+c049 <__far_trampoline> movb 0x0,SP, 0x2,SP
+0+c04d <__far_trampoline\+0x4> leas 0x2,SP
+0+c04f <__far_trampoline\+0x6> jmp 0x0,Y
Disassembly of section .bank1:
-0+10+ <_far_bar> jsr 0+10006 <local_bank1>
+0+10+ <_far_bar> jsr 0x0+10006 <local_bank1>
0+10003 <_far_bar\+0x3> xgdx
0+10005 <_far_bar\+0x5> rtc
0+10006 <local_bank1> rts
Disassembly of section .bank2:
-0+14000 <_far_foo> jsr 0+14004 <local_bank2>
+0+14000 <_far_foo> jsr 0x0+14004 <local_bank2>
0+14003 <_far_foo\+0x3> rtc
0+14004 <local_bank2> rts
Disassembly of section .bank3:
-0+18000 <_far_no_tramp> jsr 0+18004 <local_bank3>
+0+18000 <_far_no_tramp> jsr 0x0+18004 <local_bank3>
0+18003 <_far_no_tramp\+0x3> rtc
0+18004 <local_bank3> rts
diff --git a/ld/testsuite/ld-m68hc11/link-hcs12.d b/ld/testsuite/ld-m68hc11/link-hcs12.d
index d90fcf6..5fd5fae 100644
--- a/ld/testsuite/ld-m68hc11/link-hcs12.d
+++ b/ld/testsuite/ld-m68hc11/link-hcs12.d
@@ -1,19 +1,19 @@
#source: link-hcs12.s -m68hcs12
#source: link-hc12.s -m68hc12
#as: -mshort
-#ld: -m m68hc12elf
+#ld: -m m68hc12elf --script $srcdir/$subdir/far-hc12.ld
#objdump: -p -d --prefix-addresses -r
.*: file format elf32\-m68hc12
Program Header:
- LOAD off 0x0+1000 vaddr 0x0+8000 paddr 0x0+8000 align 2\*\*12
+ LOAD off 0x0+1000 vaddr 0x0+c000 paddr 0x0+c000 align 2\*\*12
filesz 0x0+6 memsz 0x0+6 flags r-x
private flags = 22:\[abi=16\-bit int, 64\-bit double, cpu=HCS12\] \[memory=flat\]
Disassembly of section .text:
-0+8000 <_start> jsr 0+8005 <main>
-0+8003 <_start\+0x3> bra 0+8000 <_start>
-0+8005 <main> rts
+0+c000 <_start> jsr 0x0+c005 <main>
+0+c003 <_start\+0x3> bra 0x0+c000 <_start>
+0+c005 <main> rts
diff --git a/ld/testsuite/ld-m68hc11/relax-direct.d b/ld/testsuite/ld-m68hc11/relax-direct.d
index 3de3d9a..519c074 100644
--- a/ld/testsuite/ld-m68hc11/relax-direct.d
+++ b/ld/testsuite/ld-m68hc11/relax-direct.d
@@ -6,57 +6,57 @@
.*: +file format elf32-m68hc11
Disassembly of section .text:
-0+8000 <_start> lds \*0+28 <stack>
-0+8002 <_start\+0x2> ldd \*0+ <__bss_size>
-0+8004 <_start\+0x4> beq 0+800f <F1>
-0+8006 <_start\+0x6> bne 0+800b <_start\+0xb>
-0+8008 <_start\+0x8> jmp 0+8138 <F2>
-0+800b <_start\+0xb> std \*0+ <__bss_size>
-0+800d <_start\+0xd> jsr \*0+ <__bss_size>
-0+800f <F1> addd \*0+4 <_toto>
-0+8011 <F1\+0x2> bne 0+8000 <_start>
-0+8013 <F1\+0x4> addd \*0+cc <_table\+0x9a>
-0+8015 <F1\+0x6> addd 0+114 <_stack_top\+0x1a>
-0+8018 <F1\+0x9> adca \*0+34 <_table\+0x2>
-0+801a <F1\+0xb> adcb \*0+35 <_table\+0x3>
-0+801c <F1\+0xd> adda \*0+36 <_table\+0x4>
-0+801e <F1\+0xf> addb \*0+37 <_table\+0x5>
-0+8020 <F1\+0x11> addd \*0+38 <_table\+0x6>
-0+8022 <F1\+0x13> anda \*0+39 <_table\+0x7>
-0+8024 <F1\+0x15> andb \*0+3a <_table\+0x8>
-0+8026 <F1\+0x17> cmpa \*0+3b <_table\+0x9>
-0+8028 <F1\+0x19> cmpb \*0+3c <_table\+0xa>
-0+802a <F1\+0x1b> cpd \*0+3d <_table\+0xb>
-0+802d <F1\+0x1e> cpx \*0+3e <_table\+0xc>
-0+802f <F1\+0x20> cpy \*0+3f <_table\+0xd>
-0+8032 <F1\+0x23> eora \*0+40 <_table\+0xe>
-0+8034 <F1\+0x25> eorb \*0+41 <_table\+0xf>
-0+8036 <F1\+0x27> jsr \*0+42 <_table\+0x10>
-0+8038 <F1\+0x29> ldaa \*0+43 <_table\+0x11>
-0+803a <F1\+0x2b> ldab \*0+44 <_table\+0x12>
-0+803c <F1\+0x2d> ldd \*0+45 <_table\+0x13>
-0+803e <F1\+0x2f> lds \*0+46 <_table\+0x14>
-0+8040 <F1\+0x31> ldx \*0+47 <_table\+0x15>
-0+8042 <F1\+0x33> ldy \*0+48 <_table\+0x16>
-0+8045 <F1\+0x36> oraa \*0+49 <_table\+0x17>
-0+8047 <F1\+0x38> orab \*0+4a <_table\+0x18>
-0+8049 <F1\+0x3a> sbcb \*0+4b <_table\+0x19>
-0+804b <F1\+0x3c> sbca \*0+4c <_table\+0x1a>
-0+804d <F1\+0x3e> staa \*0+4d <_table\+0x1b>
-0+804f <F1\+0x40> stab \*0+4e <_table\+0x1c>
-0+8051 <F1\+0x42> std \*0+4f <_table\+0x1d>
-0+8053 <F1\+0x44> sts \*0+50 <_table\+0x1e>
-0+8055 <F1\+0x46> stx \*0+51 <_table\+0x1f>
-0+8057 <F1\+0x48> sty \*0+52 <_table\+0x20>
-0+805a <F1\+0x4b> suba \*0+53 <_table\+0x21>
-0+805c <F1\+0x4d> subb \*0+54 <_table\+0x22>
-0+805e <F1\+0x4f> subd \*0+55 <_table\+0x23>
-0+8060 <F1\+0x51> bne 0+8000 <_start>
-0+8062 <F1\+0x53> bra 0+800f <F1>
+0+8000 <_start> lds \*0x0+28 <stack>
+0+8002 <_start\+0x2> ldd \*0x0+ <__bss_size>
+0+8004 <_start\+0x4> beq 0x0+800f <F1>
+0+8006 <_start\+0x6> bne 0x0+800b <_start\+0xb>
+0+8008 <_start\+0x8> jmp 0x0+8138 <F2>
+0+800b <_start\+0xb> std \*0x0+ <__bss_size>
+0+800d <_start\+0xd> jsr \*0x0+ <__bss_size>
+0+800f <F1> addd \*0x0+4 <_toto>
+0+8011 <F1\+0x2> bne 0x0+8000 <_start>
+0+8013 <F1\+0x4> addd \*0x0+cc <_table\+0x9a>
+0+8015 <F1\+0x6> addd 0x0+114 <_stack_top\+0x1a>
+0+8018 <F1\+0x9> adca \*0x0+34 <_table\+0x2>
+0+801a <F1\+0xb> adcb \*0x0+35 <_table\+0x3>
+0+801c <F1\+0xd> adda \*0x0+36 <_table\+0x4>
+0+801e <F1\+0xf> addb \*0x0+37 <_table\+0x5>
+0+8020 <F1\+0x11> addd \*0x0+38 <_table\+0x6>
+0+8022 <F1\+0x13> anda \*0x0+39 <_table\+0x7>
+0+8024 <F1\+0x15> andb \*0x0+3a <_table\+0x8>
+0+8026 <F1\+0x17> cmpa \*0x0+3b <_table\+0x9>
+0+8028 <F1\+0x19> cmpb \*0x0+3c <_table\+0xa>
+0+802a <F1\+0x1b> cpd \*0x0+3d <_table\+0xb>
+0+802d <F1\+0x1e> cpx \*0x0+3e <_table\+0xc>
+0+802f <F1\+0x20> cpy \*0x0+3f <_table\+0xd>
+0+8032 <F1\+0x23> eora \*0x0+40 <_table\+0xe>
+0+8034 <F1\+0x25> eorb \*0x0+41 <_table\+0xf>
+0+8036 <F1\+0x27> jsr \*0x0+42 <_table\+0x10>
+0+8038 <F1\+0x29> ldaa \*0x0+43 <_table\+0x11>
+0+803a <F1\+0x2b> ldab \*0x0+44 <_table\+0x12>
+0+803c <F1\+0x2d> ldd \*0x0+45 <_table\+0x13>
+0+803e <F1\+0x2f> lds \*0x0+46 <_table\+0x14>
+0+8040 <F1\+0x31> ldx \*0x0+47 <_table\+0x15>
+0+8042 <F1\+0x33> ldy \*0x0+48 <_table\+0x16>
+0+8045 <F1\+0x36> oraa \*0x0+49 <_table\+0x17>
+0+8047 <F1\+0x38> orab \*0x0+4a <_table\+0x18>
+0+8049 <F1\+0x3a> sbcb \*0x0+4b <_table\+0x19>
+0+804b <F1\+0x3c> sbca \*0x0+4c <_table\+0x1a>
+0+804d <F1\+0x3e> staa \*0x0+4d <_table\+0x1b>
+0+804f <F1\+0x40> stab \*0x0+4e <_table\+0x1c>
+0+8051 <F1\+0x42> std \*0x0+4f <_table\+0x1d>
+0+8053 <F1\+0x44> sts \*0x0+50 <_table\+0x1e>
+0+8055 <F1\+0x46> stx \*0x0+51 <_table\+0x1f>
+0+8057 <F1\+0x48> sty \*0x0+52 <_table\+0x20>
+0+805a <F1\+0x4b> suba \*0x0+53 <_table\+0x21>
+0+805c <F1\+0x4d> subb \*0x0+54 <_table\+0x22>
+0+805e <F1\+0x4f> subd \*0x0+55 <_table\+0x23>
+0+8060 <F1\+0x51> bne 0x0+8000 <_start>
+0+8062 <F1\+0x53> bra 0x0+800f <F1>
0+8064 <F1\+0x55> rts
-0+8065 <no_relax> addd 0+136 <_stack_top\+0x3c>
-0+8068 <no_relax\+0x3> std 0+122 <_stack_top\+0x28>
-0+806b <no_relax\+0x6> tst 0+5 <_toto\+0x1>
-0+806e <no_relax\+0x9> bne 0+8065 <no_relax>
+0+8065 <no_relax> addd 0x0+136 <_stack_top\+0x3c>
+0+8068 <no_relax\+0x3> std 0x0+122 <_stack_top\+0x28>
+0+806b <no_relax\+0x6> tst 0x0+5 <_toto\+0x1>
+0+806e <no_relax\+0x9> bne 0x0+8065 <no_relax>
...
-0+8138 <F2> jmp 0+8000 <_start>
+0+8138 <F2> jmp 0x0+8000 <_start>
diff --git a/ld/testsuite/ld-m68hc11/relax-group.d b/ld/testsuite/ld-m68hc11/relax-group.d
index 25ac588..8c4fb24 100644
--- a/ld/testsuite/ld-m68hc11/relax-group.d
+++ b/ld/testsuite/ld-m68hc11/relax-group.d
@@ -6,57 +6,57 @@
.*: +file format elf32-m68hc11
Disassembly of section .text:
-0+8000 <_start> bset \*0+ <__bss_size> #\$04
-0+8003 <L1x> bset \*0+ <__bss_size> #\$04
-0+8006 <L1y> bset \*0+3 <__bss_size\+0x3> #\$04
-0+8009 <L1y\+0x3> bset \*0+4 <table4> #\$08
-0+800c <L2x> bset \*0+3 <__bss_size\+0x3> #\$04
-0+800f <L2x\+0x3> bset \*0+4 <table4> #\$08
-0+8012 <L2y> bset \*0+6 <table4\+0x2> #\$04
-0+8015 <L2y\+0x3> bset \*0+7 <table4\+0x3> #\$08
-0+8018 <L2y\+0x6> bset \*0+8 <table8> #\$0c
-0+801b <L2y\+0x9> bset \*0+9 <table8\+0x1> #\$0c
-0+801e <L2y\+0xc> bset \*0+a <table8\+0x2> #\$0c
-0+8021 <L2y\+0xf> bset \*0+b <table8\+0x3> #\$0c
-0+8024 <L3x> bset \*0+6 <table4\+0x2> #\$04
-0+8027 <L3x\+0x3> bset \*0+7 <table4\+0x3> #\$08
-0+802a <L3x\+0x6> bset \*0+8 <table8> #\$0c
-0+802d <L3x\+0x9> bset \*0+9 <table8\+0x1> #\$0c
-0+8030 <L3x\+0xc> bset \*0+a <table8\+0x2> #\$0c
-0+8033 <L3x\+0xf> bset \*0+b <table8\+0x3> #\$0c
-0+8036 <L3y> bra 0+8000 <_start>
-0+8038 <L3y\+0x2> ldx #0+fe <end_table\+0xe8>
-0+803b <L3y\+0x5> bset \*0+fe <end_table\+0xe8> #\$04
-0+803e <L3y\+0x8> bset \*0+ff <end_table\+0xe9> #\$08
-0+8041 <L3y\+0xb> bset 2,x #\$0c
-0+8044 <L3y\+0xe> bset 3,x #\$0c
-0+8047 <L3y\+0x11> bset 4,x #\$0c
-0+804a <L3y\+0x14> bset 5,x #\$0c
-0+804d <L4x> ldy #0+fe <end_table\+0xe8>
-0+8051 <L4x\+0x4> bset \*0+fe <end_table\+0xe8> #\$04
-0+8054 <L4x\+0x7> bset \*0+ff <end_table\+0xe9> #\$08
-0+8057 <L4x\+0xa> bset 2,y #\$0c
-0+805b <L4x\+0xe> bset 3,y #\$0c
-0+805f <L4x\+0x12> bset 4,y #\$0c
-0+8063 <L4x\+0x16> bset 5,y #\$0c
-0+8067 <L4y> bclr \*0+a <table8\+0x2> #\$04
-0+806a <L4y\+0x3> bclr \*0+b <table8\+0x3> #\$08
-0+806d <L5x> bclr \*0+1a <end_table\+0x4> #\$04
-0+8070 <L5x\+0x3> bclr \*0+1b <end_table\+0x5> #\$08
-0+8073 <L5y> brset \*0+8 <table8> #\$04 0+8073 <L5y>
-0+8077 <L6x> brset \*0+8 <table8> #\$04 0+8077 <L6x>
-0+807b <L7x> brset \*0+8 <table8> #\$04 0+8094 <brend>
-0+807f <L8x> brset \*0+8 <table8> #\$04 0+8094 <brend>
-0+8083 <L8y> brclr \*0+8 <table8> #\$04 0+8083 <L8y>
-0+8087 <L9x> brclr \*0+8 <table8> #\$04 0+8087 <L9x>
-0+808b <L9y> brclr \*0+8 <table8> #\$04 0+8094 <brend>
-0+808f <L10x> brclr \*0+8 <table8> #\$04 0+8094 <brend>
+0+8000 <_start> bset \*0x0+ <__bss_size>, #0x04
+0+8003 <L1x> bset \*0x0+ <__bss_size>, #0x04
+0+8006 <L1y> bset \*0x0+3 <__bss_size\+0x3>, #0x04
+0+8009 <L1y\+0x3> bset \*0x0+4 <table4>, #0x08
+0+800c <L2x> bset \*0x0+3 <__bss_size\+0x3>, #0x04
+0+800f <L2x\+0x3> bset \*0x0+4 <table4>, #0x08
+0+8012 <L2y> bset \*0x0+6 <table4\+0x2>, #0x04
+0+8015 <L2y\+0x3> bset \*0x0+7 <table4\+0x3>, #0x08
+0+8018 <L2y\+0x6> bset \*0x0+8 <table8>, #0x0c
+0+801b <L2y\+0x9> bset \*0x0+9 <table8\+0x1>, #0x0c
+0+801e <L2y\+0xc> bset \*0x0+a <table8\+0x2>, #0x0c
+0+8021 <L2y\+0xf> bset \*0x0+b <table8\+0x3>, #0x0c
+0+8024 <L3x> bset \*0x0+6 <table4\+0x2>, #0x04
+0+8027 <L3x\+0x3> bset \*0x0+7 <table4\+0x3>, #0x08
+0+802a <L3x\+0x6> bset \*0x0+8 <table8>, #0x0c
+0+802d <L3x\+0x9> bset \*0x0+9 <table8\+0x1>, #0x0c
+0+8030 <L3x\+0xc> bset \*0x0+a <table8\+0x2>, #0x0c
+0+8033 <L3x\+0xf> bset \*0x0+b <table8\+0x3>, #0x0c
+0+8036 <L3y> bra 0x0+8000 <_start>
+0+8038 <L3y\+0x2> ldx #0x0+fe <end_table\+0xe8>
+0+803b <L3y\+0x5> bset \*0x0+fe <end_table\+0xe8>, #0x04
+0+803e <L3y\+0x8> bset \*0x0+ff <end_table\+0xe9>, #0x08
+0+8041 <L3y\+0xb> bset 0x2,x, #0x0c
+0+8044 <L3y\+0xe> bset 0x3,x, #0x0c
+0+8047 <L3y\+0x11> bset 0x4,x, #0x0c
+0+804a <L3y\+0x14> bset 0x5,x, #0x0c
+0+804d <L4x> ldy #0x0+fe <end_table\+0xe8>
+0+8051 <L4x\+0x4> bset \*0x0+fe <end_table\+0xe8>, #0x04
+0+8054 <L4x\+0x7> bset \*0x0+ff <end_table\+0xe9>, #0x08
+0+8057 <L4x\+0xa> bset 0x2,y, #0x0c
+0+805b <L4x\+0xe> bset 0x3,y, #0x0c
+0+805f <L4x\+0x12> bset 0x4,y, #0x0c
+0+8063 <L4x\+0x16> bset 0x5,y, #0x0c
+0+8067 <L4y> bclr \*0x0+a <table8\+0x2>, #0x04
+0+806a <L4y\+0x3> bclr \*0x0+b <table8\+0x3>, #0x08
+0+806d <L5x> bclr \*0x0+1a <end_table\+0x4>, #0x04
+0+8070 <L5x\+0x3> bclr \*0x0+1b <end_table\+0x5>, #0x08
+0+8073 <L5y> brset \*0x0+8 <table8>, #0x04, 0x0+8073 <L5y>
+0+8077 <L6x> brset \*0x0+8 <table8>, #0x04, 0x0+8077 <L6x>
+0+807b <L7x> brset \*0x0+8 <table8>, #0x04, 0x0+8094 <brend>
+0+807f <L8x> brset \*0x0+8 <table8>, #0x04, 0x0+8094 <brend>
+0+8083 <L8y> brclr \*0x0+8 <table8>, #0x04, 0x0+8083 <L8y>
+0+8087 <L9x> brclr \*0x0+8 <table8>, #0x04, 0x0+8087 <L9x>
+0+808b <L9y> brclr \*0x0+8 <table8>, #0x04, 0x0+8094 <brend>
+0+808f <L10x> brclr \*0x0+8 <table8>, #0x04, 0x0+8094 <brend>
0+8093 <L10y> nop
-0+8094 <brend> bset 0,x #\$04
-0+8097 <w2> ldx #0+ <__bss_size>
-0+809a <w3> ldy #0+8 <table8>
+0+8094 <brend> bset 0x0,x, #0x04
+0+8097 <w2> ldx #0x0+ <__bss_size>
+0+809a <w3> ldy #0x0+8 <table8>
0+809e <w4> rts
-0+809f <w5> ldx #0+ <__bss_size>
-0+80a2 <w5\+0x3> bset 0,x #\$05
-0+80a5 <w5\+0x6> jmp 0+8000 <_start>
+0+809f <w5> ldx #0x0+ <__bss_size>
+0+80a2 <w5\+0x3> bset 0x0,x, #0x05
+0+80a5 <w5\+0x6> jmp 0x0+8000 <_start>
0+80a8 <w5\+0x9> rts
diff --git a/ld/testsuite/ld-m68hc11/xgate-link.d b/ld/testsuite/ld-m68hc11/xgate-link.d
new file mode 100644
index 0000000..cdf80ab
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate-link.d
@@ -0,0 +1,25 @@
+#as: -mm9s12xg
+#source: xgate-link.s
+#ld: --relax -mm68hc12elf -defsym var1=0xfeed -defsym var2=0xdeaf -defsym var3=0xa1b2 -defsym var4=0x3456 -defsym var5=0xfa -defsym var6=0x20fe
+#objdump: -d --prefix-addresses -r -mm9s12xg
+
+tmpdir/dump: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+00008000 <_start> ldl R1, #0xed
+00008002 <_start\+0x2> ldh R1, #0xfe
+00008004 <_start\+0x4> addl R5, #0xaf
+00008006 <_start\+0x6> addh R5, #0xde
+00008008 <_start\+0x8> ldl R2, #0x56
+0000800a <_start\+0xa> ldh R2, #0x34
+0000800c <_start\+0xc> ldl R3, #0x21
+0000800e <_start\+0xe> ldh R6, #0xfa
+00008010 <_start\+0x10> cmpl R1, #0xcd
+00008012 <_start\+0x12> cpch R1, #0xab
+00008014 <_start\+0x14> cmpl R2, #0xb2
+00008016 <_start\+0x16> cpch R2, #0xa1
+00008018 <_start\+0x18> ldl R1, #0xfe
+0000801a <_start\+0x1a> ldh R1, #0x20
+0000801c <_start\+0x1c> ldl R2, #0x02
+0000801e <_start\+0x1e> ldh R2, #0x22
diff --git a/ld/testsuite/ld-m68hc11/xgate-link.s b/ld/testsuite/ld-m68hc11/xgate-link.s
new file mode 100644
index 0000000..8413bd9
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate-link.s
@@ -0,0 +1,16 @@
+;;; Test 16bit relocate with XGATE
+;;;
+ .sect .text
+ .globl _start
+_start:
+
+ ldw r1,#var1 ; expands to two IMM8 %hi,%lo relocate
+ add r5,#var2 ; expands to two IMM8 %hi,%lo relocate
+ ldl r2,#%lovar4 ; test explicit %lo
+ ldh r2,#%hivar4 ; test explicit %hi
+ ldl r3,#0x21 ; regular IMM8
+ ldh r6,#var5 ; IMM8 with relocate
+ cmp r1,#0xabcd ; expands to two IMM8 with constant
+ cmp r2,#var3 ; expands to two IMM8 %hi,%lo relocate
+ ldw r1,#var6
+ ldw r2,#var6+0x104 ; check for correct carry
diff --git a/ld/testsuite/ld-m68hc11/xgate-offset.d b/ld/testsuite/ld-m68hc11/xgate-offset.d
new file mode 100644
index 0000000..ee8d492
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate-offset.d
@@ -0,0 +1,13 @@
+#as: -mm9s12xg --xgate-ramoffset
+#source: xgate-offset.s
+#ld: --relax -mm68hc12elf -defsym var=0x20fe
+#objdump: -d --prefix-addresses -r -mm9s12xg
+
+tmpdir/dump: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+00008000 <_start> ldl R1, #0xfe
+00008002 <_start\+0x2> ldh R1, #0xe0
+00008004 <_start\+0x4> ldl R2, #0x04
+00008006 <_start\+0x6> ldh R2, #0xe2
diff --git a/ld/testsuite/ld-m68hc11/xgate-offset.s b/ld/testsuite/ld-m68hc11/xgate-offset.s
new file mode 100644
index 0000000..f81bc89
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate-offset.s
@@ -0,0 +1,8 @@
+;;; Test 16bit relocate with --xgate-ramoffset
+;;;
+ .sect .text
+ .globl _start
+_start:
+
+ ldw r1,#var
+ ldw r2,#var+0x106 ; check for correct carry too
diff --git a/ld/testsuite/ld-m68hc11/xgate1.d b/ld/testsuite/ld-m68hc11/xgate1.d
new file mode 100644
index 0000000..abe6bbc
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate1.d
@@ -0,0 +1,24 @@
+#as: -mm9s12xg
+#source: xgate1.s
+#source: xgate2.s
+#ld: --relax -mm68hc12elf
+#objdump: -d --prefix-addresses -r -mm9s12xg
+
+tmpdir/dump: file format elf32-m68hc12
+
+
+Disassembly of section .text:
+00008000 <_start> ldl R1, \#0x00
+00008002 <_start\+0x2> ldh R1, \#0x11
+00008004 <_start\+0x4> sub R0, R1, R0
+00008006 <_start\+0x6> beq 0x0+8010 <linked_ad1>
+00008008 <_start\+0x8> sub R0, R2, R0
+0000800a <_start\+0xa> beq 0x0+800e <the_end>
+0000800c <_start\+0xc> bra 0x0+8018 <linked_ad2>
+0000800e <the_end> rts
+00008010 <linked_ad1> cmpl R4, \#0x01
+00008012 <linked_ad1\+0x2> bne 0x0+8018 <linked_ad2>
+00008014 <label1> nop
+00008016 <label1\+0x2> par R5
+00008018 <linked_ad2> csem \#0x2
+0000801a <linked_ad2\+0x2> rts
diff --git a/ld/testsuite/ld-m68hc11/xgate1.s b/ld/testsuite/ld-m68hc11/xgate1.s
new file mode 100644
index 0000000..26baf67
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate1.s
@@ -0,0 +1,18 @@
+;;; Test branches and branch relocate with XGATE
+;;;
+ .sect .text
+ .globl _start
+_start:
+
+ ldw r1,#var1 ; expands to two IMM8 %hi,%lo relocate
+ tst r1
+ beq linked_ad1
+ tst r2
+ beq the_end
+ bra linked_ad2
+
+the_end:
+ rts
+
+ .sect .data
+var1: fdb 0x1234
diff --git a/ld/testsuite/ld-m68hc11/xgate2.s b/ld/testsuite/ld-m68hc11/xgate2.s
new file mode 100644
index 0000000..54b1ed9
--- /dev/null
+++ b/ld/testsuite/ld-m68hc11/xgate2.s
@@ -0,0 +1,16 @@
+;;; Part2 of branch test
+;;;
+.globl linked_ad1, linked_ad2
+ .sect .text
+
+linked_ad1:
+ cmpl r4,#1
+ bne linked_ad2
+
+label1:
+ nop
+ par r5
+
+linked_ad2:
+ csem #2
+ rts
diff --git a/ld/testsuite/ld-m68k/tls-ld-1.d b/ld/testsuite/ld-m68k/tls-ld-1.d
index 01e8904..9f374f3 100644
--- a/ld/testsuite/ld-m68k/tls-ld-1.d
+++ b/ld/testsuite/ld-m68k/tls-ld-1.d
@@ -17,6 +17,6 @@
0x00000000 \(NULL\) 0x0
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 2 entries:
- Offset Info Type Sym.Value Sym. Name \+ Addend
-[0-9a-f]+ [0-9a-f]+ R_68K_32 00000000 __tls_get_addr \+ 0
-[0-9a-f]+ [0-9a-f]+ R_68K_TLS_DTPMOD3 00000000
+ Offset +Info +Type +Sym.Value +Sym. Name \+ Addend
+[0-9a-f]+ +[0-9a-f]+ R_68K_32 +0+ +__tls_get_addr \+ 0
+[0-9a-f]+ +[0-9a-f]+ R_68K_TLS_DTPMOD3 +0
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d
index cd95356..32bc319 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-0.s
#source: attr-gnu-4-0.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d
index 88bd9c2..7a5c7a1 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-0.s
#source: attr-gnu-4-1.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d
index a9cd487..f29d5d5 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-0.s
#source: attr-gnu-4-2.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d
index 64f03f5..e571e13 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-0.s
#source: attr-gnu-4-3.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-04.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-04.d
index 62b9eef..f8dee5c 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-04.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-04.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-0.s
#source: attr-gnu-4-4.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-05.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-05.d
index ebfc6d8..6856df0 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-05.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-05.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-0.s
#source: attr-gnu-4-5.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d
index cd15000..7661963 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-1.s
#source: attr-gnu-4-0.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d
index 37ccda1..f70306b 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-1.s
#source: attr-gnu-4-1.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d
index 3ee6025..447621c 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-1.s
#source: attr-gnu-4-2.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses -msingle-float, .* uses -mdouble-float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d
index a48c119..417798e 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-1.s
#source: attr-gnu-4-3.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses hard float, .* uses soft float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d
index e899382..b940889 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-1.s
#source: attr-gnu-4-4.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses -msingle-float, .* uses -mips32r2 -mfp64
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-15.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-15.d
index e3ac7fc..337b8a4 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-15.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-15.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-1.s
#source: attr-gnu-4-5.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#warning: Warning: .* uses unknown floating point ABI 5
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d
index 23fc72d..3620069 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-2.s
#source: attr-gnu-4-0.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d
index 3f84867..08436e7 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-2.s
#source: attr-gnu-4-1.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses -msingle-float, .* uses -mdouble-float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d
index 062bfaf..63edea9 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-2.s
#source: attr-gnu-4-2.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d
index c0c14fd..d9f76d3 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-2.s
#source: attr-gnu-4-3.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses hard float, .* uses soft float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-24.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-24.d
index 09e8175..213996c 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-24.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-24.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-2.s
#source: attr-gnu-4-4.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses -mips32r2 -mfp64
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-25.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-25.d
index 0f27255..5b26875 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-25.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-25.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-2.s
#source: attr-gnu-4-5.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#warning: Warning: .* uses unknown floating point ABI 5
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d
index d123328..cdc108e 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-3.s
#source: attr-gnu-4-0.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d
index 6a629e7..cac5812 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-3.s
#source: attr-gnu-4-1.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses hard float, .* uses soft float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d
index 824d467..dd066dd 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-3.s
#source: attr-gnu-4-2.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses hard float, .* uses soft float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d
index 28d9d31..39eebb3 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-3.s
#source: attr-gnu-4-3.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-34.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-34.d
index 2a9b0f3..33a987a 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-34.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-34.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-3.s
#source: attr-gnu-4-4.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses hard float, .* uses soft float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-35.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-35.d
index c3ad25f..763e12e 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-35.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-35.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-3.s
#source: attr-gnu-4-5.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#warning: Warning: .* uses unknown floating point ABI 5
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-40.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-40.d
index d28aa2a..27d4571 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-40.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-40.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-4.s
#source: attr-gnu-4-0.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d
index 71f74a9..a00e626 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-4.s
#source: attr-gnu-4-1.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses -msingle-float, .* uses -mips32r2 -mfp64
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-42.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-42.d
index c095695..f67f1c8 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-42.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-42.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-4.s
#source: attr-gnu-4-2.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses -mips32r2 -mfp64
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-43.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-43.d
index 8396e38..e3d8b20 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-43.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-43.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-4.s
#source: attr-gnu-4-3.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses hard float, .* uses soft float
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-44.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-44.d
index 8be31de..68b03a0 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-44.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-44.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-4.s
#source: attr-gnu-4-4.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#readelf: -A
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-45.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-45.d
index 11738c5..0bf4d71 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-45.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-45.d
@@ -1,7 +1,6 @@
#source: attr-gnu-4-4.s
#source: attr-gnu-4-5.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses unknown floating point ABI 5
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-51.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-51.d
index b5f1c22..5c62640 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-51.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-51.d
@@ -1,6 +1,5 @@
#source: attr-gnu-4-5.s
#source: attr-gnu-4-1.s
-#as: -EB -32
-#ld: -r -melf32btsmip
+#ld: -r
#warning: Warning: .* uses unknown floating point ABI 5
#target: mips*-*-*
diff --git a/ld/testsuite/ld-mips-elf/eh-frame1.ld b/ld/testsuite/ld-mips-elf/eh-frame1.ld
index 93c4972..30fb948 100644
--- a/ld/testsuite/ld-mips-elf/eh-frame1.ld
+++ b/ld/testsuite/ld-mips-elf/eh-frame1.ld
@@ -13,7 +13,7 @@
. = 0x30000;
.eh_frame : { *(.eh_frame) }
.got : { *(.got) }
- .gcc_compiled_long32 : { *(.gcc_compiled_long32) }
+ .gcc_compiled_long32 : { KEEP (*(.gcc_compiled_long32)) }
/DISCARD/ : { *(*) }
}
diff --git a/ld/testsuite/ld-mips-elf/eh-frame3.d b/ld/testsuite/ld-mips-elf/eh-frame3.d
index 0328eb8..8225a3c 100644
--- a/ld/testsuite/ld-mips-elf/eh-frame3.d
+++ b/ld/testsuite/ld-mips-elf/eh-frame3.d
@@ -1,9 +1,9 @@
#name: MIPS eh-frame 3
#source: eh-frame1.s
#source: eh-frame1.s
-#as: -EB -mips3 -mabi=eabi --defsym alignment=3 --defsym fill=0 --defsym foo=0x1020304050607080
+#as: -EB -mips3 -mabi=eabi --defsym alignment=3 --defsym fill=0
#readelf: -wf
-#ld: -EB -Teh-frame1.ld
+#ld: -EB -Teh-frame1.ld --defsym foo=0x50607080
#
# This test is for the official LP64 version of EABI64, which uses a
# combination of 32-bit objects and 64-bit FDE addresses.
@@ -41,7 +41,7 @@
Code alignment factor: 1
Data alignment factor: 4
Return address column: 31
- Augmentation data: 00 10 20 30 40 50 60 70 80
+ Augmentation data: 00 00 00 00 00 50 60 70 80
DW_CFA_nop
DW_CFA_nop
@@ -75,7 +75,7 @@
Code alignment factor: 1
Data alignment factor: 4
Return address column: 31
- Augmentation data: 50 00 00 00 00 00 00 00 10 20 30 40 50 60 70 80
+ Augmentation data: 50 00 00 00 00 00 00 00 00 00 00 00 50 60 70 80
00000108 0000001c 00000024 FDE cie=000000e8 pc=00020120..00020130
@@ -102,7 +102,7 @@
Code alignment factor: 1
Data alignment factor: 4
Return address column: 31
- Augmentation data: 00 10 20 30 40 50 60 70 80 00
+ Augmentation data: 00 00 00 00 00 50 60 70 80 00
DW_CFA_nop
DW_CFA_nop
@@ -139,38 +139,20 @@
DW_CFA_nop
DW_CFA_nop
-000001c8 0000000c 00000000 CIE
- Version: 1
- Augmentation: ""
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
-
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-000001d8 00000014 00000014 FDE cie=000001c8 pc=000201d0..000201e0
+000001c8 00000014 000001cc FDE cie=00000000 pc=000201d0..000201e0
# basic1 removed, followed by repeat of above
-000001f0 00000014 0000002c FDE cie=000001c8 pc=000201e0..000201f0
+000001e0 00000014 000001e4 FDE cie=00000000 pc=000201e0..000201f0
-00000208 00000014 00000044 FDE cie=000001c8 pc=000201f0..00020210
+000001f8 00000014 000001fc FDE cie=00000000 pc=000201f0..00020210
-00000220 00000014 0000005c FDE cie=000001c8 pc=00020210..00020240
+00000210 00000014 00000214 FDE cie=00000000 pc=00020210..00020240
-00000238 00000014 00000074 FDE cie=000001c8 pc=00020240..00020280
+00000228 00000014 0000022c FDE cie=00000000 pc=00020240..00020280
-00000250 00000014 0000008c FDE cie=000001c8 pc=00020280..000202d0
+00000240 00000014 00000244 FDE cie=00000000 pc=00020280..000202d0
-00000268 0000001c 00000000 CIE
- Version: 1
- Augmentation: "zP"
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
- Augmentation data: 00 10 20 30 40 50 60 70 80
-
+00000258 0000001c 000001d4 FDE cie=00000088 pc=000202d0..000202e0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -179,7 +161,7 @@
DW_CFA_nop
DW_CFA_nop
-00000288 0000001c 00000024 FDE cie=00000268 pc=000202d0..000202e0
+00000278 0000001c 000001f4 FDE cie=00000088 pc=000202e0..00020300
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -188,7 +170,7 @@
DW_CFA_nop
DW_CFA_nop
-000002a8 0000001c 00000044 FDE cie=00000268 pc=000202e0..00020300
+00000298 0000001c 000001b4 FDE cie=000000e8 pc=00020300..00020310
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -197,16 +179,7 @@
DW_CFA_nop
DW_CFA_nop
-000002c8 0000001c 00000000 CIE
- Version: 1
- Augmentation: "zP"
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
- Augmentation data: 50 00 00 00 00 00 00 00 10 20 30 40 50 60 70 80
-
-
-000002e8 0000001c 00000024 FDE cie=000002c8 pc=00020300..00020310
+000002b8 0000001c 000001d4 FDE cie=000000e8 pc=00020310..00020330
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -215,30 +188,7 @@
DW_CFA_nop
DW_CFA_nop
-00000308 0000001c 00000044 FDE cie=000002c8 pc=00020310..00020330
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-00000328 0000001c 00000000 CIE
- Version: 1
- Augmentation: "zPR"
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
- Augmentation data: 00 10 20 30 40 50 60 70 80 00
-
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-00000348 0000001c 00000024 FDE cie=00000328 pc=00020330..00020340
+000002d8 0000001c 00000194 FDE cie=00000148 pc=00020330..00020340
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -249,7 +199,7 @@
# FDE for .discard removed
# zPR2 removed
-00000368 0000001c 00000044 FDE cie=00000328 pc=00020340..00020370
+000002f8 0000001c 000001b4 FDE cie=00000148 pc=00020340..00020370
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -258,7 +208,7 @@
DW_CFA_nop
DW_CFA_nop
-00000388 0000001c 00000064 FDE cie=00000328 pc=00020370..000203b0
+00000318 0000001c 000001d4 FDE cie=00000148 pc=00020370..000203b0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -267,15 +217,4 @@
DW_CFA_nop
DW_CFA_nop
-000003a8 0000000c 00000000 CIE
- Version: 1
- Augmentation: ""
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
-
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-000003b8 00000014 00000014 FDE cie=000003a8 pc=000203b0..000203c0
+00000338 00000014 0000033c FDE cie=00000000 pc=000203b0..000203c0
diff --git a/ld/testsuite/ld-mips-elf/eh-frame4.d b/ld/testsuite/ld-mips-elf/eh-frame4.d
index effb457..e56d8e0 100644
--- a/ld/testsuite/ld-mips-elf/eh-frame4.d
+++ b/ld/testsuite/ld-mips-elf/eh-frame4.d
@@ -1,9 +1,9 @@
#name: MIPS eh-frame 4
#source: eh-frame1.s
#source: eh-frame1.s
-#as: -EB -mips3 -mabi=eabi --defsym alignment=2 --defsym fill=0 --defsym foo=0x50607080
+#as: -EB -mips3 -mabi=eabi --defsym alignment=2 --defsym fill=0
#readelf: -wf
-#ld: -EB -Teh-frame1.ld
+#ld: -EB -Teh-frame1.ld --defsym foo=0x50607080
#
# This test is for the semi-official ILP32 variation of EABI64.
#
@@ -102,107 +102,54 @@
DW_CFA_nop
DW_CFA_nop
-00000134 0000000c 00000000 CIE
- Version: 1
- Augmentation: ""
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
-
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-00000144 0000000c 00000014 FDE cie=00000134 pc=000201d0..000201e0
+00000134 0000000c 00000138 FDE cie=00000000 pc=000201d0..000201e0
# basic1 removed, followed by repeat of above
-00000154 0000000c 00000024 FDE cie=00000134 pc=000201e0..000201f0
+00000144 0000000c 00000148 FDE cie=00000000 pc=000201e0..000201f0
-00000164 0000000c 00000034 FDE cie=00000134 pc=000201f0..00020210
+00000154 0000000c 00000158 FDE cie=00000000 pc=000201f0..00020210
-00000174 0000000c 00000044 FDE cie=00000134 pc=00020210..00020240
+00000164 0000000c 00000168 FDE cie=00000000 pc=00020210..00020240
-00000184 0000000c 00000054 FDE cie=00000134 pc=00020240..00020280
+00000174 0000000c 00000178 FDE cie=00000000 pc=00020240..00020280
-00000194 0000000c 00000064 FDE cie=00000134 pc=00020280..000202d0
+00000184 0000000c 00000188 FDE cie=00000000 pc=00020280..000202d0
-000001a4 00000014 00000000 CIE
- Version: 1
- Augmentation: "zP"
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
- Augmentation data: 00 50 60 70 80
-
+00000194 00000010 00000138 FDE cie=00000060 pc=000202d0..000202e0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-000001bc 00000010 0000001c FDE cie=000001a4 pc=000202d0..000202e0
+000001a8 00000010 0000014c FDE cie=00000060 pc=000202e0..00020300
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-000001d0 00000010 00000030 FDE cie=000001a4 pc=000202e0..00020300
+000001bc 00000010 00000120 FDE cie=000000a0 pc=00020300..00020310
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-000001e4 00000014 00000000 CIE
- Version: 1
- Augmentation: "zP"
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
- Augmentation data: 50 00 00 00 50 60 70 80
-
-
-000001fc 00000010 0000001c FDE cie=000001e4 pc=00020300..00020310
+000001d0 00000010 00000134 FDE cie=000000a0 pc=00020310..00020330
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-00000210 00000010 00000030 FDE cie=000001e4 pc=00020310..00020330
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-00000224 00000014 00000000 CIE
- Version: 1
- Augmentation: "zPR"
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
- Augmentation data: 00 50 60 70 80 00
-
- DW_CFA_nop
-
-0000023c 00000010 0000001c FDE cie=00000224 pc=00020330..00020340
+000001e4 00000010 00000108 FDE cie=000000e0 pc=00020330..00020340
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
# FDE for .discard removed
# zPR2 removed
-00000250 00000010 00000030 FDE cie=00000224 pc=00020340..00020370
+000001f8 00000010 0000011c FDE cie=000000e0 pc=00020340..00020370
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-00000264 00000010 00000044 FDE cie=00000224 pc=00020370..000203b0
+0000020c 00000010 00000130 FDE cie=000000e0 pc=00020370..000203b0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-00000278 0000000c 00000000 CIE
- Version: 1
- Augmentation: ""
- Code alignment factor: 1
- Data alignment factor: 4
- Return address column: 31
-
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-
-00000288 0000000c 00000014 FDE cie=00000278 pc=000203b0..000203c0
+00000220 0000000c 00000224 FDE cie=00000000 pc=000203b0..000203c0
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index ce448cf..ffcb9c4 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -503,7 +503,7 @@
set mips16_call_global_test [list \
[list "Global calls from mips16" \
- "$o32_ld_flags" \
+ "$o32_ld_flags -T no-shared-1.ld" \
"$o32_as_flags -mips32r2" \
{mips16-call-global-1.s mips16-call-global-2.s mips16-call-global-3.s} \
{{objdump -dr mips16-call-global.d}} \
diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global-1.s b/ld/testsuite/ld-mips-elf/mips16-call-global-1.s
index 1e60bcc..4c6d0a4 100644
--- a/ld/testsuite/ld-mips-elf/mips16-call-global-1.s
+++ b/ld/testsuite/ld-mips-elf/mips16-call-global-1.s
@@ -2,6 +2,7 @@
.globl __start
.ent __start
+ .align 4
__start:
.frame $sp,24,$31
save 24,$31
diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global-2.s b/ld/testsuite/ld-mips-elf/mips16-call-global-2.s
index 2843fcd..7f9bbf0 100644
--- a/ld/testsuite/ld-mips-elf/mips16-call-global-2.s
+++ b/ld/testsuite/ld-mips-elf/mips16-call-global-2.s
@@ -3,6 +3,7 @@
.globl x
.ent x
.type x,@function
+ .align 4
x:
jr $31
.end x
diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global-3.s b/ld/testsuite/ld-mips-elf/mips16-call-global-3.s
index 5113c5d..1606e3c 100644
--- a/ld/testsuite/ld-mips-elf/mips16-call-global-3.s
+++ b/ld/testsuite/ld-mips-elf/mips16-call-global-3.s
@@ -3,6 +3,7 @@
.globl y
.ent y
.type y,@function
+ .align 4
y:
jr $31
.end y
diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global.d b/ld/testsuite/ld-mips-elf/mips16-call-global.d
index 390d84c..573c219 100644
--- a/ld/testsuite/ld-mips-elf/mips16-call-global.d
+++ b/ld/testsuite/ld-mips-elf/mips16-call-global.d
@@ -3,37 +3,37 @@
Disassembly of section .text:
-.*0090 <__start>:
-.*0090: 64c3 save 24,ra
-.*0092: 1a00 002e jal .*00b8 <x\+0x8>
-.*0096: 6500 nop
-.*0098: 1e00 0032 jalx .*00c8 <z>
-.*009c: 6500 nop
-.*009e: 6443 restore 24,ra
-.*00a0: e8a0 jrc ra
-.*00a2: 6500 nop
-.*00a4: 6500 nop
-.*00a6: 6500 nop
-.*00a8: 6500 nop
-.*00aa: 6500 nop
-.*00ac: 6500 nop
-.*00ae: 6500 nop
+0*50000 <__start>:
+ *50000: 64c3 save 24,ra
+ *50002: 1820 400a jal 50028 <x\+0x8>
+ *50006: 6500 nop
+ *50008: 1c20 400e jalx 50038 <z>
+ *5000c: 6500 nop
+ *5000e: 6443 restore 24,ra
+ *50010: e8a0 jrc ra
+ *50012: 6500 nop
+ *50014: 6500 nop
+ *50016: 6500 nop
+ *50018: 6500 nop
+ *5001a: 6500 nop
+ *5001c: 6500 nop
+ *5001e: 6500 nop
-.*00b0 <x>:
-.*00b0: e8a0 jrc ra
-.*00b2: 6500 nop
-.*00b4: 6500 nop
-.*00b6: 6500 nop
-.*00b8: 6500 nop
-.*00ba: 6500 nop
-.*00bc: 6500 nop
-.*00be: 6500 nop
+0*50020 <x>:
+ *50020: e8a0 jrc ra
+ *50022: 6500 nop
+ *50024: 6500 nop
+ *50026: 6500 nop
+ *50028: 6500 nop
+ *5002a: 6500 nop
+ *5002c: 6500 nop
+ *5002e: 6500 nop
-.*00c0 <y>:
-.*00c0: 03e00008 jr ra
-.*00c4: 00000000 nop
+0*50030 <y>:
+ *50030: 03e00008 jr ra
+ *50034: 00000000 nop
-.*00c8 <z>:
-.*00c8: 03e00008 jr ra
-.*00cc: 00000000 nop
+0*50038 <z>:
+ *50038: 03e00008 jr ra
+ *5003c: 00000000 nop
\.\.\.
diff --git a/ld/testsuite/ld-plugin/plugin.exp b/ld/testsuite/ld-plugin/plugin.exp
index 96459e7..803ccee 100644
--- a/ld/testsuite/ld-plugin/plugin.exp
+++ b/ld/testsuite/ld-plugin/plugin.exp
@@ -57,6 +57,10 @@
set regas "-plugin-opt registerallsymbolsread"
set regcln "-plugin-opt registercleanup"
+if { [istarget m681*-*-*] || [istarget m68hc1*-*-*] || [istarget m9s12x*-*-*] } {
+ # otherwise get FAILS due to _.frame
+ set CFLAGS "$CFLAGS -fomit-frame-pointer"
+}
# In order to define symbols in plugin options in the list of tests below,
# we need to know if the platform prepends an underscore to C symbols,
# which we find out by compiling the test objects now. If there is any
diff --git a/ld/testsuite/ld-powerpc/apuinfo.rd b/ld/testsuite/ld-powerpc/apuinfo.rd
index 7a27bc0..7a09d2f 100644
--- a/ld/testsuite/ld-powerpc/apuinfo.rd
+++ b/ld/testsuite/ld-powerpc/apuinfo.rd
@@ -6,6 +6,7 @@
#target: powerpc-eabi*
Hex dump of section '.PPC.EMB.apuinfo':
- 0x00000000 00000008 0000001c 00000002 41505569 ............APUi
+ 0x00000000 00000008 00000020 00000002 41505569 ....... ....APUi
0x00000010 6e666f00 00420001 00430001 00410001 nfo..B...C...A..
- 0x00000020 01020001 01010001 00400001 01000001 .........@......
+ 0x00000020 01020001 01010001 00400001 01040001 .........@......
+ 0x00000030 01000001 ....$
diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp
index 566272d..8f08991 100644
--- a/ld/testsuite/ld-powerpc/powerpc.exp
+++ b/ld/testsuite/ld-powerpc/powerpc.exp
@@ -1,5 +1,5 @@
# Expect script for ld-powerpc tests
-# Copyright 2002, 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+# Copyright 2002, 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
# Free Software Foundation
#
# This file is part of the GNU Binutils.
@@ -215,6 +215,33 @@
{{objdump -s tocopt5.d}} "tocopt5"}
}
+set ppceabitests {
+ {"VLE multiple segments 1" "-T vle-multiseg-1.ld"
+ "-mregnames -mvle" {vle-multiseg.s}
+ {{readelf "-l" vle-multiseg-1.d}} "vle-multiseg-1"}
+ {"VLE multiple segments 2" "-T vle-multiseg-2.ld"
+ "-mregnames -mvle" {vle-multiseg.s}
+ {{readelf "-l" vle-multiseg-2.d}} "vle-multiseg-2"}
+ {"VLE multiple segments 3" "-T vle-multiseg-3.ld"
+ "-mregnames -mvle" {vle-multiseg.s}
+ {{readelf "-l" vle-multiseg-3.d}} "vle-multiseg-3"}
+ {"VLE multiple segments 4" "-T vle-multiseg-4.ld"
+ "-mregnames -mvle" {vle-multiseg.s}
+ {{readelf "-l" vle-multiseg-4.d}} "vle-multiseg-4"}
+ {"VLE multiple segments 5" "-T vle-multiseg-5.ld"
+ "-mregnames -mvle" {vle-multiseg.s}
+ {{readelf "-l" vle-multiseg-5.d}} "vle-multiseg-5"}
+ {"VLE relocations 1" "-T vle.ld"
+ "-mvle" {vle-reloc-1.s vle-reloc-def-1.s}
+ {{objdump "-Mvle -d" vle-reloc-1.d}} "vle-reloc-1"}
+ {"VLE relocations 2" "-T vle.ld"
+ "-mvle" {vle-reloc-2.s vle-reloc-def-2.s}
+ {{objdump "-Mvle -d" vle-reloc-2.d}} "vle-reloc-2"}
+ {"VLE relocations 3" "-T vle.ld"
+ "-mvle" {vle-reloc-3.s vle-reloc-def-3.s}
+ {{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"}
+}
+
run_ld_link_tests $ppcelftests
@@ -223,6 +250,10 @@
run_dump_test "relbrlt"
}
+if { [istarget "powerpc*-eabi*"] } {
+ run_ld_link_tests $ppceabitests
+}
+
run_dump_test "plt1"
run_dump_test "attr-gnu-4-00"
@@ -251,3 +282,5 @@
run_dump_test "attr-gnu-12-11"
run_dump_test "attr-gnu-12-21"
+
+run_dump_test "vle-multiseg-6"
diff --git a/ld/testsuite/ld-powerpc/tlsso.r b/ld/testsuite/ld-powerpc/tlsso.r
index 4167b3a..c417dbb 100644
--- a/ld/testsuite/ld-powerpc/tlsso.r
+++ b/ld/testsuite/ld-powerpc/tlsso.r
@@ -51,10 +51,10 @@
[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f8 \.tdata \+ 28
[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f8 \.tdata \+ 30
[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f8 \.tdata \+ 30
-[0-9a-f ]+R_PPC64_DTPMOD64 +0+
-[0-9a-f ]+R_PPC64_DTPREL64 +0+
-[0-9a-f ]+R_PPC64_DTPREL64 +0+18
-[0-9a-f ]+R_PPC64_DTPMOD64 +0+
+[0-9a-f ]+R_PPC64_DTPMOD64 +0
+[0-9a-f ]+R_PPC64_DTPREL64 +0
+[0-9a-f ]+R_PPC64_DTPREL64 +18
+[0-9a-f ]+R_PPC64_DTPMOD64 +0
[0-9a-f ]+R_PPC64_DTPMOD64 +0+ gd \+ 0
[0-9a-f ]+R_PPC64_DTPREL64 +0+ gd \+ 0
[0-9a-f ]+R_PPC64_DTPREL64 +0+50 ld2 \+ 0
@@ -107,7 +107,7 @@
.* TLS +LOCAL +DEFAULT +7 ie4
.* TLS +LOCAL +DEFAULT +7 le4
.* TLS +LOCAL +DEFAULT +7 le5
-.* OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+.* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
.* NOTYPE +LOCAL +DEFAULT +6 00000010\.plt_call\.__tls_get_addr\+0
.* NOTYPE +LOCAL +DEFAULT +6 __glink_PLTresolve
.* NOTYPE +LOCAL +DEFAULT +UND \.__tls_get_addr
diff --git a/ld/testsuite/ld-powerpc/tlsso32.d b/ld/testsuite/ld-powerpc/tlsso32.d
index b4e45d8..8d4ac4e 100644
--- a/ld/testsuite/ld-powerpc/tlsso32.d
+++ b/ld/testsuite/ld-powerpc/tlsso32.d
@@ -39,8 +39,9 @@
.*: a9 49 00 00 lha r10,0\(r9\)
Disassembly of section \.got:
-.* <\.got>:
- \.\.\.
+.* <_GLOBAL_OFFSET_TABLE_-0x28>:
+#...
.*: 4e 80 00 21 blrl
-.*: 00 01 03 ec .*
- \.\.\.
+.* <_GLOBAL_OFFSET_TABLE_>:
+.*: 00 01 03 ec .*
+#pass
diff --git a/ld/testsuite/ld-powerpc/tlsso32.r b/ld/testsuite/ld-powerpc/tlsso32.r
index e075db2..0eb4a3c 100644
--- a/ld/testsuite/ld-powerpc/tlsso32.r
+++ b/ld/testsuite/ld-powerpc/tlsso32.r
@@ -55,9 +55,9 @@
[0-9a-f ]+R_PPC_TPREL16 +0+103d0 +\.tdata \+ 103e4
[0-9a-f ]+R_PPC_TPREL16_HA +0+103d0 +\.tdata \+ 103e8
[0-9a-f ]+R_PPC_TPREL16_LO +0+103d0 +\.tdata \+ 103e8
-[0-9a-f ]+R_PPC_DTPMOD32 +0+
-[0-9a-f ]+R_PPC_DTPREL32 +0+
-[0-9a-f ]+R_PPC_DTPMOD32 +0+
+[0-9a-f ]+R_PPC_DTPMOD32 +0
+[0-9a-f ]+R_PPC_DTPREL32 +0
+[0-9a-f ]+R_PPC_DTPMOD32 +0
[0-9a-f ]+R_PPC_DTPMOD32 +0+ +gd \+ 0
[0-9a-f ]+R_PPC_DTPREL32 +0+ +gd \+ 0
[0-9a-f ]+R_PPC_DTPMOD32 +0+1c +gd0 \+ 0
@@ -110,8 +110,8 @@
.* TLS +LOCAL +DEFAULT +7 ie4
.* TLS +LOCAL +DEFAULT +7 le4
.* TLS +LOCAL +DEFAULT +7 le5
-.* OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
-.* OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+.* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
+.* OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
.* TLS +GLOBAL +DEFAULT +UND gd
.* TLS +GLOBAL +DEFAULT +8 le0
.* NOTYPE +GLOBAL +DEFAULT +UND __tls_get_addr
diff --git a/ld/testsuite/ld-powerpc/tlstocso.r b/ld/testsuite/ld-powerpc/tlstocso.r
index 040d69f..211a260 100644
--- a/ld/testsuite/ld-powerpc/tlstocso.r
+++ b/ld/testsuite/ld-powerpc/tlstocso.r
@@ -103,7 +103,7 @@
.* TLS +LOCAL +DEFAULT +7 le4
.* TLS +LOCAL +DEFAULT +7 le5
.* NOTYPE +LOCAL +DEFAULT +10 \.Lie0
-.* OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+.* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
.* NOTYPE +LOCAL +DEFAULT +6 00000010\.plt_call\.__tls_get_addr\+0
.* NOTYPE +LOCAL +DEFAULT +6 __glink_PLTresolve
.* NOTYPE +LOCAL +DEFAULT +UND \.__tls_get_addr
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-1.d b/ld/testsuite/ld-powerpc/vle-multiseg-1.d
new file mode 100644
index 0000000..d9554a1
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-1.d
@@ -0,0 +1,14 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 2 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
+ LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 .data
+ 01 .text_vle .text_iv .iv_handlers
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-1.ld b/ld/testsuite/ld-powerpc/vle-multiseg-1.ld
new file mode 100644
index 0000000..f2ff319
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-1.ld
@@ -0,0 +1,17 @@
+SECTIONS
+{
+ .data 0x00000400 :
+ { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+ .text_vle 0x00001000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle)
+ }
+ .text_iv . : { . = ALIGN(16); *(.text_iv) }
+ .iv_handlers 0x0001F000 : { *(.iv_handlers) }
+}
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-2.d b/ld/testsuite/ld-powerpc/vle-multiseg-2.d
new file mode 100644
index 0000000..9d83bb5
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-2.d
@@ -0,0 +1,16 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 3 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+ LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 .text_vle
+ 01 .data
+ 02 .text_iv .iv_handlers
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-2.ld b/ld/testsuite/ld-powerpc/vle-multiseg-2.ld
new file mode 100644
index 0000000..2320b61
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-2.ld
@@ -0,0 +1,17 @@
+SECTIONS
+{
+ .text_vle 0x00001000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle)
+ }
+ .data 0x00001400 :
+ { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+ .text_iv . : { . = ALIGN(16); *(.text_iv) }
+ .iv_handlers 0x0001F000 : { *(.iv_handlers) }
+}
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-3.d b/ld/testsuite/ld-powerpc/vle-multiseg-3.d
new file mode 100644
index 0000000..957b990
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-3.d
@@ -0,0 +1,16 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 3 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+ LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 .text_vle .text_iv
+ 01 .data
+ 02 .iv_handlers
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-3.ld b/ld/testsuite/ld-powerpc/vle-multiseg-3.ld
new file mode 100644
index 0000000..0ed2f44
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-3.ld
@@ -0,0 +1,17 @@
+SECTIONS
+{
+ .text_vle 0x00001000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle)
+ }
+ .text_iv . : { . = ALIGN(16); *(.text_iv) }
+ .data 0x00001400 :
+ { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+ .iv_handlers 0x0001F000 : { *(.iv_handlers) }
+}
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-4.d b/ld/testsuite/ld-powerpc/vle-multiseg-4.d
new file mode 100644
index 0000000..9edbe06
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-4.d
@@ -0,0 +1,14 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 2 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+ LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 .text_vle .text_iv .iv_handlers
+ 01 .data
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-4.ld b/ld/testsuite/ld-powerpc/vle-multiseg-4.ld
new file mode 100644
index 0000000..503fe06
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-4.ld
@@ -0,0 +1,17 @@
+SECTIONS
+{
+ .text_vle 0x00001000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle)
+ }
+ .text_iv . : { . = ALIGN(16); *(.text_iv) }
+ .iv_handlers 0x0001F000 : { *(.iv_handlers) }
+ .data 0x00020400 :
+ { *(.data) *(.ctors) *(.dtors) *(.eh_frame) *(.jcr) }
+}
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-5.d b/ld/testsuite/ld-powerpc/vle-multiseg-5.d
new file mode 100644
index 0000000..957b990
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-5.d
@@ -0,0 +1,16 @@
+
+Elf file type is EXEC.*
+Entry point 0x0
+There are 3 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+ LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 .text_vle .text_iv
+ 01 .data
+ 02 .iv_handlers
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-5.ld b/ld/testsuite/ld-powerpc/vle-multiseg-5.ld
new file mode 100644
index 0000000..4000021
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-5.ld
@@ -0,0 +1,44 @@
+
+MEMORY
+{
+ code_rom (rxw) : org = 0x00001000, len = 0x1EF000
+ irpt_rom (rx) : org = 0x001F0000, len = 0x2000
+ int__ram (rxw) : org = 0x40000000, len = 256K
+}
+
+REGION_ALIAS("INTR", irpt_rom)
+REGION_ALIAS("CODE", code_rom)
+REGION_ALIAS("RODATA", code_rom)
+REGION_ALIAS("RAM", int__ram)
+
+SECTIONS
+{
+ .iv_handlers :
+ {
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.iv_handlers)
+ } > INTR
+
+ .text_vle :
+ {
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init_vle)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini_vle)
+ } > CODE
+
+ .rodata :
+ {
+ *(.rodata)
+ } > RODATA
+
+ .data :
+ {
+ *(.data)
+ *(.data.*)
+ *(.ctors)
+ *(.dtors)
+ } > RAM AT>RODATA
+
+}
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6.d b/ld/testsuite/ld-powerpc/vle-multiseg-6.d
new file mode 100644
index 0000000..5c3c210
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-6.d
@@ -0,0 +1,25 @@
+#source: vle-multiseg-6a.s -mregnames -mvle
+#source: vle-multiseg-6b.s
+#source: vle-multiseg-6c.s
+#source: vle-multiseg-6d.s -mregnames -mvle
+#ld: -T vle-multiseg-6.ld
+#target: powerpc-*-*
+#readelf: -l
+
+Elf file type is EXEC.*
+Entry point 0x[0-9a-f]+
+There are 4 program headers, starting at offset [0-9]+
+
+Program Headers:
+ Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
+ LOAD ( +0x[0-9a-f]+){5} ([RWE ]+){3} 0x[0-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+ LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
+
+ Section to Segment mapping:
+ Segment Sections...
+ 00 .data
+ 01 .text_vle
+ 02 .text_iv
+ 03 .text
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6.ld b/ld/testsuite/ld-powerpc/vle-multiseg-6.ld
new file mode 100644
index 0000000..c8d88dd
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-6.ld
@@ -0,0 +1,37 @@
+MEMORY
+{
+ vle_seg1 (rxw): org = 0x00000000, len = 0x10000
+ vle_seg2 (rxw): org = 0x00100000, len = 0x10000
+ nonvle_seg (rxw): org = 0x001F0000, len = 0x20000
+}
+SECTIONS
+{
+ .data 0x00000100 :
+ {
+ *(.data)
+ *(.ctors)
+ *(.dtors)
+ *(.eh_frame)
+ *(.jcr)
+ }
+ .text_vle 0x00001000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text*)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.init*)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.fini*)
+ } > vle_seg1
+
+ .text_iv 0x100000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.text_iv)
+ INPUT_SECTION_FLAGS (SHF_PPC_VLE) *(.iv_handlers)
+ } >vle_seg2
+
+ .text 0x101000 :
+ {
+ . = ALIGN(16);
+ INPUT_SECTION_FLAGS (!SHF_PPC_VLE) *(.text*)
+ }
+}
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6a.s b/ld/testsuite/ld-powerpc/vle-multiseg-6a.s
new file mode 100644
index 0000000..a50afae
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-6a.s
@@ -0,0 +1,47 @@
+ .text
+
+ e_stw r12, 0x4C(r1)
+ e_stw r11, 0x48(r1)
+ e_stw r10, 0x44(r1)
+ e_stw r9, 0x40(r1)
+ e_stw r8, 0x3C(r1)
+ e_stw r7, 0x38(r1)
+ e_stw r6, 0x34(r1)
+ e_stw r5, 0x30(r1)
+ e_stw r4, 0x2c(r1)
+
+ .globl IV_table
+ .section ".iv_handlers", "ax"
+IV_table:
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+dummy:
+ se_nop
+ e_b dummy
+
+ .section ".text_iv", "ax"
+ e_lis r3, IV_table@h
+ mtivpr r3
+ e_li r3, IV_table@l+0x00
+ mtivor0 r3
+ e_li r3, IV_table@l+0x10
+ mtivor1 r3
+ e_li r3, IV_table@l+0x20
+ mtivor2 r3
+
+ .data
+ .long 0xdeadbeef
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6b.s b/ld/testsuite/ld-powerpc/vle-multiseg-6b.s
new file mode 100644
index 0000000..10fcf20
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-6b.s
@@ -0,0 +1,6 @@
+ .text
+
+ and. 3,4,5
+ and 3,4,5
+ andc 13,14,15
+ andc. 16,17,18
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6c.s b/ld/testsuite/ld-powerpc/vle-multiseg-6c.s
new file mode 100644
index 0000000..10fcf20
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-6c.s
@@ -0,0 +1,6 @@
+ .text
+
+ and. 3,4,5
+ and 3,4,5
+ andc 13,14,15
+ andc. 16,17,18
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-6d.s b/ld/testsuite/ld-powerpc/vle-multiseg-6d.s
new file mode 100644
index 0000000..a8c6fcc
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-6d.s
@@ -0,0 +1,9 @@
+ .section ".text_iv", "ax"
+ e_lis r3, IV_table@h
+ mtivpr r3
+ e_li r3, IV_table@l+0x00
+ mtivor0 r3
+ e_li r3, IV_table@l+0x10
+ mtivor1 r3
+ e_li r3, IV_table@l+0x20
+ mtivor2 r3
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg.s b/ld/testsuite/ld-powerpc/vle-multiseg.s
new file mode 100644
index 0000000..b0c0886
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-multiseg.s
@@ -0,0 +1,50 @@
+# Make up several VLE text sections which the linker script will put into
+# separate output sections. We will then check for separate load segments.
+# .include "mpc5500_usrdefs.inc"
+# .section ".text_vle"
+
+ e_stw r12, 0x4C(r1)
+ e_stw r11, 0x48(r1)
+ e_stw r10, 0x44(r1)
+ e_stw r9, 0x40(r1)
+ e_stw r8, 0x3C(r1)
+ e_stw r7, 0x38(r1)
+ e_stw r6, 0x34(r1)
+ e_stw r5, 0x30(r1)
+ e_stw r4, 0x2c(r1)
+
+ .globl IV_table
+ .section ".iv_handlers", "ax"
+IV_table:
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+ e_b dummy
+ .align 4
+dummy:
+ se_nop
+ e_b dummy
+
+ .section ".text_iv", "ax"
+ e_lis r3, IV_table@h
+ mtivpr r3
+ e_li r3, IV_table@l+0x00
+ mtivor0 r3
+ e_li r3, IV_table@l+0x10
+ mtivor1 r3
+ e_li r3, IV_table@l+0x20
+ mtivor2 r3
+
+ .data
+ .long 0xdeadbeef
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-1.d b/ld/testsuite/ld-powerpc/vle-reloc-1.d
new file mode 100644
index 0000000..0f59271
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-1.d
@@ -0,0 +1,29 @@
+.*: file format .*
+
+
+Disassembly of section .text:
+
+01800054 <sub1>:
+ 1800054: 00 04 se_blr
+
+01800056 <sub2>:
+ 1800056: 00 04 se_blr
+
+01800058 <vle_reloc>:
+ 1800058: e8 fe se_b 1800054 <sub1>
+ 180005a: e9 fd se_bl 1800054 <sub1>
+ 180005c: e1 fd se_ble 1800056 <sub2>
+ 180005e: e6 fc se_beq 1800056 <sub2>
+ 1800060: 78 00 00 10 e_b 1800070 <sub3>
+ 1800064: 78 00 00 0f e_bl 1800072 <sub4>
+ 1800068: 7a 05 00 0c e_ble cr1,1800074 <sub5>
+ 180006c: 7a 1a 00 09 e_beql cr2,1800074 <sub5>
+
+01800070 <sub3>:
+ 1800070: 00 04 se_blr
+
+01800072 <sub4>:
+ 1800072: 00 04 se_blr
+
+01800074 <sub5>:
+ 1800074: 00 04 se_blr
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-1.s b/ld/testsuite/ld-powerpc/vle-reloc-1.s
new file mode 100644
index 0000000..e56a22b
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-1.s
@@ -0,0 +1,18 @@
+ .section .text
+sub1:
+ se_blr
+
+sub2:
+ se_blr
+
+ .section .text
+vle_reloc:
+ se_b sub1
+ se_bl sub1
+ se_bc 0,1,sub2
+ se_bc 1,2,sub2
+
+ e_b sub3
+ e_bl sub4
+ e_bc 0,5,sub5
+ e_bcl 1,10,sub5
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-2.d b/ld/testsuite/ld-powerpc/vle-reloc-2.d
new file mode 100644
index 0000000..1e1c9d4
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-2.d
@@ -0,0 +1,87 @@
+.*: file format .*
+
+Disassembly of section .text:
+
+01800094 <sub1>:
+ 1800094: 00 04 se_blr
+01800096 <sub2>:
+ 1800096: 00 04 se_blr
+01800098 <vle_reloc_2>:
+ 1800098: 70 20 c1 c2 e_or2i r1,450
+ 180009c: 70 40 c1 81 e_or2i r2,385
+ 18000a0: 70 60 c1 81 e_or2i r3,385
+ 18000a4: 70 80 c1 ce e_or2i r4,462
+ 18000a8: 70 a0 c1 80 e_or2i r5,384
+ 18000ac: 70 40 c1 81 e_or2i r2,385
+ 18000b0: 70 20 c9 c2 e_and2i. r1,450
+ 18000b4: 70 40 c9 81 e_and2i. r2,385
+ 18000b8: 70 60 c9 81 e_and2i. r3,385
+ 18000bc: 70 80 c9 ce e_and2i. r4,462
+ 18000c0: 70 a0 c9 80 e_and2i. r5,384
+ 18000c4: 70 40 c9 81 e_and2i. r2,385
+ 18000c8: 70 20 d1 c2 e_or2is r1,450
+ 18000cc: 70 40 d1 81 e_or2is r2,385
+ 18000d0: 70 60 d1 81 e_or2is r3,385
+ 18000d4: 70 80 d1 ce e_or2is r4,462
+ 18000d8: 70 a0 d1 80 e_or2is r5,384
+ 18000dc: 70 40 d1 81 e_or2is r2,385
+ 18000e0: 70 20 e1 c2 e_lis r1,450
+ 18000e4: 70 40 e1 81 e_lis r2,385
+ 18000e8: 70 60 e1 81 e_lis r3,385
+ 18000ec: 70 80 e1 ce e_lis r4,462
+ 18000f0: 70 a0 e1 80 e_lis r5,384
+ 18000f4: 70 40 e1 81 e_lis r2,385
+ 18000f8: 70 20 e9 c2 e_and2is. r1,450
+ 18000fc: 70 40 e9 81 e_and2is. r2,385
+ 1800100: 70 60 e9 81 e_and2is. r3,385
+ 1800104: 70 80 e9 ce e_and2is. r4,462
+ 1800108: 70 a0 e9 80 e_and2is. r5,384
+ 180010c: 70 40 e9 81 e_and2is. r2,385
+ 1800110: 70 01 99 c2 e_cmp16i r1,450
+ 1800114: 70 02 99 81 e_cmp16i r2,385
+ 1800118: 70 03 99 81 e_cmp16i r3,385
+ 180011c: 70 04 99 ce e_cmp16i r4,462
+ 1800120: 70 05 99 80 e_cmp16i r5,384
+ 1800124: 70 02 99 81 e_cmp16i r2,385
+ 1800128: 70 01 a9 c2 e_cmpl16i r1,450
+ 180012c: 70 02 a9 81 e_cmpl16i r2,385
+ 1800130: 70 03 a9 81 e_cmpl16i r3,385
+ 1800134: 70 04 a9 ce e_cmpl16i r4,462
+ 1800138: 70 05 a9 80 e_cmpl16i r5,384
+ 180013c: 70 02 a9 81 e_cmpl16i r2,385
+ 1800140: 70 01 b1 c2 e_cmph16i r1,450
+ 1800144: 70 02 b1 81 e_cmph16i r2,385
+ 1800148: 70 03 b1 81 e_cmph16i r3,385
+ 180014c: 70 04 b1 ce e_cmph16i r4,462
+ 1800150: 70 05 b1 80 e_cmph16i r5,384
+ 1800154: 70 02 b1 81 e_cmph16i r2,385
+ 1800158: 70 01 b9 c2 e_cmphl16i r1,450
+ 180015c: 70 02 b9 81 e_cmphl16i r2,385
+ 1800160: 70 03 b9 81 e_cmphl16i r3,385
+ 1800164: 70 04 b9 ce e_cmphl16i r4,462
+ 1800168: 70 05 b9 80 e_cmphl16i r5,384
+ 180016c: 70 02 b9 81 e_cmphl16i r2,385
+ 1800170: 70 01 89 c2 e_add2i. r1,450
+ 1800174: 70 02 89 81 e_add2i. r2,385
+ 1800178: 70 03 89 81 e_add2i. r3,385
+ 180017c: 70 04 89 ce e_add2i. r4,462
+ 1800180: 70 05 89 80 e_add2i. r5,384
+ 1800184: 70 02 89 81 e_add2i. r2,385
+ 1800188: 70 01 91 c2 e_add2is r1,450
+ 180018c: 70 02 91 81 e_add2is r2,385
+ 1800190: 70 03 91 81 e_add2is r3,385
+ 1800194: 70 04 91 ce e_add2is r4,462
+ 1800198: 70 05 91 80 e_add2is r5,384
+ 180019c: 70 02 91 81 e_add2is r2,385
+ 18001a0: 70 01 a1 c2 e_mull2i r1,450
+ 18001a4: 70 02 a1 81 e_mull2i r2,385
+ 18001a8: 70 03 a1 81 e_mull2i r3,385
+ 18001ac: 70 04 a1 ce e_mull2i r4,462
+ 18001b0: 70 05 a1 80 e_mull2i r5,384
+ 18001b4: 70 02 a1 81 e_mull2i r2,385
+018001b8 <sub3>:
+ 18001b8: 00 04 se_blr
+018001ba <sub4>:
+ 18001ba: 00 04 se_blr
+018001bc <sub5>:
+ 18001bc: 00 04 se_blr
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-2.s b/ld/testsuite/ld-powerpc/vle-reloc-2.s
new file mode 100644
index 0000000..34cc32d
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-2.s
@@ -0,0 +1,92 @@
+ .section .text
+sub1:
+ se_blr
+
+sub2:
+ se_blr
+
+ .section .text
+vle_reloc_2:
+ e_or2i 1, low@l
+ e_or2i 2, high@h
+ e_or2i 3, high_adjust@ha
+ e_or2i 4, low_sdarel@sdarel@l
+ e_or2i 5, high_sdarel@sdarel@h
+ e_or2i 2, high_adjust_sdarel@sdarel@ha
+
+ e_and2i. 1, low@l
+ e_and2i. 2, high@h
+ e_and2i. 3, high_adjust@ha
+ e_and2i. 4, low_sdarel@sdarel@l
+ e_and2i. 5, high_sdarel@sdarel@h
+ e_and2i. 2, high_adjust_sdarel@sdarel@ha
+
+ e_or2is 1, low@l
+ e_or2is 2, high@h
+ e_or2is 3, high_adjust@ha
+ e_or2is 4, low_sdarel@sdarel@l
+ e_or2is 5, high_sdarel@sdarel@h
+ e_or2is 2, high_adjust_sdarel@sdarel@ha
+
+ e_lis 1, low@l
+ e_lis 2, high@h
+ e_lis 3, high_adjust@ha
+ e_lis 4, low_sdarel@sdarel@l
+ e_lis 5, high_sdarel@sdarel@h
+ e_lis 2, high_adjust_sdarel@sdarel@ha
+
+ e_and2is. 1, low@l
+ e_and2is. 2, high@h
+ e_and2is. 3, high_adjust@ha
+ e_and2is. 4, low_sdarel@sdarel@l
+ e_and2is. 5, high_sdarel@sdarel@h
+ e_and2is. 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmp16i 1, low@l
+ e_cmp16i 2, high@h
+ e_cmp16i 3, high_adjust@ha
+ e_cmp16i 4, low_sdarel@sdarel@l
+ e_cmp16i 5, high_sdarel@sdarel@h
+ e_cmp16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmpl16i 1, low@l
+ e_cmpl16i 2, high@h
+ e_cmpl16i 3, high_adjust@ha
+ e_cmpl16i 4, low_sdarel@sdarel@l
+ e_cmpl16i 5, high_sdarel@sdarel@h
+ e_cmpl16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmph16i 1, low@l
+ e_cmph16i 2, high@h
+ e_cmph16i 3, high_adjust@ha
+ e_cmph16i 4, low_sdarel@sdarel@l
+ e_cmph16i 5, high_sdarel@sdarel@h
+ e_cmph16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_cmphl16i 1, low@l
+ e_cmphl16i 2, high@h
+ e_cmphl16i 3, high_adjust@ha
+ e_cmphl16i 4, low_sdarel@sdarel@l
+ e_cmphl16i 5, high_sdarel@sdarel@h
+ e_cmphl16i 2, high_adjust_sdarel@sdarel@ha
+
+ e_add2i. 1, low@l
+ e_add2i. 2, high@h
+ e_add2i. 3, high_adjust@ha
+ e_add2i. 4, low_sdarel@sdarel@l
+ e_add2i. 5, high_sdarel@sdarel@h
+ e_add2i. 2, high_adjust_sdarel@sdarel@ha
+
+ e_add2is 1, low@l
+ e_add2is 2, high@h
+ e_add2is 3, high_adjust@ha
+ e_add2is 4, low_sdarel@sdarel@l
+ e_add2is 5, high_sdarel@sdarel@h
+ e_add2is 2, high_adjust_sdarel@sdarel@ha
+
+ e_mull2i 1, low@l
+ e_mull2i 2, high@h
+ e_mull2i 3, high_adjust@ha
+ e_mull2i 4, low_sdarel@sdarel@l
+ e_mull2i 5, high_sdarel@sdarel@h
+ e_mull2i 2, high_adjust_sdarel@sdarel@ha
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-3.d b/ld/testsuite/ld-powerpc/vle-reloc-3.d
new file mode 100644
index 0000000..e29f4f0
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-3.d
@@ -0,0 +1,8 @@
+.*: file format .*
+
+Disassembly of section .text:
+
+01800094 <sda21_test>:
+ 1800094: 1c ad 80 08 e_add16i r5,r13,-32760
+ 1800098: 1c a2 80 04 e_add16i r5,r2,-32764
+ 180009c: 70 00 00 ac e_li r0,172
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-3.s b/ld/testsuite/ld-powerpc/vle-reloc-3.s
new file mode 100644
index 0000000..3c7dfae
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-3.s
@@ -0,0 +1,10 @@
+ .section .text
+ .extern exdat1c
+ .extern exdat2b
+ .extern exdat1a
+ .globl sda21_test
+
+sda21_test:
+ e_add16i 5, 4, exdat1c@sda21
+ e_add16i 5, 4, exdat2b@sda21
+ e_add16i 5, 4, exdat0b@sda21
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-def-1.s b/ld/testsuite/ld-powerpc/vle-reloc-def-1.s
new file mode 100644
index 0000000..a879221
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-def-1.s
@@ -0,0 +1,13 @@
+ .section .text
+ .globl sub3
+sub3:
+ se_blr
+
+ .globl sub4
+sub4:
+ se_blr
+
+ .globl sub5
+sub5:
+ se_blr
+
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-def-2.s b/ld/testsuite/ld-powerpc/vle-reloc-def-2.s
new file mode 100644
index 0000000..363a39f
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-def-2.s
@@ -0,0 +1,41 @@
+ .section .text
+
+ .globl sub3
+sub3:
+ se_blr
+
+ .globl sub4
+sub4:
+ se_blr
+
+ .globl sub5
+sub5:
+ se_blr
+
+ .section .sdata
+ .globl low_sdarel
+low_sdarel:
+ .long 2
+
+ .globl high_adjust_sdarel
+high_adjust_sdarel:
+ .long 0xff
+
+ .section .sdata2
+ .globl high_sdarel
+high_sdarel:
+ .long 0xf
+
+
+ .data
+ .globl low
+low:
+ .long 5
+
+ .globl high
+high:
+ .long 0x10
+
+ .globl high_adjust
+high_adjust:
+ .long 0xffff
diff --git a/ld/testsuite/ld-powerpc/vle-reloc-def-3.s b/ld/testsuite/ld-powerpc/vle-reloc-def-3.s
new file mode 100644
index 0000000..e3b843b
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle-reloc-def-3.s
@@ -0,0 +1,29 @@
+ .section .sdata
+ .globl exdat1a
+ .globl exdat1b
+ .globl exdat1c
+exdat1a: .long 6
+exdat1b: .long 7
+exdat1c: .long 8
+
+ .section .sdata2
+ .globl exdat2a
+ .globl exdat2b
+ .globl exdat2c
+exdat2a: .long 5
+exdat2b: .long 4
+exdat2c: .long 3
+
+ .section .PPC.EMB.sdata0
+ .globl exdat0a
+ .globl exdat0b
+ .globl exdat0c
+exdat0a: .long 1
+exdat0b: .long 2
+exdat0c: .long 3
+
+ .section .sbss
+ .globl exbss1a
+ .globl exbss1b
+exbss1a: .int
+exbss1b: .int
diff --git a/ld/testsuite/ld-powerpc/vle.ld b/ld/testsuite/ld-powerpc/vle.ld
new file mode 100644
index 0000000..01b6598
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/vle.ld
@@ -0,0 +1,11 @@
+SECTIONS
+{
+ . = 0x01800000 + SIZEOF_HEADERS;
+ .text : { *(.text) }
+ .PPC.EMB.sdata0 : { *(.PPC.EMB.sdata0) }
+ .sdata2 : { PROVIDE (_SDA2_BASE_ = 32768); *(.sdata2) }
+ . = ALIGN (0x10000) + (. & (0x10000 - 1));
+ .data : { *(.data) }
+ .sdata : { PROVIDE (_SDA_BASE_ = 32768); *(.sdata) }
+ /DISCARD/ : { *(*) }
+}
diff --git a/ld/testsuite/ld-powerpc/vxworks1-lib.rd b/ld/testsuite/ld-powerpc/vxworks1-lib.rd
index 40a5d55..21f7bc8 100644
--- a/ld/testsuite/ld-powerpc/vxworks1-lib.rd
+++ b/ld/testsuite/ld-powerpc/vxworks1-lib.rd
@@ -6,7 +6,7 @@
Relocation section '\.rela\.dyn' at offset .* contains 5 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
-00090800 00000016 R_PPC_RELATIVE * 00080c44
+00090800 00000016 R_PPC_RELATIVE * 80c44
00080c0e .*06 R_PPC_ADDR16_HA 00000000 __GOTT_BASE__ \+ 0
00080c12 .*04 R_PPC_ADDR16_LO 00000000 __GOTT_BASE__ \+ 0
00080c16 .*03 R_PPC_ADDR16 00000000 __GOTT_INDEX__ \+ 0
diff --git a/ld/testsuite/ld-s390/tlspic.rd b/ld/testsuite/ld-s390/tlspic.rd
index ec63e3d..e118e3f 100644
--- a/ld/testsuite/ld-s390/tlspic.rd
+++ b/ld/testsuite/ld-s390/tlspic.rd
@@ -49,16 +49,16 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
Offset +Info +Type +Sym.Value +Sym. Name \+ Addend
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_TPOFF +0+24
-[0-9a-f ]+R_390_TLS_TPOFF +0+30
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_TPOFF +0+64
-[0-9a-f ]+R_390_TLS_TPOFF +0+50
-[0-9a-f ]+R_390_TLS_TPOFF +0+70
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_TPOFF +0+44
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_TPOFF +24
+[0-9a-f ]+R_390_TLS_TPOFF +30
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_TPOFF +64
+[0-9a-f ]+R_390_TLS_TPOFF +50
+[0-9a-f ]+R_390_TLS_TPOFF +70
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_TPOFF +44
[0-9a-f ]+R_390_TLS_TPOFF +0+10 +sg5 \+ 0
[0-9a-f ]+R_390_TLS_DTPMOD +0+ +sg1 \+ 0
[0-9a-f ]+R_390_TLS_DTPOFF +0+ +sg1 \+ 0
diff --git a/ld/testsuite/ld-s390/tlspic_64.rd b/ld/testsuite/ld-s390/tlspic_64.rd
index da8c9bf..9a0c74b 100644
--- a/ld/testsuite/ld-s390/tlspic_64.rd
+++ b/ld/testsuite/ld-s390/tlspic_64.rd
@@ -49,16 +49,16 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_TPOFF +0+24
-[0-9a-f ]+R_390_TLS_TPOFF +0+30
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_TPOFF +0+64
-[0-9a-f ]+R_390_TLS_TPOFF +0+50
-[0-9a-f ]+R_390_TLS_TPOFF +0+70
-[0-9a-f ]+R_390_TLS_DTPMOD +0+
-[0-9a-f ]+R_390_TLS_TPOFF +0+44
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_TPOFF +24
+[0-9a-f ]+R_390_TLS_TPOFF +30
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_TPOFF +64
+[0-9a-f ]+R_390_TLS_TPOFF +50
+[0-9a-f ]+R_390_TLS_TPOFF +70
+[0-9a-f ]+R_390_TLS_DTPMOD +0
+[0-9a-f ]+R_390_TLS_TPOFF +44
[0-9a-f ]+R_390_TLS_TPOFF +0+10 sg5 \+ 0
[0-9a-f ]+R_390_TLS_DTPMOD +0+ sg1 \+ 0
[0-9a-f ]+R_390_TLS_DTPOFF +0+ sg1 \+ 0
diff --git a/ld/testsuite/ld-sh/shared-1.d b/ld/testsuite/ld-sh/shared-1.d
index 940195d..28034e9 100644
--- a/ld/testsuite/ld-sh/shared-1.d
+++ b/ld/testsuite/ld-sh/shared-1.d
@@ -13,7 +13,7 @@
Relocation section '\.rela\.text' at offset 0x[0-9a-f]+ contains 1 entries:
.*
-0000019c +[0-9a-f]+ R_SH_RELATIVE +000001a0
+0000019c +[0-9a-f]+ R_SH_RELATIVE +1a0
Hex dump of section '\.rela\.text':
0x00000188 9c010000 a5000000 a0010000 .*
diff --git a/ld/testsuite/ld-sh/tlspic-2.d b/ld/testsuite/ld-sh/tlspic-2.d
index 4005299..d8e355f 100644
--- a/ld/testsuite/ld-sh/tlspic-2.d
+++ b/ld/testsuite/ld-sh/tlspic-2.d
@@ -50,13 +50,13 @@
Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 10 entries:
Offset +Info +Type +Sym\.Value +Sym\. Name \+ Addend
-[0-9a-f ]+R_SH_TLS_DTPMOD32 +0+00
-[0-9a-f ]+R_SH_TLS_TPOFF32 +0+0c
-[0-9a-f ]+R_SH_TLS_DTPMOD32 +0+00
-[0-9a-f ]+R_SH_TLS_DTPMOD32 +0+00
-[0-9a-f ]+R_SH_TLS_TPOFF32 +0+1c
-[0-9a-f ]+R_SH_TLS_DTPMOD32 +0+00
-[0-9a-f ]+R_SH_TLS_TPOFF32 +0+14
+[0-9a-f ]+R_SH_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SH_TLS_TPOFF32 +c
+[0-9a-f ]+R_SH_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SH_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SH_TLS_TPOFF32 +1c
+[0-9a-f ]+R_SH_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SH_TLS_TPOFF32 +14
[0-9a-f ]+R_SH_TLS_DTPMOD32 +0+ +sg1 \+ 0
[0-9a-f ]+R_SH_TLS_DTPOFF32 +0+ +sg1 \+ 0
[0-9a-f ]+R_SH_TLS_TPOFF32 +0+04 +sg2 \+ 0
diff --git a/ld/testsuite/ld-sparc/tlssunbin32.rd b/ld/testsuite/ld-sparc/tlssunbin32.rd
index 46fc2e4..69a0317 100644
--- a/ld/testsuite/ld-sparc/tlssunbin32.rd
+++ b/ld/testsuite/ld-sparc/tlssunbin32.rd
@@ -88,7 +88,7 @@
.* TLS +LOCAL +DEFAULT +8 bl7
.* TLS +LOCAL +DEFAULT +8 bl8
.* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
-.* OBJECT +LOCAL +DEFAULT +ABS _PROCEDURE_LINKAGE_TABLE_
+.* OBJECT +LOCAL +DEFAULT +10 _PROCEDURE_LINKAGE_TABLE_
.* OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
.* TLS +GLOBAL +DEFAULT +7 sg8
.* TLS +GLOBAL +DEFAULT +8 bg8
diff --git a/ld/testsuite/ld-sparc/tlssunbin64.rd b/ld/testsuite/ld-sparc/tlssunbin64.rd
index c41b1c9..483a9cf 100644
--- a/ld/testsuite/ld-sparc/tlssunbin64.rd
+++ b/ld/testsuite/ld-sparc/tlssunbin64.rd
@@ -88,7 +88,7 @@
.* TLS +LOCAL +DEFAULT +8 bl7
.* TLS +LOCAL +DEFAULT +8 bl8
.* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
-.* OBJECT +LOCAL +DEFAULT +ABS _PROCEDURE_LINKAGE_TABLE_
+.* OBJECT +LOCAL +DEFAULT +10 _PROCEDURE_LINKAGE_TABLE_
.* OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
.* TLS +GLOBAL +DEFAULT +7 sg8
.* TLS +GLOBAL +DEFAULT +8 bg8
diff --git a/ld/testsuite/ld-sparc/tlssunnopic32.rd b/ld/testsuite/ld-sparc/tlssunnopic32.rd
index a35652b..f2f26e7 100644
--- a/ld/testsuite/ld-sparc/tlssunnopic32.rd
+++ b/ld/testsuite/ld-sparc/tlssunnopic32.rd
@@ -38,14 +38,14 @@
Offset +Info +Type +Sym. Value +Symbol's Name \+ Addend
[0-9a-f ]+R_SPARC_HI22 +0+12080 +\.got \+ 12080
[0-9a-f ]+R_SPARC_LO10 +0+12080 +\.got \+ 12080
-[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +0+9
-[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +0+9
-[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +0+1c
-[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +0+1c
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+4
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+14
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+18
+[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +9
+[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +9
+[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +1c
+[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +1c
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +4
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +14
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +18
[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+ +sg1 \+ 0
[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+ +sg2 \+ 0
diff --git a/ld/testsuite/ld-sparc/tlssunnopic64.rd b/ld/testsuite/ld-sparc/tlssunnopic64.rd
index 3ccea67..9f7ff7b 100644
--- a/ld/testsuite/ld-sparc/tlssunnopic64.rd
+++ b/ld/testsuite/ld-sparc/tlssunnopic64.rd
@@ -40,14 +40,14 @@
[0-9a-f ]+R_SPARC_LM22 +0+102100 +\.got \+ 102100
[0-9a-f ]+R_SPARC_HM10 +0+102100 +\.got \+ 102100
[0-9a-f ]+R_SPARC_LO10 +0+102100 +\.got \+ 102100
-[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +0+9
-[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +0+9
-[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +0+1c
-[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +0+1c
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+4
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+14
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+18
+[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +9
+[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +9
+[0-9a-f ]+R_SPARC_TLS_LE_HIX22 +1c
+[0-9a-f ]+R_SPARC_TLS_LE_LOX10 +1c
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +4
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +14
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +18
[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+ +sg1 \+ 0
[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+ +sg2 \+ 0
diff --git a/ld/testsuite/ld-sparc/tlssunpic32.rd b/ld/testsuite/ld-sparc/tlssunpic32.rd
index 6ab67e9..e6a793a 100644
--- a/ld/testsuite/ld-sparc/tlssunpic32.rd
+++ b/ld/testsuite/ld-sparc/tlssunpic32.rd
@@ -40,16 +40,16 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
Offset +Info +Type +Sym. Value +Symbol's Name \+ Addend
-[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+24
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+30
-[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0+
-[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+64
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+50
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+70
-[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+44
+[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +24
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +30
+[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +64
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +50
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +70
+[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF32 +44
[0-9a-f ]+R_SPARC_TLS_TPOFF32 +0+10 +sg5 \+ 0
[0-9a-f ]+R_SPARC_TLS_DTPMOD32 +0+ +sg1 \+ 0
[0-9a-f ]+R_SPARC_TLS_DTPOFF32 +0+ +sg1 \+ 0
diff --git a/ld/testsuite/ld-sparc/tlssunpic64.rd b/ld/testsuite/ld-sparc/tlssunpic64.rd
index 35a7c79..0ba98dd 100644
--- a/ld/testsuite/ld-sparc/tlssunpic64.rd
+++ b/ld/testsuite/ld-sparc/tlssunpic64.rd
@@ -40,16 +40,16 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+24
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+30
-[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0+
-[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+64
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+50
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+70
-[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0+
-[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+44
+[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +24
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +30
+[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0
+[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +64
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +50
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +70
+[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0
+[0-9a-f ]+R_SPARC_TLS_TPOFF64 +44
[0-9a-f ]+R_SPARC_TLS_TPOFF64 +0+10 +sg5 \+ 0
[0-9a-f ]+R_SPARC_TLS_DTPMOD64 +0+ +sg1 \+ 0
[0-9a-f ]+R_SPARC_TLS_DTPOFF64 +0+ +sg1 \+ 0
diff --git a/ld/testsuite/ld-spu/pic.d b/ld/testsuite/ld-spu/pic.d
index 87edc1d..438d4e1 100644
--- a/ld/testsuite/ld-spu/pic.d
+++ b/ld/testsuite/ld-spu/pic.d
@@ -28,7 +28,7 @@
24: 18 1f 82 04 a \$4,\$4,\$126
24: SPU_ADD_PIC before\+0x4
28: 18 1f 82 85 a \$5,\$5,\$126
- 28: SPU_ADD_PIC after\+0xfffffffc
+ 28: SPU_ADD_PIC after-0x4
2c: 18 1f 83 06 a \$6,\$6,\$126
2c: SPU_ADD_PIC _start
30: 18 1f 83 87 a \$7,\$7,\$126
diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp
index 5e741e0..7f13e9c 100644
--- a/ld/testsuite/ld-srec/srec.exp
+++ b/ld/testsuite/ld-srec/srec.exp
@@ -1,6 +1,6 @@
# Test linking directly to S-records.
# By Ian Lance Taylor, Cygnus Support.
-# Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009, 2011
+# Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009, 2011, 2012
# Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
@@ -266,16 +266,27 @@
set flags "$flags -no-relax"
}
- if [istarget powerpc64*-*-*] {
- set flags "$flags --no-toc-optimize"
- }
-
# Epiphany needs some help too
if [istarget epiphany*-*-*] {
set flags "$flags --defsym _start=00000060"
setup_xfail "epiphany*-*-*"
}
+ if [istarget m681*-*-*] {
+ set flags "$flags --defsym _start=0xc000"
+ setup_xfail "m681*-*-*"
+ }
+
+ if [istarget m68hc1*-*-*] {
+ set flags "$flags --defsym _start=0xc000"
+ setup_xfail "m68hc1*-*-*"
+ }
+
+ if [istarget m9s12x*-*-*] {
+ set flags "$flags --defsym _start=0xc000"
+ setup_xfail "m9s12x*-*-*"
+ }
+
if { ![ld_simple_link $ld tmpdir/sr1 "$flags $objs"] \
|| ![ld_simple_link $ld tmpdir/sr2.sr "$flags --oformat srec $objs"] } {
fail $test
diff --git a/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d b/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d
index 8657fd0..096b6ae 100644
--- a/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d
+++ b/ld/testsuite/ld-tic6x/mvk-reloc-local-r.d
@@ -23,5 +23,5 @@
[ \t]*24:[ \t]+01000028[ \t]+mvk \.S1 0,a2
[ \t]*24: R_C6000_ABS_L16[ \t]+\.data\+0x10
[ \t]*28:[ \t]+01800068[ \t]+mvkh \.S1 0,a3
-[ \t]*28: R_C6000_ABS_H16[ \t]+\.data\+0xffffff14
+[ \t]*28: R_C6000_ABS_H16[ \t]+\.data-0xec
[ \t]*\.\.\.
diff --git a/ld/testsuite/ld-tic6x/unwind-6.d b/ld/testsuite/ld-tic6x/unwind-6.d
index 5de8ee6..6342265 100644
--- a/ld/testsuite/ld-tic6x/unwind-6.d
+++ b/ld/testsuite/ld-tic6x/unwind-6.d
@@ -1,5 +1,5 @@
#ld: -T unwind.ld
-#source unwind-4.s
+#source: unwind-4.s
#as: -mgenerate-rel
#objdump: -s
diff --git a/ld/testsuite/ld-x86-64/ilp32-11.d b/ld/testsuite/ld-x86-64/ilp32-11.d
new file mode 100644
index 0000000..f6fc86c
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-11.d
@@ -0,0 +1,3 @@
+#as: --x32
+#ld: -shared -melf32_x86_64
+#error: .*addend 0x7fffffff in relocation R_X86_64_64 against symbol `func' at 0x0 in section `.data.rel.local' is out of range
diff --git a/ld/testsuite/ld-x86-64/ilp32-11.s b/ld/testsuite/ld-x86-64/ilp32-11.s
new file mode 100644
index 0000000..438f094
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/ilp32-11.s
@@ -0,0 +1,12 @@
+ .section .data.rel.local,"aw",@progbits
+ .align 8
+.Ljmp:
+ .quad func + 0x7fffffff
+
+ .text
+ .space 0x1000
+ .type func, @function
+ .global func
+ .hidden func
+func:
+ ret
diff --git a/ld/testsuite/ld-x86-64/pr12570a.d b/ld/testsuite/ld-x86-64/pr12570a.d
new file mode 100644
index 0000000..1d79411
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr12570a.d
@@ -0,0 +1,8 @@
+#name: PR ld/12570 (PLT)
+#as: --64
+#ld: -melf_x86_64 -shared
+#readelf: -wf --wide
+
+#...
+ DW_CFA_def_cfa_expression \(DW_OP_breg7 \(rsp\): 8; DW_OP_breg16 \(rip\): 0;.*
+#...
diff --git a/ld/testsuite/ld-x86-64/pr12570a.s b/ld/testsuite/ld-x86-64/pr12570a.s
new file mode 100644
index 0000000..38e0593
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr12570a.s
@@ -0,0 +1,8 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ .cfi_startproc
+ jmp bar@PLT
+ .cfi_endproc
+ .size foo, .-foo
diff --git a/ld/testsuite/ld-x86-64/pr12570b.d b/ld/testsuite/ld-x86-64/pr12570b.d
new file mode 100644
index 0000000..159aab4
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr12570b.d
@@ -0,0 +1,9 @@
+#name: PR ld/12570 (no PLT)
+#as: --64
+#ld: -melf_x86_64 -shared
+#readelf: -wf --wide
+
+#failif
+#...
+ DW_CFA_def_cfa_expression \(DW_OP_breg7 \(rsp\): 8; DW_OP_breg16 \(rip\): 0;.*
+#...
diff --git a/ld/testsuite/ld-x86-64/pr12570b.s b/ld/testsuite/ld-x86-64/pr12570b.s
new file mode 100644
index 0000000..e76b9f1
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr12570b.s
@@ -0,0 +1,8 @@
+ .text
+ .globl foo
+ .type foo, @function
+foo:
+ .cfi_startproc
+ ret
+ .cfi_endproc
+ .size foo, .-foo
diff --git a/ld/testsuite/ld-x86-64/pr13082-1a.d b/ld/testsuite/ld-x86-64/pr13082-1a.d
index f0e98ff..cb404e0 100644
--- a/ld/testsuite/ld-x86-64/pr13082-1a.d
+++ b/ld/testsuite/ld-x86-64/pr13082-1a.d
@@ -2,8 +2,12 @@
#name: PR ld/13082-1 (a)
#as: --x32
#ld: -shared -melf32_x86_64
-#readelf: -r --wide
+#readelf: -d -r --wide
+Dynamic section at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+#...
+ 0x[0-9a-f]+ +\(RELACOUNT\) +1
+#...
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Sym. Value Symbol's Name \+ Addend
[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE64 +[0-9a-f]+
diff --git a/ld/testsuite/ld-x86-64/pr13082-1b.d b/ld/testsuite/ld-x86-64/pr13082-1b.d
index f10481f..dbe8a0a 100644
--- a/ld/testsuite/ld-x86-64/pr13082-1b.d
+++ b/ld/testsuite/ld-x86-64/pr13082-1b.d
@@ -2,8 +2,12 @@
#name: PR ld/13082-1 (b)
#as: --x32
#ld: -pie -melf32_x86_64
-#readelf: -r --wide
+#readelf: -d -r --wide
+Dynamic section at offset 0x[0-9a-f]+ contains [0-9]+ entries:
+#...
+ 0x[0-9a-f]+ +\(RELACOUNT\) +1
+#...
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries:
Offset Info Type Sym. Value Symbol's Name \+ Addend
[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE64 +[0-9a-f]+
diff --git a/ld/testsuite/ld-x86-64/tlsdesc-nacl.rd b/ld/testsuite/ld-x86-64/tlsdesc-nacl.rd
index 3a3c600..cd89d74 100644
--- a/ld/testsuite/ld-x86-64/tlsdesc-nacl.rd
+++ b/ld/testsuite/ld-x86-64/tlsdesc-nacl.rd
@@ -71,22 +71,22 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-0+10010638 +[0-9a-f]+ R_X86_64_TPOFF64 +0+24
-0+10010640 +[0-9a-f]+ R_X86_64_TPOFF64 +0+30
-0+10010648 +[0-9a-f]+ R_X86_64_TPOFF64 +0+64
-0+10010658 +[0-9a-f]+ R_X86_64_TPOFF64 +0+50
-0+10010660 +[0-9a-f]+ R_X86_64_TPOFF64 +0+70
-0+10010670 +[0-9a-f]+ R_X86_64_TPOFF64 +0+44
+0+10010638 +[0-9a-f]+ R_X86_64_TPOFF64 +24
+0+10010640 +[0-9a-f]+ R_X86_64_TPOFF64 +30
+0+10010648 +[0-9a-f]+ R_X86_64_TPOFF64 +64
+0+10010658 +[0-9a-f]+ R_X86_64_TPOFF64 +50
+0+10010660 +[0-9a-f]+ R_X86_64_TPOFF64 +70
+0+10010670 +[0-9a-f]+ R_X86_64_TPOFF64 +44
0+10010650 +[0-9a-f]+ R_X86_64_TPOFF64 +0+10 sg5 \+ 0
0+10010668 +[0-9a-f]+ R_X86_64_TPOFF64 +0+4 sg2 \+ 0
Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 5 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
0+100106c8 +[0-9a-f]+ R_X86_64_TLSDESC +0+ sg1 \+ 0
-0+10010698 +[0-9a-f]+ R_X86_64_TLSDESC +0+20
-0+100106d8 +[0-9a-f]+ R_X86_64_TLSDESC +0+40
-0+100106a8 +[0-9a-f]+ R_X86_64_TLSDESC +0+60
-0+100106b8 +[0-9a-f]+ R_X86_64_TLSDESC +0+
+0+10010698 +[0-9a-f]+ R_X86_64_TLSDESC +20
+0+100106d8 +[0-9a-f]+ R_X86_64_TLSDESC +40
+0+100106a8 +[0-9a-f]+ R_X86_64_TLSDESC +60
+0+100106b8 +[0-9a-f]+ R_X86_64_TLSDESC +0
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
@@ -131,7 +131,7 @@
+[0-9]+: 0+3c +0 +TLS +LOCAL +DEFAULT +8 sl8
+[0-9]+: 0+60 +0 +TLS +LOCAL +DEFAULT +9 sH1
+[0-9]+: 0+ +0 +TLS +LOCAL +DEFAULT +8 _TLS_MODULE_BASE_
- +[0-9]+: 0+100104e8 +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: 0+100104e8 +0 +OBJECT +LOCAL +DEFAULT +10 _DYNAMIC
+[0-9]+: 0+48 +0 +TLS +LOCAL +DEFAULT +8 sh3
+[0-9]+: 0+64 +0 +TLS +LOCAL +DEFAULT +9 sH2
+[0-9]+: 0+78 +0 +TLS +LOCAL +DEFAULT +9 sH7
@@ -145,7 +145,7 @@
+[0-9]+: 0+74 +0 +TLS +LOCAL +DEFAULT +9 sH6
+[0-9]+: 0+7c +0 +TLS +LOCAL +DEFAULT +9 sH8
+[0-9]+: 0+40 +0 +TLS +LOCAL +DEFAULT +8 sh1
- +[0-9]+: 0+10010680 +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+10010680 +0 +OBJECT +LOCAL +DEFAULT +12 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+44 +0 +TLS +LOCAL +DEFAULT +8 sh2
+[0-9]+: 0+54 +0 +TLS +LOCAL +DEFAULT +8 sh6
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +8 sg8
diff --git a/ld/testsuite/ld-x86-64/tlsdesc.rd b/ld/testsuite/ld-x86-64/tlsdesc.rd
index df8d466..ba5c9d9 100644
--- a/ld/testsuite/ld-x86-64/tlsdesc.rd
+++ b/ld/testsuite/ld-x86-64/tlsdesc.rd
@@ -69,22 +69,22 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-0+201308 +[0-9a-f]+ R_X86_64_TPOFF64 +0+24
-0+201310 +[0-9a-f]+ R_X86_64_TPOFF64 +0+30
-0+201318 +[0-9a-f]+ R_X86_64_TPOFF64 +0+64
-0+201328 +[0-9a-f]+ R_X86_64_TPOFF64 +0+50
-0+201330 +[0-9a-f]+ R_X86_64_TPOFF64 +0+70
-0+201340 +[0-9a-f]+ R_X86_64_TPOFF64 +0+44
+0+201308 +[0-9a-f]+ R_X86_64_TPOFF64 +24
+0+201310 +[0-9a-f]+ R_X86_64_TPOFF64 +30
+0+201318 +[0-9a-f]+ R_X86_64_TPOFF64 +64
+0+201328 +[0-9a-f]+ R_X86_64_TPOFF64 +50
+0+201330 +[0-9a-f]+ R_X86_64_TPOFF64 +70
+0+201340 +[0-9a-f]+ R_X86_64_TPOFF64 +44
0+201320 +[0-9a-f]+ R_X86_64_TPOFF64 +0+10 sg5 \+ 0
0+201338 +[0-9a-f]+ R_X86_64_TPOFF64 +0+4 sg2 \+ 0
Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 5 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
0+201398 +[0-9a-f]+ R_X86_64_TLSDESC +0+ sg1 \+ 0
-0+201368 +[0-9a-f]+ R_X86_64_TLSDESC +0+20
-0+2013a8 +[0-9a-f]+ R_X86_64_TLSDESC +0+40
-0+201378 +[0-9a-f]+ R_X86_64_TLSDESC +0+60
-0+201388 +[0-9a-f]+ R_X86_64_TLSDESC +0+
+0+201368 +[0-9a-f]+ R_X86_64_TLSDESC +20
+0+2013a8 +[0-9a-f]+ R_X86_64_TLSDESC +40
+0+201378 +[0-9a-f]+ R_X86_64_TLSDESC +60
+0+201388 +[0-9a-f]+ R_X86_64_TLSDESC +0
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
@@ -129,7 +129,7 @@
+[0-9]+: 0+3c +0 +TLS +LOCAL +DEFAULT +8 sl8
+[0-9]+: 0+60 +0 +TLS +LOCAL +DEFAULT +9 sH1
+[0-9]+: 0+ +0 +TLS +LOCAL +DEFAULT +8 _TLS_MODULE_BASE_
- +[0-9]+: 0+2011b8 +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+ +[0-9]+: 0+2011b8 +0 +OBJECT +LOCAL +DEFAULT +10 _DYNAMIC
+[0-9]+: 0+48 +0 +TLS +LOCAL +DEFAULT +8 sh3
+[0-9]+: 0+64 +0 +TLS +LOCAL +DEFAULT +9 sH2
+[0-9]+: 0+78 +0 +TLS +LOCAL +DEFAULT +9 sH7
@@ -143,7 +143,7 @@
+[0-9]+: 0+74 +0 +TLS +LOCAL +DEFAULT +9 sH6
+[0-9]+: 0+7c +0 +TLS +LOCAL +DEFAULT +9 sH8
+[0-9]+: 0+40 +0 +TLS +LOCAL +DEFAULT +8 sh1
- +[0-9]+: 0+201350 +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+201350 +0 +OBJECT +LOCAL +DEFAULT +12 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+44 +0 +TLS +LOCAL +DEFAULT +8 sh2
+[0-9]+: 0+54 +0 +TLS +LOCAL +DEFAULT +8 sh6
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +8 sg8
diff --git a/ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd b/ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd
index d163238..b0a8761 100644
--- a/ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd
+++ b/ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd
@@ -91,8 +91,8 @@
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +8 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +9 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +10 *
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +8 _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG3
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG5
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG2
diff --git a/ld/testsuite/ld-x86-64/tlsgdesc.rd b/ld/testsuite/ld-x86-64/tlsgdesc.rd
index 1e24693..68f718e 100644
--- a/ld/testsuite/ld-x86-64/tlsgdesc.rd
+++ b/ld/testsuite/ld-x86-64/tlsgdesc.rd
@@ -89,8 +89,8 @@
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +8 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +9 *
+[0-9]+: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +10 *
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
- +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +8 _DYNAMIC
+ +[0-9]+: [0-9a-f]+ +0 +OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG3
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG5
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +UND sG2
diff --git a/ld/testsuite/ld-x86-64/tlspic-nacl.rd b/ld/testsuite/ld-x86-64/tlspic-nacl.rd
index 56a07bf..3c38b82 100644
--- a/ld/testsuite/ld-x86-64/tlspic-nacl.rd
+++ b/ld/testsuite/ld-x86-64/tlspic-nacl.rd
@@ -52,16 +52,16 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_TPOFF64 +0+24
-[0-9a-f ]+R_X86_64_TPOFF64 +0+30
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_TPOFF64 +0+64
-[0-9a-f ]+R_X86_64_TPOFF64 +0+50
-[0-9a-f ]+R_X86_64_TPOFF64 +0+70
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_TPOFF64 +0+44
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_TPOFF64 +24
+[0-9a-f ]+R_X86_64_TPOFF64 +30
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_TPOFF64 +64
+[0-9a-f ]+R_X86_64_TPOFF64 +50
+[0-9a-f ]+R_X86_64_TPOFF64 +70
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_TPOFF64 +44
[0-9a-f ]+R_X86_64_TPOFF64 +0+10 sg5 \+ 0
[0-9a-f ]+R_X86_64_DTPMOD64 +0+ sg1 \+ 0
[0-9a-f ]+R_X86_64_DTPOFF64 +0+ sg1 \+ 0
@@ -114,7 +114,7 @@
.* TLS +LOCAL +DEFAULT +8 sl7
.* TLS +LOCAL +DEFAULT +8 sl8
.* TLS +LOCAL +DEFAULT +9 sH1
-.* OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+.* OBJECT +LOCAL +DEFAULT +10 _DYNAMIC
.* TLS +LOCAL +DEFAULT +8 sh3
.* TLS +LOCAL +DEFAULT +9 sH2
.* TLS +LOCAL +DEFAULT +9 sH7
@@ -128,7 +128,7 @@
.* TLS +LOCAL +DEFAULT +9 sH6
.* TLS +LOCAL +DEFAULT +9 sH8
.* TLS +LOCAL +DEFAULT +8 sh1
-.* OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+.* OBJECT +LOCAL +DEFAULT +12 _GLOBAL_OFFSET_TABLE_
.* TLS +LOCAL +DEFAULT +8 sh2
.* TLS +LOCAL +DEFAULT +8 sh6
.* TLS +GLOBAL +DEFAULT +8 sg8
diff --git a/ld/testsuite/ld-x86-64/tlspic.rd b/ld/testsuite/ld-x86-64/tlspic.rd
index 177f206..72c66bf 100644
--- a/ld/testsuite/ld-x86-64/tlspic.rd
+++ b/ld/testsuite/ld-x86-64/tlspic.rd
@@ -50,16 +50,16 @@
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_TPOFF64 +0+24
-[0-9a-f ]+R_X86_64_TPOFF64 +0+30
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_TPOFF64 +0+64
-[0-9a-f ]+R_X86_64_TPOFF64 +0+50
-[0-9a-f ]+R_X86_64_TPOFF64 +0+70
-[0-9a-f ]+R_X86_64_DTPMOD64 +0+
-[0-9a-f ]+R_X86_64_TPOFF64 +0+44
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_TPOFF64 +24
+[0-9a-f ]+R_X86_64_TPOFF64 +30
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_TPOFF64 +64
+[0-9a-f ]+R_X86_64_TPOFF64 +50
+[0-9a-f ]+R_X86_64_TPOFF64 +70
+[0-9a-f ]+R_X86_64_DTPMOD64 +0
+[0-9a-f ]+R_X86_64_TPOFF64 +44
[0-9a-f ]+R_X86_64_TPOFF64 +0+10 sg5 \+ 0
[0-9a-f ]+R_X86_64_DTPMOD64 +0+ sg1 \+ 0
[0-9a-f ]+R_X86_64_DTPOFF64 +0+ sg1 \+ 0
@@ -112,7 +112,7 @@
.* TLS +LOCAL +DEFAULT +8 sl7
.* TLS +LOCAL +DEFAULT +8 sl8
.* TLS +LOCAL +DEFAULT +9 sH1
-.* OBJECT +LOCAL +DEFAULT +ABS _DYNAMIC
+.* OBJECT +LOCAL +DEFAULT +10 _DYNAMIC
.* TLS +LOCAL +DEFAULT +8 sh3
.* TLS +LOCAL +DEFAULT +9 sH2
.* TLS +LOCAL +DEFAULT +9 sH7
@@ -126,7 +126,7 @@
.* TLS +LOCAL +DEFAULT +9 sH6
.* TLS +LOCAL +DEFAULT +9 sH8
.* TLS +LOCAL +DEFAULT +8 sh1
-.* OBJECT +LOCAL +DEFAULT +ABS _GLOBAL_OFFSET_TABLE_
+.* OBJECT +LOCAL +DEFAULT +12 _GLOBAL_OFFSET_TABLE_
.* TLS +LOCAL +DEFAULT +8 sh2
.* TLS +LOCAL +DEFAULT +8 sh6
.* TLS +GLOBAL +DEFAULT +8 sg8
diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp
index 27174d5..7d2934f 100644
--- a/ld/testsuite/ld-x86-64/x86-64.exp
+++ b/ld/testsuite/ld-x86-64/x86-64.exp
@@ -206,6 +206,8 @@
run_dump_test "pr12718"
run_dump_test "pr12921"
run_dump_test "pr13947"
+run_dump_test "pr12570a"
+run_dump_test "pr12570b"
if { ![istarget "x86_64-*-linux*"] && ![istarget "x86_64-*-nacl*"]} {
return
@@ -253,6 +255,7 @@
run_dump_test "ilp32-8"
run_dump_test "ilp32-9"
run_dump_test "ilp32-10"
+run_dump_test "ilp32-11"
run_dump_test "ia32-1"
run_dump_test "ia32-2"
run_dump_test "ia32-3"
diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp
index 10fe86e..5f21757 100644
--- a/ld/testsuite/lib/ld-lib.exp
+++ b/ld/testsuite/lib/ld-lib.exp
@@ -623,7 +623,18 @@
if { $opt_name == "as" || $opt_name == "ld" } {
set opt_val [subst $opt_val]
}
- set opts($opt_name) [concat $opts($opt_name) $opt_val]
+
+ # Append differently whether it's a message (without space) or
+ # an option or list (with space).
+ switch -- $opt_name {
+ warning -
+ error {
+ append opts($opt_name) $opt_val
+ }
+ default {
+ set opts($opt_name) [concat $opts($opt_name) $opt_val]
+ }
+ }
}
foreach opt { as ld } {
regsub {\[big_or_little_endian\]} $opts($opt) \
diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog
index eb37699..206a576 100644
--- a/libiberty/ChangeLog
+++ b/libiberty/ChangeLog
@@ -1,3 +1,10 @@
+2012-05-22 Tom Tromey <tromey@redhat.com>
+
+ http://sourceware.org/bugzilla/show_bug.cgi?id=14065
+ * testsuite/demangle-expected: Add regression test.
+ * cp-demangle.c (d_find_pack): Return NULL for
+ DEMANGLE_COMPONENT_UNNAMED_TYPE.
+
2012-04-27 Tom Tromey <tromey@redhat.com>
* dwarfnames.c: New file.
diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c
index d95b56c..27cc323 100644
--- a/libiberty/cp-demangle.c
+++ b/libiberty/cp-demangle.c
@@ -3715,6 +3715,7 @@
case DEMANGLE_COMPONENT_SUB_STD:
case DEMANGLE_COMPONENT_CHARACTER:
case DEMANGLE_COMPONENT_FUNCTION_PARAM:
+ case DEMANGLE_COMPONENT_UNNAMED_TYPE:
return NULL;
case DEMANGLE_COMPONENT_EXTENDED_OPERATOR:
diff --git a/libiberty/testsuite/demangle-expected b/libiberty/testsuite/demangle-expected
index d489692..58c1368 100644
--- a/libiberty/testsuite/demangle-expected
+++ b/libiberty/testsuite/demangle-expected
@@ -4266,3 +4266,7 @@
_Z1fIKFvvES0_Evv
void f<void () const, void ()>()
f<void () const, void ()>
+#
+--format=gnu-v3
+_ZN4modc6parser8sequenceINS_9astParser13LocatedParserINS0_9ParserRefINS2_UlRNS2_16TokenParserInputEE_EEEEEINS0_14OptionalParserINS2_18ListParserTemplateILNS_6tokens5Token4TypeE4EXadL_ZNSD_Ut_13parenthesizedEEEE6ParserINS4_INS0_6ParserIS5_NS_3ast10ExpressionEEEEEEEEENSA_INS4_INS2_22OneOfKeywordsToTParserINSJ_5StyleEEEEEEENS0_14SequenceParserIS5_INS0_18ExactElementParserIS5_EENSA_ISM_EEEEENS0_14RepeatedParserINS4_INS0_15TransformParserINSU_IS5_INS4_INSP_INSJ_10Annotation12RelationshipEEEEESX_EEENS2_UlNS2_3LocES12_ONS_5MaybeISK_EEE19_EEEEELb0EEEEEENSU_INS0_17ExtractParserTypeIT_E9InputTypeEINS0_8MaybeRefIS1F_E4TypeEDpNS1I_IT0_E4TypeEEEEOS1F_DpOS1L_
+modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::parser::ExtractParserType<modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> > >::InputType, modc::parser::MaybeRef<modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}>::Type, modc::parser::RepeatedParser<modc::parser::ParserRef<modc::parser::TransformParser<modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::astParser::TokenParserInput<modc::parser::ParserRef<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > ><modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Annotation::Relationship> >, modc::parser::ExactElementParser> >, modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}> >, false><modc::parser::OptionalParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > > > >::Type, modc::parser::RepeatedParser<modc::parser::ParserRef<modc::parser::TransformParser<modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::astParser::TokenParserInput<modc::parser::ParserRef<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > ><modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Annotation::Relationship> >, modc::parser::ExactElementParser> >, modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}> >, false><modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> ><modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> > > >::Type, modc::parser::RepeatedParser<modc::parser::ParserRef<modc::parser::TransformParser<modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::astParser::TokenParserInput<modc::parser::ParserRef<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > ><modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Annotation::Relationship> >, modc::parser::ExactElementParser> >, modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}> >, false><modc::parser::SequenceParser<modc::astParser::TokenParserInput<modc::parser::ExactElementParser<modc::astParser::TokenParserInput>, modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> ><modc::ast::Expression> > > >::Type, modc::parser::RepeatedParser<modc::parser::ParserRef<modc::parser::TransformParser<modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::astParser::TokenParserInput<modc::parser::ParserRef<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > ><modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Annotation::Relationship> >, modc::parser::ExactElementParser> >, modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}> >, false><modc::parser::RepeatedParser<modc::parser::ParserRef<modc::parser::TransformParser<modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::astParser::TokenParserInput<modc::parser::ParserRef<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > ><modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Annotation::Relationship> >, modc::parser::ExactElementParser> >, modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}> >, false> >::Type> modc::parser::sequence<modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> >, modc::parser::OptionalParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > > >, modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> ><modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> > >, modc::parser::SequenceParser<modc::astParser::TokenParserInput<modc::parser::ExactElementParser<modc::astParser::TokenParserInput>, modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> ><modc::ast::Expression> > >, modc::parser::RepeatedParser<modc::parser::ParserRef<modc::parser::TransformParser<modc::parser::ParserRef<modc::astParser::OneOfKeywordsToTParser<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Style> ><modc::astParser::TokenParserInput<modc::parser::ParserRef<modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser<modc::parser::ParserRef<modc::parser::Parser<modc::astParser::TokenParserInput, modc::ast::Expression> > ><modc::astParser::ListParserTemplate<(modc::tokens::Token::Type)4, &modc::tokens::{unnamed type#1}::parenthesized>::Parser::Annotation::Relationship> >, modc::parser::ExactElementParser> >, modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}> >, false> >(modc::astParser::{lambda(modc::astParser::Loc, modc::parser::RepeatedParser, modc::Maybe<modc::parser::Parser>&&)#21}&&, (modc::parser::ExtractParserType<modc::astParser::LocatedParser<modc::parser::ParserRef<modc::astParser::{lambda(modc::astParser::TokenParserInput&)#1}> > >&&)...)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index a43dd3d..b108430 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,192 @@
+2012-05-19 Alan Modra <amodra@gmail.com>
+
+ * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
+ (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
+
+2012-05-18 Alan Modra <amodra@gmail.com>
+
+ * ia64-opc.c: Remove #include "ansidecl.h".
+ * z8kgen.c: Include sysdep.h first.
+
+ * arc-dis.c: Include sysdep.h first, remove some redundant includes.
+ * bfin-dis.c: Likewise.
+ * i860-dis.c: Likewise.
+ * ia64-dis.c: Likewise.
+ * ia64-gen.c: Likewise.
+ * m68hc11-dis.c: Likewise.
+ * mmix-dis.c: Likewise.
+ * msp430-dis.c: Likewise.
+ * or32-dis.c: Likewise.
+ * rl78-dis.c: Likewise.
+ * rx-dis.c: Likewise.
+ * tic4x-dis.c: Likewise.
+ * tilegx-opc.c: Likewise.
+ * tilepro-opc.c: Likewise.
+ * rx-decode.c: Regenerate.
+
+2012-05-17 James Lemke <jwlemke@codesourcery.com>
+
+ * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
+
+2012-05-17 James Lemke <jwlemke@codesourcery.com>
+
+ * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
+
+2012-05-17 Daniel Richard G. <skunk@iskunk.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14072
+ * configure.in: Add check that sysdep.h has been included before
+ any system header files.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * sysdep.h: Generate an error if included before config.h.
+ * alpha-opc.c: Include sysdep.h before any other header file.
+ * alpha-dis.c: Likewise.
+ * avr-dis.c: Likewise.
+ * cgen-opc.c: Likewise.
+ * cr16-dis.c: Likewise.
+ * cris-dis.c: Likewise.
+ * crx-dis.c: Likewise.
+ * d10v-dis.c: Likewise.
+ * d10v-opc.c: Likewise.
+ * d30v-dis.c: Likewise.
+ * d30v-opc.c: Likewise.
+ * h8500-dis.c: Likewise.
+ * i370-dis.c: Likewise.
+ * i370-opc.c: Likewise.
+ * m10200-dis.c: Likewise.
+ * m10300-dis.c: Likewise.
+ * micromips-opc.c: Likewise.
+ * mips-opc.c: Likewise.
+ * mips61-opc.c: Likewise.
+ * moxie-dis.c: Likewise.
+ * or32-opc.c: Likewise.
+ * pj-dis.c: Likewise.
+ * ppc-dis.c: Likewise.
+ * ppc-opc.c: Likewise.
+ * s390-dis.c: Likewise.
+ * sh-dis.c: Likewise.
+ * sh64-dis.c: Likewise.
+ * sparc-dis.c: Likewise.
+ * sparc-opc.c: Likewise.
+ * spu-dis.c: Likewise.
+ * tic30-dis.c: Likewise.
+ * tic54x-dis.c: Likewise.
+ * tic80-dis.c: Likewise.
+ * tic80-opc.c: Likewise.
+ * tilegx-dis.c: Likewise.
+ * tilepro-dis.c: Likewise.
+ * v850-dis.c: Likewise.
+ * v850-opc.c: Likewise.
+ * vax-dis.c: Likewise.
+ * w65-dis.c: Likewise.
+ * xgate-dis.c: Likewise.
+ * xtensa-dis.c: Likewise.
+ * rl78-decode.opc: Likewise.
+ * rl78-decode.c: Regenerate.
+ * rx-decode.opc: Likewise.
+ * rx-decode.c: Regenerate.
+
+2012-05-17 Alan Modra <amodra@gmail.com>
+
+ * ppc_dis.c: Don't include elf/ppc.h.
+
+2012-05-16 Meador Inge <meadori@codesourcery.com>
+
+ * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
+ to PUSH/POP {reg}.
+
+2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
+ Stephane Carrez <stcarrez@nerim.fr>
+
+ * configure.in: Add S12X and XGATE co-processor support to m68hc11
+ target.
+ * disassemble.c: Likewise.
+ * configure: Regenerate.
+ * m68hc11-dis.c: Make objdump output more consistent, use hex
+ instead of decimal and use 0x prefix for hex.
+ * m68hc11-opc.c: Add S12X and XGATE opcodes.
+
+2012-05-14 James Lemke <jwlemke@codesourcery.com>
+
+ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
+ (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
+ (vle_opcd_indices): New array.
+ (lookup_vle): New function.
+ (disassemble_init_powerpc): Revise for second (VLE) opcode table.
+ (print_insn_powerpc): Likewise.
+ * ppc-opc.c: Likewise.
+
+2012-05-14 Catherine Moore <clm@codesourcery.com>
+ Maciej W. Rozycki <macro@codesourcery.com>
+ Rhonda Wittels <rhonda@codesourcery.com>
+ Nathan Froyd <froydnj@codesourcery.com>
+
+ * ppc-opc.c (insert_arx, extract_arx): New functions.
+ (insert_ary, extract_ary): New functions.
+ (insert_li20, extract_li20): New functions.
+ (insert_rx, extract_rx): New functions.
+ (insert_ry, extract_ry): New functions.
+ (insert_sci8, extract_sci8): New functions.
+ (insert_sci8n, extract_sci8n): New functions.
+ (insert_sd4h, extract_sd4h): New functions.
+ (insert_sd4w, extract_sd4w): New functions.
+ (insert_vlesi, extract_vlesi): New functions.
+ (insert_vlensi, extract_vlensi): New functions.
+ (insert_vleui, extract_vleui): New functions.
+ (insert_vleil, extract_vleil): New functions.
+ (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
+ (BI16, BI32, BO32, B8): New.
+ (B15, B24, CRD32, CRS): New.
+ (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
+ (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
+ (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
+ (SH6_MASK): Use PPC_OPSHIFT_INV.
+ (SI8, UI5, OIMM5, UI7, BO16): New.
+ (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
+ (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
+ (ALLOW8_SPRG): New.
+ (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
+ (OPVUP, OPVUP_MASK OPVUP): New
+ (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
+ (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
+ (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
+ (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
+ (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
+ (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
+ (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
+ (SE_IM5, SE_IM5_MASK): New.
+ (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
+ (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
+ (BO32DNZ, BO32DZ): New.
+ (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
+ (PPCVLE): New.
+ (powerpc_opcodes): Add new VLE instructions. Update existing
+ instruction to include PPCVLE if supported.
+ * ppc-dis.c (ppc_opts): Add vle entry.
+ (get_powerpc_dialect): New function.
+ (powerpc_init_dialect): VLE support.
+ (print_insn_big_powerpc): Call get_powerpc_dialect.
+ (print_insn_little_powerpc): Likewise.
+ (operand_value_powerpc): Handle negative shift counts.
+ (print_insn_powerpc): Handle 2-byte instruction lengths.
+
+2012-05-11 Daniel Richard G. <skunk@iskunk.org>
+
+ PR binutils/14028
+ * configure.in: Invoke ACX_HEADER_STRING.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * sysdep.h: If STRINGS_WITH_STRING is defined then include both
+ string.h and strings.h.
+
+2012-05-11 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/14006
+ * arm-dis.c (print_insn): Fix detection of instruction mode in
+ files containing multiple executable sections.
+
2012-05-03 Sean Keys <skeys@ipdatasys.com>
* Makefile.in, configure: regenerate
diff --git a/opcodes/alpha-dis.c b/opcodes/alpha-dis.c
index 00b552f..df37143 100644
--- a/opcodes/alpha-dis.c
+++ b/opcodes/alpha-dis.c
@@ -1,5 +1,5 @@
/* alpha-dis.c -- Disassemble Alpha AXP instructions
- Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2005, 2007
+ Copyright 1996, 1998, 1999, 2000, 2001, 2002, 2005, 2007, 2012
Free Software Foundation, Inc.
Contributed by Richard Henderson <rth@tamu.edu>,
patterned after the PPC opcode handling written by Ian Lance Taylor.
@@ -21,8 +21,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "dis-asm.h"
#include "opcode/alpha.h"
diff --git a/opcodes/alpha-opc.c b/opcodes/alpha-opc.c
index d8c7121..9cf00b0 100644
--- a/opcodes/alpha-opc.c
+++ b/opcodes/alpha-opc.c
@@ -1,6 +1,6 @@
/* alpha-opc.c -- Alpha AXP opcode list
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
+ 2012 Free Software Foundation, Inc.
Contributed by Richard Henderson <rth@cygnus.com>,
patterned after the PPC opcode handling written by Ian Lance Taylor.
@@ -21,8 +21,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/alpha.h"
#include "bfd.h"
#include "opintl.h"
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index ac7379d..0e16cde 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -20,13 +20,12 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "ansidecl.h"
+#include "sysdep.h"
#include "libiberty.h"
#include "dis-asm.h"
#include "opcode/arc.h"
#include "elf-bfd.h"
#include "elf/arc.h"
-#include <string.h>
#include "opintl.h"
#include <stdarg.h>
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 03062ad..e987140 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -1159,12 +1159,46 @@
{ARM_EXT_V1, 0x04300000, 0x0d700000, "ldrt%c\t%12-15R, %a"},
{ARM_EXT_V1, 0x04100000, 0x0c500000, "ldr%c\t%12-15r, %a"},
+ {ARM_EXT_V1, 0x092d0001, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0002, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0004, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0008, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0010, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0020, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0040, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0080, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0100, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0200, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0400, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d0800, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d1000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d2000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d4000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x092d8000, 0x0fffffff, "stmfd%c\t%16-19R!, %m"},
{ARM_EXT_V1, 0x092d0000, 0x0fff0000, "push%c\t%m"},
{ARM_EXT_V1, 0x08800000, 0x0ff00000, "stm%c\t%16-19R%21'!, %m%22'^"},
{ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
+
+ {ARM_EXT_V1, 0x08bd0001, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0002, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0004, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0008, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0010, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0020, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0040, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0080, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0100, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0200, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0400, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd0800, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd1000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd2000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd4000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
+ {ARM_EXT_V1, 0x08bd8000, 0x0fffffff, "ldmfd%c\t%16-19R!, %m"},
{ARM_EXT_V1, 0x08bd0000, 0x0fff0000, "pop%c\t%m"},
{ARM_EXT_V1, 0x08900000, 0x0f900000, "ldm%c\t%16-19R%21'!, %m%22'^"},
{ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
+
{ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
{ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
@@ -4697,9 +4731,19 @@
/* Start scanning at the start of the function, or wherever
we finished last time. */
- start = info->symtab_pos + 1;
- if (start < private_data->last_mapping_sym)
- start = private_data->last_mapping_sym;
+ /* PR 14006. When the address is 0 we are either at the start of the
+ very first function, or else the first function in a new, unlinked
+ executable section (eg because uf -ffunction-sections). Either way
+ start scanning from the beginning of the symbol table, not where we
+ left off last time. */
+ if (pc == 0)
+ start = 0;
+ else
+ {
+ start = info->symtab_pos + 1;
+ if (start < private_data->last_mapping_sym)
+ start = private_data->last_mapping_sym;
+ }
found = FALSE;
/* First, look for mapping symbols. */
diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c
index b895ad5..385b399 100644
--- a/opcodes/avr-dis.c
+++ b/opcodes/avr-dis.c
@@ -1,5 +1,5 @@
/* Disassemble AVR instructions.
- Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2008
+ Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2008, 2012
Free Software Foundation, Inc.
Contributed by Denis Chertykov <denisc@overta.ru>
@@ -21,8 +21,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <assert.h>
#include "sysdep.h"
+#include <assert.h>
#include "dis-asm.h"
#include "opintl.h"
#include "libiberty.h"
diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index 7470ebd..5022228 100644
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -1,5 +1,5 @@
/* Disassemble ADI Blackfin Instructions.
- Copyright 2005, 2006, 2007, 2008, 2009, 2010, 2011
+ Copyright 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
This file is part of libopcodes.
@@ -19,9 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
#include "opcode/bfin.h"
diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c
index 263eb2c..b0405cc 100644
--- a/opcodes/cgen-opc.c
+++ b/opcodes/cgen-opc.c
@@ -1,7 +1,7 @@
/* CGEN generic opcode support.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2005, 2007, 2009
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2005, 2007, 2009,
+ 2012 Free Software Foundation, Inc.
This file is part of libopcodes.
@@ -19,8 +19,8 @@
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-#include "alloca-conf.h"
#include "sysdep.h"
+#include "alloca-conf.h"
#include <stdio.h>
#include "ansidecl.h"
#include "libiberty.h"
diff --git a/opcodes/config.in b/opcodes/config.in
index fab2a51..7b97957 100644
--- a/opcodes/config.in
+++ b/opcodes/config.in
@@ -1,5 +1,12 @@
/* config.in. Generated from configure.in by autoheader. */
+/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1
+
/* Define to 1 if translation of program messages to the user's native
language is requested. */
#undef ENABLE_NLS
@@ -73,6 +80,9 @@
/* Define to 1 if you have the ANSI C header files. */
#undef STDC_HEADERS
+/* Define if you can safely include both <string.h> and <strings.h>. */
+#undef STRING_WITH_STRINGS
+
/* Enable extensions on AIX 3, Interix. */
#ifndef _ALL_SOURCE
# undef _ALL_SOURCE
diff --git a/opcodes/configure b/opcodes/configure
index ec74346..dbfca48 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -11565,6 +11565,9 @@
ac_config_headers="$ac_config_headers config.h:config.in"
+# PR 14072
+
+
if test -z "$target" ; then
as_fn_error "Unrecognized target system type; please check config.sub." "$LINENO" 5
fi
@@ -12089,6 +12092,38 @@
done
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether string.h and strings.h may both be included" >&5
+$as_echo_n "checking whether string.h and strings.h may both be included... " >&6; }
+if test "${gcc_cv_header_string+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include <string.h>
+#include <strings.h>
+int
+main ()
+{
+
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ gcc_cv_header_string=yes
+else
+ gcc_cv_header_string=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_header_string" >&5
+$as_echo "$gcc_cv_header_string" >&6; }
+if test $gcc_cv_header_string = yes; then
+
+$as_echo "#define STRING_WITH_STRINGS 1" >>confdefs.h
+
+fi
+
ac_fn_c_check_decl "$LINENO" "basename" "ac_cv_have_decl_basename" "$ac_includes_default"
if test "x$ac_cv_have_decl_basename" = x""yes; then :
@@ -12436,6 +12471,8 @@
bfd_m32r_arch) ta="$ta m32r-asm.lo m32r-desc.lo m32r-dis.lo m32r-ibld.lo m32r-opc.lo m32r-opinst.lo" using_cgen=yes ;;
bfd_m68hc11_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68hc12_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
+ bfd_m9s12x_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
+ bfd_m9s12xg_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;;
bfd_m88k_arch) ta="$ta m88k-dis.lo" ;;
bfd_mcore_arch) ta="$ta mcore-dis.lo" ;;
diff --git a/opcodes/configure.in b/opcodes/configure.in
index 999379a..dadfe4a 100644
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -45,6 +45,15 @@
AC_CONFIG_HEADERS(config.h:config.in)
+# PR 14072
+AH_VERBATIM([00_CONFIG_H_CHECK],
+[/* Check that config.h is #included before system headers
+ (this works only for glibc, but that should be enough). */
+#if defined(__GLIBC__) && !defined(__CONFIG_H__)
+# error config.h must be #included before system headers
+#endif
+#define __CONFIG_H__ 1])
+
if test -z "$target" ; then
AC_MSG_ERROR(Unrecognized target system type; please check config.sub.)
fi
@@ -67,6 +76,7 @@
AC_PROG_INSTALL
AC_CHECK_HEADERS(string.h strings.h stdlib.h limits.h)
+ACX_HEADER_STRING
AC_CHECK_DECLS([basename, stpcpy])
@@ -250,6 +260,8 @@
bfd_m32r_arch) ta="$ta m32r-asm.lo m32r-desc.lo m32r-dis.lo m32r-ibld.lo m32r-opc.lo m32r-opinst.lo" using_cgen=yes ;;
bfd_m68hc11_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68hc12_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
+ bfd_m9s12x_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
+ bfd_m9s12xg_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;;
bfd_m88k_arch) ta="$ta m88k-dis.lo" ;;
bfd_mcore_arch) ta="$ta mcore-dis.lo" ;;
diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index 1fc8c2b..f299fef 100644
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -18,8 +18,8 @@
along with this program; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-#include "dis-asm.h"
#include "sysdep.h"
+#include "dis-asm.h"
#include "opcode/cr16.h"
#include "libiberty.h"
diff --git a/opcodes/cris-dis.c b/opcodes/cris-dis.c
index 01ada9d..64e8e1d 100644
--- a/opcodes/cris-dis.c
+++ b/opcodes/cris-dis.c
@@ -1,5 +1,5 @@
/* Disassembler code for CRIS.
- Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009
+ Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, 2012
Free Software Foundation, Inc.
Contributed by Axis Communications AB, Lund, Sweden.
Written by Hans-Peter Nilsson.
@@ -21,8 +21,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "dis-asm.h"
#include "sysdep.h"
+#include "dis-asm.h"
#include "opcode/cris.h"
#include "libiberty.h"
diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c
index 35168bc..710a96e 100644
--- a/opcodes/crx-dis.c
+++ b/opcodes/crx-dis.c
@@ -20,8 +20,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "dis-asm.h"
#include "sysdep.h"
+#include "dis-asm.h"
#include "opcode/crx.h"
/* String to print when opcode was not matched. */
diff --git a/opcodes/d10v-dis.c b/opcodes/d10v-dis.c
index dbedb3d..4e601b7 100644
--- a/opcodes/d10v-dis.c
+++ b/opcodes/d10v-dis.c
@@ -1,5 +1,5 @@
/* Disassemble D10V instructions.
- Copyright 1996, 1997, 1998, 2000, 2001, 2005, 2007
+ Copyright 1996, 1997, 1998, 2000, 2001, 2005, 2007, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,9 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
-
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/d10v.h"
#include "dis-asm.h"
diff --git a/opcodes/d10v-opc.c b/opcodes/d10v-opc.c
index f99d66a..8df62cb 100644
--- a/opcodes/d10v-opc.c
+++ b/opcodes/d10v-opc.c
@@ -1,5 +1,5 @@
/* d10v-opc.c -- D10V opcode list
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005, 2007
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005, 2007, 2012
Free Software Foundation, Inc.
Written by Martin Hunt, Cygnus Support
@@ -20,8 +20,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/d10v.h"
diff --git a/opcodes/d30v-dis.c b/opcodes/d30v-dis.c
index 5f5d07f..972d367 100644
--- a/opcodes/d30v-dis.c
+++ b/opcodes/d30v-dis.c
@@ -1,5 +1,5 @@
/* Disassemble D30V instructions.
- Copyright 1997, 1998, 2000, 2001, 2005, 2007
+ Copyright 1997, 1998, 2000, 2001, 2005, 2007, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/d30v.h"
#include "dis-asm.h"
#include "opintl.h"
diff --git a/opcodes/d30v-opc.c b/opcodes/d30v-opc.c
index 806fb3c..b7e35e5 100644
--- a/opcodes/d30v-opc.c
+++ b/opcodes/d30v-opc.c
@@ -1,5 +1,6 @@
/* d30v-opc.c -- D30V opcode list
- Copyright 1997, 1998, 1999, 2000, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1997, 1998, 1999, 2000, 2005, 2007, 2012
+ Free Software Foundation, Inc.
Written by Martin Hunt, Cygnus Support
This file is part of the GNU opcodes library.
@@ -19,8 +20,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/d30v.h"
/* This table is sorted.
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 7ff5f22..3dad64b 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -248,13 +248,20 @@
disassemble = print_insn_m32r;
break;
#endif
-#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
+#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
+ || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
case bfd_arch_m68hc11:
disassemble = print_insn_m68hc11;
break;
case bfd_arch_m68hc12:
disassemble = print_insn_m68hc12;
break;
+ case bfd_arch_m9s12x:
+ disassemble = print_insn_m9s12x;
+ break;
+ case bfd_arch_m9s12xg:
+ disassemble = print_insn_m9s12xg;
+ break;
#endif
#ifdef ARCH_m68k
case bfd_arch_m68k:
diff --git a/opcodes/h8500-dis.c b/opcodes/h8500-dis.c
index 1c9463a..880cc7f 100644
--- a/opcodes/h8500-dis.c
+++ b/opcodes/h8500-dis.c
@@ -1,5 +1,5 @@
/* Disassemble h8500 instructions.
- Copyright 1993, 1998, 2000, 2001, 2002, 2004, 2005, 2007
+ Copyright 1993, 1998, 2000, 2001, 2002, 2004, 2005, 2007, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,12 +19,12 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
#define DISASSEMBLER_TABLE
#define DEFINE_TABLE
-#include "sysdep.h"
#include "h8500-opc.h"
#include "dis-asm.h"
#include "opintl.h"
diff --git a/opcodes/i370-dis.c b/opcodes/i370-dis.c
index 98c110b..05a6341 100644
--- a/opcodes/i370-dis.c
+++ b/opcodes/i370-dis.c
@@ -1,5 +1,6 @@
/* i370-dis.c -- Disassemble Instruction 370 (ESA/390) instructions
- Copyright 1994, 2000, 2003, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1994, 2000, 2003, 2005, 2007, 2012
+ Free Software Foundation, Inc.
PowerPC version written by Ian Lance Taylor, Cygnus Support
Rewritten for i370 ESA/390 support by Linas Vepstas <linas@linas.org>
@@ -20,8 +21,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "dis-asm.h"
#include "opcode/i370.h"
diff --git a/opcodes/i370-opc.c b/opcodes/i370-opc.c
index e684ff4..68a8e01 100644
--- a/opcodes/i370-opc.c
+++ b/opcodes/i370-opc.c
@@ -1,5 +1,5 @@
/* i370-opc.c -- Instruction 370 (ESA/390) architecture opcode list
- Copyright 1994, 1999, 2000, 2001, 2003, 2005, 2007
+ Copyright 1994, 1999, 2000, 2001, 2003, 2005, 2007, 2012
Free Software Foundation, Inc.
PowerPC version written by Ian Lance Taylor, Cygnus Support
Rewritten for i370 ESA/390 support by Linas Vepstas <linas@linas.org> 1998, 1999
@@ -21,8 +21,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/i370.h"
/* This file holds the i370 opcode table. The opcode table
diff --git a/opcodes/i860-dis.c b/opcodes/i860-dis.c
index 65b74af..e772641 100644
--- a/opcodes/i860-dis.c
+++ b/opcodes/i860-dis.c
@@ -1,5 +1,5 @@
/* Disassembler for the i860.
- Copyright 2000, 2003, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 2000, 2003, 2005, 2007, 2012 Free Software Foundation, Inc.
Contributed by Jason Eckhardt <jle@cygnus.com>.
@@ -20,6 +20,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/i860.h"
diff --git a/opcodes/ia64-dis.c b/opcodes/ia64-dis.c
index 13ee194..bae99f0 100644
--- a/opcodes/ia64-dis.c
+++ b/opcodes/ia64-dis.c
@@ -1,5 +1,5 @@
/* ia64-dis.c -- Disassemble ia64 instructions
- Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2008, 2009
+ Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2008, 2009, 2012
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
@@ -20,8 +20,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
+#include "sysdep.h"
#include <assert.h>
-#include <string.h>
#include "dis-asm.h"
#include "opcode/ia64.h"
diff --git a/opcodes/ia64-gen.c b/opcodes/ia64-gen.c
index eefa81c..f6deca1 100644
--- a/opcodes/ia64-gen.c
+++ b/opcodes/ia64-gen.c
@@ -1,5 +1,5 @@
/* ia64-gen.c -- Generate a shrunk set of opcode tables
- Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009
+ Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009, 2012
Free Software Foundation, Inc.
Written by Bob Manson, Cygnus Solutions, <manson@cygnus.com>
@@ -34,14 +34,13 @@
The resource table is constructed based on some text dependency tables,
which are also easier to maintain than the final representation. */
+#include "sysdep.h"
#include <stdio.h>
#include <stdarg.h>
#include <errno.h>
-#include "ansidecl.h"
#include "libiberty.h"
#include "safe-ctype.h"
-#include "sysdep.h"
#include "getopt.h"
#include "ia64-opc.h"
#include "ia64-opc-a.c"
diff --git a/opcodes/ia64-opc.c b/opcodes/ia64-opc.c
index 539fa9b..359221b 100644
--- a/opcodes/ia64-opc.c
+++ b/opcodes/ia64-opc.c
@@ -1,5 +1,6 @@
/* ia64-opc.c -- Functions to access the compacted opcode table
- Copyright 1999, 2000, 2001, 2003, 2005, 2007, 2009 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2003, 2005, 2007, 2009, 2012
+ Free Software Foundation, Inc.
Written by Bob Manson of Cygnus Solutions, <manson@cygnus.com>
This file is part of the GNU opcodes library.
@@ -19,7 +20,6 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "ansidecl.h"
#include "sysdep.h"
#include "libiberty.h"
#include "ia64-asmtab.h"
diff --git a/opcodes/m10200-dis.c b/opcodes/m10200-dis.c
index 6c69c00..3d2dd83 100644
--- a/opcodes/m10200-dis.c
+++ b/opcodes/m10200-dis.c
@@ -1,5 +1,6 @@
/* Disassemble MN10200 instructions.
- Copyright 1996, 1997, 1998, 2000, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 2000, 2005, 2007, 2012
+ Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -18,9 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
-
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/mn10200.h"
#include "dis-asm.h"
#include "opintl.h"
diff --git a/opcodes/m10300-dis.c b/opcodes/m10300-dis.c
index 1ed50f1..3445fc2 100644
--- a/opcodes/m10300-dis.c
+++ b/opcodes/m10300-dis.c
@@ -1,5 +1,5 @@
/* Disassemble MN10300 instructions.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2005, 2007
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2005, 2007, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,9 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
-
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/mn10300.h"
#include "dis-asm.h"
#include "opintl.h"
diff --git a/opcodes/m68hc11-dis.c b/opcodes/m68hc11-dis.c
index f6d6184..99b272b 100644
--- a/opcodes/m68hc11-dis.c
+++ b/opcodes/m68hc11-dis.c
@@ -1,7 +1,8 @@
/* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
- Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
+ Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2012
Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
+ XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
This file is part of the GNU opcodes library.
@@ -20,23 +21,26 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
-#include "ansidecl.h"
#include "opcode/m68hc11.h"
#include "dis-asm.h"
#define PC_REGNUM 3
-static const char *const reg_name[] = {
+static const char *const reg_name[] =
+{
"X", "Y", "SP", "PC"
};
-static const char *const reg_src_table[] = {
+static const char *const reg_src_table[] =
+{
"A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
};
-static const char *const reg_dst_table[] = {
+static const char *const reg_dst_table[] =
+{
"A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
};
@@ -45,7 +49,7 @@
/* Prototypes for local functions. */
static int read_memory (bfd_vma, bfd_byte *, int, struct disassemble_info *);
static int print_indexed_operand (bfd_vma, struct disassemble_info *,
- int*, int, int, bfd_vma);
+ int*, int, int, bfd_vma, int);
static int print_insn (bfd_vma, struct disassemble_info *, int);
static int
@@ -71,7 +75,7 @@
static int
print_indexed_operand (bfd_vma memaddr, struct disassemble_info* info,
int* indirect, int mov_insn, int pc_offset,
- bfd_vma endaddr)
+ bfd_vma endaddr, int arch)
{
bfd_byte buffer[4];
int reg;
@@ -98,12 +102,14 @@
/* 68HC12 requires an adjustment for movb/movw pc relative modes. */
if (reg == PC_REGNUM && info->mach == bfd_mach_m6812 && mov_insn)
sval += pc_offset;
- (*info->fprintf_func) (info->stream, "%d,%s",
- (int) sval, reg_name[reg]);
+ (*info->fprintf_func) (info->stream, "0x%x,%s",
+ (unsigned short) sval, reg_name[reg]);
if (reg == PC_REGNUM)
{
(* info->fprintf_func) (info->stream, " {");
+ if (info->symtab_size > 0) /* Avoid duplicate 0x from core binutils. */
+ (*info->fprintf_func) (info->stream, "0x");
(* info->print_address_func) (endaddr + sval, info);
(* info->fprintf_func) (info->stream, "}");
}
@@ -128,7 +134,7 @@
mode = "+";
}
(*info->fprintf_func) (info->stream, "%d,%s%s%s",
- (int) sval,
+ (unsigned short) sval,
(buffer[0] & 0x10 ? "" : mode),
reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
}
@@ -136,12 +142,12 @@
/* [n,r] 16-bits offset indexed indirect. */
else if ((buffer[0] & 0x07) == 3)
{
- if (mov_insn)
- {
- (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
- buffer[0] & 0x0ff);
- return 0;
- }
+ if ((mov_insn) && (!(arch & cpu9s12x)))
+ {
+ (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
+ buffer[0] & 0x0ff);
+ return 0;
+ }
reg = (buffer[0] >> 3) & 0x03;
status = read_memory (memaddr + pos, &buffer[0], 2, info);
if (status != 0)
@@ -151,7 +157,7 @@
pos += 2;
sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
- (*info->fprintf_func) (info->stream, "[%u,%s]",
+ (*info->fprintf_func) (info->stream, "[0x%x,%s]",
sval & 0x0ffff, reg_name[reg]);
if (indirect)
*indirect = 1;
@@ -160,12 +166,13 @@
/* n,r with 9 and 16 bit signed constant. */
else if ((buffer[0] & 0x4) == 0)
{
- if (mov_insn)
- {
- (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
- buffer[0] & 0x0ff);
- return 0;
- }
+ if ((mov_insn) && (!(arch & cpu9s12x)))
+ {
+ (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
+ buffer[0] & 0x0ff);
+ return 0;
+ }
+
reg = (buffer[0] >> 3) & 0x03;
status = read_memory (memaddr + pos,
&buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
@@ -188,11 +195,11 @@
pos++;
endaddr++;
}
- (*info->fprintf_func) (info->stream, "%d,%s",
- (int) sval, reg_name[reg]);
+ (*info->fprintf_func) (info->stream, "0x%x,%s",
+ (unsigned short) sval, reg_name[reg]);
if (reg == PC_REGNUM)
{
- (* info->fprintf_func) (info->stream, " {");
+ (* info->fprintf_func) (info->stream, " {0x");
(* info->print_address_func) (endaddr + sval, info);
(* info->fprintf_func) (info->stream, "}");
}
@@ -230,18 +237,114 @@
{
int status;
bfd_byte buffer[4];
- unsigned char code;
+ unsigned int code;
long format, pos, i;
short sval;
const struct m68hc11_opcode *opcode;
+ if (arch & cpuxgate)
+ {
+ int val;
+ /* Get two bytes as all XGATE instructions are 16bit. */
+ status = read_memory (memaddr, buffer, 2, info);
+ if (status != 0)
+ return status;
+
+ format = 0;
+ code = (buffer[0] << 8) + buffer[1];
+
+ /* Scan the opcode table until we find the opcode
+ with the corresponding page. */
+ opcode = m68hc11_opcodes;
+ for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
+ {
+ if ((opcode->opcode != (code & opcode->xg_mask)) || (opcode->arch != cpuxgate))
+ continue;
+ /* We have found the opcode. Extract the operand and print it. */
+ (*info->fprintf_func) (info->stream, "%s", opcode->name);
+ format = opcode->format;
+ if (format & (M68XG_OP_NONE))
+ {
+ /* Nothing to print. */
+ }
+ else if (format & M68XG_OP_IMM3)
+ (*info->fprintf_func) (info->stream, " #0x%x", (code >> 8) & 0x7);
+ else if (format & M68XG_OP_R_R)
+ (*info->fprintf_func) (info->stream, " R%x, R%x",
+ (code >> 8) & 0x7, (code >> 5) & 0x7);
+ else if (format & M68XG_OP_R_R_R)
+ (*info->fprintf_func) (info->stream, " R%x, R%x, R%x",
+ (code >> 8) & 0x7, (code >> 5) & 0x7, (code >> 2) & 0x7);
+ else if (format & M68XG_OP_RD_RB_RI)
+ (*info->fprintf_func) (info->stream, " R%x, (R%x, R%x)",
+ (code >> 8) & 0x7, (code >> 5) & 0x7, (code >> 2) & 0x7);
+ else if (format & M68XG_OP_RD_RB_RIp)
+ (*info->fprintf_func) (info->stream, " R%x, (R%x, R%x+)",
+ (code >> 8) & 0x7, (code >> 5) & 0x7, (code >> 2) & 0x7);
+ else if (format & M68XG_OP_RD_RB_mRI)
+ (*info->fprintf_func) (info->stream, " R%x, (R%x, -R%x)",
+ (code >> 8) & 0x7, (code >> 5) & 0x7, (code >> 2) & 0x7);
+ else if (format & M68XG_OP_R_R_OFFS5)
+ (*info->fprintf_func) (info->stream, " R%x, (R%x, #0x%x)",
+ (code >> 8) & 0x7, (code >> 5) & 0x7, code & 0x1f);
+ else if (format & M68XG_OP_R_IMM8)
+ (*info->fprintf_func) (info->stream, " R%x, #0x%02x",
+ (code >> 8) & 0x7, code & 0xff);
+ else if (format & M68XG_OP_R_IMM4)
+ (*info->fprintf_func) (info->stream, " R%x, #0x%x",
+ (code >> 8) & 0x7, (code & 0xf0) >> 4);
+ else if (format & M68XG_OP_REL9)
+ {
+ (*info->fprintf_func) (info->stream, " 0x");
+ val = (buffer[0] & 0x1) ? buffer[1] | 0xFFFFFF00 : buffer[1];
+ (*info->print_address_func) (memaddr + (val << 1) + 2, info);
+ }
+ else if (format & M68XG_OP_REL10)
+ {
+ (*info->fprintf_func) (info->stream, " 0x");
+ val = (buffer[0] << 8) | (unsigned int) buffer[1];
+ if (val & 0x200)
+ val |= 0xfffffc00;
+ else
+ val &= 0x000001ff;
+ (*info->print_address_func) (memaddr + (val << 1) + 2, info);
+ }
+ else if ((code & 0x00ff) == 0x00f8)
+ (*info->fprintf_func) (info->stream, " R%x, CCR", (code >> 8) & 0x7);
+ else if ((code & 0x00ff) == 0x00f9)
+ (*info->fprintf_func) (info->stream, " CCR, R%x", (code >> 8) & 0x7);
+ else if ((code & 0x00ff) == 0x0)
+ (*info->fprintf_func) (info->stream, " R%x, PC", (code >> 8) & 0x7);
+ else if (format & M68XG_OP_R)
+ {
+ /* Special cases for TFR. */
+ if ((code & 0xf8ff) == 0x00f8)
+ (*info->fprintf_func) (info->stream, " R%x, CCR", (code >> 8) & 0x7);
+ else if ((code & 0xf8ff) == 0x00f9)
+ (*info->fprintf_func) (info->stream, " CCR, R%x", (code >> 8) & 0x7);
+ else if ((code & 0xf8ff) == 0x00fa)
+ (*info->fprintf_func) (info->stream, " R%x, PC", (code >> 8) & 0x7);
+ else
+ (*info->fprintf_func) (info->stream, " R%x", (code >> 8) & 0x7);
+ }
+ else
+ /* Opcode not recognized. */
+ (*info->fprintf_func) (info->stream, "Not yet handled TEST .byte\t0x%04x", code);
+ return 2;
+ }
+
+ /* Opcode not recognized. */
+ (*info->fprintf_func) (info->stream, ".byte\t0x%04x", code);
+ return 2; /* Everything is two bytes. */
+ }
+
+ /* HC11 and HC12. */
+
/* Get first byte. Only one at a time because we don't know the
size of the insn. */
status = read_memory (memaddr, buffer, 1, info);
if (status != 0)
- {
- return status;
- }
+ return status;
format = 0;
code = buffer[0];
@@ -269,13 +372,11 @@
{
status = read_memory (memaddr + pos, &buffer[1], 1, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+
code = buffer[1];
}
-
/* Look first for a 68HC12 alias. All of them are 2-bytes long and
in page 1. There is no operand to print. We read the second byte
only when we have a possible match. */
@@ -374,6 +475,10 @@
&& (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
&& ((buffer[0] & 0x0f0) <= 0x20))
break;
+ if ((opcode[j].format & M6812_OP_SEX_MARKER)
+ && (arch & cpu9s12x)
+ && ((buffer[0] == 0x4d) || (buffer[0] == 0x4e)))
+ break;
if (opcode[j].format & M6812_OP_TFR_MARKER
&& !(buffer[0] & 0x80))
break;
@@ -393,73 +498,107 @@
}
/* The movb and movw must be handled in a special way...
- The source constant 'ii' is not always at the same place.
- This is the same for the destination for the post-indexed byte.
- The 'offset' is used to do the appropriate correction.
+ The source constant 'ii' is not always at the same place.
+ This is the same for the destination for the post-indexed byte.
+ The 'offset' is used to do the appropriate correction.
- offset offset
- for constant for destination
- movb 18 OB ii hh ll 0 0
- 18 08 xb ii 1 -1
- 18 0C hh ll hh ll 0 0
- 18 09 xb hh ll 1 -1
- 18 0D xb hh ll 0 0
- 18 0A xb xb 0 0
+ offset offset
+ for constant for destination
+ movb 18 OB ii hh ll 0 0
+ 18 08 xb ii 1 -1
+ 18 08 xb ff ii 2 1 9 bit
+ 18 08 xb ee ff ii 3 1 16 bit
+ 18 0C hh ll hh ll 0 0
+ 18 09 xb hh ll 1 -1
+ 18 0D xb hh ll 0 0
+ 18 0A xb xb 0 0
- movw 18 03 jj kk hh ll 0 0
- 18 00 xb jj kk 1 -1
- 18 04 hh ll hh ll 0 0
- 18 01 xb hh ll 1 -1
- 18 05 xb hh ll 0 0
- 18 02 xb xb 0 0
+ movw 18 03 jj kk hh ll 0 0
+ 18 00 xb jj kk 1 -1
+ 18 04 hh ll hh ll 0 0
+ 18 01 xb hh ll 1 -1
+ 18 05 xb hh ll 0 0
+ 18 02 xb xb 0 0
- After the source operand is read, the position 'pos' is incremented
- this explains the negative offset for destination.
+ After the source operand is read, the position 'pos' is incremented
+ this explains the negative offset for destination.
- movb/movw above are the only instructions with this matching
- format. */
+ movb/movw above are the only instructions with this matching
+ format. */
offset = ((format & M6812_OP_IDX_P2)
- && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
- M6811_OP_IND16)));
+ && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
+ M6811_OP_IND16)));
- /* Operand with one more byte: - immediate, offset,
- direct-low address. */
- if (format &
- (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
+ if (offset)
{
- status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
+ /* Check xb to see position of data. */
+ status = read_memory (memaddr + pos, &buffer[0], 1, info);
if (status != 0)
{
return status;
}
+ if (((buffer[0] & 0xe0) == 0xe0) && ((buffer[0] & 0x04) == 0))
+ {
+ /* 9 or 16 bit. */
+ if ((buffer[0] & 0x02) == 0)
+ {
+ /* 9 bit. */
+ offset = 2;
+ }
+ else
+ {
+ /* 16 bit. */
+ offset = 3;
+ }
+ }
+ }
+
+ /* Operand with one more byte: - immediate, offset,
+ direct-low address. */
+ if (format &
+ (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
+ {
+ status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
+ if (status != 0)
+ return status;
+
+ /* This movb/movw is special (see above). */
+ if (offset < 2)
+ {
+ offset = -offset;
+ pc_dst_offset = 2;
+ }
+ else
+ {
+ offset = -1;
+ pc_dst_offset = 5;
+ }
pos++;
- /* This movb/movw is special (see above). */
- offset = -offset;
-
- pc_dst_offset = 2;
if (format & M6811_OP_IMM8)
{
- (*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
+ (*info->fprintf_func) (info->stream, "#0x%x", (int) buffer[0]);
format &= ~M6811_OP_IMM8;
- /* Set PC destination offset. */
- pc_dst_offset = 1;
+ /* Set PC destination offset. */
+ pc_dst_offset = 1;
}
else if (format & M6811_OP_IX)
{
/* Offsets are in range 0..255, print them unsigned. */
- (*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
+ (*info->fprintf_func) (info->stream, "0x%x,x", buffer[0] & 0x0FF);
format &= ~M6811_OP_IX;
}
else if (format & M6811_OP_IY)
{
- (*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
+ (*info->fprintf_func) (info->stream, "0x%x,y", buffer[0] & 0x0FF);
format &= ~M6811_OP_IY;
}
else if (format & M6811_OP_DIRECT)
{
(*info->fprintf_func) (info->stream, "*");
+ if (info->symtab_size > 0) /* Avoid duplicate 0x. */
+ (*info->fprintf_func) (info->stream, "0x");
(*info->print_address_func) (buffer[0] & 0x0FF, info);
format &= ~M6811_OP_DIRECT;
}
@@ -470,27 +609,26 @@
/* Analyze the 68HC12 indexed byte. */
if (format & M6812_INDEXED_FLAGS)
{
- int indirect;
- bfd_vma endaddr;
+ int indirect;
+ bfd_vma endaddr;
- endaddr = memaddr + pos + 1;
- if (format & M6811_OP_IND16)
- endaddr += 2;
- pc_src_offset = -1;
- pc_dst_offset = 1;
+ endaddr = memaddr + pos + 1;
+ if (format & M6811_OP_IND16)
+ endaddr += 2;
+ pc_src_offset = -1;
+ pc_dst_offset = 1;
status = print_indexed_operand (memaddr + pos, info, &indirect,
- (format & M6812_DST_MOVE),
- pc_src_offset, endaddr);
+ (format & M6812_DST_MOVE),
+ pc_src_offset, endaddr, arch);
if (status < 0)
- {
- return status;
- }
+ return status;
+
pos += status;
- /* The indirect addressing mode of the call instruction does
- not need the page code. */
- if ((format & M6812_OP_PAGE) && indirect)
- format &= ~M6812_OP_PAGE;
+ /* The indirect addressing mode of the call instruction does
+ not need the page code. */
+ if ((format & M6812_OP_PAGE) && indirect)
+ format &= ~M6812_OP_PAGE;
}
/* 68HC12 dbcc/ibcc/tbcc operands. */
@@ -498,9 +636,8 @@
{
status = read_memory (memaddr + pos, &buffer[0], 2, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+
(*info->fprintf_func) (info->stream, "%s,",
reg_src_table[buffer[0] & 0x07]);
sval = buffer[1] & 0x0ff;
@@ -508,6 +645,7 @@
sval |= 0xff00;
pos += 2;
+ (*info->fprintf_func) (info->stream, "0x");
(*info->print_address_func) (memaddr + pos + sval, info);
format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
}
@@ -515,9 +653,7 @@
{
status = read_memory (memaddr + pos, &buffer[0], 1, info);
if (status != 0)
- {
- return status;
- }
+ return status;
pos++;
(*info->fprintf_func) (info->stream, "%s,%s",
@@ -528,14 +664,13 @@
if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
{
int val;
- bfd_vma addr;
- unsigned page = 0;
+ bfd_vma addr;
+ unsigned page = 0;
status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+
if (format & M6812_OP_IDX_P2)
offset = -2;
else
@@ -544,64 +679,71 @@
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
val &= 0x0FFFF;
- addr = val;
- pc_dst_offset = 2;
- if (format & M6812_OP_PAGE)
- {
- status = read_memory (memaddr + pos + offset, buffer, 1, info);
- if (status != 0)
- return status;
+ addr = val;
+ pc_dst_offset = 2;
+ if (format & M6812_OP_PAGE)
+ {
+ status = read_memory (memaddr + pos + offset, buffer, 1, info);
+ if (status != 0)
+ return status;
- page = (unsigned) buffer[0];
- if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
- addr = ((val - M68HC12_BANK_BASE)
- | (page << M68HC12_BANK_SHIFT))
- + M68HC12_BANK_VIRT;
- }
- else if ((arch & cpu6812)
- && addr >= M68HC12_BANK_BASE && addr < 0x0c000)
- {
- int cur_page;
- bfd_vma vaddr;
+ page = (unsigned) buffer[0];
+ if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
+ addr = ((val - M68HC12_BANK_BASE)
+ | (page << M68HC12_BANK_SHIFT))
+ + M68HC12_BANK_VIRT;
+ }
+ else if ((arch & cpu6812)
+ && addr >= M68HC12_BANK_BASE && addr < 0x0c000)
+ {
+ int cur_page;
+ bfd_vma vaddr;
- if (memaddr >= M68HC12_BANK_VIRT)
- cur_page = ((memaddr - M68HC12_BANK_VIRT)
- >> M68HC12_BANK_SHIFT);
- else
- cur_page = 0;
+ if (memaddr >= M68HC12_BANK_VIRT)
+ cur_page = ((memaddr - M68HC12_BANK_VIRT)
+ >> M68HC12_BANK_SHIFT);
+ else
+ cur_page = 0;
- vaddr = ((addr - M68HC12_BANK_BASE)
- + (cur_page << M68HC12_BANK_SHIFT))
- + M68HC12_BANK_VIRT;
- if (!info->symbol_at_address_func (addr, info)
- && info->symbol_at_address_func (vaddr, info))
- addr = vaddr;
- }
+ vaddr = ((addr - M68HC12_BANK_BASE)
+ + (cur_page << M68HC12_BANK_SHIFT))
+ + M68HC12_BANK_VIRT;
+ if (!info->symbol_at_address_func (addr, info)
+ && info->symbol_at_address_func (vaddr, info))
+ addr = vaddr;
+ }
if (format & M6811_OP_IMM16)
{
format &= ~M6811_OP_IMM16;
(*info->fprintf_func) (info->stream, "#");
}
else
- format &= ~M6811_OP_IND16;
+ {
+ format &= ~M6811_OP_IND16;
+ }
+
+ if (info->symtab_size > 0) /* Avoid duplicate 0x from core binutils. */
+ (*info->fprintf_func) (info->stream, "0x");
(*info->print_address_func) (addr, info);
- if (format & M6812_OP_PAGE)
- {
- (* info->fprintf_func) (info->stream, " {");
- (* info->print_address_func) (val, info);
- (* info->fprintf_func) (info->stream, ", %d}", page);
- format &= ~M6812_OP_PAGE;
- pos += 1;
- }
+ if (format & M6812_OP_PAGE)
+ {
+ (* info->fprintf_func) (info->stream, " {");
+ if (info->symtab_size > 0) /* Avoid duplicate 0x from core binutils. */
+ (*info->fprintf_func) (info->stream, "0x");
+ (* info->print_address_func) (val, info);
+ (* info->fprintf_func) (info->stream, ", 0x%x}", page);
+ format &= ~M6812_OP_PAGE;
+ pos += 1;
+ }
}
if (format & M6812_OP_IDX_P2)
{
(*info->fprintf_func) (info->stream, ", ");
status = print_indexed_operand (memaddr + pos + offset, info,
- 0, 1, pc_dst_offset,
- memaddr + pos + offset + 1);
+ 0, 1, pc_dst_offset,
+ memaddr + pos + offset + 1, arch);
if (status < 0)
return status;
pos += status;
@@ -615,30 +757,30 @@
status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+
pos += 2;
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
val &= 0x0FFFF;
+ if (info->symtab_size > 0) /* Avoid duplicate 0x from core binutils. */
+ (*info->fprintf_func) (info->stream, "0x");
(*info->print_address_func) (val, info);
}
/* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
- and in that order. The brset/brclr insn have a bitmask and then
- a relative branch offset. */
+ and in that order. The brset/brclr insn have a bitmask and then
+ a relative branch offset. */
if (format & M6811_OP_BITMASK)
{
status = read_memory (memaddr + pos, &buffer[0], 1, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+
pos++;
- (*info->fprintf_func) (info->stream, " #$%02x%s",
+ (*info->fprintf_func) (info->stream, ", #0x%02x%s",
buffer[0] & 0x0FF,
- (format & M6811_OP_JUMP_REL ? " " : ""));
+ (format & M6811_OP_JUMP_REL ? ", " : ""));
format &= ~M6811_OP_BITMASK;
}
if (format & M6811_OP_JUMP_REL)
@@ -647,10 +789,9 @@
status = read_memory (memaddr + pos, &buffer[0], 1, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+ (*info->fprintf_func) (info->stream, "0x");
pos++;
val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
(*info->print_address_func) (memaddr + pos + val, info);
@@ -662,15 +803,14 @@
status = read_memory (memaddr + pos, &buffer[0], 2, info);
if (status != 0)
- {
- return status;
- }
+ return status;
pos += 2;
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
if (val & 0x8000)
val |= 0xffff0000;
+ (*info->fprintf_func) (info->stream, "0x");
(*info->print_address_func) (memaddr + pos + val, info);
format &= ~M6812_OP_JUMP_REL16;
}
@@ -681,28 +821,24 @@
status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
if (status != 0)
- {
- return status;
- }
+ return status;
+
pos += 1;
val = buffer[0] & 0x0ff;
- (*info->fprintf_func) (info->stream, ", %d", val);
+ (*info->fprintf_func) (info->stream, ", 0x%x", val);
}
#ifdef DEBUG
/* Consistency check. 'format' must be 0, so that we have handled
- all formats; and the computed size of the insn must match the
- opcode table content. */
+ all formats; and the computed size of the insn must match the
+ opcode table content. */
if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
- {
- (*info->fprintf_func) (info->stream, "; Error, format: %lx", format);
- }
+ (*info->fprintf_func) (info->stream, "; Error, format: %lx", format);
+
if (pos != opcode->size)
- {
- (*info->fprintf_func) (info->stream, "; Error, size: %ld expect %d",
- pos, opcode->size);
- }
+ (*info->fprintf_func) (info->stream, "; Error, size: %ld expect %d",
+ pos, opcode->size);
#endif
return pos;
}
@@ -710,7 +846,7 @@
/* Opcode not recognized. */
if (format == M6811_OP_PAGE2 && arch & cpu6812
&& ((code >= 0x30 && code <= 0x39) || (code >= 0x40)))
- (*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
+ (*info->fprintf_func) (info->stream, "trap\t#0x%02x", code & 0x0ff);
else if (format == M6811_OP_PAGE2)
(*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
@@ -740,3 +876,15 @@
{
return print_insn (memaddr, info, cpu6812);
}
+
+int
+print_insn_m9s12x (bfd_vma memaddr, struct disassemble_info* info)
+{
+ return print_insn (memaddr, info, cpu6812|cpu9s12x);
+}
+
+int
+print_insn_m9s12xg (bfd_vma memaddr, struct disassemble_info* info)
+{
+ return print_insn (memaddr, info, cpuxgate);
+}
diff --git a/opcodes/m68hc11-opc.c b/opcodes/m68hc11-opc.c
index ac6259d..79c1d27 100644
--- a/opcodes/m68hc11-opc.c
+++ b/opcodes/m68hc11-opc.c
@@ -1,6 +1,9 @@
-/* m68hc11-opc.c -- Motorola 68HC11 & 68HC12 opcode list
- Copyright 1999, 2000, 2002, 2005, 2007 Free Software Foundation, Inc.
+/* m68hc11-opc.c -- Motorola 68HC11, 68HC12, 9S12X and XGATE opcode list
+ Copyright 1999, 2000, 2002, 2005, 2007, 2012
+ Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
+ XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
+ Note: min/max cycles not updated for S12X opcodes.
This file is part of the GNU opcodes library.
@@ -103,956 +106,1611 @@
#define OP_IBNE_MARKER (M6812_OP_IBCC_MARKER)
/*
- { "test", OP_NONE, 1, 0x00, 5, _M, CHG_NONE, cpu6811 },
- +-- cpu
+ { "test", OP_NONE, 1, 0x00, 5, _M, CHG_NONE, cpu6811, 0 },
+ +-- cpu +-- XGATE opcode mask
Name -+ +------- Insn CCR changes
Format ------+ +----------- Max # cycles
Size --------------------+ +--------------- Min # cycles
+--------------------- Opcode
*/
const struct m68hc11_opcode m68hc11_opcodes[] = {
- { "aba", OP_NONE, 1, 0x1b, 2, 2, CHG_HNZVC, cpu6811 },
- { "aba", OP_NONE | OP_PAGE2,2, 0x06, 2, 2, CHG_HNZVC, cpu6812 },
- { "abx", OP_NONE, 1, 0x3a, 3, 3, CHG_NONE, cpu6811 },
- { "aby", OP_NONE | OP_PAGE2,2, 0x3a, 4, 4, CHG_NONE, cpu6811 },
+ { "aba", OP_NONE, 1, 0x1b, 2, 2, CHG_HNZVC, cpu6811, 0 },
+ { "aba", OP_NONE | OP_PAGE2,2, 0x06, 2, 2, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "abx", OP_NONE, 1, 0x3a, 3, 3, CHG_NONE, cpu6811, 0 },
+ { "aby", OP_NONE | OP_PAGE2,2, 0x3a, 4, 4, CHG_NONE, cpu6811, 0 },
- { "adca", OP_IMM8, 2, 0x89, 1, 1, CHG_HNZVC, cpu6811|cpu6812 },
- { "adca", OP_DIRECT, 2, 0x99, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "adca", OP_IND16, 3, 0xb9, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "adca", OP_IX, 2, 0xa9, 4, 4, CHG_HNZVC, cpu6811 },
- { "adca", OP_IY | OP_PAGE2, 3, 0xa9, 5, 5, CHG_HNZVC, cpu6811 },
- { "adca", OP_IDX, 2, 0xa9, 3, 3, CHG_HNZVC, cpu6812 },
- { "adca", OP_IDX_1, 3, 0xa9, 3, 3, CHG_HNZVC, cpu6812 },
- { "adca", OP_IDX_2, 4, 0xa9, 4, 4, CHG_HNZVC, cpu6812 },
- { "adca", OP_D_IDX, 2, 0xa9, 6, 6, CHG_HNZVC, cpu6812 },
- { "adca", OP_D_IDX_2, 4, 0xa9, 6, 6, CHG_HNZVC, cpu6812 },
+ { "adca", OP_IMM8, 2, 0x89, 1, 1, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adca", OP_DIRECT, 2, 0x99, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adca", OP_IND16, 3, 0xb9, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adca", OP_IX, 2, 0xa9, 4, 4, CHG_HNZVC, cpu6811, 0 },
+ { "adca", OP_IY | OP_PAGE2, 3, 0xa9, 5, 5, CHG_HNZVC, cpu6811, 0 },
+ { "adca", OP_IDX, 2, 0xa9, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adca", OP_IDX_1, 3, 0xa9, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adca", OP_IDX_2, 4, 0xa9, 4, 4, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adca", OP_D_IDX, 2, 0xa9, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adca", OP_D_IDX_2, 4, 0xa9, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
- { "adcb", OP_IMM8, 2, 0xc9, 1, 1, CHG_HNZVC, cpu6811|cpu6812 },
- { "adcb", OP_DIRECT, 2, 0xd9, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "adcb", OP_IND16, 3, 0xf9, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "adcb", OP_IX, 2, 0xe9, 4, 4, CHG_HNZVC, cpu6811 },
- { "adcb", OP_IY | OP_PAGE2, 3, 0xe9, 5, 5, CHG_HNZVC, cpu6811 },
- { "adcb", OP_IDX, 2, 0xe9, 3, 3, CHG_HNZVC, cpu6812 },
- { "adcb", OP_IDX_1, 3, 0xe9, 3, 3, CHG_HNZVC, cpu6812 },
- { "adcb", OP_IDX_2, 4, 0xe9, 4, 4, CHG_HNZVC, cpu6812 },
- { "adcb", OP_D_IDX, 2, 0xe9, 6, 6, CHG_HNZVC, cpu6812 },
- { "adcb", OP_D_IDX_2, 4, 0xe9, 6, 6, CHG_HNZVC, cpu6812 },
+ { "adcb", OP_IMM8, 2, 0xc9, 1, 1, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_DIRECT, 2, 0xd9, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_IND16, 3, 0xf9, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_IX, 2, 0xe9, 4, 4, CHG_HNZVC, cpu6811, 0 },
+ { "adcb", OP_IY | OP_PAGE2, 3, 0xe9, 5, 5, CHG_HNZVC, cpu6811, 0 },
+ { "adcb", OP_IDX, 2, 0xe9, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_IDX_1, 3, 0xe9, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_IDX_2, 4, 0xe9, 4, 4, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_D_IDX, 2, 0xe9, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adcb", OP_D_IDX_2, 4, 0xe9, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
- { "adda", OP_IMM8, 2, 0x8b, 1, 1, CHG_HNZVC, cpu6811|cpu6812 },
- { "adda", OP_DIRECT, 2, 0x9b, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "adda", OP_IND16, 3, 0xbb, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "adda", OP_IX, 2, 0xab, 4, 4, CHG_HNZVC, cpu6811 },
- { "adda", OP_IY | OP_PAGE2, 3, 0xab, 5, 5, CHG_HNZVC, cpu6811 },
- { "adda", OP_IDX, 2, 0xab, 3, 3, CHG_HNZVC, cpu6812 },
- { "adda", OP_IDX_1, 3, 0xab, 3, 3, CHG_HNZVC, cpu6812 },
- { "adda", OP_IDX_2, 4, 0xab, 4, 4, CHG_HNZVC, cpu6812 },
- { "adda", OP_D_IDX, 2, 0xab, 6, 6, CHG_HNZVC, cpu6812 },
- { "adda", OP_D_IDX_2, 4, 0xab, 6, 6, CHG_HNZVC, cpu6812 },
+ { "adda", OP_IMM8, 2, 0x8b, 1, 1, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adda", OP_DIRECT, 2, 0x9b, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adda", OP_IND16, 3, 0xbb, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "adda", OP_IX, 2, 0xab, 4, 4, CHG_HNZVC, cpu6811, 0 },
+ { "adda", OP_IY | OP_PAGE2, 3, 0xab, 5, 5, CHG_HNZVC, cpu6811, 0 },
+ { "adda", OP_IDX, 2, 0xab, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adda", OP_IDX_1, 3, 0xab, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adda", OP_IDX_2, 4, 0xab, 4, 4, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adda", OP_D_IDX, 2, 0xab, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "adda", OP_D_IDX_2, 4, 0xab, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
- { "addb", OP_IMM8, 2, 0xcb, 1, 1, CHG_HNZVC, cpu6811|cpu6812 },
- { "addb", OP_DIRECT, 2, 0xdb, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "addb", OP_IND16, 3, 0xfb, 3, 3, CHG_HNZVC, cpu6811|cpu6812 },
- { "addb", OP_IX, 2, 0xeb, 4, 4, CHG_HNZVC, cpu6811 },
- { "addb", OP_IY | OP_PAGE2, 3, 0xeb, 5, 5, CHG_HNZVC, cpu6811 },
- { "addb", OP_IDX, 2, 0xeb, 3, 3, CHG_HNZVC, cpu6812 },
- { "addb", OP_IDX_1, 3, 0xeb, 3, 3, CHG_HNZVC, cpu6812 },
- { "addb", OP_IDX_2, 4, 0xeb, 4, 4, CHG_HNZVC, cpu6812 },
- { "addb", OP_D_IDX, 2, 0xeb, 6, 6, CHG_HNZVC, cpu6812 },
- { "addb", OP_D_IDX_2, 4, 0xeb, 6, 6, CHG_HNZVC, cpu6812 },
+ { "addb", OP_IMM8, 2, 0xcb, 1, 1, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "addb", OP_DIRECT, 2, 0xdb, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "addb", OP_IND16, 3, 0xfb, 3, 3, CHG_HNZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "addb", OP_IX, 2, 0xeb, 4, 4, CHG_HNZVC, cpu6811, 0 },
+ { "addb", OP_IY | OP_PAGE2, 3, 0xeb, 5, 5, CHG_HNZVC, cpu6811, 0 },
+ { "addb", OP_IDX, 2, 0xeb, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "addb", OP_IDX_1, 3, 0xeb, 3, 3, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "addb", OP_IDX_2, 4, 0xeb, 4, 4, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "addb", OP_D_IDX, 2, 0xeb, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "addb", OP_D_IDX_2, 4, 0xeb, 6, 6, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
- { "addd", OP_IMM16, 3, 0xc3, 2, 2, CHG_NZVC, cpu6811|cpu6812 },
- { "addd", OP_DIRECT, 2, 0xd3, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "addd", OP_IND16, 3, 0xf3, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811 },
- { "addd", OP_IY | OP_PAGE2, 3, 0xe3, 7, 7, CHG_NZVC, cpu6811 },
- { "addd", OP_IDX, 2, 0xe3, 3, 3, CHG_NZVC, cpu6812 },
- { "addd", OP_IDX_1, 3, 0xe3, 3, 3, CHG_NZVC, cpu6812 },
- { "addd", OP_IDX_2, 4, 0xe3, 4, 4, CHG_NZVC, cpu6812 },
- { "addd", OP_D_IDX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6812 },
- { "addd", OP_D_IDX_2, 4, 0xe3, 6, 6, CHG_NZVC, cpu6812 },
+ { "addd", OP_IMM16, 3, 0xc3, 2, 2, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "addd", OP_DIRECT, 2, 0xd3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "addd", OP_IND16, 3, 0xf3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "addd", OP_IY | OP_PAGE2, 3, 0xe3, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "addd", OP_IDX, 2, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "addd", OP_IDX_1, 3, 0xe3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "addd", OP_IDX_2, 4, 0xe3, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "addd", OP_D_IDX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "addd", OP_D_IDX_2, 4, 0xe3, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "anda", OP_IMM8, 2, 0x84, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "anda", OP_DIRECT, 2, 0x94, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "anda", OP_IND16, 3, 0xb4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "anda", OP_IX, 2, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "anda", OP_IY | OP_PAGE2, 3, 0xa4, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "anda", OP_IDX, 2, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "anda", OP_IDX_1, 3, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "anda", OP_IDX_2, 4, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "anda", OP_D_IDX, 2, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "anda", OP_D_IDX_2, 4, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "addx", OP_IMM16 | OP_PAGE2, 3, 0x8b, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_DIRECT | OP_PAGE2, 2, 0x9b, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_IND16 | OP_PAGE2, 3, 0xbb, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_IDX | OP_PAGE2, 2, 0xab, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_IDX_1 | OP_PAGE2, 3, 0xab, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_IDX_2 | OP_PAGE2, 4, 0xab, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_D_IDX | OP_PAGE2, 2, 0xab, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "addx", OP_D_IDX_2 | OP_PAGE2, 4, 0xab, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "andb", OP_IMM8, 2, 0xc4, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "andb", OP_DIRECT, 2, 0xd4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "andb", OP_IND16, 3, 0xf4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "andb", OP_IX, 2, 0xe4, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "andb", OP_IY | OP_PAGE2, 3, 0xe4, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "andb", OP_IDX, 2, 0xe4, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "andb", OP_IDX_1, 3, 0xe4, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "andb", OP_IDX_2, 4, 0xe4, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "andb", OP_D_IDX, 2, 0xe4, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "andb", OP_D_IDX_2, 4, 0xe4, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "addy", OP_IMM16 | OP_PAGE2, 3, 0xcb, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_DIRECT | OP_PAGE2, 2, 0xdb, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_IND16 | OP_PAGE2, 3, 0xfb, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_IDX | OP_PAGE2, 2, 0xeb, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_IDX_1 | OP_PAGE2, 3, 0xeb, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_IDX_2 | OP_PAGE2, 4, 0xeb, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_D_IDX | OP_PAGE2, 2, 0xeb, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "addy", OP_D_IDX_2 | OP_PAGE2, 4, 0xeb, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "andcc", OP_IMM8, 2, 0x10, 1, 1, CHG_ALL, cpu6812 },
+ { "aded", OP_IMM16 | OP_PAGE2, 3, 0xc3, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_DIRECT | OP_PAGE2, 2, 0xd3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_IND16 | OP_PAGE2, 3, 0xf3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_IDX | OP_PAGE2, 2, 0xe3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_IDX_1 | OP_PAGE2, 3, 0xe3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_IDX_2 | OP_PAGE2, 4, 0xe3, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_D_IDX | OP_PAGE2, 2, 0xe3, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "aded", OP_D_IDX_2 | OP_PAGE2, 4, 0xe3, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "asl", OP_IND16, 3, 0x78, 4, 4, CHG_NZVC, cpu6811|cpu6812 },
- { "asl", OP_IX, 2, 0x68, 6, 6, CHG_NZVC, cpu6811 },
- { "asl", OP_IY | OP_PAGE2, 3, 0x68, 7, 7, CHG_NZVC, cpu6811 },
- { "asl", OP_IDX, 2, 0x68, 3, 3, CHG_NZVC, cpu6812 },
- { "asl", OP_IDX_1, 3, 0x68, 4, 4, CHG_NZVC, cpu6812 },
- { "asl", OP_IDX_2, 4, 0x68, 5, 5, CHG_NZVC, cpu6812 },
- { "asl", OP_D_IDX, 2, 0x68, 6, 6, CHG_NZVC, cpu6812 },
- { "asl", OP_D_IDX_2, 4, 0x68, 6, 6, CHG_NZVC, cpu6812 },
+ { "adex", OP_IMM16 | OP_PAGE2, 3, 0x89, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_DIRECT | OP_PAGE2, 2, 0x99, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_IND16 | OP_PAGE2, 3, 0xb9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_IDX | OP_PAGE2, 2, 0xa9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_IDX_1 | OP_PAGE2, 3, 0xa9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_IDX_2 | OP_PAGE2, 4, 0xa9, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_D_IDX | OP_PAGE2, 2, 0xa9, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "adex", OP_D_IDX_2 | OP_PAGE2, 4, 0xa9, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "asla", OP_NONE, 1, 0x48, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "aslb", OP_NONE, 1, 0x58, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "asld", OP_NONE, 1, 0x05, 3, 3, CHG_NZVC, cpu6811 },
- { "asld", OP_NONE, 1, 0x59, 1, 1, CHG_NZVC, cpu6812 },
+ { "adey", OP_IMM16 | OP_PAGE2, 3, 0xc9, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_DIRECT | OP_PAGE2, 2, 0xd9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_IND16 | OP_PAGE2, 3, 0xf9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_IDX | OP_PAGE2, 2, 0xe9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_IDX_1 | OP_PAGE2, 3, 0xe9, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_IDX_2 | OP_PAGE2, 4, 0xe9, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_D_IDX | OP_PAGE2, 2, 0xe9, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "adey", OP_D_IDX_2 | OP_PAGE2, 4, 0xe9, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "asr", OP_IND16, 3, 0x77, 4, 4, CHG_NZVC, cpu6811|cpu6812 },
- { "asr", OP_IX, 2, 0x67, 6, 6, CHG_NZVC, cpu6811 },
- { "asr", OP_IY | OP_PAGE2, 3, 0x67, 7, 7, CHG_NZVC, cpu6811 },
- { "asr", OP_IDX, 2, 0x67, 3, 3, CHG_NZVC, cpu6812 },
- { "asr", OP_IDX_1, 3, 0x67, 4, 4, CHG_NZVC, cpu6812 },
- { "asr", OP_IDX_2, 4, 0x67, 5, 5, CHG_NZVC, cpu6812 },
- { "asr", OP_D_IDX, 2, 0x67, 6, 6, CHG_NZVC, cpu6812 },
- { "asr", OP_D_IDX_2, 4, 0x67, 6, 6, CHG_NZVC, cpu6812 },
+ { "anda", OP_IMM8, 2, 0x84, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "anda", OP_DIRECT, 2, 0x94, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "anda", OP_IND16, 3, 0xb4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "anda", OP_IX, 2, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "anda", OP_IY | OP_PAGE2, 3, 0xa4, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "anda", OP_IDX, 2, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "anda", OP_IDX_1, 3, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "anda", OP_IDX_2, 4, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "anda", OP_D_IDX, 2, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "anda", OP_D_IDX_2, 4, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "asra", OP_NONE, 1, 0x47, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "asrb", OP_NONE, 1, 0x57, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
+ { "andb", OP_IMM8, 2, 0xc4, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "andb", OP_DIRECT, 2, 0xd4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "andb", OP_IND16, 3, 0xf4, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "andb", OP_IX, 2, 0xe4, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "andb", OP_IY | OP_PAGE2, 3, 0xe4, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "andb", OP_IDX, 2, 0xe4, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "andb", OP_IDX_1, 3, 0xe4, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "andb", OP_IDX_2, 4, 0xe4, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "andb", OP_D_IDX, 2, 0xe4, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "andb", OP_D_IDX_2, 4, 0xe4, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "bcc", OP_JUMP_REL, 2, 0x24, 1, 3, CHG_NONE, cpu6811|cpu6812 },
+ { "andcc", OP_IMM8, 2, 0x10, 1, 1, CHG_ALL, cpu6812|cpu9s12x, 0 },
- { "bclr", OP_BITMASK|OP_DIRECT, 3, 0x15, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "bclr", OP_BITMASK|OP_IX, 3, 0x1d, 7, 7, CLR_V_CHG_NZ, cpu6811 },
- { "bclr", OP_BITMASK|OP_IY|OP_PAGE2, 4, 0x1d, 8, 8, CLR_V_CHG_NZ, cpu6811},
- { "bclr", OP_BITMASK|OP_DIRECT, 3, 0x4d, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bclr", OP_BITMASK|OP_IND16, 4, 0x1d, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bclr", OP_BITMASK|OP_IDX, 3, 0x0d, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bclr", OP_BITMASK|OP_IDX_1, 4, 0x0d, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bclr", OP_BITMASK|OP_IDX_2, 5, 0x0d, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "andx", OP_IMM16 | OP_PAGE2, 2, 0x84, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_DIRECT | OP_PAGE2, 2, 0x94, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_IND16 | OP_PAGE2, 3, 0xb4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_IDX | OP_PAGE2, 2, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_IDX_1 | OP_PAGE2, 3, 0xa4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_IDX_2 | OP_PAGE2, 4, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_D_IDX | OP_PAGE2, 2, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andx", OP_D_IDX_2 | OP_PAGE2, 4, 0xa4, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
- { "bcs", OP_JUMP_REL, 2, 0x25, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "beq", OP_JUMP_REL, 2, 0x27, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bge", OP_JUMP_REL, 2, 0x2c, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
+ { "andy", OP_IMM16 | OP_PAGE2, 2, 0xc4, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_DIRECT | OP_PAGE2, 2, 0xd4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_IND16 | OP_PAGE2, 3, 0xf4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_IDX | OP_PAGE2, 2, 0xe4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_IDX_1 | OP_PAGE2, 3, 0xe4, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_IDX_2 | OP_PAGE2, 4, 0xe4, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_D_IDX | OP_PAGE2, 2, 0xe4, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "andy", OP_D_IDX_2 | OP_PAGE2, 4, 0xe4, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
- { "bgnd", OP_NONE, 1, 0x00, 5, 5, CHG_NONE, cpu6811 | cpu6812 },
+ { "asl", OP_IND16, 3, 0x78, 4, 4, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "asl", OP_IX, 2, 0x68, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "asl", OP_IY | OP_PAGE2, 3, 0x68, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "asl", OP_IDX, 2, 0x68, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asl", OP_IDX_1, 3, 0x68, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asl", OP_IDX_2, 4, 0x68, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asl", OP_D_IDX, 2, 0x68, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asl", OP_D_IDX_2, 4, 0x68, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "bgt", OP_JUMP_REL, 2, 0x2e, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bhi", OP_JUMP_REL, 2, 0x22, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bhs", OP_JUMP_REL, 2, 0x24, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
+ { "asla", OP_NONE, 1, 0x48, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "aslb", OP_NONE, 1, 0x58, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "asld", OP_NONE, 1, 0x05, 3, 3, CHG_NZVC, cpu6811, 0 },
+ { "asld", OP_NONE, 1, 0x59, 1, 1, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "aslw", OP_IND16 | OP_PAGE2, 3, 0x78, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "aslw", OP_IDX | OP_PAGE2, 2, 0x68, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "aslw", OP_IDX_1 | OP_PAGE2, 3, 0x68, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "aslw", OP_IDX_2 | OP_PAGE2, 4, 0x68, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "aslw", OP_D_IDX | OP_PAGE2, 2, 0x68, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "aslw", OP_D_IDX_2 | OP_PAGE2, 4, 0x68, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "aslx", OP_NONE | OP_PAGE2, 1, 0x48, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "asly", OP_NONE | OP_PAGE2, 1, 0x58, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "asr", OP_IND16, 3, 0x77, 4, 4, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "asr", OP_IX, 2, 0x67, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "asr", OP_IY | OP_PAGE2, 3, 0x67, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "asr", OP_IDX, 2, 0x67, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asr", OP_IDX_1, 3, 0x67, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asr", OP_IDX_2, 4, 0x67, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asr", OP_D_IDX, 2, 0x67, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "asr", OP_D_IDX_2, 4, 0x67, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "asra", OP_NONE, 1, 0x47, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "asrb", OP_NONE, 1, 0x57, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+
+ { "asrw", OP_IND16 | OP_PAGE2, 3, 0x77, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "asrw", OP_IDX | OP_PAGE2, 2, 0x67, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "asrw", OP_IDX_1 | OP_PAGE2, 3, 0x67, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "asrw", OP_IDX_2 | OP_PAGE2, 4, 0x67, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "asrw", OP_D_IDX | OP_PAGE2, 2, 0x67, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "asrw", OP_D_IDX_2 | OP_PAGE2, 4, 0x67, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "asrx", OP_NONE | OP_PAGE2, 1, 0x47, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "asry", OP_NONE | OP_PAGE2, 1, 0x57, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "bcc", OP_JUMP_REL, 2, 0x24, 1, 3, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+
+ { "bclr", OP_BITMASK|OP_DIRECT, 3, 0x15, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bclr", OP_BITMASK|OP_IX, 3, 0x1d, 7, 7, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bclr", OP_BITMASK|OP_IY|OP_PAGE2, 4, 0x1d, 8, 8, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bclr", OP_BITMASK|OP_DIRECT, 3, 0x4d, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bclr", OP_BITMASK|OP_IND16, 4, 0x1d, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bclr", OP_BITMASK|OP_IDX, 3, 0x0d, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bclr", OP_BITMASK|OP_IDX_1, 4, 0x0d, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bclr", OP_BITMASK|OP_IDX_2, 5, 0x0d, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+
+ { "bcs", OP_JUMP_REL, 2, 0x25, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "beq", OP_JUMP_REL, 2, 0x27, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bge", OP_JUMP_REL, 2, 0x2c, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+
+ { "bgnd", OP_NONE, 1, 0x00, 5, 5, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+
+ { "bgt", OP_JUMP_REL, 2, 0x2e, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bhi", OP_JUMP_REL, 2, 0x22, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bhs", OP_JUMP_REL, 2, 0x24, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
- { "bita", OP_IMM8, 2, 0x85, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "bita", OP_DIRECT, 2, 0x95, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "bita", OP_IND16, 3, 0xb5, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "bita", OP_IX, 2, 0xa5, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "bita", OP_IY | OP_PAGE2, 3, 0xa5, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "bita", OP_IDX, 2, 0xa5, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "bita", OP_IDX_1, 3, 0xa5, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "bita", OP_IDX_2, 4, 0xa5, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bita", OP_D_IDX, 2, 0xa5, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "bita", OP_D_IDX_2, 4, 0xa5, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "bita", OP_IMM8, 2, 0x85, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "bita", OP_DIRECT, 2, 0x95, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "bita", OP_IND16, 3, 0xb5, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "bita", OP_IX, 2, 0xa5, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bita", OP_IY | OP_PAGE2, 3, 0xa5, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bita", OP_IDX, 2, 0xa5, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bita", OP_IDX_1, 3, 0xa5, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bita", OP_IDX_2, 4, 0xa5, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bita", OP_D_IDX, 2, 0xa5, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bita", OP_D_IDX_2, 4, 0xa5, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "bitb", OP_IMM8, 2, 0xc5, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "bitb", OP_DIRECT, 2, 0xd5, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "bitb", OP_IND16, 3, 0xf5, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "bitb", OP_IX, 2, 0xe5, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "bitb", OP_IY | OP_PAGE2, 3, 0xe5, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "bitb", OP_IDX, 2, 0xe5, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "bitb", OP_IDX_1, 3, 0xe5, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "bitb", OP_IDX_2, 4, 0xe5, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bitb", OP_D_IDX, 2, 0xe5, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "bitb", OP_D_IDX_2, 4, 0xe5, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "bitb", OP_IMM8, 2, 0xc5, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_DIRECT, 2, 0xd5, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_IND16, 3, 0xf5, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_IX, 2, 0xe5, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bitb", OP_IY | OP_PAGE2, 3, 0xe5, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bitb", OP_IDX, 2, 0xe5, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_IDX_1, 3, 0xe5, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_IDX_2, 4, 0xe5, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_D_IDX, 2, 0xe5, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bitb", OP_D_IDX_2, 4, 0xe5, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "ble", OP_JUMP_REL, 2, 0x2f, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "blo", OP_JUMP_REL, 2, 0x25, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bls", OP_JUMP_REL, 2, 0x23, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "blt", OP_JUMP_REL, 2, 0x2d, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bmi", OP_JUMP_REL, 2, 0x2b, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bne", OP_JUMP_REL, 2, 0x26, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bpl", OP_JUMP_REL, 2, 0x2a, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bra", OP_JUMP_REL, 2, 0x20, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
+ { "bitx", OP_IMM16 | OP_PAGE2, 2, 0x85, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_DIRECT | OP_PAGE2, 2, 0x95, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_IND16 | OP_PAGE2, 3, 0xb5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_IDX | OP_PAGE2, 2, 0xa5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_IDX_1 | OP_PAGE2, 3, 0xa5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_IDX_2 | OP_PAGE2, 4, 0xa5, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_D_IDX | OP_PAGE2, 2, 0xa5, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bitx", OP_D_IDX_2 | OP_PAGE2, 4, 0xa5, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "bity", OP_IMM16 | OP_PAGE2, 2, 0xc5, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_DIRECT | OP_PAGE2, 2, 0xd5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_IND16 | OP_PAGE2, 3, 0xf5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_IDX | OP_PAGE2, 2, 0xe5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_IDX_1 | OP_PAGE2, 3, 0xe5, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_IDX_2 | OP_PAGE2, 4, 0xe5, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_D_IDX | OP_PAGE2, 2, 0xe5, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "bity", OP_D_IDX_2 | OP_PAGE2, 4, 0xe5, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "ble", OP_JUMP_REL, 2, 0x2f, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "blo", OP_JUMP_REL, 2, 0x25, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bls", OP_JUMP_REL, 2, 0x23, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "blt", OP_JUMP_REL, 2, 0x2d, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bmi", OP_JUMP_REL, 2, 0x2b, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bne", OP_JUMP_REL, 2, 0x26, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bpl", OP_JUMP_REL, 2, 0x2a, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bra", OP_JUMP_REL, 2, 0x20, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_DIRECT, 4, 0x13, 6, 6, CHG_NONE, cpu6811 },
+ | OP_DIRECT, 4, 0x13, 6, 6, CHG_NONE, cpu6811, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_IX, 4, 0x1f, 7, 7, CHG_NONE, cpu6811 },
+ | OP_IX, 4, 0x1f, 7, 7, CHG_NONE, cpu6811, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_IY | OP_PAGE2, 5, 0x1f, 8, 8, CHG_NONE, cpu6811 },
+ | OP_IY | OP_PAGE2, 5, 0x1f, 8, 8, CHG_NONE, cpu6811, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_DIRECT, 4, 0x4f, 4, 4, CHG_NONE, cpu6812 },
+ | OP_DIRECT, 4, 0x4f, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_IND16, 5, 0x1f, 5, 5, CHG_NONE, cpu6812 },
+ | OP_IND16, 5, 0x1f, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_IDX, 4, 0x0f, 4, 4, CHG_NONE, cpu6812 },
+ | OP_IDX, 4, 0x0f, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brclr", OP_BITMASK | OP_JUMP_REL
- | OP_IDX_1, 5, 0x0f, 6, 6, CHG_NONE, cpu6812 },
+ | OP_IDX_1, 5, 0x0f, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brclr", OP_BITMASK
| OP_JUMP_REL
- | OP_IDX_2, 6, 0x0f, 8, 8, CHG_NONE, cpu6812 },
+ | OP_IDX_2, 6, 0x0f, 8, 8, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "brn", OP_JUMP_REL, 2, 0x21, 1, 3, CHG_NONE, cpu6811|cpu6812 },
+ { "brn", OP_JUMP_REL, 2, 0x21, 1, 3, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_DIRECT, 4, 0x12, 6, 6, CHG_NONE, cpu6811 },
+ | OP_DIRECT, 4, 0x12, 6, 6, CHG_NONE, cpu6811, 0 },
{ "brset", OP_BITMASK
| OP_JUMP_REL
- | OP_IX, 4, 0x1e, 7, 7, CHG_NONE, cpu6811 },
+ | OP_IX, 4, 0x1e, 7, 7, CHG_NONE, cpu6811, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_IY | OP_PAGE2, 5, 0x1e, 8, 8, CHG_NONE, cpu6811 },
+ | OP_IY | OP_PAGE2, 5, 0x1e, 8, 8, CHG_NONE, cpu6811, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_DIRECT, 4, 0x4e, 4, 4, CHG_NONE, cpu6812 },
+ | OP_DIRECT, 4, 0x4e, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_IND16, 5, 0x1e, 5, 5, CHG_NONE, cpu6812 },
+ | OP_IND16, 5, 0x1e, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_IDX, 4, 0x0e, 4, 4, CHG_NONE, cpu6812 },
+ | OP_IDX, 4, 0x0e, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_IDX_1, 5, 0x0e, 6, 6, CHG_NONE, cpu6812 },
+ | OP_IDX_1, 5, 0x0e, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "brset", OP_BITMASK | OP_JUMP_REL
- | OP_IDX_2, 6, 0x0e, 8, 8, CHG_NONE, cpu6812 },
+ | OP_IDX_2, 6, 0x0e, 8, 8, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "bset", OP_BITMASK | OP_DIRECT, 3, 0x14, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "bset", OP_BITMASK | OP_IX, 3, 0x1c, 7, 7, CLR_V_CHG_NZ, cpu6811 },
- { "bset", OP_BITMASK|OP_IY|OP_PAGE2, 4, 0x1c, 8, 8, CLR_V_CHG_NZ, cpu6811 },
- { "bset", OP_BITMASK|OP_DIRECT, 3, 0x4c, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bset", OP_BITMASK|OP_IND16, 4, 0x1c, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bset", OP_BITMASK|OP_IDX, 3, 0x0c, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bset", OP_BITMASK|OP_IDX_1, 4, 0x0c, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "bset", OP_BITMASK|OP_IDX_2, 5, 0x0c, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "bset", OP_BITMASK | OP_DIRECT, 3, 0x14, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bset", OP_BITMASK | OP_IX, 3, 0x1c, 7, 7, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bset", OP_BITMASK|OP_IY|OP_PAGE2, 4, 0x1c, 8, 8, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "bset", OP_BITMASK|OP_DIRECT, 3, 0x4c, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bset", OP_BITMASK|OP_IND16, 4, 0x1c, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bset", OP_BITMASK|OP_IDX, 3, 0x0c, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bset", OP_BITMASK|OP_IDX_1, 4, 0x0c, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "bset", OP_BITMASK|OP_IDX_2, 5, 0x0c, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "bsr", OP_JUMP_REL, 2, 0x8d, 6, 6, CHG_NONE, cpu6811 },
- { "bsr", OP_JUMP_REL, 2, 0x07, 4, 4, CHG_NONE, cpu6812 },
+ { "bsr", OP_JUMP_REL, 2, 0x8d, 6, 6, CHG_NONE, cpu6811, 0 },
+ { "bsr", OP_JUMP_REL, 2, 0x07, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "bvc", OP_JUMP_REL, 2, 0x28, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
- { "bvs", OP_JUMP_REL, 2, 0x29, 1, 3, CHG_NONE, cpu6811 | cpu6812 },
+ { "btas", OP_BITMASK|OP_DIRECT | OP_PAGE2, 3, 0x35, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "btas", OP_BITMASK|OP_IND16 | OP_PAGE2, 4, 0x36, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "btas", OP_BITMASK|OP_IDX | OP_PAGE2, 3, 0x37, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "btas", OP_BITMASK|OP_IDX_1 | OP_PAGE2, 4, 0x37, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "btas", OP_BITMASK|OP_IDX_2 | OP_PAGE2, 5, 0x37, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "bvc", OP_JUMP_REL, 2, 0x28, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
+ { "bvs", OP_JUMP_REL, 2, 0x29, 1, 3, CHG_NONE, cpu6811 | cpu6812|cpu9s12x, 0 },
{ "call", OP_IND16 | OP_PAGE
- | OP_BRANCH, 4, 0x4a, 8, 8, CHG_NONE, cpu6812 },
+ | OP_BRANCH, 4, 0x4a, 8, 8, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "call", OP_IDX | OP_PAGE
- | OP_BRANCH, 3, 0x4b, 8, 8, CHG_NONE, cpu6812 },
+ | OP_BRANCH, 3, 0x4b, 8, 8, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "call", OP_IDX_1 | OP_PAGE
- | OP_BRANCH, 4, 0x4b, 8, 8, CHG_NONE, cpu6812 },
+ | OP_BRANCH, 4, 0x4b, 8, 8, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "call", OP_IDX_2 | OP_PAGE
- | OP_BRANCH, 5, 0x4b, 9, 9, CHG_NONE, cpu6812 },
+ | OP_BRANCH, 5, 0x4b, 9, 9, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "call", OP_D_IDX
- | OP_BRANCH, 2, 0x4b, 10, 10, CHG_NONE, cpu6812 },
+ | OP_BRANCH, 2, 0x4b, 10, 10, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "call", OP_D_IDX_2
- | OP_BRANCH, 4, 0x4b, 10, 10, CHG_NONE, cpu6812 },
+ | OP_BRANCH, 4, 0x4b, 10, 10, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "cba", OP_NONE, 1, 0x11, 2, 2, CHG_NZVC, cpu6811 },
- { "cba", OP_NONE | OP_PAGE2,2, 0x17, 2, 2, CHG_NZVC, cpu6812 },
+ { "cba", OP_NONE, 1, 0x11, 2, 2, CHG_NZVC, cpu6811, 0 },
+ { "cba", OP_NONE | OP_PAGE2,2, 0x17, 2, 2, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "clc", OP_NONE, 1, 0x0c, 2, 2, CLR_C, cpu6811 },
- { "cli", OP_NONE, 1, 0x0e, 2, 2, CLR_I, cpu6811 },
+ { "clc", OP_NONE, 1, 0x0c, 2, 2, CLR_C, cpu6811, 0 },
+ { "cli", OP_NONE, 1, 0x0e, 2, 2, CLR_I, cpu6811, 0 },
- { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811 },
- { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811 },
- { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811 },
- { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812 },
- { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812 },
- { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812 },
- { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812 },
- { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812 },
- { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812 },
+ { "clr", OP_IND16, 3, 0x7f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 },
+ { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 },
+ { "clr", OP_IY | OP_PAGE2, 3, 0x6f, 7, 7, SET_Z_CLR_NVC, cpu6811, 0 },
+ { "clr", OP_IND16, 3, 0x79, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
+ { "clr", OP_IDX, 2, 0x69, 2, 2, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
+ { "clr", OP_IDX_1, 3, 0x69, 3, 3, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
+ { "clr", OP_IDX_2, 4, 0x69, 4, 4, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
+ { "clr", OP_D_IDX, 2, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
+ { "clr", OP_D_IDX_2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
- { "clra", OP_NONE, 1, 0x4f, 2, 2, SET_Z_CLR_NVC, cpu6811 },
- { "clrb", OP_NONE, 1, 0x5f, 2, 2, SET_Z_CLR_NVC, cpu6811 },
- { "clra", OP_NONE, 1, 0x87, 1, 1, SET_Z_CLR_NVC, cpu6812 },
- { "clrb", OP_NONE, 1, 0xc7, 1, 1, SET_Z_CLR_NVC, cpu6812 },
+ { "clra", OP_NONE, 1, 0x4f, 2, 2, SET_Z_CLR_NVC, cpu6811, 0 },
+ { "clrb", OP_NONE, 1, 0x5f, 2, 2, SET_Z_CLR_NVC, cpu6811, 0 },
+ { "clra", OP_NONE, 1, 0x87, 1, 1, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
+ { "clrb", OP_NONE, 1, 0xc7, 1, 1, SET_Z_CLR_NVC, cpu6812|cpu9s12x, 0 },
- { "clv", OP_NONE, 1, 0x0a, 2, 2, CLR_V, cpu6811 },
+ { "clrw", OP_IND16 | OP_PAGE2, 3, 0x79, 4, 4, SET_Z_CLR_NVC, cpu9s12x, 0 },
+ { "clrw", OP_IDX | OP_PAGE2, 2, 0x69, 3, 3, SET_Z_CLR_NVC, cpu9s12x, 0 },
+ { "clrw", OP_IDX_1 | OP_PAGE2, 3, 0x69, 4, 4, SET_Z_CLR_NVC, cpu9s12x, 0 },
+ { "clrw", OP_IDX_2 | OP_PAGE2, 4, 0x69, 5, 5, SET_Z_CLR_NVC, cpu9s12x, 0 },
+ { "clrw", OP_D_IDX | OP_PAGE2, 2, 0x69, 6, 6, SET_Z_CLR_NVC, cpu9s12x, 0 },
+ { "clrw", OP_D_IDX_2 | OP_PAGE2, 4, 0x69, 6, 6, SET_Z_CLR_NVC, cpu9s12x, 0 },
- { "cmpa", OP_IMM8, 2, 0x81, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "cmpa", OP_DIRECT, 2, 0x91, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "cmpa", OP_IND16, 3, 0xb1, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "cmpa", OP_IX, 2, 0xa1, 4, 4, CHG_NZVC, cpu6811 },
- { "cmpa", OP_IY | OP_PAGE2, 3, 0xa1, 5, 5, CHG_NZVC, cpu6811 },
- { "cmpa", OP_IDX, 2, 0xa1, 3, 3, CHG_NZVC, cpu6812 },
- { "cmpa", OP_IDX_1, 3, 0xa1, 3, 3, CHG_NZVC, cpu6812 },
- { "cmpa", OP_IDX_2, 4, 0xa1, 4, 4, CHG_NZVC, cpu6812 },
- { "cmpa", OP_D_IDX, 2, 0xa1, 6, 6, CHG_NZVC, cpu6812 },
- { "cmpa", OP_D_IDX_2, 4, 0xa1, 6, 6, CHG_NZVC, cpu6812 },
+ { "clrx", OP_NONE | OP_PAGE2, 3, 0x87, 4, 4, SET_Z_CLR_NVC, cpu9s12x, 0 },
- { "cmpb", OP_IMM8, 2, 0xc1, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "cmpb", OP_DIRECT, 2, 0xd1, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "cmpb", OP_IND16, 3, 0xf1, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "cmpb", OP_IX, 2, 0xe1, 4, 4, CHG_NZVC, cpu6811 },
- { "cmpb", OP_IY | OP_PAGE2, 3, 0xe1, 5, 5, CHG_NZVC, cpu6811 },
- { "cmpb", OP_IDX, 2, 0xe1, 3, 3, CHG_NZVC, cpu6812 },
- { "cmpb", OP_IDX_1, 3, 0xe1, 3, 3, CHG_NZVC, cpu6812 },
- { "cmpb", OP_IDX_2, 4, 0xe1, 4, 4, CHG_NZVC, cpu6812 },
- { "cmpb", OP_D_IDX, 2, 0xe1, 6, 6, CHG_NZVC, cpu6812 },
- { "cmpb", OP_D_IDX_2, 4, 0xe1, 6, 6, CHG_NZVC, cpu6812 },
+ { "clry", OP_NONE | OP_PAGE2, 3, 0xc7, 4, 4, SET_Z_CLR_NVC, cpu9s12x, 0 },
- { "com", OP_IND16, 3, 0x73, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6811 },
- { "com", OP_IX, 2, 0x63, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6811 },
- { "com", OP_IY | OP_PAGE2, 3, 0x63, 7, 7, SET_C_CLR_V_CHG_NZ, cpu6811 },
- { "com", OP_IND16, 3, 0x71, 4, 4, SET_C_CLR_V_CHG_NZ, cpu6812 },
- { "com", OP_IDX, 2, 0x61, 3, 3, SET_C_CLR_V_CHG_NZ, cpu6812 },
- { "com", OP_IDX_1, 3, 0x61, 4, 4, SET_C_CLR_V_CHG_NZ, cpu6812 },
- { "com", OP_IDX_2, 4, 0x61, 5, 5, SET_C_CLR_V_CHG_NZ, cpu6812 },
- { "com", OP_D_IDX, 2, 0x61, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6812 },
- { "com", OP_D_IDX_2, 4, 0x61, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6812 },
+ { "clv", OP_NONE, 1, 0x0a, 2, 2, CLR_V, cpu6811, 0 },
- { "coma", OP_NONE, 1, 0x43, 2, 2, SET_C_CLR_V_CHG_NZ, cpu6811 },
- { "coma", OP_NONE, 1, 0x41, 1, 1, SET_C_CLR_V_CHG_NZ, cpu6812 },
- { "comb", OP_NONE, 1, 0x53, 2, 2, SET_C_CLR_V_CHG_NZ, cpu6811 },
- { "comb", OP_NONE, 1, 0x51, 1, 1, SET_C_CLR_V_CHG_NZ, cpu6812 },
+ { "cmpa", OP_IMM8, 2, 0x81, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_DIRECT, 2, 0x91, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_IND16, 3, 0xb1, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_IX, 2, 0xa1, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "cmpa", OP_IY | OP_PAGE2, 3, 0xa1, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "cmpa", OP_IDX, 2, 0xa1, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_IDX_1, 3, 0xa1, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_IDX_2, 4, 0xa1, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_D_IDX, 2, 0xa1, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpa", OP_D_IDX_2, 4, 0xa1, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "cpd", OP_IMM16 | OP_PAGE3, 4, 0x83, 5, 5, CHG_NZVC, cpu6811 },
- { "cpd", OP_DIRECT | OP_PAGE3, 3, 0x93, 6, 6, CHG_NZVC, cpu6811 },
- { "cpd", OP_IND16 | OP_PAGE3, 4, 0xb3, 7, 7, CHG_NZVC, cpu6811 },
- { "cpd", OP_IX | OP_PAGE3, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811 },
- { "cpd", OP_IY | OP_PAGE4, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811 },
- { "cpd", OP_IMM16, 3, 0x8c, 2, 2, CHG_NZVC, cpu6812 },
- { "cpd", OP_DIRECT, 2, 0x9c, 3, 3, CHG_NZVC, cpu6812 },
- { "cpd", OP_IND16, 3, 0xbc, 3, 3, CHG_NZVC, cpu6812 },
- { "cpd", OP_IDX, 2, 0xac, 3, 3, CHG_NZVC, cpu6812 },
- { "cpd", OP_IDX_1, 3, 0xac, 3, 3, CHG_NZVC, cpu6812 },
- { "cpd", OP_IDX_2, 4, 0xac, 4, 4, CHG_NZVC, cpu6812 },
- { "cpd", OP_D_IDX, 2, 0xac, 6, 6, CHG_NZVC, cpu6812 },
- { "cpd", OP_D_IDX_2, 4, 0xac, 6, 6, CHG_NZVC, cpu6812 },
+ { "cmpb", OP_IMM8, 2, 0xc1, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_DIRECT, 2, 0xd1, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_IND16, 3, 0xf1, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_IX, 2, 0xe1, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "cmpb", OP_IY | OP_PAGE2, 3, 0xe1, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "cmpb", OP_IDX, 2, 0xe1, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_IDX_1, 3, 0xe1, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_IDX_2, 4, 0xe1, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_D_IDX, 2, 0xe1, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cmpb", OP_D_IDX_2, 4, 0xe1, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "cps", OP_IMM16, 3, 0x8f, 2, 2, CHG_NZVC, cpu6812 },
- { "cps", OP_DIRECT, 2, 0x9f, 3, 3, CHG_NZVC, cpu6812 },
- { "cps", OP_IND16, 3, 0xbf, 3, 3, CHG_NZVC, cpu6812 },
- { "cps", OP_IDX, 2, 0xaf, 3, 3, CHG_NZVC, cpu6812 },
- { "cps", OP_IDX_1, 3, 0xaf, 3, 3, CHG_NZVC, cpu6812 },
- { "cps", OP_IDX_2, 4, 0xaf, 4, 4, CHG_NZVC, cpu6812 },
- { "cps", OP_D_IDX, 2, 0xaf, 6, 6, CHG_NZVC, cpu6812 },
- { "cps", OP_D_IDX_2, 4, 0xaf, 6, 6, CHG_NZVC, cpu6812 },
+ { "com", OP_IND16, 3, 0x73, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6811, 0 },
+ { "com", OP_IX, 2, 0x63, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6811, 0 },
+ { "com", OP_IY | OP_PAGE2, 3, 0x63, 7, 7, SET_C_CLR_V_CHG_NZ, cpu6811, 0 },
+ { "com", OP_IND16, 3, 0x71, 4, 4, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "com", OP_IDX, 2, 0x61, 3, 3, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "com", OP_IDX_1, 3, 0x61, 4, 4, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "com", OP_IDX_2, 4, 0x61, 5, 5, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "com", OP_D_IDX, 2, 0x61, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "com", OP_D_IDX_2, 4, 0x61, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "cpx", OP_IMM16, 3, 0x8c, 4, 4, CHG_NZVC, cpu6811 },
- { "cpx", OP_DIRECT, 2, 0x9c, 5, 5, CHG_NZVC, cpu6811 },
- { "cpx", OP_IND16, 3, 0xbc, 5, 5, CHG_NZVC, cpu6811 },
- { "cpx", OP_IX, 2, 0xac, 6, 6, CHG_NZVC, cpu6811 },
- { "cpx", OP_IY | OP_PAGE4, 3, 0xac, 7, 7, CHG_NZVC, cpu6811 },
- { "cpx", OP_IMM16, 3, 0x8e, 2, 2, CHG_NZVC, cpu6812 },
- { "cpx", OP_DIRECT, 2, 0x9e, 3, 3, CHG_NZVC, cpu6812 },
- { "cpx", OP_IND16, 3, 0xbe, 3, 3, CHG_NZVC, cpu6812 },
- { "cpx", OP_IDX, 2, 0xae, 3, 3, CHG_NZVC, cpu6812 },
- { "cpx", OP_IDX_1, 3, 0xae, 3, 3, CHG_NZVC, cpu6812 },
- { "cpx", OP_IDX_2, 4, 0xae, 4, 4, CHG_NZVC, cpu6812 },
- { "cpx", OP_D_IDX, 2, 0xae, 6, 6, CHG_NZVC, cpu6812 },
- { "cpx", OP_D_IDX_2, 4, 0xae, 6, 6, CHG_NZVC, cpu6812 },
+ { "coma", OP_NONE, 1, 0x43, 2, 2, SET_C_CLR_V_CHG_NZ, cpu6811, 0 },
+ { "coma", OP_NONE, 1, 0x41, 1, 1, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "comb", OP_NONE, 1, 0x53, 2, 2, SET_C_CLR_V_CHG_NZ, cpu6811, 0 },
+ { "comb", OP_NONE, 1, 0x51, 1, 1, SET_C_CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "cpy", OP_PAGE2 | OP_IMM16, 4, 0x8c, 5, 5, CHG_NZVC, cpu6811 },
- { "cpy", OP_PAGE2 | OP_DIRECT, 3, 0x9c, 6, 6, CHG_NZVC, cpu6811 },
- { "cpy", OP_PAGE2 | OP_IY, 3, 0xac, 7, 7, CHG_NZVC, cpu6811 },
- { "cpy", OP_PAGE2 | OP_IND16, 4, 0xbc, 7, 7, CHG_NZVC, cpu6811 },
- { "cpy", OP_PAGE3 | OP_IX, 3, 0xac, 7, 7, CHG_NZVC, cpu6811 },
- { "cpy", OP_IMM16, 3, 0x8d, 2, 2, CHG_NZVC, cpu6812 },
- { "cpy", OP_DIRECT, 2, 0x9d, 3, 3, CHG_NZVC, cpu6812 },
- { "cpy", OP_IND16, 3, 0xbd, 3, 3, CHG_NZVC, cpu6812 },
- { "cpy", OP_IDX, 2, 0xad, 3, 3, CHG_NZVC, cpu6812 },
- { "cpy", OP_IDX_1, 3, 0xad, 3, 3, CHG_NZVC, cpu6812 },
- { "cpy", OP_IDX_2, 4, 0xad, 4, 4, CHG_NZVC, cpu6812 },
- { "cpy", OP_D_IDX, 2, 0xad, 6, 6, CHG_NZVC, cpu6812 },
- { "cpy", OP_D_IDX_2, 4, 0xad, 6, 6, CHG_NZVC, cpu6812 },
+ { "comw", OP_IND16 | OP_PAGE2, 3, 0x71, 4, 4, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "comw", OP_IDX | OP_PAGE2, 2, 0x61, 3, 3, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "comw", OP_IDX_1 | OP_PAGE2, 3, 0x61, 4, 4, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "comw", OP_IDX_2 | OP_PAGE2, 4, 0x61, 5, 5, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "comw", OP_D_IDX | OP_PAGE2, 2, 0x61, 6, 6, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "comw", OP_D_IDX_2 | OP_PAGE2, 4, 0x61, 6, 6, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "comx", OP_NONE | OP_PAGE2, 1, 0x41, 2, 2, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "comy", OP_NONE | OP_PAGE2, 1, 0x51, 2, 2, SET_C_CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "cpd", OP_IMM16 | OP_PAGE3, 4, 0x83, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "cpd", OP_DIRECT | OP_PAGE3, 3, 0x93, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "cpd", OP_IND16 | OP_PAGE3, 4, 0xb3, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpd", OP_IX | OP_PAGE3, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpd", OP_IY | OP_PAGE4, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpd", OP_IMM16, 3, 0x8c, 2, 2, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_DIRECT, 2, 0x9c, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_IND16, 3, 0xbc, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_IDX, 2, 0xac, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_IDX_1, 3, 0xac, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_IDX_2, 4, 0xac, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_D_IDX, 2, 0xac, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpd", OP_D_IDX_2, 4, 0xac, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "cped", OP_IMM16 | OP_PAGE2, 3, 0x8c, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_DIRECT | OP_PAGE2, 2, 0x9c, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_IND16 | OP_PAGE2, 3, 0xbc, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_IDX | OP_PAGE2, 2, 0xac, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_IDX_1 | OP_PAGE2, 3, 0xac, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_IDX_2 | OP_PAGE2, 4, 0xac, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_D_IDX | OP_PAGE2, 2, 0xac, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "cped", OP_D_IDX_2 | OP_PAGE2, 4, 0xac, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "cpes", OP_IMM16 | OP_PAGE2, 3, 0x8f, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_DIRECT | OP_PAGE2, 2, 0x9f, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_IND16 | OP_PAGE2, 3, 0xbf, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_IDX | OP_PAGE2, 2, 0xaf, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_IDX_1 | OP_PAGE2, 3, 0xaf, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_IDX_2 | OP_PAGE2, 4, 0xaf, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_D_IDX | OP_PAGE2, 2, 0xaf, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "cpes", OP_D_IDX_2 | OP_PAGE2, 4, 0xaf, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "cpex", OP_IMM16 | OP_PAGE2, 3, 0x8e, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_DIRECT | OP_PAGE2, 2, 0x9e, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_IND16 | OP_PAGE2, 3, 0xbe, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_IDX | OP_PAGE2, 2, 0xae, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_IDX_1 | OP_PAGE2, 3, 0xae, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_IDX_2 | OP_PAGE2, 4, 0xae, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_D_IDX | OP_PAGE2, 2, 0xae, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "cpex", OP_D_IDX_2 | OP_PAGE2, 4, 0xae, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "cpey", OP_IMM16 | OP_PAGE2, 3, 0x8d, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_DIRECT | OP_PAGE2, 2, 0x9d, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_IND16 | OP_PAGE2, 3, 0xbd, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_IDX | OP_PAGE2, 2, 0xad, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_IDX_1 | OP_PAGE2, 3, 0xad, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_IDX_2 | OP_PAGE2, 4, 0xad, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_D_IDX | OP_PAGE2, 2, 0xad, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "cpey", OP_D_IDX_2 | OP_PAGE2, 4, 0xad, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "cps", OP_IMM16, 3, 0x8f, 2, 2, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_DIRECT, 2, 0x9f, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_IND16, 3, 0xbf, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_IDX, 2, 0xaf, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_IDX_1, 3, 0xaf, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_IDX_2, 4, 0xaf, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_D_IDX, 2, 0xaf, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cps", OP_D_IDX_2, 4, 0xaf, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "cpx", OP_IMM16, 3, 0x8c, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "cpx", OP_DIRECT, 2, 0x9c, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "cpx", OP_IND16, 3, 0xbc, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "cpx", OP_IX, 2, 0xac, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "cpx", OP_IY | OP_PAGE4, 3, 0xac, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpx", OP_IMM16, 3, 0x8e, 2, 2, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_DIRECT, 2, 0x9e, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_IND16, 3, 0xbe, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_IDX, 2, 0xae, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_IDX_1, 3, 0xae, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_IDX_2, 4, 0xae, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_D_IDX, 2, 0xae, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpx", OP_D_IDX_2, 4, 0xae, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "cpy", OP_PAGE2 | OP_IMM16, 4, 0x8c, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "cpy", OP_PAGE2 | OP_DIRECT, 3, 0x9c, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "cpy", OP_PAGE2 | OP_IY, 3, 0xac, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpy", OP_PAGE2 | OP_IND16, 4, 0xbc, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpy", OP_PAGE3 | OP_IX, 3, 0xac, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "cpy", OP_IMM16, 3, 0x8d, 2, 2, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_DIRECT, 2, 0x9d, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_IND16, 3, 0xbd, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_IDX, 2, 0xad, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_IDX_1, 3, 0xad, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_IDX_2, 4, 0xad, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_D_IDX, 2, 0xad, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "cpy", OP_D_IDX_2, 4, 0xad, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
/* After 'daa', the Z flag is undefined. Mark it as changed. */
- { "daa", OP_NONE, 1, 0x19, 2, 2, CHG_NZVC, cpu6811 },
- { "daa", OP_NONE | OP_PAGE2, 2, 0x07, 3, 3, CHG_NZVC, cpu6812 },
+ { "daa", OP_NONE, 1, 0x19, 2, 2, CHG_NZVC, cpu6811, 0 },
+ { "daa", OP_NONE | OP_PAGE2, 2, 0x07, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
{ "dbeq", OP_DBEQ_MARKER
- | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
+ | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "dbne", OP_DBNE_MARKER
- | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
+ | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "dec", OP_IX, 2, 0x6a, 6, 6, CHG_NZV, cpu6811 },
- { "dec", OP_IND16, 3, 0x7a, 6, 6, CHG_NZV, cpu6811 },
- { "dec", OP_IY | OP_PAGE2, 3, 0x6a, 7, 7, CHG_NZV, cpu6811 },
- { "dec", OP_IND16, 3, 0x73, 4, 4, CHG_NZV, cpu6812 },
- { "dec", OP_IDX, 2, 0x63, 3, 3, CHG_NZV, cpu6812 },
- { "dec", OP_IDX_1, 3, 0x63, 4, 4, CHG_NZV, cpu6812 },
- { "dec", OP_IDX_2, 4, 0x63, 5, 5, CHG_NZV, cpu6812 },
- { "dec", OP_D_IDX, 2, 0x63, 6, 6, CHG_NZV, cpu6812 },
- { "dec", OP_D_IDX_2, 4, 0x63, 6, 6, CHG_NZV, cpu6812 },
+ { "dec", OP_IX, 2, 0x6a, 6, 6, CHG_NZV, cpu6811, 0 },
+ { "dec", OP_IND16, 3, 0x7a, 6, 6, CHG_NZV, cpu6811, 0 },
+ { "dec", OP_IY | OP_PAGE2, 3, 0x6a, 7, 7, CHG_NZV, cpu6811, 0 },
+ { "dec", OP_IND16, 3, 0x73, 4, 4, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "dec", OP_IDX, 2, 0x63, 3, 3, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "dec", OP_IDX_1, 3, 0x63, 4, 4, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "dec", OP_IDX_2, 4, 0x63, 5, 5, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "dec", OP_D_IDX, 2, 0x63, 6, 6, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "dec", OP_D_IDX_2, 4, 0x63, 6, 6, CHG_NZV, cpu6812|cpu9s12x, 0 },
- { "des", OP_NONE, 1, 0x34, 3, 3, CHG_NONE, cpu6811 },
+ { "des", OP_NONE, 1, 0x34, 3, 3, CHG_NONE, cpu6811, 0 },
- { "deca", OP_NONE, 1, 0x4a, 2, 2, CHG_NZV, cpu6811 },
- { "deca", OP_NONE, 1, 0x43, 1, 1, CHG_NZV, cpu6812 },
- { "decb", OP_NONE, 1, 0x5a, 2, 2, CHG_NZV, cpu6811 },
- { "decb", OP_NONE, 1, 0x53, 1, 1, CHG_NZV, cpu6812 },
+ { "deca", OP_NONE, 1, 0x4a, 2, 2, CHG_NZV, cpu6811, 0 },
+ { "deca", OP_NONE, 1, 0x43, 1, 1, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "decb", OP_NONE, 1, 0x5a, 2, 2, CHG_NZV, cpu6811, 0 },
+ { "decb", OP_NONE, 1, 0x53, 1, 1, CHG_NZV, cpu6812|cpu9s12x, 0 },
- { "dex", OP_NONE, 1, 0x09, 1, 1, CHG_Z, cpu6812|cpu6811 },
- { "dey", OP_NONE | OP_PAGE2, 2, 0x09, 4, 4, CHG_Z, cpu6811 },
- { "dey", OP_NONE, 1, 0x03, 1, 1, CHG_Z, cpu6812 },
+ { "decw", OP_IND16 | OP_PAGE2, 3, 0x73, 4, 4, CHG_NZV, cpu9s12x, 0 },
+ { "decw", OP_IDX | OP_PAGE2, 2, 0x63, 3, 3, CHG_NZV, cpu9s12x, 0 },
+ { "decw", OP_IDX_1 | OP_PAGE2, 3, 0x63, 4, 4, CHG_NZV, cpu9s12x, 0 },
+ { "decw", OP_IDX_2 | OP_PAGE2, 4, 0x63, 5, 5, CHG_NZV, cpu9s12x, 0 },
+ { "decw", OP_D_IDX | OP_PAGE2, 2, 0x63, 6, 6, CHG_NZV, cpu9s12x, 0 },
+ { "decw", OP_D_IDX_2 | OP_PAGE2, 4, 0x63, 6, 6, CHG_NZV, cpu9s12x, 0 },
- { "ediv", OP_NONE, 1, 0x11, 11, 11, CHG_NZVC, cpu6812 },
- { "edivs", OP_NONE | OP_PAGE2, 2, 0x14, 12, 12, CHG_NZVC, cpu6812 },
- { "emacs", OP_IND16 | OP_PAGE2, 4, 0x12, 13, 13, CHG_NZVC, cpu6812 },
+ { "decx", OP_NONE | OP_PAGE2, 3, 0x43, 4, 4, CHG_NZV, cpu9s12x, 0 },
- { "emaxd", OP_IDX | OP_PAGE2, 3, 0x1a, 4, 4, CHG_NZVC, cpu6812 },
- { "emaxd", OP_IDX_1 | OP_PAGE2, 4, 0x1a, 4, 4, CHG_NZVC, cpu6812 },
- { "emaxd", OP_IDX_2 | OP_PAGE2, 5, 0x1a, 5, 5, CHG_NZVC, cpu6812 },
- { "emaxd", OP_D_IDX | OP_PAGE2, 3, 0x1a, 7, 7, CHG_NZVC, cpu6812 },
- { "emaxd", OP_D_IDX_2 | OP_PAGE2, 5, 0x1a, 7, 7, CHG_NZVC, cpu6812 },
+ { "decy", OP_NONE | OP_PAGE2, 3, 0x53, 4, 4, CHG_NZV, cpu9s12x, 0 },
- { "emaxm", OP_IDX | OP_PAGE2, 3, 0x1e, 4, 4, CHG_NZVC, cpu6812 },
- { "emaxm", OP_IDX_1 | OP_PAGE2, 4, 0x1e, 5, 5, CHG_NZVC, cpu6812 },
- { "emaxm", OP_IDX_2 | OP_PAGE2, 5, 0x1e, 6, 6, CHG_NZVC, cpu6812 },
- { "emaxm", OP_D_IDX | OP_PAGE2, 3, 0x1e, 7, 7, CHG_NZVC, cpu6812 },
- { "emaxm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1e, 7, 7, CHG_NZVC, cpu6812 },
+ { "dex", OP_NONE, 1, 0x09, 1, 1, CHG_Z, cpu6812|cpu9s12x|cpu6811, 0 },
+ { "dey", OP_NONE | OP_PAGE2, 2, 0x09, 4, 4, CHG_Z, cpu6811, 0 },
+ { "dey", OP_NONE, 1, 0x03, 1, 1, CHG_Z, cpu6812|cpu9s12x, 0 },
- { "emind", OP_IDX | OP_PAGE2, 3, 0x1b, 4, 4, CHG_NZVC, cpu6812 },
- { "emind", OP_IDX_1 | OP_PAGE2, 4, 0x1b, 4, 4, CHG_NZVC, cpu6812 },
- { "emind", OP_IDX_2 | OP_PAGE2, 5, 0x1b, 5, 5, CHG_NZVC, cpu6812 },
- { "emind", OP_D_IDX | OP_PAGE2, 3, 0x1b, 7, 7, CHG_NZVC, cpu6812 },
- { "emind", OP_D_IDX_2 | OP_PAGE2, 5, 0x1b, 7, 7, CHG_NZVC, cpu6812 },
+ { "ediv", OP_NONE, 1, 0x11, 11, 11, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "edivs", OP_NONE | OP_PAGE2, 2, 0x14, 12, 12, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emacs", OP_IND16 | OP_PAGE2, 4, 0x12, 13, 13, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "eminm", OP_IDX | OP_PAGE2, 3, 0x1f, 4, 4, CHG_NZVC, cpu6812 },
- { "eminm", OP_IDX_1 | OP_PAGE2, 4, 0x1f, 5, 5, CHG_NZVC, cpu6812 },
- { "eminm", OP_IDX_2 | OP_PAGE2, 5, 0x1f, 6, 6, CHG_NZVC, cpu6812 },
- { "eminm", OP_D_IDX | OP_PAGE2, 3, 0x1f, 7, 7, CHG_NZVC, cpu6812 },
- { "eminm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1f, 7, 7, CHG_NZVC, cpu6812 },
+ { "emaxd", OP_IDX | OP_PAGE2, 3, 0x1a, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxd", OP_IDX_1 | OP_PAGE2, 4, 0x1a, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxd", OP_IDX_2 | OP_PAGE2, 5, 0x1a, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxd", OP_D_IDX | OP_PAGE2, 3, 0x1a, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxd", OP_D_IDX_2 | OP_PAGE2, 5, 0x1a, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "emul", OP_NONE, 1, 0x13, 3, 3, CHG_NZC, cpu6812 },
- { "emuls", OP_NONE | OP_PAGE2, 2, 0x13, 3, 3, CHG_NZC, cpu6812 },
+ { "emaxm", OP_IDX | OP_PAGE2, 3, 0x1e, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxm", OP_IDX_1 | OP_PAGE2, 4, 0x1e, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxm", OP_IDX_2 | OP_PAGE2, 5, 0x1e, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxm", OP_D_IDX | OP_PAGE2, 3, 0x1e, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emaxm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1e, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "eora", OP_IMM8, 2, 0x88, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "eora", OP_DIRECT, 2, 0x98, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "eora", OP_IND16, 3, 0xb8, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "eora", OP_IX, 2, 0xa8, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "eora", OP_IY | OP_PAGE2, 3, 0xa8, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "eora", OP_IDX, 2, 0xa8, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "eora", OP_IDX_1, 3, 0xa8, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "eora", OP_IDX_2, 4, 0xa8, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "eora", OP_D_IDX, 2, 0xa8, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "eora", OP_D_IDX_2, 4, 0xa8, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "emind", OP_IDX | OP_PAGE2, 3, 0x1b, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emind", OP_IDX_1 | OP_PAGE2, 4, 0x1b, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emind", OP_IDX_2 | OP_PAGE2, 5, 0x1b, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emind", OP_D_IDX | OP_PAGE2, 3, 0x1b, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "emind", OP_D_IDX_2 | OP_PAGE2, 5, 0x1b, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "eorb", OP_IMM8, 2, 0xc8, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "eorb", OP_DIRECT, 2, 0xd8, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "eorb", OP_IND16, 3, 0xf8, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "eorb", OP_IX, 2, 0xe8, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "eorb", OP_IY | OP_PAGE2, 3, 0xe8, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "eorb", OP_IDX, 2, 0xe8, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "eorb", OP_IDX_1, 3, 0xe8, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "eorb", OP_IDX_2, 4, 0xe8, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "eorb", OP_D_IDX, 2, 0xe8, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "eorb", OP_D_IDX_2, 4, 0xe8, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "eminm", OP_IDX | OP_PAGE2, 3, 0x1f, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "eminm", OP_IDX_1 | OP_PAGE2, 4, 0x1f, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "eminm", OP_IDX_2 | OP_PAGE2, 5, 0x1f, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "eminm", OP_D_IDX | OP_PAGE2, 3, 0x1f, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "eminm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1f, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "etbl", OP_IDX | OP_PAGE2,3, 0x3f, 10, 10, CHG_NZC, cpu6812 },
+ { "emul", OP_NONE, 1, 0x13, 3, 3, CHG_NZC, cpu6812|cpu9s12x, 0 },
+ { "emuls", OP_NONE | OP_PAGE2, 2, 0x13, 3, 3, CHG_NZC, cpu6812|cpu9s12x, 0 },
+ { "eora", OP_IMM8, 2, 0x88, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "eora", OP_DIRECT, 2, 0x98, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "eora", OP_IND16, 3, 0xb8, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "eora", OP_IX, 2, 0xa8, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "eora", OP_IY | OP_PAGE2, 3, 0xa8, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "eora", OP_IDX, 2, 0xa8, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eora", OP_IDX_1, 3, 0xa8, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eora", OP_IDX_2, 4, 0xa8, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eora", OP_D_IDX, 2, 0xa8, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eora", OP_D_IDX_2, 4, 0xa8, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+
+ { "eorb", OP_IMM8, 2, 0xc8, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_DIRECT, 2, 0xd8, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_IND16, 3, 0xf8, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_IX, 2, 0xe8, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "eorb", OP_IY | OP_PAGE2, 3, 0xe8, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "eorb", OP_IDX, 2, 0xe8, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_IDX_1, 3, 0xe8, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_IDX_2, 4, 0xe8, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_D_IDX, 2, 0xe8, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "eorb", OP_D_IDX_2, 4, 0xe8, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+
+ { "eorx", OP_IMM16 | OP_PAGE2, 2, 0x88, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_DIRECT | OP_PAGE2, 2, 0x98, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_IND16 | OP_PAGE2, 3, 0xb8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_IDX | OP_PAGE2, 2, 0xa8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_IDX_1 | OP_PAGE2, 3, 0xa8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_IDX_2 | OP_PAGE2, 4, 0xa8, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_D_IDX | OP_PAGE2, 2, 0xa8, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eorx", OP_D_IDX_2 | OP_PAGE2, 4, 0xa8, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "eory", OP_IMM16 | OP_PAGE2, 2, 0xc8, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_DIRECT | OP_PAGE2, 2, 0xd8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_IND16 | OP_PAGE2, 3, 0xf8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_IDX | OP_PAGE2, 2, 0xe8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_IDX_1 | OP_PAGE2, 3, 0xe8, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_IDX_2 | OP_PAGE2, 4, 0xe8, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_D_IDX | OP_PAGE2, 2, 0xe8, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "eory", OP_D_IDX_2 | OP_PAGE2, 4, 0xe8, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "etbl", OP_IDX | OP_PAGE2,3, 0x3f, 10, 10, CHG_NZC, cpu6812|cpu9s12x, 0 },
+
+/* S12X has more exg variants, most are pointless so not supported */
{ "exg", OP_EXG_MARKER
- | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
+ | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "fdiv", OP_NONE, 1, 0x03, 3, 41, CHG_ZVC, cpu6811},
- { "fdiv", OP_NONE | OP_PAGE2, 2, 0x11, 12, 12, CHG_ZVC, cpu6812 },
+ { "fdiv", OP_NONE, 1, 0x03, 3, 41, CHG_ZVC, cpu6811, 0 },
+ { "fdiv", OP_NONE | OP_PAGE2, 2, 0x11, 12, 12, CHG_ZVC, cpu6812|cpu9s12x, 0 },
+
+ { "gldaa", OP_DIRECT | OP_PAGE2, 2, 0x96, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldaa", OP_IND16 | OP_PAGE2, 3, 0xb6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldaa", OP_IDX | OP_PAGE2, 2, 0xa6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldaa", OP_IDX_1 | OP_PAGE2, 3, 0xa6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldaa", OP_IDX_2 | OP_PAGE2, 4, 0xa6, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldaa", OP_D_IDX | OP_PAGE2, 2, 0xa6, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldaa", OP_D_IDX_2 | OP_PAGE2, 4, 0xa6, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gldab", OP_DIRECT | OP_PAGE2, 2, 0xd6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldab", OP_IND16 | OP_PAGE2, 3, 0xf6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldab", OP_IDX | OP_PAGE2, 2, 0xe6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldab", OP_IDX_1 | OP_PAGE2, 3, 0xe6, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldab", OP_IDX_2 | OP_PAGE2, 4, 0xe6, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldab", OP_D_IDX | OP_PAGE2, 2, 0xe6, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldab", OP_D_IDX_2 | OP_PAGE2, 4, 0xe6, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gldd", OP_DIRECT | OP_PAGE2, 2, 0xdc, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldd", OP_IND16 | OP_PAGE2, 3, 0xfc, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldd", OP_IDX | OP_PAGE2, 2, 0xec, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldd", OP_IDX_1 | OP_PAGE2, 3, 0xec, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldd", OP_IDX_2 | OP_PAGE2, 4, 0xec, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldd", OP_D_IDX | OP_PAGE2, 2, 0xec, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldd", OP_D_IDX_2 | OP_PAGE2, 4, 0xec, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "glds", OP_DIRECT | OP_PAGE2, 2, 0xdf, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "glds", OP_IND16 | OP_PAGE2, 3, 0xff, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "glds", OP_IDX | OP_PAGE2, 2, 0xef, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "glds", OP_IDX_1 | OP_PAGE2, 3, 0xef, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "glds", OP_IDX_2 | OP_PAGE2, 4, 0xef, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "glds", OP_D_IDX | OP_PAGE2, 2, 0xef, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "glds", OP_D_IDX_2 | OP_PAGE2, 4, 0xef, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gldx", OP_DIRECT | OP_PAGE2, 2, 0xde, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldx", OP_IND16 | OP_PAGE2, 3, 0xfe, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldx", OP_IDX | OP_PAGE2, 2, 0xee, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldx", OP_IDX_1 | OP_PAGE2, 3, 0xee, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldx", OP_IDX_2 | OP_PAGE2, 4, 0xee, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldx", OP_D_IDX | OP_PAGE2, 2, 0xee, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldx", OP_D_IDX_2 | OP_PAGE2, 4, 0xee, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gldy", OP_DIRECT | OP_PAGE2, 2, 0xdd, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldy", OP_IND16 | OP_PAGE2, 3, 0xfd, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldy", OP_IDX | OP_PAGE2, 2, 0xed, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldy", OP_IDX_1 | OP_PAGE2, 3, 0xed, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldy", OP_IDX_2 | OP_PAGE2, 4, 0xed, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldy", OP_D_IDX | OP_PAGE2, 2, 0xed, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gldy", OP_D_IDX_2 | OP_PAGE2, 4, 0xed, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gstaa", OP_DIRECT | OP_PAGE2, 2, 0x5a, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstaa", OP_IND16 | OP_PAGE2, 3, 0x7a, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstaa", OP_IDX | OP_PAGE2, 2, 0x6a, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstaa", OP_IDX_1 | OP_PAGE2, 3, 0x6a, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstaa", OP_IDX_2 | OP_PAGE2, 4, 0x6a, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstaa", OP_D_IDX | OP_PAGE2, 2, 0x6a, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstaa", OP_D_IDX_2 | OP_PAGE2, 4, 0x6a, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gstab", OP_DIRECT | OP_PAGE2, 2, 0x5b, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstab", OP_IND16 | OP_PAGE2, 3, 0x7b, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstab", OP_IDX | OP_PAGE2, 2, 0x6b, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstab", OP_IDX_1 | OP_PAGE2, 3, 0x6b, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstab", OP_IDX_2 | OP_PAGE2, 4, 0x6b, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstab", OP_D_IDX | OP_PAGE2, 2, 0x6b, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstab", OP_D_IDX_2 | OP_PAGE2, 4, 0x6b, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gstd", OP_DIRECT | OP_PAGE2, 2, 0x5c, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstd", OP_IND16 | OP_PAGE2, 3, 0x7c, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstd", OP_IDX | OP_PAGE2, 2, 0x6c, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstd", OP_IDX_1 | OP_PAGE2, 3, 0x6c, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstd", OP_IDX_2 | OP_PAGE2, 4, 0x6c, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstd", OP_D_IDX | OP_PAGE2, 2, 0x6c, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstd", OP_D_IDX_2 | OP_PAGE2, 4, 0x6c, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gsts", OP_DIRECT | OP_PAGE2, 2, 0x5f, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsts", OP_IND16 | OP_PAGE2, 3, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsts", OP_IDX | OP_PAGE2, 2, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsts", OP_IDX_1 | OP_PAGE2, 3, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsts", OP_IDX_2 | OP_PAGE2, 4, 0x6f, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsts", OP_D_IDX | OP_PAGE2, 2, 0x6f, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsts", OP_D_IDX_2 | OP_PAGE2, 4, 0x6f, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gstx", OP_DIRECT | OP_PAGE2, 2, 0x5e, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstx", OP_IND16 | OP_PAGE2, 3, 0x7e, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstx", OP_IDX | OP_PAGE2, 2, 0x6e, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstx", OP_IDX_1 | OP_PAGE2, 3, 0x6e, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstx", OP_IDX_2 | OP_PAGE2, 4, 0x6e, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstx", OP_D_IDX | OP_PAGE2, 2, 0x6e, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gstx", OP_D_IDX_2 | OP_PAGE2, 4, 0x6e, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "gsty", OP_DIRECT | OP_PAGE2, 2, 0x5d, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsty", OP_IND16 | OP_PAGE2, 3, 0x7d, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsty", OP_IDX | OP_PAGE2, 2, 0x6d, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsty", OP_IDX_1 | OP_PAGE2, 3, 0x6d, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsty", OP_IDX_2 | OP_PAGE2, 4, 0x6d, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsty", OP_D_IDX | OP_PAGE2, 2, 0x6d, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "gsty", OP_D_IDX_2 | OP_PAGE2, 4, 0x6d, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
{ "ibeq", OP_IBEQ_MARKER
- | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
+ | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
{ "ibne", OP_IBNE_MARKER
- | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
+ | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "idiv", OP_NONE, 1, 0x02, 3, 41, CLR_V_CHG_ZC, cpu6811},
- { "idiv", OP_NONE | OP_PAGE2, 2, 0x10, 12, 12, CLR_V_CHG_ZC, cpu6812 },
- { "idivs", OP_NONE | OP_PAGE2, 2, 0x15, 12, 12, CHG_NZVC, cpu6812 },
+ { "idiv", OP_NONE, 1, 0x02, 3, 41, CLR_V_CHG_ZC, cpu6811, 0 },
+ { "idiv", OP_NONE | OP_PAGE2, 2, 0x10, 12, 12, CLR_V_CHG_ZC, cpu6812|cpu9s12x, 0 },
+ { "idivs", OP_NONE | OP_PAGE2, 2, 0x15, 12, 12, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "inc", OP_IX, 2, 0x6c, 6, 6, CHG_NZV, cpu6811 },
- { "inc", OP_IND16, 3, 0x7c, 6, 6, CHG_NZV, cpu6811 },
- { "inc", OP_IY | OP_PAGE2, 3, 0x6c, 7, 7, CHG_NZV, cpu6811 },
- { "inc", OP_IND16, 3, 0x72, 4, 4, CHG_NZV, cpu6812 },
- { "inc", OP_IDX, 2, 0x62, 3, 3, CHG_NZV, cpu6812 },
- { "inc", OP_IDX_1, 3, 0x62, 4, 4, CHG_NZV, cpu6812 },
- { "inc", OP_IDX_2, 4, 0x62, 5, 5, CHG_NZV, cpu6812 },
- { "inc", OP_D_IDX, 2, 0x62, 6, 6, CHG_NZV, cpu6812 },
- { "inc", OP_D_IDX_2, 4, 0x62, 6, 6, CHG_NZV, cpu6812 },
+ { "inc", OP_IX, 2, 0x6c, 6, 6, CHG_NZV, cpu6811, 0 },
+ { "inc", OP_IND16, 3, 0x7c, 6, 6, CHG_NZV, cpu6811, 0 },
+ { "inc", OP_IY | OP_PAGE2, 3, 0x6c, 7, 7, CHG_NZV, cpu6811, 0 },
+ { "inc", OP_IND16, 3, 0x72, 4, 4, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "inc", OP_IDX, 2, 0x62, 3, 3, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "inc", OP_IDX_1, 3, 0x62, 4, 4, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "inc", OP_IDX_2, 4, 0x62, 5, 5, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "inc", OP_D_IDX, 2, 0x62, 6, 6, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "inc", OP_D_IDX_2, 4, 0x62, 6, 6, CHG_NZV, cpu6812|cpu9s12x, 0 },
- { "inca", OP_NONE, 1, 0x4c, 2, 2, CHG_NZV, cpu6811 },
- { "inca", OP_NONE, 1, 0x42, 1, 1, CHG_NZV, cpu6812 },
- { "incb", OP_NONE, 1, 0x5c, 2, 2, CHG_NZV, cpu6811 },
- { "incb", OP_NONE, 1, 0x52, 1, 1, CHG_NZV, cpu6812 },
+ { "inca", OP_NONE, 1, 0x4c, 2, 2, CHG_NZV, cpu6811, 0 },
+ { "inca", OP_NONE, 1, 0x42, 1, 1, CHG_NZV, cpu6812|cpu9s12x, 0 },
+ { "incb", OP_NONE, 1, 0x5c, 2, 2, CHG_NZV, cpu6811, 0 },
+ { "incb", OP_NONE, 1, 0x52, 1, 1, CHG_NZV, cpu6812|cpu9s12x, 0 },
- { "ins", OP_NONE, 1, 0x31, 3, 3, CHG_NONE, cpu6811 },
+ { "incw", OP_IND16 | OP_PAGE2, 3, 0x72, 4, 4, CHG_NZV, cpu9s12x, 0 },
+ { "incw", OP_IDX | OP_PAGE2, 2, 0x62, 3, 3, CHG_NZV, cpu9s12x, 0 },
+ { "incw", OP_IDX_1 | OP_PAGE2, 3, 0x62, 4, 4, CHG_NZV, cpu9s12x, 0 },
+ { "incw", OP_IDX_2 | OP_PAGE2, 4, 0x62, 5, 5, CHG_NZV, cpu9s12x, 0 },
+ { "incw", OP_D_IDX | OP_PAGE2, 2, 0x62, 6, 6, CHG_NZV, cpu9s12x, 0 },
+ { "incw", OP_D_IDX_2 | OP_PAGE2, 4, 0x62, 6, 6, CHG_NZV, cpu9s12x, 0 },
- { "inx", OP_NONE, 1, 0x08, 1, 1, CHG_Z, cpu6811|cpu6812 },
- { "iny", OP_NONE |OP_PAGE2, 2, 0x08, 4, 4, CHG_Z, cpu6811 },
- { "iny", OP_NONE, 1, 0x02, 1, 1, CHG_Z, cpu6812 },
+ { "incx", OP_NONE | OP_PAGE2, 3, 0x42, 4, 4, CHG_NZV, cpu9s12x, 0 },
- { "jmp", OP_IND16 | OP_BRANCH, 3, 0x7e, 3, 3, CHG_NONE, cpu6811 },
- { "jmp", OP_IX, 2, 0x6e, 3, 3, CHG_NONE, cpu6811 },
- { "jmp", OP_IY | OP_PAGE2, 3, 0x6e, 4, 4, CHG_NONE, cpu6811 },
- { "jmp", OP_IND16 | OP_BRANCH, 3, 0x06, 3, 3, CHG_NONE, cpu6812 },
- { "jmp", OP_IDX, 2, 0x05, 3, 3, CHG_NONE, cpu6812 },
- { "jmp", OP_IDX_1, 3, 0x05, 3, 3, CHG_NONE, cpu6812 },
- { "jmp", OP_IDX_2, 4, 0x05, 4, 4, CHG_NONE, cpu6812 },
- { "jmp", OP_D_IDX, 2, 0x05, 6, 6, CHG_NONE, cpu6812 },
- { "jmp", OP_D_IDX_2, 4, 0x05, 6, 6, CHG_NONE, cpu6812 },
+ { "incy", OP_NONE | OP_PAGE2, 3, 0x52, 4, 4, CHG_NZV, cpu9s12x, 0 },
- { "jsr", OP_DIRECT | OP_BRANCH, 2, 0x9d, 5, 5, CHG_NONE, cpu6811 },
- { "jsr", OP_IND16 | OP_BRANCH, 3, 0xbd, 6, 6, CHG_NONE, cpu6811 },
- { "jsr", OP_IX, 2, 0xad, 6, 6, CHG_NONE, cpu6811 },
- { "jsr", OP_IY | OP_PAGE2, 3, 0xad, 6, 6, CHG_NONE, cpu6811 },
- { "jsr", OP_DIRECT | OP_BRANCH, 2, 0x17, 4, 4, CHG_NONE, cpu6812 },
- { "jsr", OP_IND16 | OP_BRANCH, 3, 0x16, 4, 3, CHG_NONE, cpu6812 },
- { "jsr", OP_IDX, 2, 0x15, 4, 4, CHG_NONE, cpu6812 },
- { "jsr", OP_IDX_1, 3, 0x15, 4, 4, CHG_NONE, cpu6812 },
- { "jsr", OP_IDX_2, 4, 0x15, 5, 5, CHG_NONE, cpu6812 },
- { "jsr", OP_D_IDX, 2, 0x15, 7, 7, CHG_NONE, cpu6812 },
- { "jsr", OP_D_IDX_2, 4, 0x15, 7, 7, CHG_NONE, cpu6812 },
+ { "ins", OP_NONE, 1, 0x31, 3, 3, CHG_NONE, cpu6811, 0 },
- { "lbcc", OP_JUMP_REL16 | OP_PAGE2, 4, 0x24, 3, 4, CHG_NONE, cpu6812 },
- { "lbcs", OP_JUMP_REL16 | OP_PAGE2, 4, 0x25, 3, 4, CHG_NONE, cpu6812 },
- { "lbeq", OP_JUMP_REL16 | OP_PAGE2, 4, 0x27, 3, 4, CHG_NONE, cpu6812 },
- { "lbge", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2c, 3, 4, CHG_NONE, cpu6812 },
- { "lbgt", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2e, 3, 4, CHG_NONE, cpu6812 },
- { "lbhi", OP_JUMP_REL16 | OP_PAGE2, 4, 0x22, 3, 4, CHG_NONE, cpu6812 },
- { "lbhs", OP_JUMP_REL16 | OP_PAGE2, 4, 0x24, 3, 4, CHG_NONE, cpu6812 },
- { "lble", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2f, 3, 4, CHG_NONE, cpu6812 },
- { "lblo", OP_JUMP_REL16 | OP_PAGE2, 4, 0x25, 3, 4, CHG_NONE, cpu6812 },
- { "lbls", OP_JUMP_REL16 | OP_PAGE2, 4, 0x23, 3, 4, CHG_NONE, cpu6812 },
- { "lblt", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2d, 3, 4, CHG_NONE, cpu6812 },
- { "lbmi", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2b, 3, 4, CHG_NONE, cpu6812 },
- { "lbne", OP_JUMP_REL16 | OP_PAGE2, 4, 0x26, 3, 4, CHG_NONE, cpu6812 },
- { "lbpl", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2a, 3, 4, CHG_NONE, cpu6812 },
- { "lbra", OP_JUMP_REL16 | OP_PAGE2, 4, 0x20, 4, 4, CHG_NONE, cpu6812 },
- { "lbrn", OP_JUMP_REL16 | OP_PAGE2, 4, 0x21, 3, 3, CHG_NONE, cpu6812 },
- { "lbvc", OP_JUMP_REL16 | OP_PAGE2, 4, 0x28, 3, 4, CHG_NONE, cpu6812 },
- { "lbvs", OP_JUMP_REL16 | OP_PAGE2, 4, 0x29, 3, 4, CHG_NONE, cpu6812 },
+ { "inx", OP_NONE, 1, 0x08, 1, 1, CHG_Z, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "iny", OP_NONE |OP_PAGE2, 2, 0x08, 4, 4, CHG_Z, cpu6811, 0 },
+ { "iny", OP_NONE, 1, 0x02, 1, 1, CHG_Z, cpu6812|cpu9s12x, 0 },
- { "ldaa", OP_IMM8, 2, 0x86, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldaa", OP_DIRECT, 2, 0x96, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldaa", OP_IND16, 3, 0xb6, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldaa", OP_IX, 2, 0xa6, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "ldaa", OP_IY | OP_PAGE2, 3, 0xa6, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "ldaa", OP_IDX, 2, 0xa6, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldaa", OP_IDX_1, 3, 0xa6, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldaa", OP_IDX_2, 4, 0xa6, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "ldaa", OP_D_IDX, 2, 0xa6, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "ldaa", OP_D_IDX_2, 4, 0xa6, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "jmp", OP_IND16 | OP_BRANCH, 3, 0x7e, 3, 3, CHG_NONE, cpu6811, 0 },
+ { "jmp", OP_IX, 2, 0x6e, 3, 3, CHG_NONE, cpu6811, 0 },
+ { "jmp", OP_IY | OP_PAGE2, 3, 0x6e, 4, 4, CHG_NONE, cpu6811, 0 },
+ { "jmp", OP_IND16 | OP_BRANCH, 3, 0x06, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jmp", OP_IDX, 2, 0x05, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jmp", OP_IDX_1, 3, 0x05, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jmp", OP_IDX_2, 4, 0x05, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jmp", OP_D_IDX, 2, 0x05, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jmp", OP_D_IDX_2, 4, 0x05, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "ldab", OP_IMM8, 2, 0xc6, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldab", OP_DIRECT, 2, 0xd6, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldab", OP_IND16, 3, 0xf6, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldab", OP_IX, 2, 0xe6, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "ldab", OP_IY | OP_PAGE2, 3, 0xe6, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "ldab", OP_IDX, 2, 0xe6, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldab", OP_IDX_1, 3, 0xe6, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldab", OP_IDX_2, 4, 0xe6, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "ldab", OP_D_IDX, 2, 0xe6, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "ldab", OP_D_IDX_2, 4, 0xe6, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "jsr", OP_DIRECT | OP_BRANCH, 2, 0x9d, 5, 5, CHG_NONE, cpu6811, 0 },
+ { "jsr", OP_IND16 | OP_BRANCH, 3, 0xbd, 6, 6, CHG_NONE, cpu6811, 0 },
+ { "jsr", OP_IX, 2, 0xad, 6, 6, CHG_NONE, cpu6811, 0 },
+ { "jsr", OP_IY | OP_PAGE2, 3, 0xad, 6, 6, CHG_NONE, cpu6811, 0 },
+ { "jsr", OP_DIRECT | OP_BRANCH, 2, 0x17, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jsr", OP_IND16 | OP_BRANCH, 3, 0x16, 4, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jsr", OP_IDX, 2, 0x15, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jsr", OP_IDX_1, 3, 0x15, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jsr", OP_IDX_2, 4, 0x15, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jsr", OP_D_IDX, 2, 0x15, 7, 7, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "jsr", OP_D_IDX_2, 4, 0x15, 7, 7, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "ldd", OP_IMM16, 3, 0xcc, 2, 2, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldd", OP_DIRECT, 2, 0xdc, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldd", OP_IND16, 3, 0xfc, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldd", OP_IX, 2, 0xec, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "ldd", OP_IY | OP_PAGE2, 3, 0xec, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "ldd", OP_IDX, 2, 0xec, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldd", OP_IDX_1, 3, 0xec, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldd", OP_IDX_2, 4, 0xec, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "ldd", OP_D_IDX, 2, 0xec, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "ldd", OP_D_IDX_2, 4, 0xec, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "lbcc", OP_JUMP_REL16 | OP_PAGE2, 4, 0x24, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbcs", OP_JUMP_REL16 | OP_PAGE2, 4, 0x25, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbeq", OP_JUMP_REL16 | OP_PAGE2, 4, 0x27, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbge", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2c, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbgt", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2e, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbhi", OP_JUMP_REL16 | OP_PAGE2, 4, 0x22, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbhs", OP_JUMP_REL16 | OP_PAGE2, 4, 0x24, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lble", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2f, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lblo", OP_JUMP_REL16 | OP_PAGE2, 4, 0x25, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbls", OP_JUMP_REL16 | OP_PAGE2, 4, 0x23, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lblt", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2d, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbmi", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2b, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbne", OP_JUMP_REL16 | OP_PAGE2, 4, 0x26, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbpl", OP_JUMP_REL16 | OP_PAGE2, 4, 0x2a, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbra", OP_JUMP_REL16 | OP_PAGE2, 4, 0x20, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbrn", OP_JUMP_REL16 | OP_PAGE2, 4, 0x21, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbvc", OP_JUMP_REL16 | OP_PAGE2, 4, 0x28, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "lbvs", OP_JUMP_REL16 | OP_PAGE2, 4, 0x29, 3, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "lds", OP_IMM16, 3, 0x8e, 3, 3, CLR_V_CHG_NZ, cpu6811 },
- { "lds", OP_DIRECT, 2, 0x9e, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "lds", OP_IND16, 3, 0xbe, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "lds", OP_IX, 2, 0xae, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "lds", OP_IY | OP_PAGE2, 3, 0xae, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "lds", OP_IMM16, 3, 0xcf, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_DIRECT, 2, 0xdf, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_IND16, 3, 0xff, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_IDX, 2, 0xef, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_IDX_1, 3, 0xef, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_IDX_2, 4, 0xef, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_D_IDX, 2, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "lds", OP_D_IDX_2, 4, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "ldaa", OP_IMM8, 2, 0x86, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_DIRECT, 2, 0x96, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_IND16, 3, 0xb6, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_IX, 2, 0xa6, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldaa", OP_IY | OP_PAGE2, 3, 0xa6, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldaa", OP_IDX, 2, 0xa6, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_IDX_1, 3, 0xa6, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_IDX_2, 4, 0xa6, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_D_IDX, 2, 0xa6, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldaa", OP_D_IDX_2, 4, 0xa6, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "ldx", OP_IMM16, 3, 0xce, 2, 2, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldx", OP_DIRECT, 2, 0xde, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldx", OP_IND16, 3, 0xfe, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "ldx", OP_IX, 2, 0xee, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "ldx", OP_IY | OP_PAGE4, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "ldx", OP_IDX, 2, 0xee, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldx", OP_IDX_1, 3, 0xee, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldx", OP_IDX_2, 4, 0xee, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "ldx", OP_D_IDX, 2, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "ldx", OP_D_IDX_2, 4, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "ldab", OP_IMM8, 2, 0xc6, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_DIRECT, 2, 0xd6, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_IND16, 3, 0xf6, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_IX, 2, 0xe6, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldab", OP_IY | OP_PAGE2, 3, 0xe6, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldab", OP_IDX, 2, 0xe6, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_IDX_1, 3, 0xe6, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_IDX_2, 4, 0xe6, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_D_IDX, 2, 0xe6, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldab", OP_D_IDX_2, 4, 0xe6, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "ldy", OP_IMM16 | OP_PAGE2, 4, 0xce, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "ldy", OP_DIRECT | OP_PAGE2, 3, 0xde, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "ldy", OP_IND16 | OP_PAGE2, 4, 0xfe, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "ldy", OP_IX | OP_PAGE3, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "ldy", OP_IY | OP_PAGE2, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "ldy", OP_IMM16, 3, 0xcd, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_DIRECT, 2, 0xdd, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_IND16, 3, 0xfd, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_IDX, 2, 0xed, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_IDX_1, 3, 0xed, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_IDX_2, 4, 0xed, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_D_IDX, 2, 0xed, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "ldy", OP_D_IDX_2, 4, 0xed, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "ldd", OP_IMM16, 3, 0xcc, 2, 2, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_DIRECT, 2, 0xdc, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_IND16, 3, 0xfc, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_IX, 2, 0xec, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldd", OP_IY | OP_PAGE2, 3, 0xec, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldd", OP_IDX, 2, 0xec, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_IDX_1, 3, 0xec, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_IDX_2, 4, 0xec, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_D_IDX, 2, 0xec, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldd", OP_D_IDX_2, 4, 0xec, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "leas", OP_IDX, 2, 0x1b, 2, 2, CHG_NONE, cpu6812 },
- { "leas", OP_IDX_1, 3, 0x1b, 2, 2, CHG_NONE, cpu6812 },
- { "leas", OP_IDX_2, 4, 0x1b, 2, 2, CHG_NONE, cpu6812 },
+ { "lds", OP_IMM16, 3, 0x8e, 3, 3, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "lds", OP_DIRECT, 2, 0x9e, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "lds", OP_IND16, 3, 0xbe, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "lds", OP_IX, 2, 0xae, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "lds", OP_IY | OP_PAGE2, 3, 0xae, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "lds", OP_IMM16, 3, 0xcf, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_DIRECT, 2, 0xdf, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_IND16, 3, 0xff, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_IDX, 2, 0xef, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_IDX_1, 3, 0xef, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_IDX_2, 4, 0xef, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_D_IDX, 2, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "lds", OP_D_IDX_2, 4, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "leax", OP_IDX, 2, 0x1a, 2, 2, CHG_NONE, cpu6812 },
- { "leax", OP_IDX_1, 3, 0x1a, 2, 2, CHG_NONE, cpu6812 },
- { "leax", OP_IDX_2, 4, 0x1a, 2, 2, CHG_NONE, cpu6812 },
+ { "ldx", OP_IMM16, 3, 0xce, 2, 2, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_DIRECT, 2, 0xde, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_IND16, 3, 0xfe, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_IX, 2, 0xee, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldx", OP_IY | OP_PAGE4, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldx", OP_IDX, 2, 0xee, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_IDX_1, 3, 0xee, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_IDX_2, 4, 0xee, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_D_IDX, 2, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldx", OP_D_IDX_2, 4, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "leay", OP_IDX, 2, 0x19, 2, 2, CHG_NONE, cpu6812 },
- { "leay", OP_IDX_1, 3, 0x19, 2, 2, CHG_NONE, cpu6812 },
- { "leay", OP_IDX_2, 4, 0x19, 2, 2, CHG_NONE, cpu6812 },
+ { "ldy", OP_IMM16 | OP_PAGE2, 4, 0xce, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldy", OP_DIRECT | OP_PAGE2, 3, 0xde, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldy", OP_IND16 | OP_PAGE2, 4, 0xfe, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldy", OP_IX | OP_PAGE3, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldy", OP_IY | OP_PAGE2, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "ldy", OP_IMM16, 3, 0xcd, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_DIRECT, 2, 0xdd, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_IND16, 3, 0xfd, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_IDX, 2, 0xed, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_IDX_1, 3, 0xed, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_IDX_2, 4, 0xed, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_D_IDX, 2, 0xed, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "ldy", OP_D_IDX_2, 4, 0xed, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "lsl", OP_IND16, 3, 0x78, 4, 4, CHG_NZVC, cpu6811|cpu6812 },
- { "lsl", OP_IX, 2, 0x68, 6, 6, CHG_NZVC, cpu6811 },
- { "lsl", OP_IY | OP_PAGE2, 3, 0x68, 7, 7, CHG_NZVC, cpu6811 },
- { "lsl", OP_IDX, 2, 0x68, 3, 3, CHG_NZVC, cpu6812 },
- { "lsl", OP_IDX_1, 3, 0x68, 4, 4, CHG_NZVC, cpu6812 },
- { "lsl", OP_IDX_2, 4, 0x68, 5, 5, CHG_NZVC, cpu6812 },
- { "lsl", OP_D_IDX, 2, 0x68, 6, 6, CHG_NZVC, cpu6812 },
- { "lsl", OP_D_IDX_2, 4, 0x68, 6, 6, CHG_NZVC, cpu6812 },
+ { "leas", OP_IDX, 2, 0x1b, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "leas", OP_IDX_1, 3, 0x1b, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "leas", OP_IDX_2, 4, 0x1b, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "lsla", OP_NONE, 1, 0x48, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "lslb", OP_NONE, 1, 0x58, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "lsld", OP_NONE, 1, 0x05, 3, 3, CHG_NZVC, cpu6811 },
- { "lsld", OP_NONE, 1, 0x59, 1, 1, CHG_NZVC, cpu6812 },
+ { "leax", OP_IDX, 2, 0x1a, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "leax", OP_IDX_1, 3, 0x1a, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "leax", OP_IDX_2, 4, 0x1a, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "lsr", OP_IND16, 3, 0x74, 4, 4, CLR_N_CHG_ZVC, cpu6811|cpu6812},
- { "lsr", OP_IX, 2, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6811 },
- { "lsr", OP_IY | OP_PAGE2, 3, 0x64, 7, 7, CLR_V_CHG_ZVC, cpu6811 },
- { "lsr", OP_IDX, 2, 0x64, 3, 3, CLR_N_CHG_ZVC, cpu6812 },
- { "lsr", OP_IDX_1, 3, 0x64, 4, 4, CLR_N_CHG_ZVC, cpu6812 },
- { "lsr", OP_IDX_2, 4, 0x64, 5, 5, CLR_N_CHG_ZVC, cpu6812 },
- { "lsr", OP_D_IDX, 2, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6812 },
- { "lsr", OP_D_IDX_2, 4, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6812 },
+ { "leay", OP_IDX, 2, 0x19, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "leay", OP_IDX_1, 3, 0x19, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "leay", OP_IDX_2, 4, 0x19, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "lsra", OP_NONE, 1, 0x44, 1, 1, CLR_N_CHG_ZVC, cpu6811|cpu6812},
- { "lsrb", OP_NONE, 1, 0x54, 1, 1, CLR_N_CHG_ZVC, cpu6811|cpu6812},
- { "lsrd", OP_NONE, 1, 0x04, 3, 3, CLR_N_CHG_ZVC, cpu6811 },
- { "lsrd", OP_NONE, 1, 0x49, 1, 1, CLR_N_CHG_ZVC, cpu6812 },
+ { "lsl", OP_IND16, 3, 0x78, 4, 4, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "lsl", OP_IX, 2, 0x68, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "lsl", OP_IY | OP_PAGE2, 3, 0x68, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "lsl", OP_IDX, 2, 0x68, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "lsl", OP_IDX_1, 3, 0x68, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "lsl", OP_IDX_2, 4, 0x68, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "lsl", OP_D_IDX, 2, 0x68, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "lsl", OP_D_IDX_2, 4, 0x68, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "maxa", OP_IDX | OP_PAGE2, 3, 0x18, 4, 4, CHG_NZVC, cpu6812 },
- { "maxa", OP_IDX_1 | OP_PAGE2, 4, 0x18, 4, 4, CHG_NZVC, cpu6812 },
- { "maxa", OP_IDX_2 | OP_PAGE2, 5, 0x18, 5, 5, CHG_NZVC, cpu6812 },
- { "maxa", OP_D_IDX | OP_PAGE2, 3, 0x18, 7, 7, CHG_NZVC, cpu6812 },
- { "maxa", OP_D_IDX_2 | OP_PAGE2, 5, 0x18, 7, 7, CHG_NZVC, cpu6812 },
+ { "lsla", OP_NONE, 1, 0x48, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "lslb", OP_NONE, 1, 0x58, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "lsld", OP_NONE, 1, 0x05, 3, 3, CHG_NZVC, cpu6811, 0 },
+ { "lsld", OP_NONE, 1, 0x59, 1, 1, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+/* lslw is the same as aslw. */
+ { "lslw", OP_IND16 | OP_PAGE2, 3, 0x78, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "lslw", OP_IDX | OP_PAGE2, 2, 0x68, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "lslw", OP_IDX_1 | OP_PAGE2, 3, 0x68, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "lslw", OP_IDX_2 | OP_PAGE2, 4, 0x68, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "lslw", OP_D_IDX | OP_PAGE2, 2, 0x68, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "lslw", OP_D_IDX_2 | OP_PAGE2, 4, 0x68, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+/* lslx is same as aslx. */
+ { "lslx", OP_NONE | OP_PAGE2, 1, 0x48, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+/* lsly is the same as asly. */
+ { "lsly", OP_NONE | OP_PAGE2, 1, 0x58, 1, 1, CHG_NZVC, cpu9s12x, 0 },
- { "maxm", OP_IDX | OP_PAGE2, 3, 0x1c, 4, 4, CHG_NZVC, cpu6812 },
- { "maxm", OP_IDX_1 | OP_PAGE2, 4, 0x1c, 5, 5, CHG_NZVC, cpu6812 },
- { "maxm", OP_IDX_2 | OP_PAGE2, 5, 0x1c, 6, 6, CHG_NZVC, cpu6812 },
- { "maxm", OP_D_IDX | OP_PAGE2, 3, 0x1c, 7, 7, CHG_NZVC, cpu6812 },
- { "maxm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1c, 7, 7, CHG_NZVC, cpu6812 },
+ { "lsr", OP_IND16, 3, 0x74, 4, 4, CLR_N_CHG_ZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "lsr", OP_IX, 2, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6811, 0 },
+ { "lsr", OP_IY | OP_PAGE2, 3, 0x64, 7, 7, CLR_V_CHG_ZVC, cpu6811, 0 },
+ { "lsr", OP_IDX, 2, 0x64, 3, 3, CLR_N_CHG_ZVC, cpu6812|cpu9s12x, 0 },
+ { "lsr", OP_IDX_1, 3, 0x64, 4, 4, CLR_N_CHG_ZVC, cpu6812|cpu9s12x, 0 },
+ { "lsr", OP_IDX_2, 4, 0x64, 5, 5, CLR_N_CHG_ZVC, cpu6812|cpu9s12x, 0 },
+ { "lsr", OP_D_IDX, 2, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6812|cpu9s12x, 0 },
+ { "lsr", OP_D_IDX_2, 4, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6812|cpu9s12x, 0 },
- { "mem", OP_NONE, 1, 0x01, 5, 5, CHG_HNZVC, cpu6812 },
+ { "lsra", OP_NONE, 1, 0x44, 1, 1, CLR_N_CHG_ZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "lsrb", OP_NONE, 1, 0x54, 1, 1, CLR_N_CHG_ZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "lsrd", OP_NONE, 1, 0x04, 3, 3, CLR_N_CHG_ZVC, cpu6811, 0 },
+ { "lsrd", OP_NONE, 1, 0x49, 1, 1, CLR_N_CHG_ZVC, cpu6812|cpu9s12x, 0 },
- { "mina", OP_IDX | OP_PAGE2, 3, 0x19, 4, 4, CHG_NZVC, cpu6812 },
- { "mina", OP_IDX_1 | OP_PAGE2, 4, 0x19, 4, 4, CHG_NZVC, cpu6812 },
- { "mina", OP_IDX_2 | OP_PAGE2, 5, 0x19, 5, 5, CHG_NZVC, cpu6812 },
- { "mina", OP_D_IDX | OP_PAGE2, 3, 0x19, 7, 7, CHG_NZVC, cpu6812 },
- { "mina", OP_D_IDX_2 | OP_PAGE2, 5, 0x19, 7, 7, CHG_NZVC, cpu6812 },
+ { "lsrw", OP_IND16 | OP_PAGE2, 3, 0x74, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "lsrw", OP_IDX | OP_PAGE2, 2, 0x64, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "lsrw", OP_IDX_1 | OP_PAGE2, 3, 0x64, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "lsrw", OP_IDX_2 | OP_PAGE2, 4, 0x64, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "lsrw", OP_D_IDX | OP_PAGE2, 2, 0x64, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "lsrw", OP_D_IDX_2 | OP_PAGE2, 4, 0x64, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "minm", OP_IDX | OP_PAGE2, 3, 0x1d, 4, 4, CHG_NZVC, cpu6812 },
- { "minm", OP_IDX_1 | OP_PAGE2, 4, 0x1d, 5, 5, CHG_NZVC, cpu6812 },
- { "minm", OP_IDX_2 | OP_PAGE2, 5, 0x1d, 6, 6, CHG_NZVC, cpu6812 },
- { "minm", OP_D_IDX | OP_PAGE2, 3, 0x1d, 7, 7, CHG_NZVC, cpu6812 },
- { "minm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1d, 7, 7, CHG_NZVC, cpu6812 },
+ { "lsrx", OP_NONE | OP_PAGE2, 1, 0x44, 1, 1, CHG_NZVC, cpu9s12x, 0 },
- { "movb", OP_IMM8|OP_IND16_p2|OP_PAGE2, 5, 0x0b, 4, 4, CHG_NONE, cpu6812 },
- { "movb", OP_IMM8|OP_IDX_p2|OP_PAGE2, 4, 0x08, 4, 4, CHG_NONE, cpu6812 },
- { "movb", OP_IND16|OP_IND16_p2|OP_PAGE2, 6, 0x0c, 6, 6, CHG_NONE, cpu6812 },
- { "movb", OP_IND16 | OP_IDX_p2 | OP_PAGE2, 5, 0x09, 5, 5, CHG_NONE, cpu6812 },
- { "movb", OP_IDX | OP_IND16_p2 | OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu6812 },
- { "movb", OP_IDX | OP_IDX_p2 | OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu6812 },
+ { "lsry", OP_NONE | OP_PAGE2, 1, 0x54, 1, 1, CHG_NZVC, cpu9s12x, 0 },
- { "movw", OP_IMM16 | OP_IND16_p2 | OP_PAGE2, 6, 0x03, 5, 5, CHG_NONE, cpu6812 },
- { "movw", OP_IMM16 | OP_IDX_p2 | OP_PAGE2, 5, 0x00, 4, 4, CHG_NONE, cpu6812 },
- { "movw", OP_IND16 | OP_IND16_p2 | OP_PAGE2, 6, 0x04, 6, 6, CHG_NONE, cpu6812 },
- { "movw", OP_IND16 | OP_IDX_p2 | OP_PAGE2, 5, 0x01, 5, 5, CHG_NONE, cpu6812 },
- { "movw", OP_IDX | OP_IND16_p2 | OP_PAGE2, 5, 0x05, 5, 5, CHG_NONE, cpu6812 },
- { "movw", OP_IDX | OP_IDX_p2 | OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu6812 },
+ { "maxa", OP_IDX | OP_PAGE2, 3, 0x18, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxa", OP_IDX_1 | OP_PAGE2, 4, 0x18, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxa", OP_IDX_2 | OP_PAGE2, 5, 0x18, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxa", OP_D_IDX | OP_PAGE2, 3, 0x18, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxa", OP_D_IDX_2 | OP_PAGE2, 5, 0x18, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "mul", OP_NONE, 1, 0x3d, 3, 10, CHG_C, cpu6811 },
- { "mul", OP_NONE, 1, 0x12, 3, 3, CHG_C, cpu6812 },
+ { "maxm", OP_IDX | OP_PAGE2, 3, 0x1c, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxm", OP_IDX_1 | OP_PAGE2, 4, 0x1c, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxm", OP_IDX_2 | OP_PAGE2, 5, 0x1c, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxm", OP_D_IDX | OP_PAGE2, 3, 0x1c, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "maxm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1c, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "neg", OP_IND16, 3, 0x70, 4, 4, CHG_NZVC, cpu6811|cpu6812 },
- { "neg", OP_IX, 2, 0x60, 6, 6, CHG_NZVC, cpu6811 },
- { "neg", OP_IY | OP_PAGE2, 3, 0x60, 7, 7, CHG_NZVC, cpu6811 },
- { "neg", OP_IDX, 2, 0x60, 3, 3, CHG_NZVC, cpu6812 },
- { "neg", OP_IDX_1, 3, 0x60, 4, 4, CHG_NZVC, cpu6812 },
- { "neg", OP_IDX_2, 4, 0x60, 5, 5, CHG_NZVC, cpu6812 },
- { "neg", OP_D_IDX, 2, 0x60, 6, 6, CHG_NZVC, cpu6812 },
- { "neg", OP_D_IDX_2, 4, 0x60, 6, 6, CHG_NZVC, cpu6812 },
+ { "mem", OP_NONE, 1, 0x01, 5, 5, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
- { "nega", OP_NONE, 1, 0x40, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "negb", OP_NONE, 1, 0x50, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "nop", OP_NONE, 1, 0x01, 2, 2, CHG_NONE, cpu6811 },
- { "nop", OP_NONE, 1, 0xa7, 1, 1, CHG_NONE, cpu6812 },
+ { "mina", OP_IDX | OP_PAGE2, 3, 0x19, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "mina", OP_IDX_1 | OP_PAGE2, 4, 0x19, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "mina", OP_IDX_2 | OP_PAGE2, 5, 0x19, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "mina", OP_D_IDX | OP_PAGE2, 3, 0x19, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "mina", OP_D_IDX_2 | OP_PAGE2, 5, 0x19, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "oraa", OP_IMM8, 2, 0x8a, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "oraa", OP_DIRECT, 2, 0x9a, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "oraa", OP_IND16, 3, 0xba, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "oraa", OP_IX, 2, 0xaa, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "oraa", OP_IY | OP_PAGE2, 3, 0xaa, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "oraa", OP_IDX, 2, 0xaa, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "oraa", OP_IDX_1, 3, 0xaa, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "oraa", OP_IDX_2, 4, 0xaa, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "oraa", OP_D_IDX, 2, 0xaa, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "oraa", OP_D_IDX_2, 4, 0xaa, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+ { "minm", OP_IDX | OP_PAGE2, 3, 0x1d, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "minm", OP_IDX_1 | OP_PAGE2, 4, 0x1d, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "minm", OP_IDX_2 | OP_PAGE2, 5, 0x1d, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "minm", OP_D_IDX | OP_PAGE2, 3, 0x1d, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "minm", OP_D_IDX_2 | OP_PAGE2, 5, 0x1d, 7, 7, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "orab", OP_IMM8, 2, 0xca, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "orab", OP_DIRECT, 2, 0xda, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "orab", OP_IND16, 3, 0xfa, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812 },
- { "orab", OP_IX, 2, 0xea, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "orab", OP_IY | OP_PAGE2, 3, 0xea, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "orab", OP_IDX, 2, 0xea, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "orab", OP_IDX_1, 3, 0xea, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "orab", OP_IDX_2, 4, 0xea, 4, 4, CLR_V_CHG_NZ, cpu6812 },
- { "orab", OP_D_IDX, 2, 0xea, 6, 6, CLR_V_CHG_NZ, cpu6812 },
- { "orab", OP_D_IDX_2, 4, 0xea, 6, 6, CLR_V_CHG_NZ, cpu6812 },
+/* The S12X additional modes are implemented, but uncommenting here causes a problem */
+ { "movb", OP_IMM8|OP_IND16_p2|OP_PAGE2, 5, 0x0b, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "movb", OP_IMM8|OP_IDX_p2|OP_PAGE2, 4, 0x08, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* { "movb", OP_IMM8|OP_IDX1_p2|OP_PAGE2, 5, 0x08, 4, 4, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IMM8|OP_IDX2_p2|OP_PAGE2, 4, 0x08, 4, 4, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IMM8|OP_D_IDX|OP_PAGE2, 5, 0x08, 4, 4, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IMM8|OP_D_IDX2_p2|OP_PAGE2, 4, 0x08, 4, 4, CHG_NONE, cpu9s12x, 0 },*/
- { "orcc", OP_IMM8, 2, 0x14, 1, 1, CHG_ALL, cpu6812 },
+ { "movb", OP_IND16|OP_IND16_p2|OP_PAGE2, 6, 0x0c, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "movb", OP_IND16|OP_IDX_p2|OP_PAGE2, 5, 0x09, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* { "movb", OP_IND16|OP_IDX1_p2|OP_PAGE2, 6, 0x09, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IND16|OP_IDX2_p2|OP_PAGE2, 5, 0x09, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IND16|OP_D_IDX_p2|OP_PAGE2, 6, 0x09, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IND16|OP_D_IDX2_p2|OP_PAGE2, 5, 0x09, 5, 5, CHG_NONE, cpu9s12x, 0 }, */
- { "psha", OP_NONE, 1, 0x36, 2, 2, CHG_NONE, cpu6811|cpu6812 },
- { "pshb", OP_NONE, 1, 0x37, 2, 2, CHG_NONE, cpu6811|cpu6812 },
- { "pshc", OP_NONE, 1, 0x39, 2, 2, CHG_NONE, cpu6812 },
- { "pshd", OP_NONE, 1, 0x3b, 2, 2, CHG_NONE, cpu6812 },
- { "pshx", OP_NONE, 1, 0x3c, 4, 4, CHG_NONE, cpu6811 },
- { "pshx", OP_NONE, 1, 0x34, 2, 2, CHG_NONE, cpu6812 },
- { "pshy", OP_NONE | OP_PAGE2,2, 0x3c, 5, 5, CHG_NONE, cpu6811 },
- { "pshy", OP_NONE, 1, 0x35, 2, 2, CHG_NONE, cpu6812 },
+ { "movb", OP_IDX|OP_IND16_p2|OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "movb", OP_IDX|OP_IDX_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* { "movb", OP_IDX|OP_IDX1_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX|OP_IDX2_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX|OP_D_IDX_p2|OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX|OP_D_IDX2_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "pula", OP_NONE, 1, 0x32, 3, 3, CHG_NONE, cpu6811|cpu6812 },
- { "pulb", OP_NONE, 1, 0x33, 3, 3, CHG_NONE, cpu6811|cpu6812 },
- { "pulc", OP_NONE, 1, 0x38, 3, 3, CHG_NONE, cpu6812 },
- { "puld", OP_NONE, 1, 0x3a, 3, 3, CHG_NONE, cpu6812 },
- { "pulx", OP_NONE, 1, 0x38, 5, 5, CHG_NONE, cpu6811 },
- { "pulx", OP_NONE, 1, 0x30, 3, 3, CHG_NONE, cpu6812 },
- { "puly", OP_NONE | OP_PAGE2,2, 0x38, 6, 6, CHG_NONE, cpu6811 },
- { "puly", OP_NONE, 1, 0x31, 3, 3, CHG_NONE, cpu6812 },
+ { "movb", OP_IDX_1|OP_IND16_p2|OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_1|OP_IDX_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_1|OP_IDX1_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_1|OP_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_1|OP_D_IDX_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_1|OP_D_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "rev", OP_NONE | OP_PAGE2, 2, 0x3a, _M, _M, CHG_HNZVC, cpu6812 },
- { "revw", OP_NONE | OP_PAGE2, 2, 0x3b, _M, _M, CHG_HNZVC, cpu6812 },
+ { "movb", OP_IDX_2|OP_IND16_p2|OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_2|OP_IDX_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_2|OP_IDX1_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_2|OP_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_2|OP_D_IDX_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_IDX_2|OP_D_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "rol", OP_IND16, 3, 0x79, 6, 6, CHG_NZVC, cpu6811 },
- { "rol", OP_IX, 2, 0x69, 6, 6, CHG_NZVC, cpu6811 },
- { "rol", OP_IY | OP_PAGE2, 3, 0x69, 7, 7, CHG_NZVC, cpu6811 },
- { "rol", OP_IND16, 3, 0x75, 4, 4, CHG_NZVC, cpu6812 },
- { "rol", OP_IDX, 2, 0x65, 3, 3, CHG_NZVC, cpu6812 },
- { "rol", OP_IDX_1, 3, 0x65, 4, 4, CHG_NZVC, cpu6812 },
- { "rol", OP_IDX_2, 4, 0x65, 5, 5, CHG_NZVC, cpu6812 },
- { "rol", OP_D_IDX, 2, 0x65, 6, 6, CHG_NZVC, cpu6812 },
- { "rol", OP_D_IDX_2, 4, 0x65, 6, 6, CHG_NZVC, cpu6812 },
+ { "movb", OP_D_IDX|OP_IND16_p2|OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX|OP_IDX_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX|OP_IDX1_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX|OP_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX|OP_D_IDX_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX|OP_D_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "rola", OP_NONE, 1, 0x49, 2, 2, CHG_NZVC, cpu6811 },
- { "rola", OP_NONE, 1, 0x45, 1, 1, CHG_NZVC, cpu6812 },
- { "rolb", OP_NONE, 1, 0x59, 2, 2, CHG_NZVC, cpu6811 },
- { "rolb", OP_NONE, 1, 0x55, 1, 1, CHG_NZVC, cpu6812 },
+ { "movb", OP_D_IDX_2|OP_IND16_p2|OP_PAGE2, 5, 0x0d, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX_2|OP_IDX_p2|OP_PAGE2, 4, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX_2|OP_IDX1_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX_2|OP_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX_2|OP_D_IDX_p2|OP_PAGE2, 6, 0x0a, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movb", OP_D_IDX_2|OP_D_IDX2_p2|OP_PAGE2, 5, 0x0a, 5, 5, CHG_NONE, cpu9s12x, 0 },*/
- { "ror", OP_IND16, 3, 0x76, 4, 4, CHG_NZVC, cpu6811|cpu6812 },
- { "ror", OP_IX, 2, 0x66, 6, 6, CHG_NZVC, cpu6811 },
- { "ror", OP_IY | OP_PAGE2, 3, 0x66, 7, 7, CHG_NZVC, cpu6811 },
- { "ror", OP_IDX, 2, 0x66, 3, 3, CHG_NZVC, cpu6812 },
- { "ror", OP_IDX_1, 3, 0x66, 4, 4, CHG_NZVC, cpu6812 },
- { "ror", OP_IDX_2, 4, 0x66, 5, 5, CHG_NZVC, cpu6812 },
- { "ror", OP_D_IDX, 2, 0x66, 6, 6, CHG_NZVC, cpu6812 },
- { "ror", OP_D_IDX_2, 4, 0x66, 6, 6, CHG_NZVC, cpu6812 },
+ { "movw", OP_IMM16 | OP_IND16_p2 | OP_PAGE2, 6, 0x03, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "movw", OP_IMM16 | OP_IDX_p2 | OP_PAGE2, 5, 0x00, 4, 4, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* { "movw", OP_IMM16|OP_IDX1_p2|OP_PAGE2, 5, 0x00, 4, 4, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IMM16|OP_IDX2_p2|OP_PAGE2, 4, 0x00, 4, 4, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IMM16|OP_D_IDX_p2|OP_PAGE2, 5, 0x00, 4, 4, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IMM16|OP_D_IDX2_p2|OP_PAGE2, 4, 0x00, 4, 4, CHG_NONE, cpu9s12x, 0 },*/
- { "rora", OP_NONE, 1, 0x46, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "rorb", OP_NONE, 1, 0x56, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
+ { "movw", OP_IND16 | OP_IND16_p2 | OP_PAGE2, 6, 0x04, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "movw", OP_IND16 | OP_IDX_p2 | OP_PAGE2, 5, 0x01, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* { "movw", OP_IND16|OP_IDX1_p2|OP_PAGE2, 6, 0x01, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IND16|OP_IDX2_p2|OP_PAGE2, 5, 0x01, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IND16|OP_D_IDX_p2|OP_PAGE2, 6, 0x01, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IND16|OP_D_IDX2_p2|OP_PAGE2, 5, 0x01, 5, 5, CHG_NONE, cpu9s12x, 0 },*/
- { "rtc", OP_NONE, 1, 0x0a, 6, 6, CHG_NONE, cpu6812 },
- { "rti", OP_NONE, 1, 0x3b, 12, 12, CHG_ALL, cpu6811},
- { "rti", OP_NONE, 1, 0x0b, 8, 10, CHG_ALL, cpu6812},
- { "rts", OP_NONE, 1, 0x39, 5, 5, CHG_NONE, cpu6811 },
- { "rts", OP_NONE, 1, 0x3d, 5, 5, CHG_NONE, cpu6812 },
+ { "movw", OP_IDX | OP_IND16_p2 | OP_PAGE2, 5, 0x05, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "movw", OP_IDX | OP_IDX_p2 | OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* { "movw", OP_IDX|OP_IDX1_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX|OP_IDX2_p2|OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX|OP_D_IDX_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX|OP_D_IDX2_p2|OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "sba", OP_NONE, 1, 0x10, 2, 2, CHG_NZVC, cpu6811 },
- { "sba", OP_NONE | OP_PAGE2, 2, 0x16, 2, 2, CHG_NZVC, cpu6812 },
+ { "movw", OP_IDX_1|OP_IND16_p2|OP_PAGE2, 5, 0x05, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_1|OP_IDX_p2|OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_1|OP_IDX1_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_1|OP_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_1|OP_D_IDX_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_1|OP_D_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "sbca", OP_IMM8, 2, 0x82, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "sbca", OP_DIRECT, 2, 0x92, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "sbca", OP_IND16, 3, 0xb2, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "sbca", OP_IX, 2, 0xa2, 4, 4, CHG_NZVC, cpu6811 },
- { "sbca", OP_IY | OP_PAGE2, 3, 0xa2, 5, 5, CHG_NZVC, cpu6811 },
- { "sbca", OP_IDX, 2, 0xa2, 3, 3, CHG_NZVC, cpu6812 },
- { "sbca", OP_IDX_1, 3, 0xa2, 3, 3, CHG_NZVC, cpu6812 },
- { "sbca", OP_IDX_2, 4, 0xa2, 4, 4, CHG_NZVC, cpu6812 },
- { "sbca", OP_D_IDX, 2, 0xa2, 6, 6, CHG_NZVC, cpu6812 },
- { "sbca", OP_D_IDX_2, 4, 0xa2, 6, 6, CHG_NZVC, cpu6812 },
+ { "movw", OP_IDX_2|OP_IND16_p2|OP_PAGE2, 5, 0x05, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_2|OP_IDX_p2|OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_2|OP_IDX1_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_2|OP_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_2|OP_D_IDX_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_IDX_2|OP_D_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "sbcb", OP_IMM8, 2, 0xc2, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "sbcb", OP_DIRECT, 2, 0xd2, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "sbcb", OP_IND16, 3, 0xf2, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "sbcb", OP_IX, 2, 0xe2, 4, 4, CHG_NZVC, cpu6811 },
- { "sbcb", OP_IY | OP_PAGE2, 3, 0xe2, 5, 5, CHG_NZVC, cpu6811 },
- { "sbcb", OP_IDX, 2, 0xe2, 3, 3, CHG_NZVC, cpu6812 },
- { "sbcb", OP_IDX_1, 3, 0xe2, 3, 3, CHG_NZVC, cpu6812 },
- { "sbcb", OP_IDX_2, 4, 0xe2, 4, 4, CHG_NZVC, cpu6812 },
- { "sbcb", OP_D_IDX, 2, 0xe2, 6, 6, CHG_NZVC, cpu6812 },
- { "sbcb", OP_D_IDX_2, 4, 0xe2, 6, 6, CHG_NZVC, cpu6812 },
+ { "movw", OP_D_IDX|OP_IND16_p2|OP_PAGE2, 5, 0x05, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX|OP_IDX_p2|OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX|OP_IDX1_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX|OP_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX|OP_D_IDX_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX|OP_D_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
- { "sec", OP_NONE, 1, 0x0d, 2, 2, SET_C, cpu6811 },
- { "sei", OP_NONE, 1, 0x0f, 2, 2, SET_I, cpu6811 },
- { "sev", OP_NONE, 1, 0x0b, 2, 2, SET_V, cpu6811 },
+ { "movw", OP_D_IDX_2|OP_IND16_p2|OP_PAGE2, 5, 0x05, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX_2|OP_IDX_p2|OP_PAGE2, 4, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX_2|OP_IDX1_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX_2|OP_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX_2|OP_D_IDX_p2|OP_PAGE2, 6, 0x02, 6, 6, CHG_NONE, cpu9s12x, 0 },
+ { "movw", OP_D_IDX_2|OP_D_IDX2_p2|OP_PAGE2, 5, 0x02, 5, 5, CHG_NONE, cpu9s12x, 0 },*/
+ { "mul", OP_NONE, 1, 0x3d, 3, 10, CHG_C, cpu6811, 0 },
+ { "mul", OP_NONE, 1, 0x12, 3, 3, CHG_C, cpu6812|cpu9s12x, 0 },
+
+ { "neg", OP_IND16, 3, 0x70, 4, 4, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "neg", OP_IX, 2, 0x60, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "neg", OP_IY | OP_PAGE2, 3, 0x60, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "neg", OP_IDX, 2, 0x60, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "neg", OP_IDX_1, 3, 0x60, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "neg", OP_IDX_2, 4, 0x60, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "neg", OP_D_IDX, 2, 0x60, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "neg", OP_D_IDX_2, 4, 0x60, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "nega", OP_NONE, 1, 0x40, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "negb", OP_NONE, 1, 0x50, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+
+ { "negw", OP_IND16| OP_PAGE2, 3, 0x70, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "negw", OP_IDX| OP_PAGE2, 2, 0x60, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "negw", OP_IDX_1| OP_PAGE2, 3, 0x60, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "negw", OP_IDX_2| OP_PAGE2, 4, 0x60, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "negw", OP_D_IDX| OP_PAGE2, 2, 0x60, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "negw", OP_D_IDX_2| OP_PAGE2, 4, 0x60, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "negx", OP_NONE| OP_PAGE2, 1, 0x40, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "negy", OP_NONE| OP_PAGE2, 1, 0x50, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "nop", OP_NONE, 1, 0x01, 2, 2, CHG_NONE, cpu6811, 0 },
+ { "nop", OP_NONE, 1, 0xa7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
+
+ { "oraa", OP_IMM8, 2, 0x8a, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_DIRECT, 2, 0x9a, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_IND16, 3, 0xba, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_IX, 2, 0xaa, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "oraa", OP_IY | OP_PAGE2, 3, 0xaa, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "oraa", OP_IDX, 2, 0xaa, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_IDX_1, 3, 0xaa, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_IDX_2, 4, 0xaa, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_D_IDX, 2, 0xaa, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "oraa", OP_D_IDX_2, 4, 0xaa, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+
+ { "orab", OP_IMM8, 2, 0xca, 1, 1, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "orab", OP_DIRECT, 2, 0xda, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "orab", OP_IND16, 3, 0xfa, 3, 3, CLR_V_CHG_NZ, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "orab", OP_IX, 2, 0xea, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "orab", OP_IY | OP_PAGE2, 3, 0xea, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "orab", OP_IDX, 2, 0xea, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "orab", OP_IDX_1, 3, 0xea, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "orab", OP_IDX_2, 4, 0xea, 4, 4, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "orab", OP_D_IDX, 2, 0xea, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "orab", OP_D_IDX_2, 4, 0xea, 6, 6, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+
+ { "orcc", OP_IMM8, 2, 0x14, 1, 1, CHG_ALL, cpu6812|cpu9s12x, 0 },
+
+ { "orx", OP_IMM16| OP_PAGE2, 2, 0x8a, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_DIRECT| OP_PAGE2, 2, 0x9a, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_IND16| OP_PAGE2, 3, 0xba, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_IDX| OP_PAGE2, 2, 0xaa, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_IDX_1| OP_PAGE2, 3, 0xaa, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_IDX_2| OP_PAGE2, 4, 0xaa, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_D_IDX| OP_PAGE2, 2, 0xaa, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "orx", OP_D_IDX_2| OP_PAGE2,4, 0xaa, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "ory", OP_IMM16| OP_PAGE2, 2, 0xca, 1, 1, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_DIRECT| OP_PAGE2, 2, 0xda, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_IND16| OP_PAGE2, 3, 0xfa, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_IDX| OP_PAGE2, 2, 0xea, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_IDX_1| OP_PAGE2, 3, 0xea, 3, 3, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_IDX_2| OP_PAGE2, 4, 0xea, 4, 4, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_D_IDX| OP_PAGE2, 2, 0xea, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+ { "ory", OP_D_IDX_2| OP_PAGE2,4, 0xea, 6, 6, CLR_V_CHG_NZ, cpu9s12x, 0 },
+
+ { "psha", OP_NONE, 1, 0x36, 2, 2, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "pshb", OP_NONE, 1, 0x37, 2, 2, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "pshc", OP_NONE, 1, 0x39, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "pshcw", OP_NONE| OP_PAGE2,1, 0x39, 2, 2, CHG_NONE, cpu9s12x, 0 },
+ { "pshd", OP_NONE, 1, 0x3b, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "pshx", OP_NONE, 1, 0x3c, 4, 4, CHG_NONE, cpu6811, 0 },
+ { "pshx", OP_NONE, 1, 0x34, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "pshy", OP_NONE | OP_PAGE2,2, 0x3c, 5, 5, CHG_NONE, cpu6811, 0 },
+ { "pshy", OP_NONE, 1, 0x35, 2, 2, CHG_NONE, cpu6812|cpu9s12x, 0 },
+
+ { "pula", OP_NONE, 1, 0x32, 3, 3, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "pulb", OP_NONE, 1, 0x33, 3, 3, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "pulc", OP_NONE, 1, 0x38, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "pulcw", OP_NONE| OP_PAGE2,1, 0x38, 2, 2, CHG_NONE, cpu9s12x, 0 },
+ { "puld", OP_NONE, 1, 0x3a, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "pulx", OP_NONE, 1, 0x38, 5, 5, CHG_NONE, cpu6811, 0 },
+ { "pulx", OP_NONE, 1, 0x30, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "puly", OP_NONE | OP_PAGE2,2, 0x38, 6, 6, CHG_NONE, cpu6811, 0 },
+ { "puly", OP_NONE, 1, 0x31, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+
+ { "rev", OP_NONE | OP_PAGE2, 2, 0x3a, _M, _M, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+ { "revw", OP_NONE | OP_PAGE2, 2, 0x3b, _M, _M, CHG_HNZVC, cpu6812|cpu9s12x, 0 },
+
+ { "rol", OP_IND16, 3, 0x79, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "rol", OP_IX, 2, 0x69, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "rol", OP_IY | OP_PAGE2, 3, 0x69, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "rol", OP_IND16, 3, 0x75, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "rol", OP_IDX, 2, 0x65, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "rol", OP_IDX_1, 3, 0x65, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "rol", OP_IDX_2, 4, 0x65, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "rol", OP_D_IDX, 2, 0x65, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "rol", OP_D_IDX_2, 4, 0x65, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "rola", OP_NONE, 1, 0x49, 2, 2, CHG_NZVC, cpu6811, 0 },
+ { "rola", OP_NONE, 1, 0x45, 1, 1, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "rolb", OP_NONE, 1, 0x59, 2, 2, CHG_NZVC, cpu6811, 0 },
+ { "rolb", OP_NONE, 1, 0x55, 1, 1, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "rolw", OP_IND16 | OP_PAGE2, 3, 0x75, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "rolw", OP_IDX | OP_PAGE2, 2, 0x65, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "rolw", OP_IDX_1 | OP_PAGE2, 3, 0x65, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "rolw", OP_IDX_2 | OP_PAGE2, 4, 0x65, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "rolw", OP_D_IDX | OP_PAGE2, 2, 0x65, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "rolw", OP_D_IDX_2 | OP_PAGE2, 4, 0x65, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "rolx", OP_NONE | OP_PAGE2, 1, 0x45, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+ { "roly", OP_NONE | OP_PAGE2, 1, 0x55, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "ror", OP_IND16, 3, 0x76, 4, 4, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "ror", OP_IX, 2, 0x66, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "ror", OP_IY | OP_PAGE2, 3, 0x66, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "ror", OP_IDX, 2, 0x66, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "ror", OP_IDX_1, 3, 0x66, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "ror", OP_IDX_2, 4, 0x66, 5, 5, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "ror", OP_D_IDX, 2, 0x66, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "ror", OP_D_IDX_2, 4, 0x66, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "rora", OP_NONE, 1, 0x46, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "rorb", OP_NONE, 1, 0x56, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+
+ { "rorw", OP_IND16 | OP_PAGE2, 3, 0x76, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "rorw", OP_IDX | OP_PAGE2, 2, 0x66, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "rorw", OP_IDX_1 | OP_PAGE2, 3, 0x66, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "rorw", OP_IDX_2 | OP_PAGE2, 4, 0x66, 5, 5, CHG_NZVC, cpu9s12x, 0 },
+ { "rorw", OP_D_IDX | OP_PAGE2, 2, 0x66, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "rorw", OP_D_IDX_2 | OP_PAGE2, 4, 0x66, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "rorx", OP_NONE | OP_PAGE2, 1, 0x46, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+ { "rory", OP_NONE | OP_PAGE2, 1, 0x56, 1, 1, CHG_NZVC, cpu9s12x, 0 },
+
+ { "rtc", OP_NONE, 1, 0x0a, 6, 6, CHG_NONE, cpu6812|cpu9s12x, 0 },
+ { "rti", OP_NONE, 1, 0x3b, 12, 12, CHG_ALL, cpu6811, 0 },
+ { "rti", OP_NONE, 1, 0x0b, 8, 10, CHG_ALL, cpu6812|cpu9s12x, 0 },
+ { "rts", OP_NONE, 1, 0x39, 5, 5, CHG_NONE, cpu6811, 0 },
+ { "rts", OP_NONE, 1, 0x3d, 5, 5, CHG_NONE, cpu6812|cpu9s12x, 0 },
+
+ { "sba", OP_NONE, 1, 0x10, 2, 2, CHG_NZVC, cpu6811, 0 },
+ { "sba", OP_NONE | OP_PAGE2, 2, 0x16, 2, 2, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "sbca", OP_IMM8, 2, 0x82, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_DIRECT, 2, 0x92, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_IND16, 3, 0xb2, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_IX, 2, 0xa2, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "sbca", OP_IY | OP_PAGE2, 3, 0xa2, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "sbca", OP_IDX, 2, 0xa2, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_IDX_1, 3, 0xa2, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_IDX_2, 4, 0xa2, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_D_IDX, 2, 0xa2, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbca", OP_D_IDX_2, 4, 0xa2, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "sbcb", OP_IMM8, 2, 0xc2, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_DIRECT, 2, 0xd2, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_IND16, 3, 0xf2, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_IX, 2, 0xe2, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "sbcb", OP_IY | OP_PAGE2, 3, 0xe2, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "sbcb", OP_IDX, 2, 0xe2, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_IDX_1, 3, 0xe2, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_IDX_2, 4, 0xe2, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_D_IDX, 2, 0xe2, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "sbcb", OP_D_IDX_2, 4, 0xe2, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+
+ { "sbed", OP_IMM16 | OP_PAGE2, 3, 0x83, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_DIRECT | OP_PAGE2, 2, 0x93, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_IND16 | OP_PAGE2, 3, 0xb3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_IDX | OP_PAGE2, 2, 0xa3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_IDX_1 | OP_PAGE2, 3, 0xa3, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_IDX_2 | OP_PAGE2, 4, 0xa3, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_D_IDX | OP_PAGE2, 2, 0xa3, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "sbed", OP_D_IDX_2 | OP_PAGE2, 4, 0xa3, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "sbex", OP_IMM16 | OP_PAGE2, 3, 0x82, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_DIRECT | OP_PAGE2, 2, 0x92, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_IND16 | OP_PAGE2, 3, 0xb2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_IDX | OP_PAGE2, 2, 0xa2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_IDX_1 | OP_PAGE2, 3, 0xa2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_IDX_2 | OP_PAGE2, 4, 0xa2, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_D_IDX | OP_PAGE2, 2, 0xa2, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "sbex", OP_D_IDX_2 | OP_PAGE2, 4, 0xa2, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "sbey", OP_IMM16 | OP_PAGE2, 3, 0xc2, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_DIRECT | OP_PAGE2, 2, 0xd2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_IND16 | OP_PAGE2, 3, 0xf2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_IDX | OP_PAGE2, 2, 0xe2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_IDX_1 | OP_PAGE2, 3, 0xe2, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_IDX_2 | OP_PAGE2, 4, 0xe2, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_D_IDX | OP_PAGE2, 2, 0xe2, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "sbey", OP_D_IDX_2 | OP_PAGE2, 4, 0xe2, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+
+ { "sec", OP_NONE, 1, 0x0d, 2, 2, SET_C, cpu6811, 0 },
+ { "sei", OP_NONE, 1, 0x0f, 2, 2, SET_I, cpu6811, 0 },
+ { "sev", OP_NONE, 1, 0x0b, 2, 2, SET_V, cpu6811, 0 },
+
+/* Some sex opcodes are synonyms for tfr. */
{ "sex", M6812_OP_SEX_MARKER
- | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
+ | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "staa", OP_IND16, 3, 0xb7, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "staa", OP_DIRECT, 2, 0x97, 3, 3, CLR_V_CHG_NZ, cpu6811 },
- { "staa", OP_IX, 2, 0xa7, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "staa", OP_IY | OP_PAGE2, 3, 0xa7, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "staa", OP_DIRECT, 2, 0x5a, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "staa", OP_IND16, 3, 0x7a, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "staa", OP_IDX, 2, 0x6a, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "staa", OP_IDX_1, 3, 0x6a, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "staa", OP_IDX_2, 4, 0x6a, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "staa", OP_D_IDX, 2, 0x6a, 5, 5, CLR_V_CHG_NZ, cpu6812 },
- { "staa", OP_D_IDX_2, 4, 0x6a, 5, 5, CLR_V_CHG_NZ, cpu6812 },
+ { "staa", OP_IND16, 3, 0xb7, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "staa", OP_DIRECT, 2, 0x97, 3, 3, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "staa", OP_IX, 2, 0xa7, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "staa", OP_IY | OP_PAGE2, 3, 0xa7, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "staa", OP_DIRECT, 2, 0x5a, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "staa", OP_IND16, 3, 0x7a, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "staa", OP_IDX, 2, 0x6a, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "staa", OP_IDX_1, 3, 0x6a, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "staa", OP_IDX_2, 4, 0x6a, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "staa", OP_D_IDX, 2, 0x6a, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "staa", OP_D_IDX_2, 4, 0x6a, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "stab", OP_IND16, 3, 0xf7, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "stab", OP_DIRECT, 2, 0xd7, 3, 3, CLR_V_CHG_NZ, cpu6811 },
- { "stab", OP_IX, 2, 0xe7, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "stab", OP_IY | OP_PAGE2, 3, 0xe7, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "stab", OP_DIRECT, 2, 0x5b, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "stab", OP_IND16, 3, 0x7b, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "stab", OP_IDX, 2, 0x6b, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "stab", OP_IDX_1, 3, 0x6b, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "stab", OP_IDX_2, 4, 0x6b, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "stab", OP_D_IDX, 2, 0x6b, 5, 5, CLR_V_CHG_NZ, cpu6812 },
- { "stab", OP_D_IDX_2, 4, 0x6b, 5, 5, CLR_V_CHG_NZ, cpu6812 },
+ { "stab", OP_IND16, 3, 0xf7, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stab", OP_DIRECT, 2, 0xd7, 3, 3, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stab", OP_IX, 2, 0xe7, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stab", OP_IY | OP_PAGE2, 3, 0xe7, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stab", OP_DIRECT, 2, 0x5b, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stab", OP_IND16, 3, 0x7b, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stab", OP_IDX, 2, 0x6b, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stab", OP_IDX_1, 3, 0x6b, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stab", OP_IDX_2, 4, 0x6b, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stab", OP_D_IDX, 2, 0x6b, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stab", OP_D_IDX_2, 4, 0x6b, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "std", OP_IND16, 3, 0xfd, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "std", OP_DIRECT, 2, 0xdd, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "std", OP_IX, 2, 0xed, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "std", OP_IY | OP_PAGE2, 3, 0xed, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "std", OP_DIRECT, 2, 0x5c, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "std", OP_IND16, 3, 0x7c, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "std", OP_IDX, 2, 0x6c, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "std", OP_IDX_1, 3, 0x6c, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "std", OP_IDX_2, 4, 0x6c, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "std", OP_D_IDX, 2, 0x6c, 5, 5, CLR_V_CHG_NZ, cpu6812 },
- { "std", OP_D_IDX_2, 4, 0x6c, 5, 5, CLR_V_CHG_NZ, cpu6812 },
+ { "std", OP_IND16, 3, 0xfd, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "std", OP_DIRECT, 2, 0xdd, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "std", OP_IX, 2, 0xed, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "std", OP_IY | OP_PAGE2, 3, 0xed, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "std", OP_DIRECT, 2, 0x5c, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "std", OP_IND16, 3, 0x7c, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "std", OP_IDX, 2, 0x6c, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "std", OP_IDX_1, 3, 0x6c, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "std", OP_IDX_2, 4, 0x6c, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "std", OP_D_IDX, 2, 0x6c, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "std", OP_D_IDX_2, 4, 0x6c, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "stop", OP_NONE, 1, 0xcf, 2, 2, CHG_NONE, cpu6811 },
- { "stop", OP_NONE | OP_PAGE2,2, 0x3e, 2, 9, CHG_NONE, cpu6812 },
+ { "stop", OP_NONE, 1, 0xcf, 2, 2, CHG_NONE, cpu6811, 0 },
+ { "stop", OP_NONE | OP_PAGE2,2, 0x3e, 2, 9, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "sts", OP_IND16, 3, 0xbf, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "sts", OP_DIRECT, 2, 0x9f, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "sts", OP_IX, 2, 0xaf, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "sts", OP_IY | OP_PAGE2, 3, 0xaf, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "sts", OP_DIRECT, 2, 0x5f, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "sts", OP_IND16, 3, 0x7f, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "sts", OP_IDX, 2, 0x6f, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "sts", OP_IDX_1, 3, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "sts", OP_IDX_2, 4, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "sts", OP_D_IDX, 2, 0x6f, 5, 5, CLR_V_CHG_NZ, cpu6812 },
- { "sts", OP_D_IDX_2, 4, 0x6f, 5, 5, CLR_V_CHG_NZ, cpu6812 },
+ { "sts", OP_IND16, 3, 0xbf, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sts", OP_DIRECT, 2, 0x9f, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sts", OP_IX, 2, 0xaf, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sts", OP_IY | OP_PAGE2, 3, 0xaf, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sts", OP_DIRECT, 2, 0x5f, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sts", OP_IND16, 3, 0x7f, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sts", OP_IDX, 2, 0x6f, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sts", OP_IDX_1, 3, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sts", OP_IDX_2, 4, 0x6f, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sts", OP_D_IDX, 2, 0x6f, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sts", OP_D_IDX_2, 4, 0x6f, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "stx", OP_IND16, 3, 0xff, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "stx", OP_DIRECT, 2, 0xdf, 4, 4, CLR_V_CHG_NZ, cpu6811 },
- { "stx", OP_IX, 2, 0xef, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "stx", OP_IY | OP_PAGE4, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "stx", OP_DIRECT, 2, 0x5e, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "stx", OP_IND16, 3, 0x7e, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "stx", OP_IDX, 2, 0x6e, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "stx", OP_IDX_1, 3, 0x6e, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "stx", OP_IDX_2, 4, 0x6e, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "stx", OP_D_IDX, 2, 0x6e, 5, 5, CLR_V_CHG_NZ, cpu6812 },
- { "stx", OP_D_IDX_2, 4, 0x6e, 5, 5, CLR_V_CHG_NZ, cpu6812 },
+ { "stx", OP_IND16, 3, 0xff, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stx", OP_DIRECT, 2, 0xdf, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stx", OP_IX, 2, 0xef, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stx", OP_IY | OP_PAGE4, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "stx", OP_DIRECT, 2, 0x5e, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stx", OP_IND16, 3, 0x7e, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stx", OP_IDX, 2, 0x6e, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stx", OP_IDX_1, 3, 0x6e, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stx", OP_IDX_2, 4, 0x6e, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stx", OP_D_IDX, 2, 0x6e, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "stx", OP_D_IDX_2, 4, 0x6e, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "sty", OP_IND16 | OP_PAGE2, 4, 0xff, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "sty", OP_DIRECT | OP_PAGE2, 3, 0xdf, 5, 5, CLR_V_CHG_NZ, cpu6811 },
- { "sty", OP_IY | OP_PAGE2, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "sty", OP_IX | OP_PAGE3, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811 },
- { "sty", OP_DIRECT, 2, 0x5d, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "sty", OP_IND16, 3, 0x7d, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "sty", OP_IDX, 2, 0x6d, 2, 2, CLR_V_CHG_NZ, cpu6812 },
- { "sty", OP_IDX_1, 3, 0x6d, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "sty", OP_IDX_2, 4, 0x6d, 3, 3, CLR_V_CHG_NZ, cpu6812 },
- { "sty", OP_D_IDX, 2, 0x6d, 5, 5, CLR_V_CHG_NZ, cpu6812 },
- { "sty", OP_D_IDX_2, 4, 0x6d, 5, 5, CLR_V_CHG_NZ, cpu6812 },
+ { "sty", OP_IND16 | OP_PAGE2, 4, 0xff, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sty", OP_DIRECT | OP_PAGE2, 3, 0xdf, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sty", OP_IY | OP_PAGE2, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sty", OP_IX | OP_PAGE3, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "sty", OP_DIRECT, 2, 0x5d, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sty", OP_IND16, 3, 0x7d, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sty", OP_IDX, 2, 0x6d, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sty", OP_IDX_1, 3, 0x6d, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sty", OP_IDX_2, 4, 0x6d, 3, 3, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sty", OP_D_IDX, 2, 0x6d, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "sty", OP_D_IDX_2, 4, 0x6d, 5, 5, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "suba", OP_IMM8, 2, 0x80, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "suba", OP_DIRECT, 2, 0x90, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "suba", OP_IND16, 3, 0xb0, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "suba", OP_IX, 2, 0xa0, 4, 4, CHG_NZVC, cpu6811 },
- { "suba", OP_IY | OP_PAGE2, 3, 0xa0, 5, 5, CHG_NZVC, cpu6811 },
- { "suba", OP_IDX, 2, 0xa0, 3, 3, CHG_NZVC, cpu6812 },
- { "suba", OP_IDX_1, 3, 0xa0, 3, 3, CHG_NZVC, cpu6812 },
- { "suba", OP_IDX_2, 4, 0xa0, 4, 4, CHG_NZVC, cpu6812 },
- { "suba", OP_D_IDX, 2, 0xa0, 6, 6, CHG_NZVC, cpu6812 },
- { "suba", OP_D_IDX_2, 4, 0xa0, 6, 6, CHG_NZVC, cpu6812 },
+ { "suba", OP_IMM8, 2, 0x80, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "suba", OP_DIRECT, 2, 0x90, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "suba", OP_IND16, 3, 0xb0, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "suba", OP_IX, 2, 0xa0, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "suba", OP_IY | OP_PAGE2, 3, 0xa0, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "suba", OP_IDX, 2, 0xa0, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "suba", OP_IDX_1, 3, 0xa0, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "suba", OP_IDX_2, 4, 0xa0, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "suba", OP_D_IDX, 2, 0xa0, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "suba", OP_D_IDX_2, 4, 0xa0, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "subb", OP_IMM8, 2, 0xc0, 1, 1, CHG_NZVC, cpu6811|cpu6812 },
- { "subb", OP_DIRECT, 2, 0xd0, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "subb", OP_IND16, 3, 0xf0, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "subb", OP_IX, 2, 0xe0, 4, 4, CHG_NZVC, cpu6811 },
- { "subb", OP_IY | OP_PAGE2, 3, 0xe0, 5, 5, CHG_NZVC, cpu6811 },
- { "subb", OP_IDX, 2, 0xe0, 3, 3, CHG_NZVC, cpu6812 },
- { "subb", OP_IDX_1, 3, 0xe0, 3, 3, CHG_NZVC, cpu6812 },
- { "subb", OP_IDX_2, 4, 0xe0, 4, 4, CHG_NZVC, cpu6812 },
- { "subb", OP_D_IDX, 2, 0xe0, 6, 6, CHG_NZVC, cpu6812 },
- { "subb", OP_D_IDX_2, 4, 0xe0, 6, 6, CHG_NZVC, cpu6812 },
+ { "subb", OP_IMM8, 2, 0xc0, 1, 1, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "subb", OP_DIRECT, 2, 0xd0, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "subb", OP_IND16, 3, 0xf0, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "subb", OP_IX, 2, 0xe0, 4, 4, CHG_NZVC, cpu6811, 0 },
+ { "subb", OP_IY | OP_PAGE2, 3, 0xe0, 5, 5, CHG_NZVC, cpu6811, 0 },
+ { "subb", OP_IDX, 2, 0xe0, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subb", OP_IDX_1, 3, 0xe0, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subb", OP_IDX_2, 4, 0xe0, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subb", OP_D_IDX, 2, 0xe0, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subb", OP_D_IDX_2, 4, 0xe0, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "subd", OP_IMM16, 3, 0x83, 2, 2, CHG_NZVC, cpu6811|cpu6812 },
- { "subd", OP_DIRECT, 2, 0x93, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "subd", OP_IND16, 3, 0xb3, 3, 3, CHG_NZVC, cpu6811|cpu6812 },
- { "subd", OP_IX, 2, 0xa3, 6, 6, CHG_NZVC, cpu6811 },
- { "subd", OP_IY | OP_PAGE2, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811 },
- { "subd", OP_IDX, 2, 0xa3, 3, 3, CHG_NZVC, cpu6812 },
- { "subd", OP_IDX_1, 3, 0xa3, 3, 3, CHG_NZVC, cpu6812 },
- { "subd", OP_IDX_2, 4, 0xa3, 4, 4, CHG_NZVC, cpu6812 },
- { "subd", OP_D_IDX, 2, 0xa3, 6, 6, CHG_NZVC, cpu6812 },
- { "subd", OP_D_IDX_2, 4, 0xa3, 6, 6, CHG_NZVC, cpu6812 },
+ { "subd", OP_IMM16, 3, 0x83, 2, 2, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "subd", OP_DIRECT, 2, 0x93, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "subd", OP_IND16, 3, 0xb3, 3, 3, CHG_NZVC, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "subd", OP_IX, 2, 0xa3, 6, 6, CHG_NZVC, cpu6811, 0 },
+ { "subd", OP_IY | OP_PAGE2, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811, 0 },
+ { "subd", OP_IDX, 2, 0xa3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subd", OP_IDX_1, 3, 0xa3, 3, 3, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subd", OP_IDX_2, 4, 0xa3, 4, 4, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subd", OP_D_IDX, 2, 0xa3, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
+ { "subd", OP_D_IDX_2, 4, 0xa3, 6, 6, CHG_NZVC, cpu6812|cpu9s12x, 0 },
- { "swi", OP_NONE, 1, 0x3f, 9, 9, CHG_NONE, cpu6811|cpu6812 },
+ { "subx", OP_IMM16 | OP_PAGE2, 3, 0x80, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_DIRECT | OP_PAGE2, 2, 0x90, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_IND16 | OP_PAGE2, 3, 0xb0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_IDX | OP_PAGE2, 2, 0xa0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_IDX_1 | OP_PAGE2, 3, 0xa0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_IDX_2 | OP_PAGE2, 4, 0xa0, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_D_IDX | OP_PAGE2, 2, 0xa0, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "subx", OP_D_IDX_2 | OP_PAGE2, 4, 0xa0, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "tab", OP_NONE, 1, 0x16, 2, 2, CLR_V_CHG_NZ, cpu6811 },
- { "tab", OP_NONE | OP_PAGE2,2, 0x0e, 2, 2, CLR_V_CHG_NZ, cpu6812 },
+ { "suby", OP_IMM16 | OP_PAGE2, 3, 0xc0, 2, 2, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_DIRECT | OP_PAGE2, 2, 0xd0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_IND16 | OP_PAGE2, 3, 0xf0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_IDX | OP_PAGE2, 2, 0xe0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_IDX_1 | OP_PAGE2, 3, 0xe0, 3, 3, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_IDX_2 | OP_PAGE2, 4, 0xe0, 4, 4, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_D_IDX | OP_PAGE2, 2, 0xe0, 6, 6, CHG_NZVC, cpu9s12x, 0 },
+ { "suby", OP_D_IDX_2 | OP_PAGE2, 4, 0xe0, 6, 6, CHG_NZVC, cpu9s12x, 0 },
- { "tap", OP_NONE, 1, 0x06, 2, 2, CHG_ALL, cpu6811 },
+ { "swi", OP_NONE, 1, 0x3f, 9, 9, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+ { "sys", OP_NONE | OP_PAGE2,2, 0xa7, 9, 9, SET_I, cpu9s12x, 0 },
- { "tba", OP_NONE, 1, 0x17, 2, 2, CLR_V_CHG_NZ, cpu6811 },
- { "tba", OP_NONE | OP_PAGE2,2, 0x0f, 2, 2, CLR_V_CHG_NZ, cpu6812 },
+ { "tab", OP_NONE, 1, 0x16, 2, 2, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "tab", OP_NONE | OP_PAGE2,2, 0x0e, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "test", OP_NONE, 1, 0x00, 5, _M, CHG_NONE, cpu6811 },
+ { "tap", OP_NONE, 1, 0x06, 2, 2, CHG_ALL, cpu6811, 0 },
- { "tpa", OP_NONE, 1, 0x07, 2, 2, CHG_NONE, cpu6811 },
+ { "tba", OP_NONE, 1, 0x17, 2, 2, CLR_V_CHG_NZ, cpu6811, 0 },
+ { "tba", OP_NONE | OP_PAGE2,2, 0x0f, 2, 2, CLR_V_CHG_NZ, cpu6812|cpu9s12x, 0 },
+
+ { "test", OP_NONE, 1, 0x00, 5, _M, CHG_NONE, cpu6811, 0 },
+
+ { "tpa", OP_NONE, 1, 0x07, 2, 2, CHG_NONE, cpu6811, 0 },
{ "tbeq", OP_TBEQ_MARKER
- | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
+ | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "tbl", OP_IDX | OP_PAGE2, 3, 0x3d, 8, 8, CHG_NZC, cpu6812 },
+ { "tbl", OP_IDX | OP_PAGE2, 3, 0x3d, 8, 8, CHG_NZC, cpu6812|cpu9s12x, 0 },
{ "tbne", OP_TBNE_MARKER
- | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
+ | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
+/* The S12X has more tfr variants, but most are pointless so not supported. */
{ "tfr", OP_TFR_MARKER
- | OP_REG_1 | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
+ | OP_REG_1 | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
- { "trap", OP_IMM8 | OP_TRAP_ID, 2, 0x18, 11, 11, SET_I, cpu6812 },
+ { "trap", OP_IMM8 | OP_TRAP_ID, 2, 0x18, 11, 11, SET_I, cpu6812|cpu9s12x, 0 },
- { "tst", OP_IND16, 3, 0x7d, 6, 6, CLR_VC_CHG_NZ, cpu6811 },
- { "tst", OP_IX, 2, 0x6d, 6, 6, CLR_VC_CHG_NZ, cpu6811 },
- { "tst", OP_IY | OP_PAGE2, 3, 0x6d, 7, 7, CLR_VC_CHG_NZ, cpu6811 },
- { "tst", OP_IND16, 3, 0xf7, 3, 3, CLR_VC_CHG_NZ, cpu6812 },
- { "tst", OP_IDX, 2, 0xe7, 3, 3, CLR_VC_CHG_NZ, cpu6812 },
- { "tst", OP_IDX_1, 3, 0xe7, 3, 3, CLR_VC_CHG_NZ, cpu6812 },
- { "tst", OP_IDX_2, 4, 0xe7, 4, 4, CLR_VC_CHG_NZ, cpu6812 },
- { "tst", OP_D_IDX, 2, 0xe7, 6, 6, CLR_VC_CHG_NZ, cpu6812 },
- { "tst", OP_D_IDX_2, 4, 0xe7, 6, 6, CLR_VC_CHG_NZ, cpu6812 },
+ { "tst", OP_IND16, 3, 0x7d, 6, 6, CLR_VC_CHG_NZ, cpu6811, 0 },
+ { "tst", OP_IX, 2, 0x6d, 6, 6, CLR_VC_CHG_NZ, cpu6811, 0 },
+ { "tst", OP_IY | OP_PAGE2, 3, 0x6d, 7, 7, CLR_VC_CHG_NZ, cpu6811, 0 },
+ { "tst", OP_IND16, 3, 0xf7, 3, 3, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "tst", OP_IDX, 2, 0xe7, 3, 3, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "tst", OP_IDX_1, 3, 0xe7, 3, 3, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "tst", OP_IDX_2, 4, 0xe7, 4, 4, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "tst", OP_D_IDX, 2, 0xe7, 6, 6, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "tst", OP_D_IDX_2, 4, 0xe7, 6, 6, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "tsta", OP_NONE, 1, 0x4d, 2, 2, CLR_VC_CHG_NZ, cpu6811 },
- { "tsta", OP_NONE, 1, 0x97, 1, 1, CLR_VC_CHG_NZ, cpu6812 },
- { "tstb", OP_NONE, 1, 0x5d, 2, 2, CLR_VC_CHG_NZ, cpu6811 },
- { "tstb", OP_NONE, 1, 0xd7, 1, 1, CLR_VC_CHG_NZ, cpu6812 },
+ { "tsta", OP_NONE, 1, 0x4d, 2, 2, CLR_VC_CHG_NZ, cpu6811, 0 },
+ { "tsta", OP_NONE, 1, 0x97, 1, 1, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
+ { "tstb", OP_NONE, 1, 0x5d, 2, 2, CLR_VC_CHG_NZ, cpu6811, 0 },
+ { "tstb", OP_NONE, 1, 0xd7, 1, 1, CLR_VC_CHG_NZ, cpu6812|cpu9s12x, 0 },
- { "tsx", OP_NONE, 1, 0x30, 3, 3, CHG_NONE, cpu6811 },
- { "tsy", OP_NONE | OP_PAGE2,2, 0x30, 4, 4, CHG_NONE, cpu6811 },
- { "txs", OP_NONE, 1, 0x35, 3, 3, CHG_NONE, cpu6811 },
- { "tys", OP_NONE | OP_PAGE2,2, 0x35, 4, 4, CHG_NONE, cpu6811 },
+ { "tstw", OP_IND16| OP_PAGE2, 3, 0xf7, 3, 3, CLR_VC_CHG_NZ, cpu9s12x, 0 },
+ { "tstw", OP_IDX| OP_PAGE2, 2, 0xe7, 3, 3, CLR_VC_CHG_NZ, cpu9s12x, 0 },
+ { "tstw", OP_IDX_1| OP_PAGE2, 3, 0xe7, 3, 3, CLR_VC_CHG_NZ, cpu9s12x, 0 },
+ { "tstw", OP_IDX_2| OP_PAGE2, 4, 0xe7, 4, 4, CLR_VC_CHG_NZ, cpu9s12x, 0 },
+ { "tstw", OP_D_IDX| OP_PAGE2, 2, 0xe7, 6, 6, CLR_VC_CHG_NZ, cpu9s12x, 0 },
+ { "tstw", OP_D_IDX_2| OP_PAGE2, 4, 0xe7, 6, 6, CLR_VC_CHG_NZ, cpu9s12x, 0 },
- { "wai", OP_NONE, 1, 0x3e, 5, _M, CHG_NONE, cpu6811|cpu6812 },
+ { "tstx", OP_NONE| OP_PAGE2, 1, 0x97, 1, 1, CLR_VC_CHG_NZ, cpu9s12x, 0 },
+ { "tsty", OP_NONE| OP_PAGE2, 1, 0xd7, 1, 1, CLR_VC_CHG_NZ, cpu9s12x, 0 },
- { "wav", OP_NONE | OP_PAGE2, 2, 0x3c, 8, _M, SET_Z_CHG_HNVC, cpu6812 },
+ { "tsx", OP_NONE, 1, 0x30, 3, 3, CHG_NONE, cpu6811, 0 },
+ { "tsy", OP_NONE | OP_PAGE2,2, 0x30, 4, 4, CHG_NONE, cpu6811, 0 },
+ { "txs", OP_NONE, 1, 0x35, 3, 3, CHG_NONE, cpu6811, 0 },
+ { "tys", OP_NONE | OP_PAGE2,2, 0x35, 4, 4, CHG_NONE, cpu6811, 0 },
- { "xgdx", OP_NONE, 1, 0x8f, 3, 3, CHG_NONE, cpu6811 },
- { "xgdy", OP_NONE | OP_PAGE2,2, 0x8f, 4, 4, CHG_NONE, cpu6811 }
+ { "wai", OP_NONE, 1, 0x3e, 5, _M, CHG_NONE, cpu6811|cpu6812|cpu9s12x, 0 },
+
+ { "wav", OP_NONE | OP_PAGE2, 2, 0x3c, 8, _M, SET_Z_CHG_HNVC, cpu6812|cpu9s12x, 0 },
+
+ { "xgdx", OP_NONE, 1, 0x8f, 3, 3, CHG_NONE, cpu6811, 0 },
+ { "xgdy", OP_NONE | OP_PAGE2,2, 0x8f, 4, 4, CHG_NONE, cpu6811, 0 },
+
+/* XGATE opcodes */
+/* Return to Scheduler and Others*/
+ { "brk", M68XG_OP_NONE, 2, 0x0000, 0, 0, 0, 0, 0, cpuxgate, 0xffff },
+ { "nop", M68XG_OP_NONE, 2, 0x0100, 0, 0, 0, 0, 0, cpuxgate, 0xffff },
+ { "rts", M68XG_OP_NONE, 2, 0x0200, 0, 0, 0, 0, 0, cpuxgate, 0xffff },
+ { "sif", M68XG_OP_NONE, 2, 0x0300, 0, 0, 0, 0, 0, cpuxgate, 0xffff },
+/* Semaphore Instructions */
+ { "csem", M68XG_OP_IMM3, 2, 0x00f0, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+ { "csem", M68XG_OP_R, 2, 0x00f1, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+ { "ssem", M68XG_OP_IMM3, 2, 0x00f2, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+ { "ssem", M68XG_OP_R, 2, 0x00f3, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+/* Single Register Instructions */
+ { "sex", M68XG_OP_R, 2, 0x00f4, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+ { "par", M68XG_OP_R, 2, 0x00f5, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+ { "jal", M68XG_OP_R, 2, 0x00f6, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+ { "sif", M68XG_OP_R, 2, 0x00f7, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff },
+/* Special Move instructions */
+ { "tfr", M68XG_OP_R, 2, 0x00f8, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff }, /* RD,CCR */
+ { "tfr", M68XG_OP_R, 2, 0x00f9, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff }, /* CCR,RS */
+ { "tfr", M68XG_OP_R, 2, 0x00fa, 0, 0, 0, 0, 0, cpuxgate, 0xf8ff }, /* RD,PC */
+/* Shift instructions Dyadic */
+ { "bffo", M68XG_OP_R_R, 2, 0x0810, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "asr", M68XG_OP_R_R, 2, 0x0811, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "csl", M68XG_OP_R_R, 2, 0x0812, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "csr", M68XG_OP_R_R, 2, 0x0813, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "lsl", M68XG_OP_R_R, 2, 0x0814, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "lsr", M68XG_OP_R_R, 2, 0x0815, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "rol", M68XG_OP_R_R, 2, 0x0816, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+ { "ror", M68XG_OP_R_R, 2, 0x0817, 0, 0, 0, 0, 0, cpuxgate, 0xf81f },
+/* Dyadic aliases */
+ { "cmp", M68XG_OP_R_R, 2, 0x1800, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "com", M68XG_OP_R_R, 2, 0x1003, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "cpc", M68XG_OP_R_R, 2, 0x1801, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "mov", M68XG_OP_R_R, 2, 0x1002, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "neg", M68XG_OP_R_R, 2, 0x1800, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+/* Monadic aliases */
+ { "com", M68XG_OP_R, 2, 0x1003, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "neg", M68XG_OP_R, 2, 0x1800, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "tst", M68XG_OP_R, 2, 0x1800, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+/* Shift instructions immediate */
+ { "asr", M68XG_OP_R_IMM4, 2, 0x0809, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+ { "csl", M68XG_OP_R_IMM4, 2, 0x080a, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+ { "csr", M68XG_OP_R_IMM4, 2, 0x080b, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+ { "lsl", M68XG_OP_R_IMM4, 2, 0x080c, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+ { "lsr", M68XG_OP_R_IMM4, 2, 0x080d, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+ { "rol", M68XG_OP_R_IMM4, 2, 0x080e, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+ { "ror", M68XG_OP_R_IMM4, 2, 0x080f, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
+/* Logical Triadic */
+ { "and", M68XG_OP_R_R_R, 2, 0x1000, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "or", M68XG_OP_R_R_R, 2, 0x1002, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "xnor", M68XG_OP_R_R_R, 2, 0x1003, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+/* Arithmetic Triadic */
+ { "sub", M68XG_OP_R_R_R, 2, 0x1800, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "sbc", M68XG_OP_R_R_R, 2, 0x1801, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "add", M68XG_OP_R_R_R, 2, 0x1802, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "adc", M68XG_OP_R_R_R, 2, 0x1803, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+/* Branches */
+ { "bcc", M68XG_OP_REL9, 2, 0x2000, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bhs", M68XG_OP_REL9, 2, 0x2000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 }, /* Synonym. */
+ { "bcs", M68XG_OP_REL9, 2, 0x2200, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "blo", M68XG_OP_REL9, 2, 0x2200, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 }, /* Synonym. */
+ { "bne", M68XG_OP_REL9, 2, 0x2400, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "beq", M68XG_OP_REL9, 2, 0x2600, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bpl", M68XG_OP_REL9, 2, 0x2800, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bmi", M68XG_OP_REL9, 2, 0x2a00, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bvc", M68XG_OP_REL9, 2, 0x2c00, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bvs", M68XG_OP_REL9, 2, 0x2e00, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bhi", M68XG_OP_REL9, 2, 0x3000, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bls", M68XG_OP_REL9, 2, 0x3200, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bge", M68XG_OP_REL9, 2, 0x3400, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "blt", M68XG_OP_REL9, 2, 0x3600, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bgt", M68XG_OP_REL9, 2, 0x3800, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "ble", M68XG_OP_REL9, 2, 0x3a00, 0, 0, 0, 0, 0, cpuxgate, 0xfe00 },
+ { "bra", M68XG_OP_REL10, 2, 0x3c00, 0, 0, 0, 0, 0, cpuxgate, 0xfc00 },
+/* Load and Store Instructions */
+ { "ldb", M68XG_OP_R_R_OFFS5, 2, 0x4000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "ldw", M68XG_OP_R_R_OFFS5, 2, 0x4800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "stb", M68XG_OP_R_R_OFFS5, 2, 0x5000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "stw", M68XG_OP_R_R_OFFS5, 2, 0x5800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+
+ { "ldb", M68XG_OP_RD_RB_RI, 2, 0x6000, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "ldw", M68XG_OP_RD_RB_RI, 2, 0x6800, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "stb", M68XG_OP_RD_RB_RI, 2, 0x7000, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "stw", M68XG_OP_RD_RB_RI, 2, 0x7800, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+
+ { "ldb", M68XG_OP_RD_RB_RIp, 2, 0x6001, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "ldw", M68XG_OP_RD_RB_RIp, 2, 0x6801, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "stb", M68XG_OP_RD_RB_RIp, 2, 0x7001, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "stw", M68XG_OP_RD_RB_RIp, 2, 0x7801, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+
+ { "ldb", M68XG_OP_RD_RB_mRI, 2, 0x6002, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "ldw", M68XG_OP_RD_RB_mRI, 2, 0x6802, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "stb", M68XG_OP_RD_RB_mRI, 2, 0x7002, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "stw", M68XG_OP_RD_RB_mRI, 2, 0x7802, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+/* Bit Field Instructions */
+ { "bfext", M68XG_OP_R_R_R, 2, 0x6003, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "bfins", M68XG_OP_R_R_R, 2, 0x6803, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "bfinsi",M68XG_OP_R_R_R, 2, 0x7003, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+ { "bfinsx",M68XG_OP_R_R_R, 2, 0x7803, 0, 0, 0, 0, 0, cpuxgate, 0xf803 },
+/* Logic Immediate Instructions */
+ { "andl", M68XG_OP_R_IMM8, 2, 0x8000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "andh", M68XG_OP_R_IMM8, 2, 0x8800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "bitl", M68XG_OP_R_IMM8, 2, 0x9000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "bith", M68XG_OP_R_IMM8, 2, 0x9800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "orl", M68XG_OP_R_IMM8, 2, 0xa000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "orh", M68XG_OP_R_IMM8, 2, 0xa800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "xnorl", M68XG_OP_R_IMM8, 2, 0xb000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "xnorh", M68XG_OP_R_IMM8, 2, 0xb800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+/* Arithmetic Immediate Instructions */
+ { "subl", M68XG_OP_R_IMM8, 2, 0xc000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "subh", M68XG_OP_R_IMM8, 2, 0xc800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "cmpl", M68XG_OP_R_IMM8, 2, 0xd000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "cpch", M68XG_OP_R_IMM8, 2, 0xd800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "addl", M68XG_OP_R_IMM8, 2, 0xe000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "addh", M68XG_OP_R_IMM8, 2, 0xe800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "ldl", M68XG_OP_R_IMM8, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+ { "ldh", M68XG_OP_R_IMM8, 2, 0xf800, 0, 0, 0, 0, 0, cpuxgate, 0xf800 },
+/* 16 bit versions.
+ * These are pseudo opcodes to allow 16 bit addresses to be passed.
+ * The mask ensures that we will never disassemble to these instructions.
+ */
+/* Logic Immediate Instructions */
+ { "and", M68XG_OP_R_IMM16, 2, 0x8000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "bit", M68XG_OP_R_IMM16, 2, 0x9000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "or", M68XG_OP_R_IMM16, 2, 0xa000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "xnor", M68XG_OP_R_IMM16, 2, 0xb000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+/* Arithmetic Immediate Instructions */
+ { "sub", M68XG_OP_R_IMM16, 2, 0xc000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "cmp", M68XG_OP_R_IMM16, 2, 0xd000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "add", M68XG_OP_R_IMM16, 2, 0xe000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ /* ld is for backwards compatability only, the correct opcode is ldw */
+ { "ld", M68XG_OP_R_IMM16, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
+ { "ldw", M68XG_OP_R_IMM16, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 }
};
const int m68hc11_num_opcodes = TABLE_SIZE (m68hc11_opcodes);
diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c
index 251d801..0f18c71 100644
--- a/opcodes/micromips-opc.c
+++ b/opcodes/micromips-opc.c
@@ -1,5 +1,5 @@
/* micromips-opc.c. microMIPS opcode table.
- Copyright 2008 Free Software Foundation, Inc.
+ Copyright 2008, 2012 Free Software Foundation, Inc.
Contributed by Chao-ying Fu, MIPS Technologies, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +19,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/mips.h"
#define UBD INSN_UNCOND_BRANCH_DELAY
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 4083c1a..93238d4 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -1,6 +1,7 @@
/* mips-opc.c -- MIPS opcode list.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
- 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
+ Free Software Foundation, Inc.
Contributed by Ralph Campbell and OSF
Commented and modified by Ian Lance Taylor, Cygnus Support
Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
@@ -24,8 +25,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/mips.h"
/* Short hand so the lines aren't too long. */
diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c
index f46cf28..01cbcde 100644
--- a/opcodes/mips16-opc.c
+++ b/opcodes/mips16-opc.c
@@ -1,5 +1,5 @@
/* mips16-opc.c. Mips16 opcode table.
- Copyright 1996, 1997, 1998, 2000, 2005, 2006, 2007
+ Copyright 1996, 1997, 1998, 2000, 2005, 2006, 2007, 2012
Free Software Foundation, Inc.
Contributed by Ian Lance Taylor, Cygnus Support
@@ -20,8 +20,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/mips.h"
/* This is the opcodes table for the mips16 processor. The format of
diff --git a/opcodes/mmix-dis.c b/opcodes/mmix-dis.c
index 22db268..d2ce581 100644
--- a/opcodes/mmix-dis.c
+++ b/opcodes/mmix-dis.c
@@ -1,5 +1,5 @@
/* mmix-dis.c -- Disassemble MMIX instructions.
- Copyright 2000, 2001, 2002, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 2000, 2001, 2002, 2005, 2007, 2012 Free Software Foundation, Inc.
Written by Hans-Peter Nilsson (hp@bitrange.com)
This file is part of the GNU opcodes library.
@@ -19,9 +19,8 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
#include "opcode/mmix.h"
#include "dis-asm.h"
#include "libiberty.h"
diff --git a/opcodes/moxie-dis.c b/opcodes/moxie-dis.c
index 4e67e2c..79ef099 100644
--- a/opcodes/moxie-dis.c
+++ b/opcodes/moxie-dis.c
@@ -1,5 +1,5 @@
/* Disassemble moxie instructions.
- Copyright 2009
+ Copyright 2009, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +19,9 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
+
#define STATIC_TABLE
#define DEFINE_TABLE
diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c
index 9d7edbe..71690a3 100644
--- a/opcodes/msp430-dis.c
+++ b/opcodes/msp430-dis.c
@@ -1,5 +1,5 @@
/* Disassemble MSP430 instructions.
- Copyright (C) 2002, 2004, 2005, 2007, 2009, 2010
+ Copyright (C) 2002, 2004, 2005, 2007, 2009, 2010, 2012
Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
@@ -21,9 +21,9 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
#include <ctype.h>
-#include <string.h>
#include <sys/types.h>
#include "dis-asm.h"
diff --git a/opcodes/or32-dis.c b/opcodes/or32-dis.c
index a0dc92a..abb80bf 100644
--- a/opcodes/or32-dis.c
+++ b/opcodes/or32-dis.c
@@ -1,5 +1,5 @@
/* Instruction printing code for the OpenRISC 1000
- Copyright (C) 2002, 2005, 2007 Free Software Foundation, Inc.
+ Copyright (C) 2002, 2005, 2007, 2012 Free Software Foundation, Inc.
Contributed by Damjan Lampret <lampret@opencores.org>.
Modified from a29k port.
@@ -24,11 +24,10 @@
#define DEBUG 0
#endif
+#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/or32.h"
#include "safe-ctype.h"
-#include <string.h>
-#include <stdlib.h>
#define EXTEND29(x) ((x) & (unsigned long) 0x10000000 ? ((x) | (unsigned long) 0xf0000000) : ((x)))
diff --git a/opcodes/or32-opc.c b/opcodes/or32-opc.c
index 94a1ace..df99d56 100644
--- a/opcodes/or32-opc.c
+++ b/opcodes/or32-opc.c
@@ -1,5 +1,6 @@
/* Table of opcodes for the OpenRISC 1000 ISA.
- Copyright 2002, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
+ Copyright 2002, 2004, 2005, 2007, 2008, 2009, 2012
+ Free Software Foundation, Inc.
Contributed by Damjan Lampret (lampret@opencores.org).
This file is part of the GNU opcodes library.
@@ -19,18 +20,17 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-/* We treat all letters the same in encode/decode routines so
- we need to assign some characteristics to them like signess etc. */
+#include "sysdep.h"
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include "safe-ctype.h"
#include "ansidecl.h"
-#ifdef HAVE_CONFIG_H
-# include "config.h"
-#endif
#include "opcode/or32.h"
+/* We treat all letters the same in encode/decode routines so
+ we need to assign some characteristics to them like signess etc. */
+
const struct or32_letter or32_letters[] =
{
{ 'A', NUM_UNSIGNED },
diff --git a/opcodes/pj-dis.c b/opcodes/pj-dis.c
index 477f406..7bd868e 100644
--- a/opcodes/pj-dis.c
+++ b/opcodes/pj-dis.c
@@ -1,5 +1,6 @@
/* pj-dis.c -- Disassemble picoJava instructions.
- Copyright 1999, 2000, 2001, 2002, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2002, 2005, 2007, 2012
+ Free Software Foundation, Inc.
Contributed by Steve Chamberlain, of Transmeta (sac@pobox.com).
This file is part of the GNU opcodes library.
@@ -19,8 +20,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/pj.h"
#include "dis-asm.h"
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index da72fcf..0905744 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -20,9 +20,11 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "dis-asm.h"
+#include "elf-bfd.h"
+#include "elf/ppc.h"
#include "opintl.h"
#include "opcode/ppc.h"
@@ -181,18 +183,41 @@
{ "titan", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
| PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
0 },
+ { "vle", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_VLE),
+ PPC_OPCODE_VLE },
{ "vsx", (PPC_OPCODE_PPC),
PPC_OPCODE_VSX },
};
+/* Switch between Booke and VLE dialects for interlinked dumps. */
+static ppc_cpu_t
+get_powerpc_dialect (struct disassemble_info *info)
+{
+ ppc_cpu_t dialect = 0;
+
+ dialect = POWERPC_DIALECT (info);
+
+ /* Disassemble according to the section headers flags for VLE-mode. */
+ if (dialect & PPC_OPCODE_VLE
+ && info->section->owner != NULL
+ && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour
+ && elf_object_id (info->section->owner) == PPC32_ELF_DATA
+ && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0)
+ return dialect;
+ else
+ return dialect & ~ PPC_OPCODE_VLE;
+}
+
/* Handle -m and -M options that set cpu type, and .machine arg. */
ppc_cpu_t
ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
{
+ const ppc_cpu_t retain_mask = (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
+ | PPC_OPCODE_SPE | PPC_OPCODE_ANY
+ | PPC_OPCODE_VLE | PPC_OPCODE_PMR);
/* Sticky bits. */
- ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
- | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
+ ppc_cpu_t retain_flags = ppc_cpu & retain_mask;
unsigned int i;
for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
@@ -201,8 +226,7 @@
if (ppc_opts[i].sticky)
{
retain_flags |= ppc_opts[i].sticky;
- if ((ppc_cpu & ~(ppc_cpu_t) (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
- | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
+ if ((ppc_cpu & ~retain_mask) != 0)
break;
}
ppc_cpu = ppc_opts[i].cpu;
@@ -256,16 +280,22 @@
dialect |= PPC_OPCODE_64;
else
dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
- /* Choose a reasonable default. */
- dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
- | PPC_OPCODE_ALTIVEC);
+ if (info->mach == bfd_mach_ppc_vle)
+ dialect |= PPC_OPCODE_PPC | PPC_OPCODE_VLE;
+ else
+ /* Choose a reasonable default. */
+ dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
+ | PPC_OPCODE_ALTIVEC);
}
info->private_data = priv;
POWERPC_DIALECT(info) = dialect;
}
-static unsigned short powerpc_opcd_indices[65];
+#define PPC_OPCD_SEGS 64
+static unsigned short powerpc_opcd_indices[PPC_OPCD_SEGS+1];
+#define VLE_OPCD_SEGS 32
+static unsigned short vle_opcd_indices[VLE_OPCD_SEGS+1];
/* Calculate opcode table indices to speed up disassembly,
and init dialect. */
@@ -285,13 +315,30 @@
}
last = powerpc_num_opcodes;
- for (i = 64; i > 0; --i)
+ for (i = PPC_OPCD_SEGS; i > 0; --i)
{
if (powerpc_opcd_indices[i] == 0)
powerpc_opcd_indices[i] = last;
last = powerpc_opcd_indices[i];
}
+ i = vle_num_opcodes;
+ while (--i >= 0)
+ {
+ unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
+ unsigned seg = VLE_OP_TO_SEG (op);
+
+ vle_opcd_indices[seg] = i;
+ }
+
+ last = vle_num_opcodes;
+ for (i = VLE_OPCD_SEGS; i > 0; --i)
+ {
+ if (vle_opcd_indices[i] == 0)
+ vle_opcd_indices[i] = last;
+ last = vle_opcd_indices[i];
+ }
+
if (info->arch == bfd_arch_powerpc)
powerpc_init_dialect (info);
}
@@ -301,7 +348,7 @@
int
print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
- return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
+ return print_insn_powerpc (memaddr, info, 1, get_powerpc_dialect (info));
}
/* Print a little endian PowerPC instruction. */
@@ -309,7 +356,7 @@
int
print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
- return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
+ return print_insn_powerpc (memaddr, info, 0, get_powerpc_dialect (info));
}
/* Print a POWER (RS/6000) instruction. */
@@ -333,11 +380,14 @@
value = (*operand->extract) (insn, dialect, &invalid);
else
{
- value = (insn >> operand->shift) & operand->bitm;
+ if (operand->shift >= 0)
+ value = (insn >> operand->shift) & operand->bitm;
+ else
+ value = (insn << -operand->shift) & operand->bitm;
if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
{
/* BITM is always some number of zeros followed by some
- number of ones, followed by some numer of zeros. */
+ number of ones, followed by some number of zeros. */
unsigned long top = operand->bitm;
/* top & -top gives the rightmost 1 bit, so this
fills in any trailing zeros. */
@@ -372,7 +422,7 @@
/* Find a match for INSN in the opcode table, given machine DIALECT.
A DIALECT of -1 is special, matching all machine opcode variations. */
-
+
static const struct powerpc_opcode *
lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
{
@@ -416,6 +466,60 @@
return NULL;
}
+/* Find a match for INSN in the VLE opcode table. */
+
+static const struct powerpc_opcode *
+lookup_vle (unsigned long insn)
+{
+ const struct powerpc_opcode *opcode;
+ const struct powerpc_opcode *opcode_end;
+ unsigned op, seg;
+
+ op = PPC_OP (insn);
+ if (op >= 0x20 && op <= 0x37)
+ {
+ /* This insn has a 4-bit opcode. */
+ op &= 0x3c;
+ }
+ seg = VLE_OP_TO_SEG (op);
+
+ /* Find the first match in the opcode table for this major opcode. */
+ opcode_end = vle_opcodes + vle_opcd_indices[seg + 1];
+ for (opcode = vle_opcodes + vle_opcd_indices[seg];
+ opcode < opcode_end;
+ ++opcode)
+ {
+ unsigned long table_opcd = opcode->opcode;
+ unsigned long table_mask = opcode->mask;
+ bfd_boolean table_op_is_short = PPC_OP_SE_VLE(table_mask);
+ unsigned long insn2;
+ const unsigned char *opindex;
+ const struct powerpc_operand *operand;
+ int invalid;
+
+ insn2 = insn;
+ if (table_op_is_short)
+ insn2 >>= 16;
+ if ((insn2 & table_mask) != table_opcd)
+ continue;
+
+ /* Check validity of operands. */
+ invalid = 0;
+ for (opindex = opcode->operands; *opindex != 0; ++opindex)
+ {
+ operand = powerpc_operands + *opindex;
+ if (operand->extract)
+ (*operand->extract) (insn, (ppc_cpu_t)0, &invalid);
+ }
+ if (invalid)
+ continue;
+
+ return opcode;
+ }
+
+ return NULL;
+}
+
/* Print a PowerPC or POWER instruction. */
static int
@@ -428,12 +532,28 @@
int status;
unsigned long insn;
const struct powerpc_opcode *opcode;
+ bfd_boolean insn_is_short;
status = (*info->read_memory_func) (memaddr, buffer, 4, info);
if (status != 0)
{
- (*info->memory_error_func) (status, memaddr, info);
- return -1;
+ /* The final instruction may be a 2-byte VLE insn. */
+ if ((dialect & PPC_OPCODE_VLE) != 0)
+ {
+ /* Clear buffer so unused bytes will not have garbage in them. */
+ buffer[0] = buffer[1] = buffer[2] = buffer[3] = 0;
+ status = (*info->read_memory_func) (memaddr, buffer, 2, info);
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, memaddr, info);
+ return -1;
+ }
+ }
+ else
+ {
+ (*info->memory_error_func) (status, memaddr, info);
+ return -1;
+ }
}
if (bigendian)
@@ -441,7 +561,17 @@
else
insn = bfd_getl32 (buffer);
- opcode = lookup_powerpc (insn, dialect);
+ /* Get the major opcode of the insn. */
+ opcode = NULL;
+ insn_is_short = FALSE;
+ if ((dialect & PPC_OPCODE_VLE) != 0)
+ {
+ opcode = lookup_vle (insn);
+ if (opcode != NULL)
+ insn_is_short = PPC_OP_SE_VLE(opcode->mask);
+ }
+ if (opcode == NULL)
+ opcode = lookup_powerpc (insn, dialect);
if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
opcode = lookup_powerpc (insn, (ppc_cpu_t) -1);
@@ -458,6 +588,10 @@
else
(*info->fprintf_func) (info->stream, "%s", opcode->name);
+ if (insn_is_short)
+ /* The operands will be fetched out of the 16-bit instruction. */
+ insn >>= 16;
+
/* Now extract and print the operands. */
need_comma = 0;
need_paren = 0;
@@ -513,26 +647,26 @@
(*info->fprintf_func) (info->stream, "fcr%ld", value);
else if ((operand->flags & PPC_OPERAND_UDI) != 0)
(*info->fprintf_func) (info->stream, "%ld", value);
- else if ((operand->flags & PPC_OPERAND_CR) != 0
- && (dialect & PPC_OPCODE_PPC) != 0)
+ else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
+ && (((dialect & PPC_OPCODE_PPC) != 0)
+ || ((dialect & PPC_OPCODE_VLE) != 0)))
+ (*info->fprintf_func) (info->stream, "cr%ld", value);
+ else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
+ && (((dialect & PPC_OPCODE_PPC) != 0)
+ || ((dialect & PPC_OPCODE_VLE) != 0)))
{
- if (operand->bitm == 7)
- (*info->fprintf_func) (info->stream, "cr%ld", value);
- else
- {
- static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
- int cr;
- int cc;
+ static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
+ int cr;
+ int cc;
- cr = value >> 2;
- if (cr != 0)
- (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
- cc = value & 3;
- (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
- }
+ cr = value >> 2;
+ if (cr != 0)
+ (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
+ cc = value & 3;
+ (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
}
else
- (*info->fprintf_func) (info->stream, "%ld", value);
+ (*info->fprintf_func) (info->stream, "%d", value);
if (need_paren)
{
@@ -549,8 +683,16 @@
}
}
- /* We have found and printed an instruction; return. */
- return 4;
+ /* We have found and printed an instruction.
+ If it was a short VLE instruction we have more to do. */
+ if (insn_is_short)
+ {
+ memaddr += 2;
+ return 2;
+ }
+ else
+ /* Otherwise, return. */
+ return 4;
}
/* We could not find a match. */
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index b11b5b2..a1c9963 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -21,8 +21,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/ppc.h"
#include "opintl.h"
@@ -39,6 +39,10 @@
/* Local insertion and extraction functions. */
+static unsigned long insert_arx (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_arx (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_ary (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_ary (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_bat (unsigned long, long, ppc_cpu_t, const char **);
static long extract_bat (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_bba (unsigned long, long, ppc_cpu_t, const char **);
@@ -53,6 +57,8 @@
static long extract_boe (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_fxm (unsigned long, long, ppc_cpu_t, const char **);
static long extract_fxm (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_li20 (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_li20 (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_ls (unsigned long, long, ppc_cpu_t, const char **);
static unsigned long insert_mbe (unsigned long, long, ppc_cpu_t, const char **);
static long extract_mbe (unsigned long, ppc_cpu_t, int *);
@@ -62,6 +68,8 @@
static unsigned long insert_nbi (unsigned long, long, ppc_cpu_t, const char **);
static unsigned long insert_nsi (unsigned long, long, ppc_cpu_t, const char **);
static long extract_nsi (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_oimm (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_oimm (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_ral (unsigned long, long, ppc_cpu_t, const char **);
static unsigned long insert_ram (unsigned long, long, ppc_cpu_t, const char **);
static unsigned long insert_raq (unsigned long, long, ppc_cpu_t, const char **);
@@ -69,8 +77,20 @@
static unsigned long insert_rbs (unsigned long, long, ppc_cpu_t, const char **);
static long extract_rbs (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_rbx (unsigned long, long, ppc_cpu_t, const char **);
+static unsigned long insert_rx (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_rx (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_ry (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_ry (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_sh6 (unsigned long, long, ppc_cpu_t, const char **);
static long extract_sh6 (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_sci8 (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_sci8 (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_sci8n (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_sci8n (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_sd4h (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_sd4h (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_sd4w (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_sd4w (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_spr (unsigned long, long, ppc_cpu_t, const char **);
static long extract_spr (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_sprg (unsigned long, long, ppc_cpu_t, const char **);
@@ -89,6 +109,14 @@
static long extract_xc6 (unsigned long, ppc_cpu_t, int *);
static unsigned long insert_dm (unsigned long, long, ppc_cpu_t, const char **);
static long extract_dm (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_vlesi (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_vlesi (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_vlensi (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_vlensi (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_vleui (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_vleui (unsigned long, ppc_cpu_t, int *);
+static unsigned long insert_vleil (unsigned long, long, ppc_cpu_t, const char **);
+static long extract_vleil (unsigned long, ppc_cpu_t, int *);
/* The operands table.
@@ -113,7 +141,7 @@
/* The BI field in a B form or XL form instruction. */
#define BI BA
#define BI_MASK (0x1f << 16)
- { 0x1f, 16, NULL, NULL, PPC_OPERAND_CR },
+ { 0x1f, 16, NULL, NULL, PPC_OPERAND_CR_BIT },
/* The BA field in an XL form instruction when it must be the same
as the BT field in the same instruction. */
@@ -123,7 +151,7 @@
/* The BB field in an XL form instruction. */
#define BB BAT + 1
#define BB_MASK (0x1f << 11)
- { 0x1f, 11, NULL, NULL, PPC_OPERAND_CR },
+ { 0x1f, 11, NULL, NULL, PPC_OPERAND_CR_BIT },
/* The BB field in an XL form instruction when it must be the same
as the BA field in the same instruction. */
@@ -168,7 +196,9 @@
#define BF BDPA + 1
/* The CRFD field in an X form instruction. */
#define CRFD BF
- { 0x7, 23, NULL, NULL, PPC_OPERAND_CR },
+ /* The CRD field in an XL form instruction. */
+#define CRD BF
+ { 0x7, 23, NULL, NULL, PPC_OPERAND_CR_REG },
/* The BF field in an X or XL form instruction. */
#define BFF BF + 1
@@ -177,11 +207,11 @@
/* An optional BF field. This is used for comparison instructions,
in which an omitted BF field is taken as zero. */
#define OBF BFF + 1
- { 0x7, 23, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
+ { 0x7, 23, NULL, NULL, PPC_OPERAND_CR_REG | PPC_OPERAND_OPTIONAL },
/* The BFA field in an X or XL form instruction. */
#define BFA OBF + 1
- { 0x7, 18, NULL, NULL, PPC_OPERAND_CR },
+ { 0x7, 18, NULL, NULL, PPC_OPERAND_CR_REG },
/* The BO field in a B form instruction. Certain values are
illegal. */
@@ -199,14 +229,40 @@
/* The BT field in an X or XL form instruction. */
#define BT BH + 1
- { 0x1f, 21, NULL, NULL, PPC_OPERAND_CR },
+ { 0x1f, 21, NULL, NULL, PPC_OPERAND_CR_BIT },
+
+ /* The BI16 field in a BD8 form instruction. */
+#define BI16 BT + 1
+ { 0x3, 8, NULL, NULL, PPC_OPERAND_CR_BIT },
+
+ /* The BI32 field in a BD15 form instruction. */
+#define BI32 BI16 + 1
+ { 0xf, 16, NULL, NULL, PPC_OPERAND_CR_BIT },
+
+ /* The BO32 field in a BD15 form instruction. */
+#define BO32 BI32 + 1
+ { 0x3, 20, NULL, NULL, 0 },
+
+ /* The B8 field in a BD8 form instruction. */
+#define B8 BO32 + 1
+ { 0x1fe, -1, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
+
+ /* The B15 field in a BD15 form instruction. The lowest bit is
+ forced to zero. */
+#define B15 B8 + 1
+ { 0xfffe, 0, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
+
+ /* The B24 field in a BD24 form instruction. The lowest bit is
+ forced to zero. */
+#define B24 B15 + 1
+ { 0x1fffffe, 0, NULL, NULL, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
/* The condition register number portion of the BI field in a B form
or XL form instruction. This is used for the extended
conditional branch mnemonics, which set the lower two bits of the
BI field. This field is optional. */
-#define CR BT + 1
- { 0x7, 18, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
+#define CR B24 + 1
+ { 0x7, 18, NULL, NULL, PPC_OPERAND_CR_REG | PPC_OPERAND_OPTIONAL },
/* The CRB field in an X form instruction. */
#define CRB CR + 1
@@ -215,12 +271,19 @@
#define MB_MASK (0x1f << 6)
{ 0x1f, 6, NULL, NULL, 0 },
+ /* The CRD32 field in an XL form instruction. */
+#define CRD32 CRB + 1
+ { 0x3, 21, NULL, NULL, PPC_OPERAND_CR_REG },
+
/* The CRFS field in an X form instruction. */
-#define CRFS CRB + 1
- { 0x7, 0, NULL, NULL, PPC_OPERAND_CR },
+#define CRFS CRD32 + 1
+ { 0x7, 0, NULL, NULL, PPC_OPERAND_CR_REG },
+
+#define CRS CRFS + 1
+ { 0x3, 18, NULL, NULL, PPC_OPERAND_CR_REG | PPC_OPERAND_OPTIONAL },
/* The CT field in an X form instruction. */
-#define CT CRFS + 1
+#define CT CRS + 1
/* The MO field in an mbar instruction. */
#define MO CT
{ 0x1f, 21, NULL, NULL, PPC_OPERAND_OPTIONAL },
@@ -231,9 +294,15 @@
#define D CT + 1
{ 0xffff, 0, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+ /* The D8 field in a D form instruction. This is a displacement off
+ a register, and implies that the next operand is a register in
+ parentheses. */
+#define D8 D + 1
+ { 0xff, 0, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+
/* The DQ field in a DQ form instruction. This is like D, but the
lower four bits are forced to zero. */
-#define DQ D + 1
+#define DQ D8 + 1
{ 0xfff0, 0, NULL, NULL,
PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED | PPC_OPERAND_DQ },
@@ -310,8 +379,12 @@
#define FXM4 FXM + 1
{ 0xff, 12, insert_fxm, extract_fxm, PPC_OPERAND_OPTIONAL },
+ /* The IMM20 field in an LI instruction. */
+#define IMM20 FXM4 + 1
+ { 0xfffff, PPC_OPSHIFT_INV, insert_li20, extract_li20, PPC_OPERAND_SIGNED},
+
/* The L field in a D or X form instruction. */
-#define L FXM4 + 1
+#define L IMM20 + 1
{ 0x1, 21, NULL, NULL, PPC_OPERAND_OPTIONAL },
/* The LEV field in a POWER SVC form instruction. */
@@ -436,6 +509,7 @@
#define RS RBOPT + 1
#define RT RS
#define RT_MASK (0x1f << 21)
+#define RD RS
{ 0x1f, 21, NULL, NULL, PPC_OPERAND_GPR },
/* The RS and RT fields of the DS form stq instruction, which have
@@ -449,8 +523,47 @@
#define RTO RSO
{ 0x1f, 21, NULL, NULL, PPC_OPERAND_GPR | PPC_OPERAND_OPTIONAL },
+ /* The RX field of the SE_RR form instruction. */
+#define RX RSO + 1
+ { 0x1f, PPC_OPSHIFT_INV, insert_rx, extract_rx, PPC_OPERAND_GPR },
+
+ /* The ARX field of the SE_RR form instruction. */
+#define ARX RX + 1
+ { 0x1f, PPC_OPSHIFT_INV, insert_arx, extract_arx, PPC_OPERAND_GPR },
+
+ /* The RY field of the SE_RR form instruction. */
+#define RY ARX + 1
+#define RZ RY
+ { 0x1f, PPC_OPSHIFT_INV, insert_ry, extract_ry, PPC_OPERAND_GPR },
+
+ /* The ARY field of the SE_RR form instruction. */
+#define ARY RY + 1
+ { 0x1f, PPC_OPSHIFT_INV, insert_ary, extract_ary, PPC_OPERAND_GPR },
+
+ /* The SCLSCI8 field in a D form instruction. */
+#define SCLSCI8 ARY + 1
+ { 0xffffffff, PPC_OPSHIFT_INV, insert_sci8, extract_sci8, 0 },
+
+ /* The SCLSCI8N field in a D form instruction. This is the same as the
+ SCLSCI8 field, only negated. */
+#define SCLSCI8N SCLSCI8 + 1
+ { 0xffffffff, PPC_OPSHIFT_INV, insert_sci8n, extract_sci8n,
+ PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED },
+
+ /* The SD field of the SD4 form instruction. */
+#define SE_SD SCLSCI8N + 1
+ { 0xf, 8, NULL, NULL, PPC_OPERAND_PARENS },
+
+ /* The SD field of the SD4 form instruction, for halfword. */
+#define SE_SDH SE_SD + 1
+ { 0x1e, PPC_OPSHIFT_INV, insert_sd4h, extract_sd4h, PPC_OPERAND_PARENS },
+
+ /* The SD field of the SD4 form instruction, for word. */
+#define SE_SDW SE_SDH + 1
+ { 0x3c, PPC_OPSHIFT_INV, insert_sd4w, extract_sd4w, PPC_OPERAND_PARENS },
+
/* The SH field in an X or M form instruction. */
-#define SH RSO + 1
+#define SH SE_SDW + 1
#define SH_MASK (0x1f << 11)
/* The other UIMM field in a EVX form instruction. */
#define EVUIMM SH
@@ -459,7 +572,7 @@
/* The SH field in an MD form instruction. This is split. */
#define SH6 SH + 1
#define SH6_MASK ((0x1f << 11) | (1 << 1))
- { 0x3f, -1, insert_sh6, extract_sh6, 0 },
+ { 0x3f, PPC_OPSHIFT_INV, insert_sh6, extract_sh6, 0 },
/* The SH field of the tlbwe instruction, which is optional. */
#define SHO SH6 + 1
@@ -474,9 +587,13 @@
#define SISIGNOPT SI + 1
{ 0xffff, 0, NULL, NULL, PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT },
+ /* The SI8 field in a D form instruction. */
+#define SI8 SISIGNOPT + 1
+ { 0xff, 0, NULL, NULL, PPC_OPERAND_SIGNED },
+
/* The SPR field in an XFX form instruction. This is flipped--the
lower 5 bits are stored in the upper 5 and vice- versa. */
-#define SPR SISIGNOPT + 1
+#define SPR SI8 + 1
#define PMR SPR
#define TMR SPR
#define SPR_MASK (0x3ff << 11)
@@ -524,8 +641,20 @@
#define UI TO + 1
{ 0xffff, 0, NULL, NULL, 0 },
+ /* The IMM field in an SE_IM5 instruction. */
+#define UI5 UI + 1
+ { 0x1f, 4, NULL, NULL, 0 },
+
+ /* The OIMM field in an SE_OIM5 instruction. */
+#define OIMM5 UI5 + 1
+ { 0x1f, PPC_OPSHIFT_INV, insert_oimm, extract_oimm, PPC_OPERAND_PLUS1 },
+
+ /* The UI7 field in an SE_LI instruction. */
+#define UI7 OIMM5 + 1
+ { 0x7f, 4, NULL, NULL, 0 },
+
/* The VA field in a VA, VX or VXR form instruction. */
-#define VA UI + 1
+#define VA UI7 + 1
{ 0x1f, 16, NULL, NULL, PPC_OPERAND_VR },
/* The VB field in a VA, VX or VXR form instruction. */
@@ -574,6 +703,8 @@
/* PowerPC paired singles extensions. */
/* W bit in the pair singles instructions for x type instructions. */
#define PSWM WS + 1
+ /* The BO16 field in a BD8 form instruction. */
+#define BO16 PSWM
{ 0x1, 10, 0, 0, 0 },
/* IDX bits for quantization in the pair singles instructions. */
@@ -643,28 +774,46 @@
#define URC URB + 1
{ 0x1f, 6, 0, 0, PPC_OPERAND_UDI },
+ /* The VLESIMM field in a D form instruction. */
+#define VLESIMM URC + 1
+ { 0xffff, PPC_OPSHIFT_INV, insert_vlesi, extract_vlesi,
+ PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT },
+
+ /* The VLENSIMM field in a D form instruction. */
+#define VLENSIMM VLESIMM + 1
+ { 0xffff, PPC_OPSHIFT_INV, insert_vlensi, extract_vlensi,
+ PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT },
+
+ /* The VLEUIMM field in a D form instruction. */
+#define VLEUIMM VLENSIMM + 1
+ { 0xffff, PPC_OPSHIFT_INV, insert_vleui, extract_vleui, 0 },
+
+ /* The VLEUIMML field in a D form instruction. */
+#define VLEUIMML VLEUIMM + 1
+ { 0xffff, PPC_OPSHIFT_INV, insert_vleil, extract_vleil, 0 },
+
/* The XT and XS fields in an XX1 or XX3 form instruction. This is split. */
-#define XS6 URC + 1
+#define XS6 VLEUIMML + 1
#define XT6 XS6
- { 0x3f, -1, insert_xt6, extract_xt6, PPC_OPERAND_VSR },
+ { 0x3f, PPC_OPSHIFT_INV, insert_xt6, extract_xt6, PPC_OPERAND_VSR },
/* The XA field in an XX3 form instruction. This is split. */
#define XA6 XT6 + 1
- { 0x3f, -1, insert_xa6, extract_xa6, PPC_OPERAND_VSR },
+ { 0x3f, PPC_OPSHIFT_INV, insert_xa6, extract_xa6, PPC_OPERAND_VSR },
/* The XB field in an XX2 or XX3 form instruction. This is split. */
#define XB6 XA6 + 1
- { 0x3f, -1, insert_xb6, extract_xb6, PPC_OPERAND_VSR },
+ { 0x3f, PPC_OPSHIFT_INV, insert_xb6, extract_xb6, PPC_OPERAND_VSR },
/* The XB field in an XX3 form instruction when it must be the same as
the XA field in the instruction. This is used in extended mnemonics
like xvmovdp. This is split. */
#define XB6S XB6 + 1
- { 0x3f, -1, insert_xb6s, extract_xb6s, PPC_OPERAND_FAKE },
+ { 0x3f, PPC_OPSHIFT_INV, insert_xb6s, extract_xb6s, PPC_OPERAND_FAKE },
/* The XC field in an XX4 form instruction. This is split. */
#define XC6 XB6S + 1
- { 0x3f, -1, insert_xc6, extract_xc6, PPC_OPERAND_VSR },
+ { 0x3f, PPC_OPSHIFT_INV, insert_xc6, extract_xc6, PPC_OPERAND_VSR },
/* The DM or SHW field in an XX3 form instruction. */
#define DM XC6 + 1
@@ -688,6 +837,112 @@
/* The functions used to insert and extract complicated operands. */
+/* The ARX, ARY, RX and RY operands are alternate encodings of GPRs. */
+
+static unsigned long
+insert_arx (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ if (value >= 8 && value < 24)
+ return insn | ((value - 8) & 0xf);
+ else
+ {
+ *errmsg = _("invalid register");
+ return 0;
+ }
+}
+
+static long
+extract_arx (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return (insn & 0xf) + 8;
+}
+
+static unsigned long
+insert_ary (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ if (value >= 8 && value < 24)
+ return insn | (((value - 8) & 0xf) << 4);
+ else
+ {
+ *errmsg = _("invalid register");
+ return 0;
+ }
+}
+
+static long
+extract_ary (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return ((insn >> 4) & 0xf) + 8;
+}
+
+static unsigned long
+insert_rx (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg)
+{
+ if (value >= 0 && value < 8)
+ return insn | value;
+ else if (value >= 24 && value <= 31)
+ return insn | (value - 16);
+ else
+ {
+ *errmsg = _("invalid register");
+ return 0;
+ }
+}
+
+static long
+extract_rx (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ int value = insn & 0xf;
+ if (value >= 0 && value < 8)
+ return value;
+ else
+ return value + 16;
+}
+
+static unsigned long
+insert_ry (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg)
+{
+ if (value >= 0 && value < 8)
+ return insn | (value << 4);
+ else if (value >= 24 && value <= 31)
+ return insn | ((value - 16) << 4);
+ else
+ {
+ *errmsg = _("invalid register");
+ return 0;
+ }
+}
+
+static long
+extract_ry (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ int value = (insn >> 4) & 0xf;
+ if (value >= 0 && value < 8)
+ return value;
+ else
+ return value + 16;
+}
+
/* The BA field in an XL form instruction when it must be the same as
the BT field in the same instruction. This operand is marked FAKE.
The insertion function just copies the BT field into the BA field,
@@ -1043,6 +1298,29 @@
return mask;
}
+static unsigned long
+insert_li20 (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | ((value & 0xf0000) >> 5) | ((value & 0x0f800) << 5) | (value & 0x7ff);
+}
+
+static long
+extract_li20 (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ long ext = ((insn & 0x4000) == 0x4000) ? 0xfff00000 : 0x00000000;
+
+ return ext
+ | (((insn >> 11) & 0xf) << 16)
+ | (((insn >> 17) & 0xf) << 12)
+ | (((insn >> 16) & 0x1) << 11)
+ | (insn & 0x7ff);
+}
+
/* The LS field in a sync instruction that accepts 2 operands
Values 2 and 3 are reserved,
must be treated as 0 for future compatibility
@@ -1338,6 +1616,166 @@
return insn | ((value & 0x1f) << 11);
}
+/* The SCI8 field is made up of SCL and {U,N}I8 fields. */
+static unsigned long
+insert_sci8 (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg)
+{
+ int fill = 0;
+ int scale_factor = 0;
+ long ui8 = value;
+
+ if ((value & 0xff000000) == (unsigned int) value)
+ {
+ scale_factor = 3;
+ ui8 = value >> 24;
+ fill = 0;
+ }
+ else if ((value & 0xff0000) == (unsigned int) value)
+ {
+ scale_factor = 2;
+ ui8 = value >> 16;
+ fill = 0;
+ }
+ else if ((value & 0xff00) == (unsigned int) value)
+ {
+ scale_factor = 1;
+ ui8 = value >> 8;
+ fill = 0;
+ }
+ else if ((value & 0xff) == value)
+ {
+ scale_factor = 0;
+ ui8 = value;
+ fill = 0;
+ }
+ else if ((value & 0xffffff00) == 0xffffff00)
+ {
+ scale_factor = 0;
+ ui8 = (value & 0xff);
+ fill = 1;
+ }
+ else if ((value & 0xffff00ff) == 0xffff00ff)
+ {
+ scale_factor = 1;
+ ui8 = (value & 0xff00) >> 8;
+ fill = 1;
+ }
+ else if ((value & 0xff00ffff) == 0xff00ffff)
+ {
+ scale_factor = 2;
+ ui8 = (value & 0xff0000) >> 16;
+ fill = 1;
+ }
+ else if ((value & 0x00ffffff) == 0x00ffffff)
+ {
+ scale_factor = 3;
+ ui8 = (value & 0xff000000) >> 24;
+ fill = 1;
+ }
+ else
+ *errmsg = _("illegal immediate value");
+
+ return insn | (fill << 10) | (scale_factor << 8) | (ui8 & 0xff);
+}
+
+static long
+extract_sci8 (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ int scale_factor, fill;
+ scale_factor = (insn & 0x300) >> 8;
+ fill = (insn & 0x00000400) >> 10;
+
+ if (fill == 0)
+ return (insn & 0xff) << (scale_factor << 3);
+
+ /* Fill is one. */
+ if (scale_factor == 0)
+ return (insn & 0xff) | 0xffffff00;
+ else if (scale_factor == 1)
+ return 0xffff00ff | ((insn & 0xff) << (scale_factor << 3));
+ else if (scale_factor == 2)
+ return 0xff00ffff | (insn & 0xff << (scale_factor << 3));
+ else /* scale_factor 3 */
+ return 0x00ffffff | (insn & 0xff << (scale_factor << 3));
+}
+
+static unsigned long
+insert_sci8n (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg)
+{
+ insn = insert_sci8 (insn, -(value & 0xff) & 0xff, 0, errmsg);
+ /* Set the F bit. */
+ return insn | 0x400;
+}
+
+static long
+extract_sci8n (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ int scale_factor;
+ scale_factor = (insn & 0x300) >> 8;
+ return -(((insn & 0xff) ^ 0x80) - 0x80) << (scale_factor << 3);
+}
+
+static unsigned long
+insert_sd4h (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | ((value & 0x1e) << 7);
+}
+
+static long
+extract_sd4h (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return ((insn >> 8) & 0xf) << 1;
+}
+
+static unsigned long
+insert_sd4w (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | ((value & 0x3c) << 6);
+}
+
+static long
+extract_sd4w (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return ((insn >> 8) & 0xf) << 2;
+}
+
+static unsigned long
+insert_oimm (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | (((value - 1) & 0x1f) << 4);
+}
+
+static long
+extract_oimm (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return ((insn >> 4) & 0x1f) + 1;
+}
+
/* The SH field in an MD form instruction. This is split. */
static unsigned long
@@ -1378,6 +1816,7 @@
}
/* Some dialects have 8 SPRG registers instead of the standard 4. */
+#define ALLOW8_SPRG (PPC_OPCODE_BOOKE | PPC_OPCODE_405 | PPC_OPCODE_VLE)
static unsigned long
insert_sprg (unsigned long insn,
@@ -1386,8 +1825,7 @@
const char **errmsg)
{
if (value > 7
- || (value > 3
- && (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_405)) == 0))
+ || (value > 3 && (dialect & ALLOW8_SPRG) == 0))
*errmsg = _("invalid sprg number");
/* If this is mfsprg4..7 then use spr 260..263 which can be read in
@@ -1406,8 +1844,8 @@
unsigned long val = (insn >> 16) & 0x1f;
/* mfsprg can use 260..263 and 272..279. mtsprg only uses spr 272..279
- If not BOOKE or 405, then both use only 272..275. */
- if ((val - 0x10 > 3 && (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_405)) == 0)
+ If not BOOKE, 405 or VLE, then both use only 272..275. */
+ if ((val - 0x10 > 3 && (dialect & ALLOW8_SPRG) == 0)
|| (val - 0x10 > 7 && (insn & 0x100) != 0)
|| val <= 3
|| (val & 8) != 0)
@@ -1574,6 +2012,89 @@
*invalid = 1;
return (value) ? 1 : 0;
}
+/* The VLESIMM field in an I16A form instruction. This is split. */
+
+static unsigned long
+insert_vlesi (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | ((value & 0xf800) << 10) | (value & 0x7ff);
+}
+
+static long
+extract_vlesi (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ /* RWRW Because I don't know how to make int be 16 and long be 32 */
+ /* I can't rely on casting an int to long to get sign extension. */
+ long value = ((insn >> 10) & 0xf800) | (insn & 0x7ff);
+ if (value & 0x8000)
+ value |= 0xffff0000;
+ return value;
+}
+
+static unsigned long
+insert_vlensi (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ value = -value;
+ return insn | ((value & 0xf800) << 10) | (value & 0x7ff);
+}
+static long
+extract_vlensi (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ long value = ((insn >> 10) & 0xf800) | (insn & 0x7ff);
+ if (value & 0x8000)
+ value |= 0xffff0000;
+ *invalid = 1;
+ return -value;
+}
+
+/* The VLEUIMM field in an I16A form instruction. This is split. */
+
+static unsigned long
+insert_vleui (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | ((value & 0xf800) << 10) | (value & 0x7ff);
+}
+
+static long
+extract_vleui (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return ((insn >> 10) & 0xf800) | (insn & 0x7ff);
+}
+
+/* The VLEUIMML field in an I16L form instruction. This is split. */
+
+static unsigned long
+insert_vleil (unsigned long insn,
+ long value,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ const char **errmsg ATTRIBUTE_UNUSED)
+{
+ return insn | ((value & 0xf800) << 5) | (value & 0x7ff);
+}
+
+static long
+extract_vleil (unsigned long insn,
+ ppc_cpu_t dialect ATTRIBUTE_UNUSED,
+ int *invalid ATTRIBUTE_UNUSED)
+{
+ return ((insn >> 5) & 0xf800) | (insn & 0x7ff);
+}
+
/* Macros used to form opcodes. */
@@ -1593,6 +2114,11 @@
#define OPL(x,l) (OP (x) | ((((unsigned long)(l)) & 1) << 21))
#define OPL_MASK OPL (0x3f,1)
+/* The main opcode combined with an update code in D form instruction.
+ Used for extended mnemonics for VLE memory instructions. */
+#define OPVUP(x,vup) (OP (x) | ((((unsigned long)(vup)) & 0xff) << 8))
+#define OPVUP_MASK OPVUP (0x3f, 0xff)
+
/* An A form instruction. */
#define A(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1) | (((unsigned long)(rc)) & 1))
#define A_MASK A (0x3f, 0x1f, 1)
@@ -1613,6 +2139,43 @@
#define B(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 1) | ((lk) & 1))
#define B_MASK B (0x3f, 1, 1)
+/* A BD8 form instruction. This is a 16-bit instruction. */
+#define BD8(op, aa, lk) (((((unsigned long)(op)) & 0x3f) << 10) | (((aa) & 1) << 9) | (((lk) & 1) << 8))
+#define BD8_MASK BD8 (0x3f, 1, 1)
+
+/* Another BD8 form instruction. This is a 16-bit instruction. */
+#define BD8IO(op) ((((unsigned long)(op)) & 0x1f) << 11)
+#define BD8IO_MASK BD8IO (0x1f)
+
+/* A BD8 form instruction for simplified mnemonics. */
+#define EBD8IO(op, bo, bi) (BD8IO ((op)) | ((bo) << 10) | ((bi) << 8))
+/* A mask that excludes BO32 and BI32. */
+#define EBD8IO1_MASK 0xf800
+/* A mask that includes BO32 and excludes BI32. */
+#define EBD8IO2_MASK 0xfc00
+/* A mask that include BO32 AND BI32. */
+#define EBD8IO3_MASK 0xff00
+
+/* A BD15 form instruction. */
+#define BD15(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 0xf) << 22) | ((lk) & 1))
+#define BD15_MASK BD15 (0x3f, 0xf, 1)
+
+/* A BD15 form instruction for extended conditional branch mnemonics. */
+#define EBD15(op, aa, bo, lk) (((op) & 0x3f) << 26) | (((aa) & 0xf) << 22) | (((bo) & 0x3) << 20) | ((lk) & 1)
+#define EBD15_MASK 0xfff00001
+
+/* A BD15 form instruction for extended conditional branch mnemonics with BI. */
+#define EBD15BI(op, aa, bo, bi, lk) (((op) & 0x3f) << 26) \
+ | (((aa) & 0xf) << 22) \
+ | (((bo) & 0x3) << 20) \
+ | (((bi) & 0x3) << 16) \
+ | ((lk) & 1)
+#define EBD15BI_MASK 0xfff30001
+
+/* A BD24 form instruction. */
+#define BD24(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 25) | ((lk) & 1))
+#define BD24_MASK BD24 (0x3f, 1, 1)
+
/* A B form instruction setting the BO field. */
#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | ((((unsigned long)(bo)) & 0x1f) << 21))
#define BBO_MASK BBO (0x3f, 0x1f, 1, 1)
@@ -1641,6 +2204,12 @@
#define BBOYBI_MASK (BBOYCB_MASK | BI_MASK)
#define BBOATBI_MASK (BBOAT2CB_MASK | BI_MASK)
+/* A VLE C form instruction. */
+#define C_LK(x, lk) (((((unsigned long)(x)) & 0x7fff) << 1) | ((lk) & 1))
+#define C_LK_MASK C_LK(0x7fff, 1)
+#define C(x) ((((unsigned long)(x)) & 0xffff))
+#define C_MASK C(0xffff)
+
/* An Context form instruction. */
#define CTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7))
#define CTX_MASK CTX(0x3f, 0x7)
@@ -1660,10 +2229,30 @@
#define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3)
#define EVSEL_MASK EVSEL(0x3f, 0xff)
+/* An IA16 form instruction. */
+#define IA16(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f) << 11)
+#define IA16_MASK IA16(0x3f, 0x1f)
+
+/* An I16A form instruction. */
+#define I16A(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f) << 11)
+#define I16A_MASK I16A(0x3f, 0x1f)
+
+/* An I16L form instruction. */
+#define I16L(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1f) << 11)
+#define I16L_MASK I16L(0x3f, 0x1f)
+
+/* An IM7 form instruction. */
+#define IM7(op) ((((unsigned long)(op)) & 0x1f) << 11)
+#define IM7_MASK IM7(0x1f)
+
/* An M form instruction. */
#define M(op, rc) (OP (op) | ((rc) & 1))
#define M_MASK M (0x3f, 1)
+/* An LI20 form instruction. */
+#define LI20(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x1) << 15)
+#define LI20_MASK LI20(0x3f, 0x1)
+
/* An M form instruction with the ME field specified. */
#define MME(op, me, rc) (M ((op), (rc)) | ((((unsigned long)(me)) & 0x1f) << 1))
@@ -1694,19 +2283,43 @@
#define SC(op, sa, lk) (OP (op) | ((((unsigned long)(sa)) & 1) << 1) | ((lk) & 1))
#define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1)
-/* An VX form instruction. */
+/* An SCI8 form instruction. */
+#define SCI8(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 11))
+#define SCI8_MASK SCI8(0x3f, 0x1f)
+
+/* An SCI8 form instruction. */
+#define SCI8BF(op, fop, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 11) | (((fop) & 7) << 23))
+#define SCI8BF_MASK SCI8BF(0x3f, 7, 0x1f)
+
+/* An SD4 form instruction. This is a 16-bit instruction. */
+#define SD4(op) ((((unsigned long)(op)) & 0xf) << 12)
+#define SD4_MASK SD4(0xf)
+
+/* An SE_IM5 form instruction. This is a 16-bit instruction. */
+#define SE_IM5(op, xop) (((((unsigned long)(op)) & 0x3f) << 10) | (((xop) & 0x1) << 9))
+#define SE_IM5_MASK SE_IM5(0x3f, 1)
+
+/* An SE_R form instruction. This is a 16-bit instruction. */
+#define SE_R(op, xop) (((((unsigned long)(op)) & 0x3f) << 10) | (((xop) & 0x3f) << 4))
+#define SE_R_MASK SE_R(0x3f, 0x3f)
+
+/* An SE_RR form instruction. This is a 16-bit instruction. */
+#define SE_RR(op, xop) (((((unsigned long)(op)) & 0x3f) << 10) | (((xop) & 0x3) << 8))
+#define SE_RR_MASK SE_RR(0x3f, 3)
+
+/* A VX form instruction. */
#define VX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff))
/* The mask for an VX form instruction. */
#define VX_MASK VX(0x3f, 0x7ff)
-/* An VA form instruction. */
+/* A VA form instruction. */
#define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x03f))
/* The mask for an VA form instruction. */
#define VXA_MASK VXA(0x3f, 0x3f)
-/* An VXR form instruction. */
+/* A VXR form instruction. */
#define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff))
/* The mask for a VXR form instruction. */
@@ -1715,6 +2328,12 @@
/* An X form instruction. */
#define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1))
+/* An EX form instruction. */
+#define EX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff))
+
+/* The mask for an EX form instruction. */
+#define EX_MASK EX (0x3f, 0x7ff)
+
/* An XX2 form instruction. */
#define XX2(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2))
@@ -1986,6 +2605,16 @@
#define BOU (0x14)
+/* The BO16 encodings used in extended VLE conditional branch mnemonics. */
+#define BO16F (0x0)
+#define BO16T (0x1)
+
+/* The BO32 encodings used in extended VLE conditional branch mnemonics. */
+#define BO32F (0x0)
+#define BO32T (0x1)
+#define BO32DNZ (0x2)
+#define BO32DZ (0x3)
+
/* The BI condition bit encodings used in extended conditional branch
mnemonics. */
#define CBLT (0)
@@ -2046,11 +2675,11 @@
#define MFDEC1 PPC_OPCODE_POWER
#define MFDEC2 PPC_OPCODE_PPC | PPC_OPCODE_601 | PPC_OPCODE_BOOKE | PPC_OPCODE_TITAN
#define BOOKE PPC_OPCODE_BOOKE
-#define NO371 PPC_OPCODE_BOOKE | PPC_OPCODE_EFS
+#define NO371 PPC_OPCODE_BOOKE | PPC_OPCODE_PPCPS | PPC_OPCODE_EFS | PPC_OPCODE_VLE
#define PPCE300 PPC_OPCODE_E300
-#define PPCSPE PPC_OPCODE_SPE
-#define PPCISEL PPC_OPCODE_ISEL
-#define PPCEFS PPC_OPCODE_EFS
+#define PPCSPE PPC_OPCODE_SPE | PPC_OPCODE_VLE
+#define PPCISEL PPC_OPCODE_ISEL | PPC_OPCODE_VLE
+#define PPCEFS PPC_OPCODE_EFS | PPC_OPCODE_VLE
#define PPCBRLK PPC_OPCODE_BRLOCK
#define PPCPMR PPC_OPCODE_PMR
#define PPCTMR PPC_OPCODE_TMR
@@ -2059,9 +2688,10 @@
#define E500MC PPC_OPCODE_E500MC
#define PPCA2 PPC_OPCODE_A2
#define TITAN PPC_OPCODE_TITAN
-#define MULHW PPC_OPCODE_405 | PPC_OPCODE_440 | TITAN
+#define MULHW PPC_OPCODE_405 | PPC_OPCODE_440 | TITAN | PPC_OPCODE_VLE
#define E500 PPC_OPCODE_E500
#define E6500 PPC_OPCODE_E6500
+#define PPCVLE PPC_OPCODE_VLE
/* The opcode table.
@@ -2135,54 +2765,54 @@
{"ti", OP(3), OP_MASK, PWRCOM, PPCNONE, {TO, RA, SI}},
{"ps_cmpu0", X (4, 0), X_MASK|(3<<21), PPCPS, PPCNONE, {BF, FRA, FRB}},
-{"vaddubm", VX (4, 0), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmaxub", VX (4, 2), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vrlb", VX (4, 4), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpequb", VXR(4, 6,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmuloub", VX (4, 8), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vaddfp", VX (4, 10), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vaddubm", VX (4, 0), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmaxub", VX (4, 2), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vrlb", VX (4, 4), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpequb", VXR(4, 6,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmuloub", VX (4, 8), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vaddfp", VX (4, 10), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"psq_lx", XW (4, 6,0), XW_MASK, PPCPS, PPCNONE, {FRT,RA,RB,PSWM,PSQM}},
-{"vmrghb", VX (4, 12), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vmrghb", VX (4, 12), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"psq_stx", XW (4, 7,0), XW_MASK, PPCPS, PPCNONE, {FRS,RA,RB,PSWM,PSQM}},
-{"vpkuhum", VX (4, 14), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"mulhhwu", XRC(4, 8,0), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"mulhhwu.", XRC(4, 8,1), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"vpkuhum", VX (4, 14), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"mulhhwu", XRC(4, 8,0), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulhhwu.", XRC(4, 8,1), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_sum0", A (4, 10,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_sum0.", A (4, 10,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_sum1", A (4, 11,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_sum1.", A (4, 11,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_muls0", A (4, 12,0), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
-{"machhwu", XO (4, 12,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"machhwu", XO (4, 12,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_muls0.", A (4, 12,1), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
-{"machhwu.", XO (4, 12,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"machhwu.", XO (4, 12,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_muls1", A (4, 13,0), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
{"ps_muls1.", A (4, 13,1), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
{"ps_madds0", A (4, 14,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_madds0.", A (4, 14,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_madds1", A (4, 15,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_madds1.", A (4, 15,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
-{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
-{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
-{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
+{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
+{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
+{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_div", A (4, 18,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
+{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_div.", A (4, 18,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
-{"vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
-{"vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
+{"vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
+{"vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
+{"vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_sub", A (4, 20,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
+{"vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_sub.", A (4, 20,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
+{"vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_add", A (4, 21,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"vsel", VXA(4, 42), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
+{"vsel", VXA(4, 42), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
{"ps_add.", A (4, 21,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"vperm", VXA(4, 43), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, VC}},
-{"vsldoi", VXA(4, 44), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VB, SHB}},
+{"vperm", VXA(4, 43), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
+{"vsldoi", VXA(4, 44), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, SHB}},
{"ps_sel", A (4, 23,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
-{"vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VC, VB}},
+{"vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VC, VB}},
{"ps_sel.", A (4, 23,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
-{"vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, PPCNONE, {VD, VA, VC, VB}},
+{"vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VC, VB}},
{"ps_res", A (4, 24,0), AFRAFRC_MASK, PPCPS, PPCNONE, {FRT, FRB}},
{"ps_res.", A (4, 24,1), AFRAFRC_MASK, PPCPS, PPCNONE, {FRT, FRB}},
{"ps_mul", A (4, 25,0), AFRB_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC}},
@@ -2198,536 +2828,536 @@
{"ps_nmadd", A (4, 31,0), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_nmadd.", A (4, 31,1), A_MASK, PPCPS, PPCNONE, {FRT, FRA, FRC, FRB}},
{"ps_cmpo0", X (4, 32), X_MASK|(3<<21), PPCPS, PPCNONE, {BF, FRA, FRB}},
-{"vadduhm", VX (4, 64), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmaxuh", VX (4, 66), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vrlh", VX (4, 68), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpequh", VXR(4, 70,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmulouh", VX (4, 72), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vsubfp", VX (4, 74), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vadduhm", VX (4, 64), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmaxuh", VX (4, 66), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vrlh", VX (4, 68), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpequh", VXR(4, 70,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmulouh", VX (4, 72), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vsubfp", VX (4, 74), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"psq_lux", XW (4, 38,0), XW_MASK, PPCPS, PPCNONE, {FRT,RA,RB,PSWM,PSQM}},
-{"vmrghh", VX (4, 76), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vmrghh", VX (4, 76), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"psq_stux", XW (4, 39,0), XW_MASK, PPCPS, PPCNONE, {FRS,RA,RB,PSWM,PSQM}},
-{"vpkuwum", VX (4, 78), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vpkuwum", VX (4, 78), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"ps_neg", XRC(4, 40,0), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
-{"mulhhw", XRC(4, 40,0), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"mulhhw", XRC(4, 40,0), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_neg.", XRC(4, 40,1), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
-{"mulhhw.", XRC(4, 40,1), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhw", XO (4, 44,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhw.", XO (4, 44,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhw", XO (4, 46,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhw.", XO (4, 46,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"mulhhw.", XRC(4, 40,1), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhw", XO (4, 44,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhw.", XO (4, 44,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhw", XO (4, 46,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhw.", XO (4, 46,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_cmpu1", X (4, 64), X_MASK|(3<<21), PPCPS, PPCNONE, {BF, FRA, FRB}},
-{"vadduwm", VX (4, 128), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmaxuw", VX (4, 130), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vrlw", VX (4, 132), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpequw", VXR(4, 134,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmrghw", VX (4, 140), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vpkuhus", VX (4, 142), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vadduwm", VX (4, 128), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmaxuw", VX (4, 130), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vrlw", VX (4, 132), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpequw", VXR(4, 134,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmrghw", VX (4, 140), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vpkuhus", VX (4, 142), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"ps_mr", XRC(4, 72,0), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
{"ps_mr.", XRC(4, 72,1), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
-{"machhwsu", XO (4, 76,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhwsu.", XO (4, 76,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"machhwsu", XO (4, 76,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhwsu.", XO (4, 76,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_cmpo1", X (4, 96), X_MASK|(3<<21), PPCPS, PPCNONE, {BF, FRA, FRB}},
{"vabsdub", VX (4, 192), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}},
-{"vcmpeqfp", VXR(4, 198,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vpkuwus", VX (4, 206), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"machhws", XO (4, 108,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhws.", XO (4, 108,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhws", XO (4, 110,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhws.", XO (4, 110,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"vcmpeqfp", VXR(4, 198,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vpkuwus", VX (4, 206), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"machhws", XO (4, 108,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhws.", XO (4, 108,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhws", XO (4, 110,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhws.", XO (4, 110,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"vabsduh", VX (4, 256), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}},
-{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vslb", VX (4, 260), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmulosb", VX (4, 264), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vrefp", VX (4, 266), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"vmrglb", VX (4, 268), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vpkshus", VX (4, 270), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vslb", VX (4, 260), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmulosb", VX (4, 264), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vrefp", VX (4, 266), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"vmrglb", VX (4, 268), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vpkshus", VX (4, 270), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"ps_nabs", XRC(4, 136,0), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
-{"mulchwu", XRC(4, 136,0), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"mulchwu", XRC(4, 136,0), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_nabs.", XRC(4, 136,1), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
-{"mulchwu.", XRC(4, 136,1), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"macchwu", XO (4, 140,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"macchwu.", XO (4, 140,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"mulchwu.", XRC(4, 136,1), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"macchwu", XO (4, 140,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"macchwu.", XO (4, 140,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"vabsduw", VX (4, 320), VX_MASK, PPCVEC2, PPCNONE, {VD, VA, VB}},
-{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vslh", VX (4, 324), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmulosh", VX (4, 328), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vrsqrtefp", VX (4, 330), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"vmrglh", VX (4, 332), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vpkswus", VX (4, 334), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vslh", VX (4, 324), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmulosh", VX (4, 328), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vrsqrtefp", VX (4, 330), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"vmrglh", VX (4, 332), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vpkswus", VX (4, 334), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"mulchw", XRC(4, 168,0), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
{"mulchw.", XRC(4, 168,1), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
{"macchw", XO (4, 172,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
{"macchw.", XO (4, 172,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
{"nmacchw", XO (4, 174,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
{"nmacchw.", XO (4, 174,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vaddcuw", VX (4, 384), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmaxsw", VX (4, 386), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vslw", VX (4, 388), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vexptefp", VX (4, 394), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"vmrglw", VX (4, 396), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vpkshss", VX (4, 398), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"macchwsu", XO (4, 204,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"macchwsu.", XO (4, 204,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vsl", VX (4, 452), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgefp", VXR(4, 454,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vlogefp", VX (4, 458), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"vpkswss", VX (4, 462), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"macchws", XO (4, 236,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"macchws.", XO (4, 236,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmacchws", XO (4, 238,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmacchws.", XO (4, 238,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evaddw", VX (4, 512), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vaddubs", VX (4, 512), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evaddiw", VX (4, 514), VX_MASK, PPCSPE, PPCNONE, {RS, RB, UIMM}},
-{"vminub", VX (4, 514), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evsubfw", VX (4, 516), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
+{"vaddcuw", VX (4, 384), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmaxsw", VX (4, 386), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vslw", VX (4, 388), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vexptefp", VX (4, 394), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"vmrglw", VX (4, 396), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vpkshss", VX (4, 398), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"macchwsu", XO (4, 204,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"macchwsu.", XO (4, 204,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vsl", VX (4, 452), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgefp", VXR(4, 454,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vlogefp", VX (4, 458), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"vpkswss", VX (4, 462), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"macchws", XO (4, 236,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"macchws.", XO (4, 236,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmacchws", XO (4, 238,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmacchws.", XO (4, 238,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evaddiw", VX (4, 514), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB, UIMM}},
+{"vminub", VX (4, 514), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evsubfw", VX (4, 516), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"evsubw", VX (4, 516), VX_MASK, PPCSPE, PPCNONE, {RS, RB, RA}},
-{"vsrb", VX (4, 516), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evsubifw", VX (4, 518), VX_MASK, PPCSPE, PPCNONE, {RS, UIMM, RB}},
+{"vsrb", VX (4, 516), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evsubifw", VX (4, 518), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, UIMM, RB}},
{"evsubiw", VX (4, 518), VX_MASK, PPCSPE, PPCNONE, {RS, RB, UIMM}},
-{"vcmpgtub", VXR(4, 518,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evabs", VX (4, 520), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vmuleub", VX (4, 520), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evneg", VX (4, 521), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evextsb", VX (4, 522), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vrfin", VX (4, 522), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"evextsh", VX (4, 523), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evrndw", VX (4, 524), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vspltb", VX (4, 524), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"evcntlzw", VX (4, 525), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evcntlsw", VX (4, 526), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vupkhsb", VX (4, 526), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"brinc", VX (4, 527), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
+{"vcmpgtub", VXR(4, 518,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evabs", VX (4, 520), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vmuleub", VX (4, 520), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evneg", VX (4, 521), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evextsb", VX (4, 522), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vrfin", VX (4, 522), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"evextsh", VX (4, 523), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evrndw", VX (4, 524), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vspltb", VX (4, 524), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"evcntlzw", VX (4, 525), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evcntlsw", VX (4, 526), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vupkhsb", VX (4, 526), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"brinc", VX (4, 527), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"ps_abs", XRC(4, 264,0), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
{"ps_abs.", XRC(4, 264,1), XRA_MASK, PPCPS, PPCNONE, {FRT, FRB}},
-{"evand", VX (4, 529), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evandc", VX (4, 530), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evxor", VX (4, 534), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmr", VX (4, 535), VX_MASK, PPCSPE, PPCNONE, {RS, RA, BBA}},
-{"evor", VX (4, 535), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evnor", VX (4, 536), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evnot", VX (4, 536), VX_MASK, PPCSPE, PPCNONE, {RS, RA, BBA}},
+{"evand", VX (4, 529), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evandc", VX (4, 530), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evxor", VX (4, 534), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmr", VX (4, 535), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, BBA}},
+{"evor", VX (4, 535), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evnor", VX (4, 536), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evnot", VX (4, 536), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, BBA}},
{"get", APU(4, 268,0), APU_RA_MASK, PPC405, PPCNONE, {RT, FSL}},
-{"eveqv", VX (4, 537), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evorc", VX (4, 539), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evnand", VX (4, 542), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evsrwu", VX (4, 544), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evsrws", VX (4, 545), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evsrwiu", VX (4, 546), VX_MASK, PPCSPE, PPCNONE, {RS, RA, EVUIMM}},
-{"evsrwis", VX (4, 547), VX_MASK, PPCSPE, PPCNONE, {RS, RA, EVUIMM}},
-{"evslw", VX (4, 548), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evslwi", VX (4, 550), VX_MASK, PPCSPE, PPCNONE, {RS, RA, EVUIMM}},
-{"evrlw", VX (4, 552), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evsplati", VX (4, 553), VX_MASK, PPCSPE, PPCNONE, {RS, SIMM}},
-{"evrlwi", VX (4, 554), VX_MASK, PPCSPE, PPCNONE, {RS, RA, EVUIMM}},
-{"evsplatfi", VX (4, 555), VX_MASK, PPCSPE, PPCNONE, {RS, SIMM}},
-{"evmergehi", VX (4, 556), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmergelo", VX (4, 557), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmergehilo", VX (4, 558), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmergelohi", VX (4, 559), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evcmpgtu", VX (4, 560), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evcmpgts", VX (4, 561), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evcmpltu", VX (4, 562), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evcmplts", VX (4, 563), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evcmpeq", VX (4, 564), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
+{"eveqv", VX (4, 537), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evorc", VX (4, 539), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evnand", VX (4, 542), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evsrwu", VX (4, 544), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evsrws", VX (4, 545), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evsrwiu", VX (4, 546), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, EVUIMM}},
+{"evsrwis", VX (4, 547), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, EVUIMM}},
+{"evslw", VX (4, 548), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evslwi", VX (4, 550), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, EVUIMM}},
+{"evrlw", VX (4, 552), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evsplati", VX (4, 553), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, SIMM}},
+{"evrlwi", VX (4, 554), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, EVUIMM}},
+{"evsplatfi", VX (4, 555), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, SIMM}},
+{"evmergehi", VX (4, 556), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmergelo", VX (4, 557), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmergehilo", VX (4, 558), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmergelohi", VX (4, 559), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evcmpgtu", VX (4, 560), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evcmpgts", VX (4, 561), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evcmpltu", VX (4, 562), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evcmplts", VX (4, 563), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evcmpeq", VX (4, 564), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
{"cget", APU(4, 284,0), APU_RA_MASK, PPC405, PPCNONE, {RT, FSL}},
-{"vadduhs", VX (4, 576), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vminuh", VX (4, 578), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vsrh", VX (4, 580), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtuh", VXR(4, 582,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmuleuh", VX (4, 584), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vrfiz", VX (4, 586), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"vsplth", VX (4, 588), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"vupkhsh", VX (4, 590), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
+{"vadduhs", VX (4, 576), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vminuh", VX (4, 578), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vsrh", VX (4, 580), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtuh", VXR(4, 582,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmuleuh", VX (4, 584), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vrfiz", VX (4, 586), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"vsplth", VX (4, 588), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"vupkhsh", VX (4, 590), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
{"nget", APU(4, 300,0), APU_RA_MASK, PPC405, PPCNONE, {RT, FSL}},
-{"evsel", EVSEL(4,79), EVSEL_MASK, PPCSPE, PPCNONE, {RS, RA, RB, CRFS}},
+{"evsel", EVSEL(4,79), EVSEL_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB, CRFS}},
{"ncget", APU(4, 316,0), APU_RA_MASK, PPC405, PPCNONE, {RT, FSL}},
-{"evfsadd", VX (4, 640), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vadduws", VX (4, 640), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evfssub", VX (4, 641), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vminuw", VX (4, 642), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evfsabs", VX (4, 644), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vsrw", VX (4, 644), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evfsnabs", VX (4, 645), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evfsneg", VX (4, 646), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vcmpgtuw", VXR(4, 646,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evfsmul", VX (4, 648), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evfsdiv", VX (4, 649), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vrfip", VX (4, 650), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"evfscmpgt", VX (4, 652), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"vspltw", VX (4, 652), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"evfscmplt", VX (4, 653), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evfscmpeq", VX (4, 654), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"vupklsb", VX (4, 654), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"evfscfui", VX (4, 656), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfscfsi", VX (4, 657), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfscfuf", VX (4, 658), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfscfsf", VX (4, 659), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfsctui", VX (4, 660), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfsctsi", VX (4, 661), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfsctuf", VX (4, 662), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfsctsf", VX (4, 663), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfsctuiz", VX (4, 664), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
+{"evfsadd", VX (4, 640), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vadduws", VX (4, 640), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evfssub", VX (4, 641), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vminuw", VX (4, 642), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evfsabs", VX (4, 644), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vsrw", VX (4, 644), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evfsnabs", VX (4, 645), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evfsneg", VX (4, 646), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vcmpgtuw", VXR(4, 646,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evfsmul", VX (4, 648), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evfsdiv", VX (4, 649), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vrfip", VX (4, 650), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"evfscmpgt", VX (4, 652), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"vspltw", VX (4, 652), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"evfscmplt", VX (4, 653), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evfscmpeq", VX (4, 654), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"vupklsb", VX (4, 654), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"evfscfui", VX (4, 656), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfscfsi", VX (4, 657), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfscfuf", VX (4, 658), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfscfsf", VX (4, 659), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfsctui", VX (4, 660), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfsctsi", VX (4, 661), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfsctuf", VX (4, 662), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfsctsf", VX (4, 663), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfsctuiz", VX (4, 664), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
{"put", APU(4, 332,0), APU_RT_MASK, PPC405, PPCNONE, {RA, FSL}},
-{"evfsctsiz", VX (4, 666), VX_MASK, PPCSPE, PPCNONE, {RS, RB}},
-{"evfststgt", VX (4, 668), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evfststlt", VX (4, 669), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
-{"evfststeq", VX (4, 670), VX_MASK, PPCSPE, PPCNONE, {CRFD, RA, RB}},
+{"evfsctsiz", VX (4, 666), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB}},
+{"evfststgt", VX (4, 668), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evfststlt", VX (4, 669), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evfststeq", VX (4, 670), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {CRFD, RA, RB}},
{"cput", APU(4, 348,0), APU_RT_MASK, PPC405, PPCNONE, {RA, FSL}},
-{"efsadd", VX (4, 704), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efssub", VX (4, 705), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efsabs", VX (4, 708), VX_MASK, PPCEFS, PPCNONE, {RS, RA}},
-{"vsr", VX (4, 708), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"efsnabs", VX (4, 709), VX_MASK, PPCEFS, PPCNONE, {RS, RA}},
-{"efsneg", VX (4, 710), VX_MASK, PPCEFS, PPCNONE, {RS, RA}},
-{"vcmpgtfp", VXR(4, 710,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"efsmul", VX (4, 712), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efsdiv", VX (4, 713), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"vrfim", VX (4, 714), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"efscmpgt", VX (4, 716), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efscmplt", VX (4, 717), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efscmpeq", VX (4, 718), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"vupklsh", VX (4, 718), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"efscfd", VX (4, 719), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efscfui", VX (4, 720), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efscfsi", VX (4, 721), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efscfuf", VX (4, 722), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efscfsf", VX (4, 723), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efsctui", VX (4, 724), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efsctsi", VX (4, 725), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efsctuf", VX (4, 726), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efsctsf", VX (4, 727), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efsctuiz", VX (4, 728), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
+{"efsadd", VX (4, 704), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efssub", VX (4, 705), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efsabs", VX (4, 708), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}},
+{"vsr", VX (4, 708), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"efsnabs", VX (4, 709), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}},
+{"efsneg", VX (4, 710), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}},
+{"vcmpgtfp", VXR(4, 710,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"efsmul", VX (4, 712), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efsdiv", VX (4, 713), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vrfim", VX (4, 714), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"efscmpgt", VX (4, 716), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efscmplt", VX (4, 717), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efscmpeq", VX (4, 718), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"vupklsh", VX (4, 718), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"efscfd", VX (4, 719), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efscfui", VX (4, 720), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efscfsi", VX (4, 721), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efscfuf", VX (4, 722), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efscfsf", VX (4, 723), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efsctui", VX (4, 724), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efsctsi", VX (4, 725), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efsctuf", VX (4, 726), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efsctsf", VX (4, 727), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efsctuiz", VX (4, 728), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
{"nput", APU(4, 364,0), APU_RT_MASK, PPC405, PPCNONE, {RA, FSL}},
-{"efsctsiz", VX (4, 730), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efststgt", VX (4, 732), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efststlt", VX (4, 733), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efststeq", VX (4, 734), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efdadd", VX (4, 736), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efdsub", VX (4, 737), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efdcfuid", VX (4, 738), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdcfsid", VX (4, 739), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdabs", VX (4, 740), VX_MASK, PPCEFS, PPCNONE, {RS, RA}},
-{"efdnabs", VX (4, 741), VX_MASK, PPCEFS, PPCNONE, {RS, RA}},
-{"efdneg", VX (4, 742), VX_MASK, PPCEFS, PPCNONE, {RS, RA}},
-{"efdmul", VX (4, 744), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efddiv", VX (4, 745), VX_MASK, PPCEFS, PPCNONE, {RS, RA, RB}},
-{"efdctuidz", VX (4, 746), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdctsidz", VX (4, 747), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdcmpgt", VX (4, 748), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efdcmplt", VX (4, 749), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efdcmpeq", VX (4, 750), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efdcfs", VX (4, 751), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdcfui", VX (4, 752), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdcfsi", VX (4, 753), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdcfuf", VX (4, 754), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdcfsf", VX (4, 755), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdctui", VX (4, 756), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdctsi", VX (4, 757), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdctuf", VX (4, 758), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdctsf", VX (4, 759), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdctuiz", VX (4, 760), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
+{"efsctsiz", VX (4, 730), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efststgt", VX (4, 732), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efststlt", VX (4, 733), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efststeq", VX (4, 734), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efdadd", VX (4, 736), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efdsub", VX (4, 737), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efdcfuid", VX (4, 738), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdcfsid", VX (4, 739), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdabs", VX (4, 740), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}},
+{"efdnabs", VX (4, 741), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}},
+{"efdneg", VX (4, 742), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA}},
+{"efdmul", VX (4, 744), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efddiv", VX (4, 745), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"efdctuidz", VX (4, 746), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdctsidz", VX (4, 747), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdcmpgt", VX (4, 748), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efdcmplt", VX (4, 749), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efdcmpeq", VX (4, 750), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efdcfs", VX (4, 751), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdcfui", VX (4, 752), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdcfsi", VX (4, 753), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdcfuf", VX (4, 754), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdcfsf", VX (4, 755), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdctui", VX (4, 756), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdctsi", VX (4, 757), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdctuf", VX (4, 758), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdctsf", VX (4, 759), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdctuiz", VX (4, 760), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
{"ncput", APU(4, 380,0), APU_RT_MASK, PPC405, PPCNONE, {RA, FSL}},
-{"efdctsiz", VX (4, 762), VX_MASK, PPCEFS, PPCNONE, {RS, RB}},
-{"efdtstgt", VX (4, 764), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efdtstlt", VX (4, 765), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"efdtsteq", VX (4, 766), VX_MASK, PPCEFS, PPCNONE, {CRFD, RA, RB}},
-{"evlddx", VX (4, 768), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vaddsbs", VX (4, 768), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evldd", VX (4, 769), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_8, RA}},
-{"evldwx", VX (4, 770), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vminsb", VX (4, 770), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evldw", VX (4, 771), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_8, RA}},
-{"evldhx", VX (4, 772), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vsrab", VX (4, 772), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evldh", VX (4, 773), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_8, RA}},
-{"vcmpgtsb", VXR(4, 774,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evlhhesplatx",VX (4, 776), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vmulesb", VX (4, 776), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evlhhesplat", VX (4, 777), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_2, RA}},
-{"vcfux", VX (4, 778), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"evlhhousplatx",VX(4, 780), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vspltisb", VX (4, 780), VX_MASK, PPCVEC, PPCNONE, {VD, SIMM}},
-{"evlhhousplat",VX (4, 781), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_2, RA}},
-{"evlhhossplatx",VX(4, 782), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vpkpx", VX (4, 782), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evlhhossplat",VX (4, 783), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_2, RA}},
-{"mullhwu", XRC(4, 392,0), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evlwhex", VX (4, 784), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"mullhwu.", XRC(4, 392,1), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evlwhe", VX (4, 785), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evlwhoux", VX (4, 788), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evlwhou", VX (4, 789), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evlwhosx", VX (4, 790), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evlwhos", VX (4, 791), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"maclhwu", XO (4, 396,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evlwwsplatx", VX (4, 792), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"maclhwu.", XO (4, 396,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evlwwsplat", VX (4, 793), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evlwhsplatx", VX (4, 796), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evlwhsplat", VX (4, 797), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evstddx", VX (4, 800), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstdd", VX (4, 801), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_8, RA}},
-{"evstdwx", VX (4, 802), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstdw", VX (4, 803), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_8, RA}},
-{"evstdhx", VX (4, 804), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstdh", VX (4, 805), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_8, RA}},
-{"evstwhex", VX (4, 816), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstwhe", VX (4, 817), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evstwhox", VX (4, 820), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstwho", VX (4, 821), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evstwwex", VX (4, 824), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstwwe", VX (4, 825), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"evstwwox", VX (4, 828), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evstwwo", VX (4, 829), VX_MASK, PPCSPE, PPCNONE, {RS, EVUIMM_4, RA}},
-{"vaddshs", VX (4, 832), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vminsh", VX (4, 834), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vsrah", VX (4, 836), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vmulesh", VX (4, 840), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcfsx", VX (4, 842), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"vspltish", VX (4, 844), VX_MASK, PPCVEC, PPCNONE, {VD, SIMM}},
-{"vupkhpx", VX (4, 846), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"mullhw", XRC(4, 424,0), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"mullhw.", XRC(4, 424,1), X_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhw", XO (4, 428,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhw.", XO (4, 428,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhw", XO (4, 430,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhw.", XO (4, 430,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vaddsws", VX (4, 896), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vminsw", VX (4, 898), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vsraw", VX (4, 900), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vctuxs", VX (4, 906), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"vspltisw", VX (4, 908), VX_MASK, PPCVEC, PPCNONE, {VD, SIMM}},
-{"maclhwsu", XO (4, 460,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhwsu.", XO (4, 460,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vctsxs", VX (4, 970), VX_MASK, PPCVEC, PPCNONE, {VD, VB, UIMM}},
-{"vupklpx", VX (4, 974), VX_MASK, PPCVEC, PPCNONE, {VD, VB}},
-{"maclhws", XO (4, 492,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhws.", XO (4, 492,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhws", XO (4, 494,0,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhws.", XO (4, 494,0,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vsububm", VX (4,1024), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vavgub", VX (4,1026), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhessf", VX (4,1027), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vand", VX (4,1028), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpequb.", VXR(4, 6,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"efdctsiz", VX (4, 762), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {RS, RB}},
+{"efdtstgt", VX (4, 764), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efdtstlt", VX (4, 765), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"efdtsteq", VX (4, 766), VX_MASK, PPCEFS|PPCVLE, PPCNONE, {CRFD, RA, RB}},
+{"evlddx", VX (4, 768), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vaddsbs", VX (4, 768), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evldd", VX (4, 769), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_8, RA}},
+{"evldwx", VX (4, 770), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vminsb", VX (4, 770), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evldw", VX (4, 771), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_8, RA}},
+{"evldhx", VX (4, 772), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vsrab", VX (4, 772), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evldh", VX (4, 773), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_8, RA}},
+{"vcmpgtsb", VXR(4, 774,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evlhhesplatx",VX (4, 776), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vmulesb", VX (4, 776), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evlhhesplat", VX (4, 777), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_2, RA}},
+{"vcfux", VX (4, 778), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"evlhhousplatx",VX(4, 780), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vspltisb", VX (4, 780), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}},
+{"evlhhousplat",VX (4, 781), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_2, RA}},
+{"evlhhossplatx",VX(4, 782), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vpkpx", VX (4, 782), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evlhhossplat",VX (4, 783), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_2, RA}},
+{"mullhwu", XRC(4, 392,0), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evlwhex", VX (4, 784), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"mullhwu.", XRC(4, 392,1), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evlwhe", VX (4, 785), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evlwhoux", VX (4, 788), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evlwhou", VX (4, 789), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evlwhosx", VX (4, 790), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evlwhos", VX (4, 791), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"maclhwu", XO (4, 396,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evlwwsplatx", VX (4, 792), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"maclhwu.", XO (4, 396,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evlwwsplat", VX (4, 793), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evlwhsplatx", VX (4, 796), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evlwhsplat", VX (4, 797), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evstddx", VX (4, 800), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstdd", VX (4, 801), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_8, RA}},
+{"evstdwx", VX (4, 802), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstdw", VX (4, 803), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_8, RA}},
+{"evstdhx", VX (4, 804), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstdh", VX (4, 805), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_8, RA}},
+{"evstwhex", VX (4, 816), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstwhe", VX (4, 817), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evstwhox", VX (4, 820), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstwho", VX (4, 821), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evstwwex", VX (4, 824), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstwwe", VX (4, 825), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"evstwwox", VX (4, 828), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evstwwo", VX (4, 829), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, EVUIMM_4, RA}},
+{"vaddshs", VX (4, 832), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vminsh", VX (4, 834), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vsrah", VX (4, 836), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vmulesh", VX (4, 840), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcfsx", VX (4, 842), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"vspltish", VX (4, 844), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}},
+{"vupkhpx", VX (4, 846), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"mullhw", XRC(4, 424,0), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mullhw.", XRC(4, 424,1), X_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhw", XO (4, 428,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhw.", XO (4, 428,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhw", XO (4, 430,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhw.", XO (4, 430,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vaddsws", VX (4, 896), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vminsw", VX (4, 898), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vsraw", VX (4, 900), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vctuxs", VX (4, 906), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"vspltisw", VX (4, 908), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, SIMM}},
+{"maclhwsu", XO (4, 460,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhwsu.", XO (4, 460,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vctsxs", VX (4, 970), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB, UIMM}},
+{"vupklpx", VX (4, 974), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VB}},
+{"maclhws", XO (4, 492,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhws.", XO (4, 492,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhws", XO (4, 494,0,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhws.", XO (4, 494,0,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vsububm", VX (4,1024), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vavgub", VX (4,1026), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhessf", VX (4,1027), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vand", VX (4,1028), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpequb.", VXR(4, 6,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi0fcm", APU(4, 515,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evmhossf", VX (4,1031), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmheumi", VX (4,1032), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmi", VX (4,1033), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vmaxfp", VX (4,1034), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhesmf", VX (4,1035), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhoumi", VX (4,1036), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vslo", VX (4,1036), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhosmi", VX (4,1037), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmf", VX (4,1039), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"machhwuo", XO (4, 12,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhwuo.", XO (4, 12,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"evmhossf", VX (4,1031), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmheumi", VX (4,1032), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmi", VX (4,1033), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vmaxfp", VX (4,1034), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhesmf", VX (4,1035), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhoumi", VX (4,1036), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vslo", VX (4,1036), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhosmi", VX (4,1037), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmf", VX (4,1039), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"machhwuo", XO (4, 12,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhwuo.", XO (4, 12,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_merge00", XOPS(4,528,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
{"ps_merge00.", XOPS(4,528,1), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"evmhessfa", VX (4,1059), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhossfa", VX (4,1063), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmheumia", VX (4,1064), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmia", VX (4,1065), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmfa", VX (4,1067), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhoumia", VX (4,1068), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmia", VX (4,1069), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmfa", VX (4,1071), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vsubuhm", VX (4,1088), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vavguh", VX (4,1090), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vandc", VX (4,1092), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpequh.", VXR(4, 70,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"evmhessfa", VX (4,1059), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhossfa", VX (4,1063), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmheumia", VX (4,1064), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmia", VX (4,1065), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmfa", VX (4,1067), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhoumia", VX (4,1068), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmia", VX (4,1069), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmfa", VX (4,1071), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vsubuhm", VX (4,1088), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vavguh", VX (4,1090), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vandc", VX (4,1092), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpequh.", VXR(4, 70,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi1fcm", APU(4, 547,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evmwhssf", VX (4,1095), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlumi", VX (4,1096), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vminfp", VX (4,1098), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmwhumi", VX (4,1100), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vsro", VX (4,1100), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmwhsmi", VX (4,1101), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwhsmf", VX (4,1103), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwssf", VX (4,1107), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"machhwo", XO (4, 44,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmwumi", VX (4,1112), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"machhwo.", XO (4, 44,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmwsmi", VX (4,1113), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwsmf", VX (4,1115), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"nmachhwo", XO (4, 46,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhwo.", XO (4, 46,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"evmwhssf", VX (4,1095), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlumi", VX (4,1096), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vminfp", VX (4,1098), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmwhumi", VX (4,1100), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vsro", VX (4,1100), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmwhsmi", VX (4,1101), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwhsmf", VX (4,1103), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwssf", VX (4,1107), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"machhwo", XO (4, 44,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmwumi", VX (4,1112), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"machhwo.", XO (4, 44,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmwsmi", VX (4,1113), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwsmf", VX (4,1115), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"nmachhwo", XO (4, 46,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhwo.", XO (4, 46,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_merge01", XOPS(4,560,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
{"ps_merge01.", XOPS(4,560,1), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"evmwhssfa", VX (4,1127), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlumia", VX (4,1128), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwhumia", VX (4,1132), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwhsmia", VX (4,1133), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwhsmfa", VX (4,1135), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwssfa", VX (4,1139), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwumia", VX (4,1144), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwsmia", VX (4,1145), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwsmfa", VX (4,1147), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vsubuwm", VX (4,1152), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vavguw", VX (4,1154), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vor", VX (4,1156), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"evmwhssfa", VX (4,1127), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlumia", VX (4,1128), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwhumia", VX (4,1132), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwhsmia", VX (4,1133), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwhsmfa", VX (4,1135), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwssfa", VX (4,1139), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwumia", VX (4,1144), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwsmia", VX (4,1145), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwsmfa", VX (4,1147), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vsubuwm", VX (4,1152), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vavguw", VX (4,1154), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vor", VX (4,1156), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi2fcm", APU(4, 579,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"machhwsuo", XO (4, 76,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhwsuo.", XO (4, 76,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"machhwsuo", XO (4, 76,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhwsuo.", XO (4, 76,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_merge10", XOPS(4,592,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
{"ps_merge10.", XOPS(4,592,1), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"evaddusiaaw", VX (4,1216), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evaddssiaaw", VX (4,1217), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evsubfusiaaw",VX (4,1218), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evsubfssiaaw",VX (4,1219), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evmra", VX (4,1220), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"vxor", VX (4,1220), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evdivws", VX (4,1222), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"evaddusiaaw", VX (4,1216), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evaddssiaaw", VX (4,1217), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evsubfusiaaw",VX (4,1218), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evsubfssiaaw",VX (4,1219), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evmra", VX (4,1220), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"vxor", VX (4,1220), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evdivws", VX (4,1222), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi3fcm", APU(4, 611,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evdivwu", VX (4,1223), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evaddumiaaw", VX (4,1224), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evaddsmiaaw", VX (4,1225), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evsubfumiaaw",VX (4,1226), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"evsubfsmiaaw",VX (4,1227), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
-{"machhwso", XO (4, 108,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"machhwso.", XO (4, 108,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhwso", XO (4, 110,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmachhwso.", XO (4, 110,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"evdivwu", VX (4,1223), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evaddumiaaw", VX (4,1224), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evaddsmiaaw", VX (4,1225), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evsubfumiaaw",VX (4,1226), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"evsubfsmiaaw",VX (4,1227), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA}},
+{"machhwso", XO (4, 108,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"machhwso.", XO (4, 108,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhwso", XO (4, 110,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmachhwso.", XO (4, 110,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ps_merge11", XOPS(4,624,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
{"ps_merge11.", XOPS(4,624,1), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
-{"evmheusiaaw", VX (4,1280), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhessiaaw", VX (4,1281), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vavgsb", VX (4,1282), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhessfaaw", VX (4,1283), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhousiaaw", VX (4,1284), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vnor", VX (4,1284), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhossiaaw", VX (4,1285), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
+{"evmheusiaaw", VX (4,1280), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhessiaaw", VX (4,1281), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vavgsb", VX (4,1282), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhessfaaw", VX (4,1283), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhousiaaw", VX (4,1284), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vnor", VX (4,1284), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhossiaaw", VX (4,1285), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi4fcm", APU(4, 643,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evmhossfaaw", VX (4,1287), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmheumiaaw", VX (4,1288), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmiaaw", VX (4,1289), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmfaaw", VX (4,1291), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhoumiaaw", VX (4,1292), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmiaaw", VX (4,1293), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmfaaw", VX (4,1295), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"macchwuo", XO (4, 140,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"macchwuo.", XO (4, 140,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmhegumiaa", VX (4,1320), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhegsmiaa", VX (4,1321), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhegsmfaa", VX (4,1323), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhogumiaa", VX (4,1324), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhogsmiaa", VX (4,1325), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhogsmfaa", VX (4,1327), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlusiaaw", VX (4,1344), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlssiaaw", VX (4,1345), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vavgsh", VX (4,1346), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"evmhossfaaw", VX (4,1287), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmheumiaaw", VX (4,1288), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmiaaw", VX (4,1289), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmfaaw", VX (4,1291), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhoumiaaw", VX (4,1292), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmiaaw", VX (4,1293), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmfaaw", VX (4,1295), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"macchwuo", XO (4, 140,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"macchwuo.", XO (4, 140,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmhegumiaa", VX (4,1320), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhegsmiaa", VX (4,1321), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhegsmfaa", VX (4,1323), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhogumiaa", VX (4,1324), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhogsmiaa", VX (4,1325), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhogsmfaa", VX (4,1327), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlusiaaw", VX (4,1344), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlssiaaw", VX (4,1345), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vavgsh", VX (4,1346), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi5fcm.", APU(4, 675,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi5fcm", APU(4, 675,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evmwlumiaaw", VX (4,1352), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlsmiaaw", VX (4,1353), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwssfaa", VX (4,1363), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"macchwo", XO (4, 172,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmwumiaa", VX (4,1368), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"macchwo.", XO (4, 172,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmwsmiaa", VX (4,1369), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwsmfaa", VX (4,1371), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"nmacchwo", XO (4, 174,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmacchwo.", XO (4, 174,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmheusianw", VX (4,1408), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vsubcuw", VX (4,1408), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhessianw", VX (4,1409), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vavgsw", VX (4,1410), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"evmhessfanw", VX (4,1411), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhousianw", VX (4,1412), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhossianw", VX (4,1413), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
+{"evmwlumiaaw", VX (4,1352), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlsmiaaw", VX (4,1353), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwssfaa", VX (4,1363), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"macchwo", XO (4, 172,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmwumiaa", VX (4,1368), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"macchwo.", XO (4, 172,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmwsmiaa", VX (4,1369), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwsmfaa", VX (4,1371), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"nmacchwo", XO (4, 174,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmacchwo.", XO (4, 174,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmheusianw", VX (4,1408), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vsubcuw", VX (4,1408), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhessianw", VX (4,1409), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vavgsw", VX (4,1410), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"evmhessfanw", VX (4,1411), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhousianw", VX (4,1412), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhossianw", VX (4,1413), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"udi6fcm.", APU(4, 707,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi6fcm", APU(4, 707,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evmhossfanw", VX (4,1415), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmheumianw", VX (4,1416), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmianw", VX (4,1417), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhesmfanw", VX (4,1419), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhoumianw", VX (4,1420), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmianw", VX (4,1421), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhosmfanw", VX (4,1423), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"macchwsuo", XO (4, 204,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"macchwsuo.", XO (4, 204,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmhegumian", VX (4,1448), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhegsmian", VX (4,1449), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhegsmfan", VX (4,1451), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhogumian", VX (4,1452), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhogsmian", VX (4,1453), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmhogsmfan", VX (4,1455), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlusianw", VX (4,1472), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlssianw", VX (4,1473), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"evmhossfanw", VX (4,1415), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmheumianw", VX (4,1416), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmianw", VX (4,1417), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhesmfanw", VX (4,1419), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhoumianw", VX (4,1420), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmianw", VX (4,1421), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhosmfanw", VX (4,1423), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"macchwsuo", XO (4, 204,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"macchwsuo.", XO (4, 204,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmhegumian", VX (4,1448), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhegsmian", VX (4,1449), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhegsmfan", VX (4,1451), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhogumian", VX (4,1452), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhogsmian", VX (4,1453), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmhogsmfan", VX (4,1455), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlusianw", VX (4,1472), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlssianw", VX (4,1473), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi7fcm.", APU(4, 739,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"udi7fcm", APU(4, 739,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
-{"evmwlumianw", VX (4,1480), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwlsmianw", VX (4,1481), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwssfan", VX (4,1491), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"macchwso", XO (4, 236,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmwumian", VX (4,1496), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"macchwso.", XO (4, 236,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"evmwsmian", VX (4,1497), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"evmwsmfan", VX (4,1499), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"nmacchwso", XO (4, 238,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmacchwso.", XO (4, 238,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vsububs", VX (4,1536), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"mfvscr", VX (4,1540), VX_MASK, PPCVEC, PPCNONE, {VD}},
-{"vcmpgtub.", VXR(4, 518,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"evmwlumianw", VX (4,1480), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwlsmianw", VX (4,1481), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwssfan", VX (4,1491), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"macchwso", XO (4, 236,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmwumian", VX (4,1496), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"macchwso.", XO (4, 236,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"evmwsmian", VX (4,1497), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"evmwsmfan", VX (4,1499), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
+{"nmacchwso", XO (4, 238,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmacchwso.", XO (4, 238,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vsububs", VX (4,1536), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"mfvscr", VX (4,1540), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD}},
+{"vcmpgtub.", VXR(4, 518,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi8fcm.", APU(4, 771,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi8fcm", APU(4, 771,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"vsum4ubs", VX (4,1544), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vsubuhs", VX (4,1600), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"mtvscr", VX (4,1604), VX_MASK, PPCVEC, PPCNONE, {VB}},
-{"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vsum4shs", VX (4,1608), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vsum4ubs", VX (4,1544), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vsubuhs", VX (4,1600), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"mtvscr", VX (4,1604), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VB}},
+{"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vsum4shs", VX (4,1608), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi9fcm.", APU(4, 804,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi9fcm", APU(4, 804,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"vsubuws", VX (4,1664), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vsubuws", VX (4,1664), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi10fcm.", APU(4, 835,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi10fcm", APU(4, 835,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"vsum2sws", VX (4,1672), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vsum2sws", VX (4,1672), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi11fcm.", APU(4, 867,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi11fcm", APU(4, 867,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"vsubsbs", VX (4,1792), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vsubsbs", VX (4,1792), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi12fcm.", APU(4, 899,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi12fcm", APU(4, 899,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"vsum4sbs", VX (4,1800), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"maclhwuo", XO (4, 396,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhwuo.", XO (4, 396,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vsubshs", VX (4,1856), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"vsum4sbs", VX (4,1800), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"maclhwuo", XO (4, 396,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhwuo.", XO (4, 396,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vsubshs", VX (4,1856), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi13fcm.", APU(4, 931,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi13fcm", APU(4, 931,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"maclhwo", XO (4, 428,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhwo.", XO (4, 428,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhwo", XO (4, 430,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhwo.", XO (4, 430,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"vsubsws", VX (4,1920), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
+{"maclhwo", XO (4, 428,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhwo.", XO (4, 428,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhwo", XO (4, 430,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhwo.", XO (4, 430,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"vsubsws", VX (4,1920), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
{"udi14fcm.", APU(4, 963,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi14fcm", APU(4, 963,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"vsumsws", VX (4,1928), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"maclhwsuo", XO (4, 460,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhwsuo.", XO (4, 460,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"vsumsws", VX (4,1928), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
+{"maclhwsuo", XO (4, 460,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhwsuo.", XO (4, 460,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"vcmpbfp.", VXR(4, 966,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"udi15fcm.", APU(4, 995,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"udi15fcm", APU(4, 995,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
-{"maclhwso", XO (4, 492,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"maclhwso.", XO (4, 492,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhwso", XO (4, 494,1,0),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
-{"nmaclhwso.", XO (4, 494,1,1),XO_MASK, MULHW, PPCNONE, {RT, RA, RB}},
+{"maclhwso", XO (4, 492,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"maclhwso.", XO (4, 492,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhwso", XO (4, 494,1,0),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"nmaclhwso.", XO (4, 494,1,1),XO_MASK, MULHW|PPCVLE, PPCNONE, {RT, RA, RB}},
{"dcbz_l", X (4,1014), XRT_MASK, PPCPS, PPCNONE, {RA, RB}},
{"mulli", OP(7), OP_MASK, PPCCOM, PPCNONE, {RT, RA, SI}},
@@ -3547,62 +4177,62 @@
{"cmpw", XOPL(31,0,0), XCMPL_MASK, PPCCOM, PPCNONE, {OBF, RA, RB}},
{"cmpd", XOPL(31,0,1), XCMPL_MASK, PPC64, PPCNONE, {OBF, RA, RB}},
-{"cmp", X(31,0), XCMP_MASK, PPC, PPCNONE, {BF, L, RA, RB}},
+{"cmp", X(31,0), XCMP_MASK, PPC|PPCVLE, PPCNONE, {BF, L, RA, RB}},
{"cmp", X(31,0), XCMPL_MASK, PWRCOM, PPC, {BF, RA, RB}},
-{"twlgt", XTO(31,4,TOLGT), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twlgt", XTO(31,4,TOLGT), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tlgt", XTO(31,4,TOLGT), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twllt", XTO(31,4,TOLLT), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twllt", XTO(31,4,TOLLT), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tllt", XTO(31,4,TOLLT), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"tweq", XTO(31,4,TOEQ), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"tweq", XTO(31,4,TOEQ), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"teq", XTO(31,4,TOEQ), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twlge", XTO(31,4,TOLGE), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twlge", XTO(31,4,TOLGE), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tlge", XTO(31,4,TOLGE), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twlle", XTO(31,4,TOLLE), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twlle", XTO(31,4,TOLLE), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tlle", XTO(31,4,TOLLE), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twlng", XTO(31,4,TOLNG), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twlng", XTO(31,4,TOLNG), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tlng", XTO(31,4,TOLNG), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twgt", XTO(31,4,TOGT), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twgt", XTO(31,4,TOGT), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tgt", XTO(31,4,TOGT), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twge", XTO(31,4,TOGE), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twge", XTO(31,4,TOGE), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tge", XTO(31,4,TOGE), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twlt", XTO(31,4,TOLT), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twlt", XTO(31,4,TOLT), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tlt", XTO(31,4,TOLT), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twle", XTO(31,4,TOLE), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twle", XTO(31,4,TOLE), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tle", XTO(31,4,TOLE), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twng", XTO(31,4,TONG), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twng", XTO(31,4,TONG), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tng", XTO(31,4,TONG), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"twne", XTO(31,4,TONE), XTO_MASK, PPCCOM, PPCNONE, {RA, RB}},
+{"twne", XTO(31,4,TONE), XTO_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RB}},
{"tne", XTO(31,4,TONE), XTO_MASK, PWRCOM, PPCNONE, {RA, RB}},
-{"trap", XTO(31,4,TOU), 0xffffffff, PPCCOM, PPCNONE, {0}},
-{"tw", X(31,4), X_MASK, PPCCOM, PPCNONE, {TO, RA, RB}},
+{"trap", XTO(31,4,TOU), 0xffffffff, PPCCOM|PPCVLE, PPCNONE, {0}},
+{"tw", X(31,4), X_MASK, PPCCOM|PPCVLE, PPCNONE, {TO, RA, RB}},
{"t", X(31,4), X_MASK, PWRCOM, PPCNONE, {TO, RA, RB}},
{"lvsl", X(31,6), X_MASK, PPCVEC, PPCNONE, {VD, RA, RB}},
{"lvebx", X(31,7), X_MASK, PPCVEC, PPCNONE, {VD, RA, RB}},
{"lbfcmx", APU(31,7,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"subfc", XO(31,8,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subfc", XO(31,8,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sf", XO(31,8,0,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"subc", XO(31,8,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RB, RA}},
-{"subfc.", XO(31,8,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subc", XO(31,8,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RB, RA}},
+{"subfc.", XO(31,8,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sf.", XO(31,8,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"subc.", XO(31,8,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RB, RA}},
-
-{"mulhdu", XO(31,9,0,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"mulhdu.", XO(31,9,0,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-
-{"addc", XO(31,10,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subc.", XO(31,8,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RB, RA}},
+
+{"mulhdu", XO(31,9,0,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulhdu.", XO(31,9,0,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+
+{"addc", XO(31,10,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"a", XO(31,10,0,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"addc.", XO(31,10,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"addc.", XO(31,10,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"a.", XO(31,10,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"mulhwu", XO(31,11,0,0), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
-{"mulhwu.", XO(31,11,0,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
+{"mulhwu", XO(31,11,0,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulhwu.", XO(31,11,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
{"isellt", X(31,15), X_MASK, PPCISEL, PPCNONE, {RT, RA, RB}},
@@ -3612,43 +4242,43 @@
{"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}},
{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
-{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM, POWER4, {RT}},
+{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}},
{"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM, PPCNONE, {RT, FXM}},
-{"lwarx", X(31,20), XEH_MASK, PPC, PPCNONE, {RT, RA0, RB, EH}},
-
-{"ldx", X(31,21), X_MASK, PPC64, PPCNONE, {RT, RA0, RB}},
-
-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, PPCNONE, {CT, RA, RB}},
-
-{"lwzx", X(31,23), X_MASK, PPCCOM, PPCNONE, {RT, RA0, RB}},
+{"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
+
+{"ldx", X(31,21), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA0, RB}},
+
+{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476|PPCVLE, PPCNONE, {CT, RA, RB}},
+
+{"lwzx", X(31,23), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA0, RB}},
{"lx", X(31,23), X_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"slw", XRC(31,24,0), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}},
+{"slw", XRC(31,24,0), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"sl", XRC(31,24,0), X_MASK, PWRCOM, PPCNONE, {RA, RS, RB}},
-{"slw.", XRC(31,24,1), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}},
+{"slw.", XRC(31,24,1), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"sl.", XRC(31,24,1), X_MASK, PWRCOM, PPCNONE, {RA, RS, RB}},
-{"cntlzw", XRC(31,26,0), XRB_MASK, PPCCOM, PPCNONE, {RA, RS}},
+{"cntlzw", XRC(31,26,0), XRB_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS}},
{"cntlz", XRC(31,26,0), XRB_MASK, PWRCOM, PPCNONE, {RA, RS}},
-{"cntlzw.", XRC(31,26,1), XRB_MASK, PPCCOM, PPCNONE, {RA, RS}},
+{"cntlzw.", XRC(31,26,1), XRB_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS}},
{"cntlz.", XRC(31,26,1), XRB_MASK, PWRCOM, PPCNONE, {RA, RS}},
{"sld", XRC(31,27,0), X_MASK, PPC64, PPCNONE, {RA, RS, RB}},
{"sld.", XRC(31,27,1), X_MASK, PPC64, PPCNONE, {RA, RS, RB}},
-{"and", XRC(31,28,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"and.", XRC(31,28,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"and", XRC(31,28,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"and.", XRC(31,28,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"maskg", XRC(31,29,0), X_MASK, M601, PPCA2, {RA, RS, RB}},
{"maskg.", XRC(31,29,1), X_MASK, M601, PPCA2, {RA, RS, RB}},
-{"ldepx", X(31,29), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
-{"lwepx", X(31,31), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
+{"ldepx", X(31,29), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"lwepx", X(31,31), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA, RB}},
-{"cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM, PPCNONE, {OBF, RA, RB}},
+{"cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM|PPCVLE, PPCNONE, {OBF, RA, RB}},
{"cmpld", XOPL(31,32,1), XCMPL_MASK, PPC64, PPCNONE, {OBF, RA, RB}},
-{"cmpl", X(31,32), XCMP_MASK, PPC, PPCNONE, {BF, L, RA, RB}},
+{"cmpl", X(31,32), XCMP_MASK, PPC|PPCVLE, PPCNONE, {BF, L, RA, RB}},
{"cmpl", X(31,32), XCMPL_MASK, PWRCOM, PPC, {BF, RA, RB}},
{"lvsr", X(31,38), X_MASK, PPCVEC, PPCNONE, {VD, RA, RB}},
@@ -3665,33 +4295,33 @@
{"isel", XISEL(31,15), XISEL_MASK, PPCISEL|TITAN, PPCNONE, {RT, RA, RB, CRB}},
-{"subf", XO(31,40,0,0), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
-{"sub", XO(31,40,0,0), XO_MASK, PPC, PPCNONE, {RT, RB, RA}},
-{"subf.", XO(31,40,0,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
-{"sub.", XO(31,40,0,1), XO_MASK, PPC, PPCNONE, {RT, RB, RA}},
+{"subf", XO(31,40,0,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"sub", XO(31,40,0,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RB, RA}},
+{"subf.", XO(31,40,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"sub.", XO(31,40,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RB, RA}},
{"eratilx", X(31,51), X_MASK, PPCA2, PPCNONE, {ERAT_T, RA, RB}},
{"lbarx", X(31,52), XEH_MASK, POWER7, PPCNONE, {RT, RA0, RB, EH}},
-{"ldux", X(31,53), X_MASK, PPC64, PPCNONE, {RT, RAL, RB}},
-
-{"dcbst", X(31,54), XRT_MASK, PPC, PPCNONE, {RA, RB}},
-
-{"lwzux", X(31,55), X_MASK, PPCCOM, PPCNONE, {RT, RAL, RB}},
+{"ldux", X(31,53), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RAL, RB}},
+
+{"dcbst", X(31,54), XRT_MASK, PPC|PPCVLE, PPCNONE, {RA, RB}},
+
+{"lwzux", X(31,55), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RAL, RB}},
{"lux", X(31,55), X_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"cntlzd", XRC(31,58,0), XRB_MASK, PPC64, PPCNONE, {RA, RS}},
-{"cntlzd.", XRC(31,58,1), XRB_MASK, PPC64, PPCNONE, {RA, RS}},
+{"cntlzd", XRC(31,58,0), XRB_MASK, PPC64|PPCVLE, PPCNONE, {RA, RS}},
+{"cntlzd.", XRC(31,58,1), XRB_MASK, PPC64|PPCVLE, PPCNONE, {RA, RS}},
-{"andc", XRC(31,60,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"andc.", XRC(31,60,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"andc", XRC(31,60,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"andc.", XRC(31,60,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"waitrsv", X(31,62)|(1<<21), 0xffffffff, POWER7|E500MC|PPCA2, PPCNONE, {0}},
{"waitimpl", X(31,62)|(2<<21), 0xffffffff, POWER7|E500MC|PPCA2, PPCNONE, {0}},
-{"wait", X(31,62), XWC_MASK, POWER7|E500MC|PPCA2, PPCNONE, {WC}},
-
-{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
+{"wait", X(31,62), XWC_MASK, POWER7|E500MC|PPCA2|PPCVLE, PPCNONE, {WC}},
+
+{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA, RB}},
{"tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC64, PPCNONE, {RA, RB}},
{"tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC64, PPCNONE, {RA, RB}},
@@ -3707,38 +4337,38 @@
{"tdle", XTO(31,68,TOLE), XTO_MASK, PPC64, PPCNONE, {RA, RB}},
{"tdng", XTO(31,68,TONG), XTO_MASK, PPC64, PPCNONE, {RA, RB}},
{"tdne", XTO(31,68,TONE), XTO_MASK, PPC64, PPCNONE, {RA, RB}},
-{"td", X(31,68), X_MASK, PPC64, PPCNONE, {TO, RA, RB}},
+{"td", X(31,68), X_MASK, PPC64|PPCVLE, PPCNONE, {TO, RA, RB}},
{"lwfcmx", APU(31,71,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"mulhd", XO(31,73,0,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"mulhd.", XO(31,73,0,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-
-{"mulhw", XO(31,75,0,0), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
-{"mulhw.", XO(31,75,0,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
+{"mulhd", XO(31,73,0,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulhd.", XO(31,73,0,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+
+{"mulhw", XO(31,75,0,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulhw.", XO(31,75,0,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
{"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, PPCNONE, {RA, RS, RB}},
{"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, PPCNONE, {RA, RS, RB}},
{"mtsrd", X(31,82), XRB_MASK|(1<<20), PPC64, PPCNONE, {SR, RS}},
-{"mfmsr", X(31,83), XRARB_MASK, COM, PPCNONE, {RT}},
-
-{"ldarx", X(31,84), XEH_MASK, PPC64, PPCNONE, {RT, RA0, RB, EH}},
+{"mfmsr", X(31,83), XRARB_MASK, COM|PPCVLE, PPCNONE, {RT}},
+
+{"ldarx", X(31,84), XEH_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
{"dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, PPC476, {RA, RB}},
-{"dcbf", X(31,86), XLRT_MASK, PPC, PPCNONE, {RA, RB, L}},
+{"dcbf", X(31,86), XLRT_MASK, PPC|PPCVLE, PPCNONE, {RA, RB, L}},
-{"lbzx", X(31,87), X_MASK, COM, PPCNONE, {RT, RA0, RB}},
-
-{"lbepx", X(31,95), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
+{"lbzx", X(31,87), X_MASK, COM|PPCVLE, PPCNONE, {RT, RA0, RB}},
+
+{"lbepx", X(31,95), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA, RB}},
{"dni", XRC(31,97,1), XRB_MASK, E6500, PPCNONE, {DUI, DCTL}},
{"lvx", X(31,103), X_MASK, PPCVEC, PPCNONE, {VD, RA, RB}},
{"lqfcmx", APU(31,103,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"neg", XO(31,104,0,0), XORB_MASK, COM, PPCNONE, {RT, RA}},
-{"neg.", XO(31,104,0,1), XORB_MASK, COM, PPCNONE, {RT, RA}},
+{"neg", XO(31,104,0,0), XORB_MASK, COM|PPCVLE, PPCNONE, {RT, RA}},
+{"neg.", XO(31,104,0,1), XORB_MASK, COM|PPCVLE, PPCNONE, {RT, RA}},
{"mul", XO(31,107,0,0), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
{"mul.", XO(31,107,0,1), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
@@ -3751,32 +4381,32 @@
{"clf", X(31,118), XTO_MASK, POWER, PPCNONE, {RA, RB}},
-{"lbzux", X(31,119), X_MASK, COM, PPCNONE, {RT, RAL, RB}},
-
-{"popcntb", X(31,122), XRB_MASK, POWER5, PPCNONE, {RA, RS}},
+{"lbzux", X(31,119), X_MASK, COM|PPCVLE, PPCNONE, {RT, RAL, RB}},
+
+{"popcntb", X(31,122), XRB_MASK, POWER5|PPCVLE, PPCNONE, {RA, RS}},
{"not", XRC(31,124,0), X_MASK, COM, PPCNONE, {RA, RS, RBS}},
-{"nor", XRC(31,124,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"nor", XRC(31,124,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"not.", XRC(31,124,1), X_MASK, COM, PPCNONE, {RA, RS, RBS}},
-{"nor.", XRC(31,124,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"nor.", XRC(31,124,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
-{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
-
-{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RS}},
-
-{"dcbtstls", X(31,134), X_MASK, PPCCHLK|PPC476|TITAN, PPCNONE, {CT, RA, RB}},
+{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA, RB}},
+
+{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, PPCNONE, {RS}},
+
+{"dcbtstls", X(31,134), X_MASK, PPCCHLK|PPC476|TITAN|PPCVLE, PPCNONE, {CT, RA, RB}},
{"stvebx", X(31,135), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"stbfcmx", APU(31,135,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"subfe", XO(31,136,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subfe", XO(31,136,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sfe", XO(31,136,0,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"subfe.", XO(31,136,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subfe.", XO(31,136,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sfe.", XO(31,136,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"adde", XO(31,138,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"adde", XO(31,138,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ae", XO(31,138,0,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"adde.", XO(31,138,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"adde.", XO(31,138,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ae.", XO(31,138,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"mviwsplt", X(31,142), X_MASK, PPCVEC2, PPCNONE, {VD, RA, RB}},
@@ -3787,16 +4417,16 @@
{"mtcrf", XFXM(31,144,0,0), XFXFXM_MASK, COM, PPCNONE, {FXM, RS}},
{"mtocrf", XFXM(31,144,0,1), XFXFXM_MASK, COM, PPCNONE, {FXM, RS}},
-{"mtmsr", X(31,146), XRLARB_MASK, COM, PPCNONE, {RS, A_L}},
+{"mtmsr", X(31,146), XRLARB_MASK, COM|PPCVLE, PPCNONE, {RS, A_L}},
{"eratsx", XRC(31,147,0), X_MASK, PPCA2, PPCNONE, {RT, RA0, RB}},
{"eratsx.", XRC(31,147,1), X_MASK, PPCA2, PPCNONE, {RT, RA0, RB}},
-{"stdx", X(31,149), X_MASK, PPC64, PPCNONE, {RS, RA0, RB}},
-
-{"stwcx.", XRC(31,150,1), X_MASK, PPC, PPCNONE, {RS, RA0, RB}},
-
-{"stwx", X(31,151), X_MASK, PPCCOM, PPCNONE, {RS, RA0, RB}},
+{"stdx", X(31,149), X_MASK, PPC64|PPCVLE, PPCNONE, {RS, RA0, RB}},
+
+{"stwcx.", XRC(31,150,1), X_MASK, PPC|PPCVLE, PPCNONE, {RS, RA0, RB}},
+
+{"stwx", X(31,151), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RS, RA0, RB}},
{"stx", X(31,151), X_MASK, PWRCOM, PPCNONE, {RS, RA, RB}},
{"slq", XRC(31,152,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
@@ -3807,13 +4437,13 @@
{"prtyw", X(31,154), XRB_MASK, POWER6|PPCA2|PPC476, PPCNONE, {RA, RS}},
-{"stdepx", X(31,157), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
-
-{"stwepx", X(31,159), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
-
-{"wrteei", X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {E}},
-
-{"dcbtls", X(31,166), X_MASK, PPCCHLK|PPC476|TITAN, PPCNONE, {CT, RA, RB}},
+{"stdepx", X(31,157), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA, RB}},
+
+{"stwepx", X(31,159), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA, RB}},
+
+{"wrteei", X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, PPCNONE, {E}},
+
+{"dcbtls", X(31,166), X_MASK, PPCCHLK|PPC476|TITAN|PPCVLE, PPCNONE, {CT, RA, RB}},
{"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
@@ -3824,11 +4454,11 @@
{"eratre", X(31,179), X_MASK, PPCA2, PPCNONE, {RT, RA, WS}},
-{"stdux", X(31,181), X_MASK, PPC64, PPCNONE, {RS, RAS, RB}},
+{"stdux", X(31,181), X_MASK, PPC64|PPCVLE, PPCNONE, {RS, RAS, RB}},
{"wchkall", X(31,182), X_MASK, PPCA2, PPCNONE, {OBF}},
-{"stwux", X(31,183), X_MASK, PPCCOM, PPCNONE, {RS, RAS, RB}},
+{"stwux", X(31,183), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RS, RAS, RB}},
{"stux", X(31,183), X_MASK, PWRCOM, PPCNONE, {RS, RA0, RB}},
{"sliq", XRC(31,184,0), X_MASK, M601, PPCNONE, {RA, RS, SH}},
@@ -3841,17 +4471,17 @@
{"stvewx", X(31,199), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"stwfcmx", APU(31,199,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"subfze", XO(31,200,0,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"subfze", XO(31,200,0,0), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"sfze", XO(31,200,0,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"subfze.", XO(31,200,0,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"subfze.", XO(31,200,0,1), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"sfze.", XO(31,200,0,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"addze", XO(31,202,0,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"addze", XO(31,202,0,0), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"aze", XO(31,202,0,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"addze.", XO(31,202,0,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"addze.", XO(31,202,0,1), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"aze.", XO(31,202,0,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"msgsnd", XRTRA(31,206,0,0), XRTRA_MASK, E500MC|PPCA2, PPCNONE, {RB}},
+{"msgsnd", XRTRA(31,206,0,0), XRTRA_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RB}},
{"mtsr", X(31,210), XRB_MASK|(1<<20), COM, NON32, {SR, RS}},
@@ -3859,9 +4489,9 @@
{"ldawx.", XRC(31,212,1), X_MASK, PPCA2, PPCNONE, {RT, RA0, RB}},
-{"stdcx.", XRC(31,214,1), X_MASK, PPC64, PPCNONE, {RS, RA0, RB}},
-
-{"stbx", X(31,215), X_MASK, COM, PPCNONE, {RS, RA0, RB}},
+{"stdcx.", XRC(31,214,1), X_MASK, PPC64|PPCVLE, PPCNONE, {RS, RA0, RB}},
+
+{"stbx", X(31,215), X_MASK, COM|PPCVLE, PPCNONE, {RS, RA0, RB}},
{"sllq", XRC(31,216,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"sllq.", XRC(31,216,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
@@ -3869,41 +4499,41 @@
{"sleq", XRC(31,217,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"sleq.", XRC(31,217,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
-{"stbepx", X(31,223), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
-
-{"icblc", X(31,230), X_MASK, PPCCHLK|PPC476|TITAN, PPCNONE, {CT, RA, RB}},
+{"stbepx", X(31,223), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA, RB}},
+
+{"icblc", X(31,230), X_MASK, PPCCHLK|PPC476|TITAN|PPCVLE, PPCNONE, {CT, RA, RB}},
{"stvx", X(31,231), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"stqfcmx", APU(31,231,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"subfme", XO(31,232,0,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"subfme", XO(31,232,0,0), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"sfme", XO(31,232,0,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"subfme.", XO(31,232,0,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"subfme.", XO(31,232,0,1), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"sfme.", XO(31,232,0,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"mulld", XO(31,233,0,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"mulld.", XO(31,233,0,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-
-{"addme", XO(31,234,0,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"mulld", XO(31,233,0,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulld.", XO(31,233,0,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+
+{"addme", XO(31,234,0,0), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"ame", XO(31,234,0,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"addme.", XO(31,234,0,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"addme.", XO(31,234,0,1), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"ame.", XO(31,234,0,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"mullw", XO(31,235,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"mullw", XO(31,235,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"muls", XO(31,235,0,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"mullw.", XO(31,235,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"mullw.", XO(31,235,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"muls.", XO(31,235,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"icblce", X(31,238), X_MASK, PPCCHLK, E500MC|PPCA2, {CT, RA, RB}},
-{"msgclr", XRTRA(31,238,0,0),XRTRA_MASK,E500MC|PPCA2, PPCNONE, {RB}},
+{"msgclr", XRTRA(31,238,0,0),XRTRA_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RB}},
{"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
{"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
{"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, PPCNONE, {RA, RB}},
{"dcbtst", X(31,246), X_MASK, POWER4, PPCNONE, {RA, RB, CT}},
-{"dcbtst", X(31,246), X_MASK, PPC, POWER4, {CT, RA, RB}},
-
-{"stbux", X(31,247), X_MASK, COM, PPCNONE, {RS, RAS, RB}},
+{"dcbtst", X(31,246), X_MASK, PPC|PPCVLE, POWER4, {CT, RA, RB}},
+
+{"stbux", X(31,247), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
{"slliq", XRC(31,248,0), X_MASK, M601, PPCNONE, {RA, RS, SH}},
{"slliq.", XRC(31,248,1), X_MASK, M601, PPCNONE, {RA, RS, SH}},
@@ -3912,7 +4542,7 @@
{"dcbtstep", XRT(31,255,0), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
-{"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RS, RA}},
+{"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2|PPC476|PPCVLE, TITAN, {RS, RA}},
{"mfdcrx.", XRC(31,259,1), X_MASK, PPCA2, PPCNONE, {RS, RA}},
{"lvexbx", X(31,261), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}},
@@ -3925,9 +4555,9 @@
{"doz", XO(31,264,0,0), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
{"doz.", XO(31,264,0,1), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
-{"add", XO(31,266,0,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"add", XO(31,266,0,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"cax", XO(31,266,0,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"add.", XO(31,266,0,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"add.", XO(31,266,0,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"cax.", XO(31,266,0,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"ehpriv", X(31,270), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
@@ -3941,18 +4571,18 @@
{"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, PPCNONE, {RA, RB}},
{"dcbt", X(31,278), X_MASK, POWER4, PPCNONE, {RA, RB, CT}},
-{"dcbt", X(31,278), X_MASK, PPC, POWER4, {CT, RA, RB}},
-
-{"lhzx", X(31,279), X_MASK, COM, PPCNONE, {RT, RA0, RB}},
+{"dcbt", X(31,278), X_MASK, PPC|PPCVLE, POWER4, {CT, RA, RB}},
+
+{"lhzx", X(31,279), X_MASK, COM|PPCVLE, PPCNONE, {RT, RA0, RB}},
{"cdtbcd", X(31,282), XRB_MASK, POWER6, PPCNONE, {RA, RS}},
-{"eqv", XRC(31,284,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"eqv.", XRC(31,284,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"eqv", XRC(31,284,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"eqv.", XRC(31,284,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"lhepx", X(31,287), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
-{"mfdcrux", X(31,291), X_MASK, PPC464, PPCNONE, {RS, RA}},
+{"mfdcrux", X(31,291), X_MASK, PPC464|PPCVLE, PPCNONE, {RS, RA}},
{"lvexhx", X(31,293), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}},
{"lvepx", X(31,295), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}},
@@ -3962,12 +4592,12 @@
{"eciwx", X(31,310), X_MASK, PPC, TITAN, {RT, RA, RB}},
-{"lhzux", X(31,311), X_MASK, COM, PPCNONE, {RT, RAL, RB}},
+{"lhzux", X(31,311), X_MASK, COM|PPCVLE, PPCNONE, {RT, RAL, RB}},
{"cbcdtd", X(31,314), XRB_MASK, POWER6, PPCNONE, {RA, RS}},
-{"xor", XRC(31,316,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"xor.", XRC(31,316,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"xor", XRC(31,316,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"xor.", XRC(31,316,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"dcbtep", XRT(31,319,0), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
@@ -4005,7 +4635,7 @@
{"mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, PPCNONE, {RT}},
-{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, TITAN, {RT, SPR}},
+{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, TITAN, {RT, SPR}},
{"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, PPCNONE, {RT, SPR}},
{"lvexwx", X(31,325), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}},
@@ -4017,16 +4647,16 @@
{"lxvdsx", X(31,332), XX1_MASK, PPCVSX, PPCNONE, {XT6, RA, RB}},
-{"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, PPCNONE, {RT, PMR}},
+{"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300|PPCVLE, PPCNONE, {RT, PMR}},
{"mftmr", X(31,366), X_MASK, PPCTMR|E6500, PPCNONE, {RT, TMR}},
{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, PPCNONE, {RT}},
-{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, PPCNONE, {RT}},
+{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM|PPCVLE, PPCNONE, {RT}},
{"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}},
{"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}},
{"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, PPCNONE, {RT}},
-{"mflr", XSPR(31,339, 8), XSPR_MASK, COM, PPCNONE, {RT}},
-{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, PPCNONE, {RT}},
+{"mflr", XSPR(31,339, 8), XSPR_MASK, COM|PPCVLE, PPCNONE, {RT}},
+{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM|PPCVLE, PPCNONE, {RT}},
{"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, PPCNONE, {RT}},
{"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}},
{"mfdar", XSPR(31,339, 19), XSPR_MASK, COM, TITAN, {RT}},
@@ -4036,12 +4666,12 @@
{"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, PPCNONE, {RT}},
{"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, PPCNONE, {RT}},
{"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, PPCNONE, {RT}},
-{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, PPCNONE, {RT}},
+{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
{"mfcmpa", XSPR(31,339,144), XSPR_MASK, PPC860, PPCNONE, {RT}},
{"mfcmpb", XSPR(31,339,145), XSPR_MASK, PPC860, PPCNONE, {RT}},
{"mfcmpc", XSPR(31,339,146), XSPR_MASK, PPC860, PPCNONE, {RT}},
@@ -4059,53 +4689,53 @@
{"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, PPCNONE, {RT}},
{"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, PPCNONE, {RT}},
{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, PPCNONE, {RT}},
-{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, PPCNONE, {RT, SPRG}},
-{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RT}},
-{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RT}},
-{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RT}},
-{"mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RT}},
-{"mftb", XSPR(31,339,268), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mftbl", XSPR(31,339,268), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mftbu", XSPR(31,339,269), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC, PPCNONE, {RT}},
-{"mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC, PPCNONE, {RT}},
-{"mfsprg2", XSPR(31,339,274), XSPR_MASK, PPC, PPCNONE, {RT}},
-{"mfsprg3", XSPR(31,339,275), XSPR_MASK, PPC, PPCNONE, {RT}},
+{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC|PPCVLE, PPCNONE, {RT, SPRG}},
+{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mftb", XSPR(31,339,268), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mftbl", XSPR(31,339,268), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mftbu", XSPR(31,339,269), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RT}},
+{"mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RT}},
+{"mfsprg2", XSPR(31,339,274), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RT}},
+{"mfsprg3", XSPR(31,339,275), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RT}},
{"mfasr", XSPR(31,339,280), XSPR_MASK, PPC64, PPCNONE, {RT}},
{"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}},
-{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, PPCNONE, {RT}},
-{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor3", XSPR(31,339,403), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor4", XSPR(31,339,404), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor5", XSPR(31,339,405), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor6", XSPR(31,339,406), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor7", XSPR(31,339,407), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor8", XSPR(31,339,408), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor9", XSPR(31,339,409), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor10", XSPR(31,339,410), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor11", XSPR(31,339,411), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor12", XSPR(31,339,412), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, PPCNONE, {RT}},
-{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, PPCNONE, {RT}},
+{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RT}},
+{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor3", XSPR(31,339,403), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor4", XSPR(31,339,404), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor5", XSPR(31,339,405), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor6", XSPR(31,339,406), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor7", XSPR(31,339,407), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor8", XSPR(31,339,408), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor9", XSPR(31,339,409), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor10", XSPR(31,339,410), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor11", XSPR(31,339,411), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor12", XSPR(31,339,412), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
+{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RT}},
{"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, PPCNONE, {RT}},
{"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, PPCNONE, {RT}},
{"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, PPCNONE, {RT}},
@@ -4216,13 +4846,13 @@
{"mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfthrm3", XSPR(31,339,1022), XSPR_MASK, PPC750, PPCNONE, {RT}},
{"mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, PPCNONE, {RT}},
-{"mfspr", X(31,339), X_MASK, COM, PPCNONE, {RT, SPR}},
-
-{"lwax", X(31,341), X_MASK, PPC64, PPCNONE, {RT, RA0, RB}},
+{"mfspr", X(31,339), X_MASK, COM|PPCVLE, PPCNONE, {RT, SPR}},
+
+{"lwax", X(31,341), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA0, RB}},
{"dst", XDSS(31,342,0), XDSS_MASK, PPCVEC, PPCNONE, {RA, RB, STRM}},
-{"lhax", X(31,343), X_MASK, COM, PPCNONE, {RT, RA0, RB}},
+{"lhax", X(31,343), X_MASK, COM|PPCVLE, PPCNONE, {RT, RA0, RB}},
{"lvxl", X(31,359), X_MASK, PPCVEC, PPCNONE, {VD, RA, RB}},
@@ -4238,20 +4868,20 @@
{"mftbu", XSPR(31,371,269), XSPR_MASK, PPC, NO371, {RT}},
{"mftb", X(31,371), X_MASK, PPC|PPCA2, NO371|POWER7, {RT, TBR}},
-{"lwaux", X(31,373), X_MASK, PPC64, PPCNONE, {RT, RAL, RB}},
+{"lwaux", X(31,373), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RAL, RB}},
{"dstst", XDSS(31,374,0), XDSS_MASK, PPCVEC, PPCNONE, {RA, RB, STRM}},
-{"lhaux", X(31,375), X_MASK, COM, PPCNONE, {RT, RAL, RB}},
+{"lhaux", X(31,375), X_MASK, COM|PPCVLE, PPCNONE, {RT, RAL, RB}},
{"popcntw", X(31,378), XRB_MASK, POWER7|PPCA2, PPCNONE, {RA, RS}},
{"mtdcrx", X(31,387), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RA, RS}},
-{"mtdcrx.", XRC(31,387,1), X_MASK, PPCA2, PPCNONE, {RA, RS}},
+{"mtdcrx.", XRC(31,387,1), X_MASK, PPCA2|PPCVLE, PPCNONE, {RA, RS}},
{"stvexbx", X(31,389), X_MASK, PPCVEC2, PPCNONE, {VS, RA0, RB}},
-{"dcblc", X(31,390), X_MASK, PPCCHLK|PPC476|TITAN, PPCNONE, {CT, RA, RB}},
+{"dcblc", X(31,390), X_MASK, PPCCHLK|PPC476|TITAN|PPCVLE, PPCNONE, {CT, RA, RB}},
{"stdfcmx", APU(31,391,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
{"divdeu", XO(31,393,0,0), XO_MASK, POWER7|PPCA2, PPCNONE, {RT, RA, RB}},
@@ -4266,14 +4896,14 @@
{"icswx", XRC(31,406,0), X_MASK, POWER7|PPCA2, PPCNONE, {RS, RA, RB}},
{"icswx.", XRC(31,406,1), X_MASK, POWER7|PPCA2, PPCNONE, {RS, RA, RB}},
-{"sthx", X(31,407), X_MASK, COM, PPCNONE, {RS, RA0, RB}},
+{"sthx", X(31,407), X_MASK, COM|PPCVLE, PPCNONE, {RS, RA0, RB}},
-{"orc", XRC(31,412,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"orc.", XRC(31,412,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"orc", XRC(31,412,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"orc.", XRC(31,412,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
-{"sthepx", X(31,415), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
+{"sthepx", X(31,415), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RS, RA, RB}},
-{"mtdcrux", X(31,419), X_MASK, PPC464, PPCNONE, {RA, RS}},
+{"mtdcrux", X(31,419), X_MASK, PPC464|PPCVLE, PPCNONE, {RA, RS}},
{"stvexhx", X(31,421), X_MASK, PPCVEC2, PPCNONE, {VS, RA0, RB}},
@@ -4288,16 +4918,16 @@
{"ecowx", X(31,438), X_MASK, PPC, TITAN, {RT, RA, RB}},
-{"sthux", X(31,439), X_MASK, COM, PPCNONE, {RS, RAS, RB}},
+{"sthux", X(31,439), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
{"mdors", 0x7f9ce378, 0xffffffff, E500MC, PPCNONE, {0}},
{"miso", 0x7f5ad378, 0xffffffff, E6500, PPCNONE, {0}},
-{"mr", XRC(31,444,0), X_MASK, COM, PPCNONE, {RA, RS, RBS}},
-{"or", XRC(31,444,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"mr.", XRC(31,444,1), X_MASK, COM, PPCNONE, {RA, RS, RBS}},
-{"or.", XRC(31,444,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"mr", XRC(31,444,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RBS}},
+{"or", XRC(31,444,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"mr.", XRC(31,444,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RBS}},
+{"or.", XRC(31,444,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"mtexisr", XSPR(31,451, 64), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtexier", XSPR(31,451, 66), XSPR_MASK, PPC403, PPCNONE, {RS}},
@@ -4333,16 +4963,16 @@
{"mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, PPCNONE, {RS}},
-{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, TITAN, {SPR, RS}},
+{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476|PPCVLE, TITAN, {SPR, RS}},
{"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, PPCNONE, {SPR, RS}},
{"stvexwx", X(31,453), X_MASK, PPCVEC2, PPCNONE, {VS, RA0, RB}},
{"dccci", X(31,454), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, PPCNONE, {RAOPT, RBOPT}},
-{"dci", X(31,454), XRARB_MASK, PPCA2|PPC476, PPCNONE, {CT}},
-
-{"divdu", XO(31,457,0,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"divdu.", XO(31,457,0,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
+{"dci", X(31,454), XRARB_MASK, PPCA2|PPC476|PPCVLE, PPCNONE, {CT}},
+
+{"divdu", XO(31,457,0,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"divdu.", XO(31,457,0,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
{"divwu", XO(31,459,0,0), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
{"divwu.", XO(31,459,0,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
@@ -4351,9 +4981,9 @@
{"mttmr", X(31,494), X_MASK, PPCTMR|E6500, PPCNONE, {TMR, RS}},
{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, PPCNONE, {RS}},
-{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, PPCNONE, {RS}},
-{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, PPCNONE, {RS}},
-{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, PPCNONE, {RS}},
+{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM|PPCVLE, PPCNONE, {RS}},
+{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM|PPCVLE, PPCNONE, {RS}},
+{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM|PPCVLE, PPCNONE, {RS}},
{"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, PPCNONE, {RS}},
{"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}},
{"mtdar", XSPR(31,467, 19), XSPR_MASK, COM, TITAN, {RS}},
@@ -4362,16 +4992,16 @@
{"mtdec", XSPR(31,467, 22), XSPR_MASK, COM, PPCNONE, {RS}},
{"mtsdr0", XSPR(31,467, 24), XSPR_MASK, POWER, PPCNONE, {RS}},
{"mtsdr1", XSPR(31,467, 25), XSPR_MASK, COM, TITAN, {RS}},
-{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, PPCNONE, {RS}},
-{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, PPCNONE, {RS}},
+{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM|PPCVLE, PPCNONE, {RS}},
+{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM|PPCVLE, PPCNONE, {RS}},
{"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, PPCNONE, {RS}},
-{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, PPCNONE, {RS}},
+{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
{"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, PPCNONE, {RS}},
{"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, PPCNONE, {RS}},
{"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, PPCNONE, {RS}},
@@ -4389,50 +5019,50 @@
{"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, PPCNONE, {RS}},
{"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, PPCNONE, {RS}},
{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, PPCNONE, {RS}},
-{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtsprg", XSPR(31,467,256), XSPRG_MASK,PPC, PPCNONE, {SPRG, RS}},
-{"mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC, PPCNONE, {RS}},
-{"mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC, PPCNONE, {RS}},
-{"mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC, PPCNONE, {RS}},
-{"mtsprg3", XSPR(31,467,275), XSPR_MASK, PPC, PPCNONE, {RS}},
-{"mtsprg4", XSPR(31,467,276), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RS}},
-{"mtsprg5", XSPR(31,467,277), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RS}},
-{"mtsprg6", XSPR(31,467,278), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RS}},
-{"mtsprg7", XSPR(31,467,279), XSPR_MASK, PPC405|BOOKE, PPCNONE, {RS}},
+{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC|PPCVLE, PPCNONE, {SPRG, RS}},
+{"mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RS}},
+{"mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RS}},
+{"mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RS}},
+{"mtsprg3", XSPR(31,467,275), XSPR_MASK, PPC|PPCVLE, PPCNONE, {RS}},
+{"mtsprg4", XSPR(31,467,276), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtsprg5", XSPR(31,467,277), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtsprg6", XSPR(31,467,278), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtsprg7", XSPR(31,467,279), XSPR_MASK, PPC405|BOOKE|PPCVLE, PPCNONE, {RS}},
{"mtasr", XSPR(31,467,280), XSPR_MASK, PPC64, PPCNONE, {RS}},
{"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}},
{"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, PPCNONE, {RS}},
{"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, PPCNONE, {RS}},
-{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor3", XSPR(31,467,403), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor4", XSPR(31,467,404), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor5", XSPR(31,467,405), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor6", XSPR(31,467,406), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor7", XSPR(31,467,407), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor8", XSPR(31,467,408), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor9", XSPR(31,467,409), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor10", XSPR(31,467,410), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor11", XSPR(31,467,411), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor12", XSPR(31,467,412), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, PPCNONE, {RS}},
-{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, PPCNONE, {RS}},
+{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor3", XSPR(31,467,403), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor4", XSPR(31,467,404), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor5", XSPR(31,467,405), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor6", XSPR(31,467,406), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor7", XSPR(31,467,407), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor8", XSPR(31,467,408), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor9", XSPR(31,467,409), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor10", XSPR(31,467,410), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor11", XSPR(31,467,411), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor12", XSPR(31,467,412), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
+{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE|PPCVLE, PPCNONE, {RS}},
{"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, PPCNONE, {RS}},
{"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, PPCNONE, {RS}},
{"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, PPCNONE, {RS}},
@@ -4444,8 +5074,8 @@
{"mtivor35", XSPR(31,467,531), XSPR_MASK, PPCPMR, PPCNONE, {RS}},
{"mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, TITAN, {SPRBAT, RS}},
{"mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, TITAN, {SPRBAT, RS}},
-{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, PPCNONE, {RS}},
-{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, PPCNONE, {RS}},
+{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI|PPCVLE, PPCNONE, {RS}},
+{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI|PPCVLE, PPCNONE, {RS}},
{"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, PPCNONE, {RS}},
{"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, PPCNONE, {RS}},
{"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, PPCNONE, {RS}},
@@ -4510,18 +5140,18 @@
{"mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, PPCNONE, {RS}},
{"mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, PPCNONE, {RS}},
-{"mtspr", X(31,467), X_MASK, COM, PPCNONE, {SPR, RS}},
+{"mtspr", X(31,467), X_MASK, COM|PPCVLE, PPCNONE, {SPR, RS}},
+
+{"dcbi", X(31,470), XRT_MASK, PPC|PPCVLE, PPCNONE, {RA, RB}},
-{"dcbi", X(31,470), XRT_MASK, PPC, PPCNONE, {RA, RB}},
-
-{"nand", XRC(31,476,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
-{"nand.", XRC(31,476,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
+{"nand", XRC(31,476,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
+{"nand.", XRC(31,476,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"dsn", X(31,483), XRT_MASK, E500MC, PPCNONE, {RA, RB}},
{"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA, RB}},
-{"icbtls", X(31,486), X_MASK, PPCCHLK|PPC476|TITAN, PPCNONE, {CT, RA, RB}},
+{"icbtls", X(31,486), X_MASK, PPCCHLK|PPC476|TITAN|PPCVLE, PPCNONE, {CT, RA, RB}},
{"stvxl", X(31,487), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
@@ -4553,33 +5183,33 @@
{"lvlx", X(31,519), X_MASK, CELL, PPCNONE, {VD, RA0, RB}},
{"lbfcmux", APU(31,519,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"subfco", XO(31,8,1,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subfco", XO(31,8,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sfo", XO(31,8,1,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"subco", XO(31,8,1,0), XO_MASK, PPCCOM, PPCNONE, {RT, RB, RA}},
-{"subfco.", XO(31,8,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subco", XO(31,8,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RB, RA}},
+{"subfco.", XO(31,8,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sfo.", XO(31,8,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"subco.", XO(31,8,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RB, RA}},
-
-{"addco", XO(31,10,1,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subco.", XO(31,8,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RB, RA}},
+
+{"addco", XO(31,10,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ao", XO(31,10,1,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"addco.", XO(31,10,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"addco.", XO(31,10,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"ao.", XO(31,10,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"clcs", X(31,531), XRB_MASK, M601, PPCNONE, {RT, RA}},
{"ldbrx", X(31,532), X_MASK, CELL|POWER7|PPCA2, PPCNONE, {RT, RA0, RB}},
-{"lswx", X(31,533), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, RBX}},
+{"lswx", X(31,533), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RT, RA0, RB}},
{"lsx", X(31,533), X_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"lwbrx", X(31,534), X_MASK, PPCCOM, PPCNONE, {RT, RA0, RB}},
+{"lwbrx", X(31,534), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA0, RB}},
{"lbrx", X(31,534), X_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"lfsx", X(31,535), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
-{"srw", XRC(31,536,0), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}},
+{"srw", XRC(31,536,0), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"sr", XRC(31,536,0), X_MASK, PWRCOM, PPCNONE, {RA, RS, RB}},
-{"srw.", XRC(31,536,1), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}},
+{"srw.", XRC(31,536,1), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"sr.", XRC(31,536,1), X_MASK, PWRCOM, PPCNONE, {RA, RS, RB}},
{"rrib", XRC(31,537,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
@@ -4605,7 +5235,7 @@
{"subfo.", XO(31,40,1,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
{"subo.", XO(31,40,1,1), XO_MASK, PPC, PPCNONE, {RT, RB, RA}},
-{"tlbsync", X(31,566), 0xffffffff, PPC, PPCNONE, {0}},
+{"tlbsync", X(31,566), 0xffffffff, PPC|PPCVLE, PPCNONE, {0}},
{"lfsux", X(31,567), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
@@ -4619,13 +5249,13 @@
{"mfsr", X(31,595), XRB_MASK|(1<<20), COM, NON32, {RT, SR}},
-{"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RA0, NBI}},
+{"lswi", X(31,597), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RT, RA0, NB}},
{"lsi", X(31,597), X_MASK, PWRCOM, PPCNONE, {RT, RA0, NB}},
{"lwsync", XSYNC(31,598,1), 0xffffffff, PPC, E500, {0}},
{"ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, PPCNONE, {0}},
{"sync", X(31,598), XSYNCLE_MASK,E6500, PPCNONE, {LS, ESYNC}},
-{"sync", X(31,598), XSYNC_MASK, PPCCOM, BOOKE|PPC476, {LS}},
+{"sync", X(31,598), XSYNC_MASK, PPCCOM|PPCVLE, BOOKE|PPC476, {LS}},
{"msync", X(31,598), 0xffffffff, BOOKE|PPCA2|PPC476, PPCNONE, {0}},
{"sync", X(31,598), 0xffffffff, BOOKE|PPC476, E6500, {0}},
{"lwsync", X(31,598), 0xffffffff, E500, PPCNONE, {0}},
@@ -4634,7 +5264,7 @@
{"lfdx", X(31,599), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
{"mffgpr", XRC(31,607,0), XRA_MASK, POWER6, POWER7, {FRT, RB}},
-{"lfdepx", X(31,607), X_MASK, E500MC|PPCA2, PPCNONE, {FRT, RA, RB}},
+{"lfdepx", X(31,607), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {FRT, RA, RB}},
{"lddx", X(31,611), X_MASK, E500MC, PPCNONE, {RT, RA, RB}},
@@ -4659,24 +5289,24 @@
{"stvlx", X(31,647), X_MASK, CELL, PPCNONE, {VS, RA0, RB}},
{"stbfcmux", APU(31,647,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
-{"subfeo", XO(31,136,1,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subfeo", XO(31,136,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sfeo", XO(31,136,1,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"subfeo.", XO(31,136,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"subfeo.", XO(31,136,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"sfeo.", XO(31,136,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"addeo", XO(31,138,1,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"addeo", XO(31,138,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"aeo", XO(31,138,1,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"addeo.", XO(31,138,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"addeo.", XO(31,138,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"aeo.", XO(31,138,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"mfsrin", X(31,659), XRA_MASK, PPC, NON32, {RT, RB}},
{"stdbrx", X(31,660), X_MASK, CELL|POWER7|PPCA2, PPCNONE, {RS, RA0, RB}},
-{"stswx", X(31,661), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, RB}},
+{"stswx", X(31,661), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RS, RA0, RB}},
{"stsx", X(31,661), X_MASK, PWRCOM, PPCNONE, {RS, RA0, RB}},
-{"stwbrx", X(31,662), X_MASK, PPCCOM, PPCNONE, {RS, RA0, RB}},
+{"stwbrx", X(31,662), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RS, RA0, RB}},
{"stbrx", X(31,662), X_MASK, PWRCOM, PPCNONE, {RS, RA0, RB}},
{"stfsx", X(31,663), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
@@ -4709,17 +5339,17 @@
{"stxsdx", X(31,716), XX1_MASK, PPCVSX, PPCNONE, {XS6, RA, RB}},
-{"subfzeo", XO(31,200,1,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"subfzeo", XO(31,200,1,0), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"sfzeo", XO(31,200,1,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"subfzeo.", XO(31,200,1,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"subfzeo.", XO(31,200,1,1), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"sfzeo.", XO(31,200,1,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"addzeo", XO(31,202,1,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"addzeo", XO(31,202,1,0), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"azeo", XO(31,202,1,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"addzeo.", XO(31,202,1,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
+{"addzeo.", XO(31,202,1,1), XORB_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA}},
{"azeo.", XO(31,202,1,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"stswi", X(31,725), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, NB}},
+{"stswi", X(31,725), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RS, RA0, NB}},
{"stsi", X(31,725), X_MASK, PWRCOM, PPCNONE, {RS, RA0, NB}},
{"sthcx.", XRC(31,726,1), X_MASK, POWER7, PPCNONE, {RS, RA0, RB}},
@@ -4733,7 +5363,7 @@
{"sreq.", XRC(31,729,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"mftgpr", XRC(31,735,0), XRA_MASK, POWER6, POWER7, {RT, FRB}},
-{"stfdepx", X(31,735), X_MASK, E500MC|PPCA2, PPCNONE, {FRS, RA, RB}},
+{"stfdepx", X(31,735), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {FRS, RA, RB}},
{"stddx", X(31,739), X_MASK, E500MC, PPCNONE, {RS, RA, RB}},
@@ -4746,8 +5376,8 @@
{"subfmeo.", XO(31,232,1,1), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
{"sfmeo.", XO(31,232,1,1), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
-{"mulldo", XO(31,233,1,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"mulldo.", XO(31,233,1,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
+{"mulldo", XO(31,233,1,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"mulldo.", XO(31,233,1,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
{"addmeo", XO(31,234,1,0), XORB_MASK, PPCCOM, PPCNONE, {RT, RA}},
{"ameo", XO(31,234,1,0), XORB_MASK, PWRCOM, PPCNONE, {RT, RA}},
@@ -4775,14 +5405,14 @@
{"dozo", XO(31,264,1,0), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
{"dozo.", XO(31,264,1,1), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
-{"addo", XO(31,266,1,0), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"addo", XO(31,266,1,0), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"caxo", XO(31,266,1,0), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"addo.", XO(31,266,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
+{"addo.", XO(31,266,1,1), XO_MASK, PPCCOM|PPCVLE, PPCNONE, {RT, RA, RB}},
{"caxo.", XO(31,266,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
{"lxvw4x", X(31,780), XX1_MASK, PPCVSX, PPCNONE, {XT6, RA, RB}},
-{"tlbivax", X(31,786), XRT_MASK, BOOKE|PPCA2|PPC476, PPCNONE, {RA, RB}},
+{"tlbivax", X(31,786), XRT_MASK, BOOKE|PPCA2|PPC476|PPCVLE, PPCNONE, {RA, RB}},
{"lwzcix", X(31,789), X_MASK, POWER6, PPCNONE, {RT, RA0, RB}},
@@ -4791,9 +5421,9 @@
{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA, RB}},
{"lfqx", X(31,791), X_MASK, POWER2, PPCNONE, {FRT, RA, RB}},
-{"sraw", XRC(31,792,0), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}},
+{"sraw", XRC(31,792,0), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"sra", XRC(31,792,0), X_MASK, PWRCOM, PPCNONE, {RA, RS, RB}},
-{"sraw.", XRC(31,792,1), X_MASK, PPCCOM, PPCNONE, {RA, RS, RB}},
+{"sraw.", XRC(31,792,1), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, RB}},
{"sra.", XRC(31,792,1), X_MASK, PWRCOM, PPCNONE, {RA, RS, RB}},
{"srad", XRC(31,794,0), X_MASK, PPC64, PPCNONE, {RA, RS, RB}},
@@ -4815,13 +5445,13 @@
{"lfqux", X(31,823), X_MASK, POWER2, PPCNONE, {FRT, RA, RB}},
-{"srawi", XRC(31,824,0), X_MASK, PPCCOM, PPCNONE, {RA, RS, SH}},
+{"srawi", XRC(31,824,0), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, SH}},
{"srai", XRC(31,824,0), X_MASK, PWRCOM, PPCNONE, {RA, RS, SH}},
-{"srawi.", XRC(31,824,1), X_MASK, PPCCOM, PPCNONE, {RA, RS, SH}},
+{"srawi.", XRC(31,824,1), X_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS, SH}},
{"srai.", XRC(31,824,1), X_MASK, PWRCOM, PPCNONE, {RA, RS, SH}},
-{"sradi", XS(31,413,0), XS_MASK, PPC64, PPCNONE, {RA, RS, SH6}},
-{"sradi.", XS(31,413,1), XS_MASK, PPC64, PPCNONE, {RA, RS, SH6}},
+{"sradi", XS(31,413,0), XS_MASK, PPC64|PPCVLE, PPCNONE, {RA, RS, SH6}},
+{"sradi.", XS(31,413,1), XS_MASK, PPC64|PPCVLE, PPCNONE, {RA, RS, SH6}},
{"lvtlxl", X(31,837), X_MASK, PPCVEC2, PPCNONE, {VD, RA0, RB}},
@@ -4837,8 +5467,8 @@
{"lbzcix", X(31,853), X_MASK, POWER6, PPCNONE, {RT, RA0, RB}},
{"eieio", X(31,854), 0xffffffff, PPC, BOOKE|PPCA2|PPC476, {0}},
-{"mbar", X(31,854), X_MASK, BOOKE|PPCA2|PPC476, PPCNONE, {MO}},
-{"eieio", XMBAR(31,854,1),0xffffffff, E500, PPCNONE, {0}},
+{"mbar", X(31,854), X_MASK, BOOKE|PPCA2|PPC476|PPCVLE, PPCNONE, {MO}},
+{"eieio", XMBAR(31,854,1),0xffffffff, E500, PPCNONE, {0}},
{"eieio", X(31,854), 0xffffffff, PPCA2|PPC476, PPCNONE, {0}},
{"lfiwax", X(31,855), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FRT, RA0, RB}},
@@ -4883,9 +5513,9 @@
{"srea", XRC(31,921,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"srea.", XRC(31,921,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
-{"extsh", XRC(31,922,0), XRB_MASK, PPCCOM, PPCNONE, {RA, RS}},
+{"extsh", XRC(31,922,0), XRB_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS}},
{"exts", XRC(31,922,0), XRB_MASK, PWRCOM, PPCNONE, {RA, RS}},
-{"extsh.", XRC(31,922,1), XRB_MASK, PPCCOM, PPCNONE, {RA, RS}},
+{"extsh.", XRC(31,922,1), XRB_MASK, PPCCOM|PPCVLE, PPCNONE, {RA, RS}},
{"exts.", XRC(31,922,1), XRB_MASK, PWRCOM, PPCNONE, {RA, RS}},
{"stfddx", X(31,931), X_MASK, E500MC, PPCNONE, {FRS, RA, RB}},
@@ -4917,19 +5547,19 @@
{"sraiq", XRC(31,952,0), X_MASK, M601, PPCNONE, {RA, RS, SH}},
{"sraiq.", XRC(31,952,1), X_MASK, M601, PPCNONE, {RA, RS, SH}},
-{"extsb", XRC(31,954,0), XRB_MASK, PPC, PPCNONE, {RA, RS}},
-{"extsb.", XRC(31,954,1), XRB_MASK, PPC, PPCNONE, {RA, RS}},
+{"extsb", XRC(31,954,0), XRB_MASK, PPC|PPCVLE, PPCNONE, {RA, RS}},
+{"extsb.", XRC(31,954,1), XRB_MASK, PPC|PPCVLE, PPCNONE, {RA, RS}},
{"stvflxl", X(31,965), X_MASK, PPCVEC2, PPCNONE, {VS, RA0, RB}},
{"iccci", X(31,966), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, PPCNONE, {RAOPT, RBOPT}},
-{"ici", X(31,966), XRARB_MASK, PPCA2|PPC476, PPCNONE, {CT}},
-
-{"divduo", XO(31,457,1,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"divduo.", XO(31,457,1,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-
-{"divwuo", XO(31,459,1,0), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
-{"divwuo.", XO(31,459,1,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
+{"ici", X(31,966), XRARB_MASK, PPCA2|PPC476|PPCVLE, PPCNONE, {CT}},
+
+{"divduo", XO(31,457,1,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"divduo.", XO(31,457,1,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+
+{"divwuo", XO(31,459,1,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"divwuo.", XO(31,459,1,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
{"stxvd2x", X(31,972), XX1_MASK, PPCVSX, PPCNONE, {XS6, RA, RB}},
@@ -4944,23 +5574,24 @@
{"stfiwx", X(31,983), X_MASK, PPC, PPCEFS, {FRS, RA0, RB}},
-{"extsw", XRC(31,986,0), XRB_MASK, PPC64, PPCNONE, {RA, RS}},
-{"extsw.", XRC(31,986,1), XRB_MASK, PPC64, PPCNONE, {RA, RS}},
+{"extsw", XRC(31,986,0), XRB_MASK, PPC64|PPCVLE, PPCNONE, {RA, RS}},
+{"extsw.", XRC(31,986,1), XRB_MASK, PPC64|PPCVLE, PPCNONE, {RA, RS}},
-{"icbiep", XRT(31,991,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
+{"icbiep", XRT(31,991,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA, RB}},
{"stvswxl", X(31,997), X_MASK, PPCVEC2, PPCNONE, {VS, RA0, RB}},
-{"icread", X(31,998), XRT_MASK, PPC403|PPC440|PPC476|TITAN, PPCNONE, {RA, RB}},
+{"icread", X(31,998), XRT_MASK, PPC403|PPC440|PPC476|TITAN|PPCVLE, PPCNONE, {RA, RB}},
{"nabso", XO(31,488,1,0), XORB_MASK, M601, PPCNONE, {RT, RA}},
{"nabso.", XO(31,488,1,1), XORB_MASK, M601, PPCNONE, {RT, RA}},
-{"divdo", XO(31,489,1,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
-{"divdo.", XO(31,489,1,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
+{"divdo", XO(31,489,1,0), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"divdo.", XO(31,489,1,1), XO_MASK, PPC64|PPCVLE, PPCNONE, {RT, RA, RB}},
+
+{"divwo", XO(31,491,1,0), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
+{"divwo.", XO(31,491,1,1), XO_MASK, PPC|PPCVLE, PPCNONE, {RT, RA, RB}},
-{"divwo", XO(31,491,1,0), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
-{"divwo.", XO(31,491,1,1), XO_MASK, PPC, PPCNONE, {RT, RA, RB}},
{"tlbli", X(31,1010), XRTRA_MASK, PPC, TITAN, {RB}},
@@ -4969,7 +5600,7 @@
{"dcbz", X(31,1014), XRT_MASK, PPC, PPCNONE, {RA, RB}},
{"dclz", X(31,1014), XRT_MASK, PPC, PPCNONE, {RA, RB}},
-{"dcbzep", XRT(31,1023,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
+{"dcbzep", XRT(31,1023,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA, RB}},
{"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA, RB}},
@@ -5537,6 +6168,236 @@
const int powerpc_num_opcodes =
sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]);
+/* The VLE opcode table.
+
+ The format of this opcode table is the same as the main opcode table. */
+
+const struct powerpc_opcode vle_opcodes[] = {
+
+{"se_illegal", C(0), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_isync", C(1), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_sc", C(2), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_blr", C_LK(2,0), C_LK_MASK, PPCVLE, PPCNONE, {}},
+{"se_blrl", C_LK(2,1), C_LK_MASK, PPCVLE, PPCNONE, {}},
+{"se_bctr", C_LK(3,0), C_LK_MASK, PPCVLE, PPCNONE, {}},
+{"se_bctrl", C_LK(3,1), C_LK_MASK, PPCVLE, PPCNONE, {}},
+{"se_rfi", C(8), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_rfci", C(9), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_rfdi", C(10), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_rfmci", C(11), C_MASK, PPCVLE, PPCNONE, {}},
+{"se_not", SE_R(0,2), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_neg", SE_R(0,3), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_mflr", SE_R(0,8), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_mtlr", SE_R(0,9), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_mfctr", SE_R(0,10), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_mtctr", SE_R(0,11), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_extzb", SE_R(0,12), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_extsb", SE_R(0,13), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_extzh", SE_R(0,14), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_extsh", SE_R(0,15), SE_R_MASK, PPCVLE, PPCNONE, {RX}},
+{"se_mr", SE_RR(0,1), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_mtar", SE_RR(0,2), SE_RR_MASK, PPCVLE, PPCNONE, {ARX, RY}},
+{"se_mfar", SE_RR(0,3), SE_RR_MASK, PPCVLE, PPCNONE, {RX, ARY}},
+{"se_add", SE_RR(1,0), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_mullw", SE_RR(1,1), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_sub", SE_RR(1,2), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_subf", SE_RR(1,3), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_cmp", SE_RR(3,0), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_cmpl", SE_RR(3,1), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_cmph", SE_RR(3,2), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_cmphl", SE_RR(3,3), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+
+{"e_cmpi", SCI8BF(6,0,21), SCI8BF_MASK, PPCVLE, PPCNONE, {CRD32, RA, SCLSCI8}},
+{"e_cmpli", SCI8BF(6,1,21), SCI8BF_MASK, PPCVLE, PPCNONE, {CRD32, RA, SCLSCI8}},
+{"e_addi", SCI8(6,16), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_subi", SCI8(6,16), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8N}},
+{"e_addi.", SCI8(6,17), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_addic", SCI8(6,18), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_subic", SCI8(6,18), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8N}},
+{"e_addic.", SCI8(6,19), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_subic.", SCI8(6,19), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8N}},
+{"e_mulli", SCI8(6,20), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_subfic", SCI8(6,22), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_subfic.", SCI8(6,23), SCI8_MASK, PPCVLE, PPCNONE, {RT, RA, SCLSCI8}},
+{"e_andi", SCI8(6,24), SCI8_MASK, PPCVLE, PPCNONE, {RA, RS, SCLSCI8}},
+{"e_andi.", SCI8(6,25), SCI8_MASK, PPCVLE, PPCNONE, {RA, RS, SCLSCI8}},
+{"e_nop", SCI8(6,26), 0xffffffff, PPCVLE, PPCNONE, {0}},
+{"e_ori", SCI8(6,26), SCI8_MASK, PPCVLE, PPCNONE, {RA, RS, SCLSCI8}},
+{"e_ori.", SCI8(6,27), SCI8_MASK, PPCVLE, PPCNONE, {RA, RS, SCLSCI8}},
+{"e_xori", SCI8(6,28), SCI8_MASK, PPCVLE, PPCNONE, {RA, RS, SCLSCI8}},
+{"e_xori.", SCI8(6,29), SCI8_MASK, PPCVLE, PPCNONE, {RA, RS, SCLSCI8}},
+{"e_lbzu", OPVUP(6,0), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_lhau", OPVUP(6,3), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_lhzu", OPVUP(6,1), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_lmw", OPVUP(6,8), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_lwzu", OPVUP(6,2), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_stbu", OPVUP(6,4), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_stwu", OPVUP(6,6), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_stmw", OPVUP(6,9), OPVUP_MASK, PPCVLE, PPCNONE, {RT, D8, RA0}},
+{"e_add16i", OP(7), OP_MASK, PPCVLE, PPCNONE, {RT, RA, SI}},
+{"e_la", OP(7), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+{"e_sub16i", OP(7), OP_MASK, PPCVLE, PPCNONE, {RT, RA, NSI}},
+
+{"se_addi", SE_IM5(8,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, OIMM5}},
+{"se_cmpli", SE_IM5(8,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, OIMM5}},
+{"se_subi", SE_IM5(9,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, OIMM5}},
+{"se_subi.", SE_IM5(9,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, OIMM5}},
+{"se_cmpi", SE_IM5(10,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_bmaski", SE_IM5(11,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_andi", SE_IM5(11,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+
+{"e_lbz", OP(12), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+{"e_stb", OP(13), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+{"e_lha", OP(14), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+
+{"se_srw", SE_RR(16,0), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_sraw", SE_RR(16,1), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_slw", SE_RR(16,2), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_nop", SE_RR(17,0), 0xffff, PPCVLE, PPCNONE, {0}},
+{"se_or", SE_RR(17,0), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_andc", SE_RR(17,1), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_and", SE_RR(17,2), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_and.", SE_RR(17,3), SE_RR_MASK, PPCVLE, PPCNONE, {RX, RY}},
+{"se_li", IM7(9), IM7_MASK, PPCVLE, PPCNONE, {RX, UI7}},
+
+{"e_lwz", OP(20), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+{"e_stw", OP(21), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+{"e_lhz", OP(22), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+{"e_sth", OP(23), OP_MASK, PPCVLE, PPCNONE, {RT, D, RA0}},
+
+{"se_bclri", SE_IM5(24,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_bgeni", SE_IM5(24,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_bseti", SE_IM5(25,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_btsti", SE_IM5(25,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_srwi", SE_IM5(26,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_srawi", SE_IM5(26,1), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+{"se_slwi", SE_IM5(27,0), SE_IM5_MASK, PPCVLE, PPCNONE, {RX, UI5}},
+
+{"e_lis", I16L(28,28), I16L_MASK, PPCVLE, PPCNONE, {RD, VLEUIMML}},
+{"e_and2is.", I16L(28,29), I16L_MASK, PPCVLE, PPCNONE, {RD, VLEUIMML}},
+{"e_or2is", I16L(28,26), I16L_MASK, PPCVLE, PPCNONE, {RD, VLEUIMML}},
+{"e_and2i.", I16L(28,25), I16L_MASK, PPCVLE, PPCNONE, {RD, VLEUIMML}},
+{"e_or2i", I16L(28,24), I16L_MASK, PPCVLE, PPCNONE, {RD, VLEUIMML}},
+{"e_cmphl16i", IA16(28,23), IA16_MASK, PPCVLE, PPCNONE, {RA, VLEUIMM}},
+{"e_cmph16i", IA16(28,22), IA16_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_cmpl16i", I16A(28,21), I16A_MASK, PPCVLE, PPCNONE, {RA, VLEUIMM}},
+{"e_cmplwi", I16A(28,21), I16A_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_mull2i", I16A(28,20), I16A_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_cmp16i", IA16(28,19), IA16_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_cmpwi", IA16(28,19), IA16_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_sub2is", I16A(28,18), I16A_MASK, PPCVLE, PPCNONE, {RA, VLENSIMM}},
+{"e_add2is", I16A(28,18), I16A_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_sub2i.", I16A(28,17), I16A_MASK, PPCVLE, PPCNONE, {RA, VLENSIMM}},
+{"e_add2i.", I16A(28,17), I16A_MASK, PPCVLE, PPCNONE, {RA, VLESIMM}},
+{"e_li", LI20(28,0), LI20_MASK, PPCVLE, PPCNONE, {RT, IMM20}},
+{"e_rlwimi", M(29,0), M_MASK, PPCVLE, PPCNONE, {RA, RS, SH, MB, ME}},
+{"e_rlwinm", M(29,1), M_MASK, PPCVLE, PPCNONE, {RA, RT, SH, MBE, ME}},
+{"e_b", BD24(30,0,0), BD24_MASK, PPCVLE, PPCNONE, {B24}},
+{"e_bl", BD24(30,0,1), BD24_MASK, PPCVLE, PPCNONE, {B24}},
+{"e_bdnz", EBD15(30,8,BO32DNZ,0), EBD15_MASK, PPCVLE, PPCNONE, {B15}},
+{"e_bdnzl", EBD15(30,8,BO32DNZ,1), EBD15_MASK, PPCVLE, PPCNONE, {B15}},
+{"e_bdz", EBD15(30,8,BO32DZ,0), EBD15_MASK, PPCVLE, PPCNONE, {B15}},
+{"e_bdzl", EBD15(30,8,BO32DZ,1), EBD15_MASK, PPCVLE, PPCNONE, {B15}},
+{"e_bge", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bgel", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bnl", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bnll", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_blt", EBD15BI(30,8,BO32T,CBLT,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bltl", EBD15BI(30,8,BO32T,CBLT,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bgt", EBD15BI(30,8,BO32T,CBGT,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bgtl", EBD15BI(30,8,BO32T,CBGT,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_ble", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_blel", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bng", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bngl", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bne", EBD15BI(30,8,BO32F,CBEQ,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bnel", EBD15BI(30,8,BO32F,CBEQ,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_beq", EBD15BI(30,8,BO32T,CBEQ,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_beql", EBD15BI(30,8,BO32T,CBEQ,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bso", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bsol", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bun", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bunl", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bns", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bnsl", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bnu", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bnul", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, PPCNONE, {CRS,B15}},
+{"e_bc", BD15(30,8,0), BD15_MASK, PPCVLE, PPCNONE, {BO32, BI32, B15}},
+{"e_bcl", BD15(30,8,1), BD15_MASK, PPCVLE, PPCNONE, {BO32, BI32, B15}},
+
+{"e_bf", EBD15(30,8,BO32F,0), EBD15_MASK, PPCVLE, PPCNONE, {BI32,B15}},
+{"e_bfl", EBD15(30,8,BO32F,1), EBD15_MASK, PPCVLE, PPCNONE, {BI32,B15}},
+{"e_bt", EBD15(30,8,BO32T,0), EBD15_MASK, PPCVLE, PPCNONE, {BI32,B15}},
+{"e_btl", EBD15(30,8,BO32T,1), EBD15_MASK, PPCVLE, PPCNONE, {BI32,B15}},
+
+{"e_cmph", X(31,14), X_MASK, PPCVLE, PPCNONE, {CRD, RA, RB}},
+{"e_cmphl", X(31,46), X_MASK, PPCVLE, PPCNONE, {CRD, RA, RB}},
+{"e_crandc", XL(31,129), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+{"e_crnand", XL(31,225), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+{"e_crnot", XL(31,33), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BBA}},
+{"e_crnor", XL(31,33), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+{"e_crclr", XL(31,193), XL_MASK, PPCVLE, PPCNONE, {BT, BAT, BBA}},
+{"e_crxor", XL(31,193), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+{"e_mcrf", XL(31,16), XL_MASK, PPCVLE, PPCNONE, {CRD, CR}},
+{"e_slwi", EX(31,112), EX_MASK, PPCVLE, PPCNONE, {RA, RS, SH}},
+{"e_slwi.", EX(31,113), EX_MASK, PPCVLE, PPCNONE, {RA, RS, SH}},
+
+{"e_crand", XL(31,257), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+
+{"e_rlw", EX(31,560), EX_MASK, PPCVLE, PPCNONE, {RA, RS, RB}},
+{"e_rlw.", EX(31,561), EX_MASK, PPCVLE, PPCNONE, {RA, RS, RB}},
+
+{"e_crset", XL(31,289), XL_MASK, PPCVLE, PPCNONE, {BT, BAT, BBA}},
+{"e_creqv", XL(31,289), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+
+{"e_rlwi", EX(31,624), EX_MASK, PPCVLE, PPCNONE, {RA, RS, SH}},
+{"e_rlwi.", EX(31,625), EX_MASK, PPCVLE, PPCNONE, {RA, RS, SH}},
+
+{"e_crorc", XL(31,417), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+
+{"e_crmove", XL(31,449), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BBA}},
+{"e_cror", XL(31,449), XL_MASK, PPCVLE, PPCNONE, {BT, BA, BB}},
+
+{"mtmas1", XSPR(31,467,625), XSPR_MASK, PPCVLE, PPCNONE, {RS}},
+
+{"e_srwi", EX(31,1136), EX_MASK, PPCVLE, PPCNONE, {RA, RS, SH}},
+{"e_srwi.", EX(31,1137), EX_MASK, PPCVLE, PPCNONE, {RA, RS, SH}},
+
+{"se_lbz", SD4(8), SD4_MASK, PPCVLE, PPCNONE, {RZ, SE_SD, RX}},
+
+{"se_stb", SD4(9), SD4_MASK, PPCVLE, PPCNONE, {RZ, SE_SD, RX}},
+
+{"se_lhz", SD4(10), SD4_MASK, PPCVLE, PPCNONE, {RZ, SE_SDH, RX}},
+
+{"se_sth", SD4(11), SD4_MASK, PPCVLE, PPCNONE, {RZ, SE_SDH, RX}},
+
+{"se_lwz", SD4(12), SD4_MASK, PPCVLE, PPCNONE, {RZ, SE_SDW, RX}},
+
+{"se_stw", SD4(13), SD4_MASK, PPCVLE, PPCNONE, {RZ, SE_SDW, RX}},
+
+{"se_bge", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bnl", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_ble", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bng", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bne", EBD8IO(28,0,2), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bns", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bnu", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bf", EBD8IO(28,0,0), EBD8IO2_MASK, PPCVLE, PPCNONE, {BI16, B8}},
+{"se_blt", EBD8IO(28,1,0), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bgt", EBD8IO(28,1,1), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_beq", EBD8IO(28,1,2), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bso", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bun", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bt", EBD8IO(28,1,0), EBD8IO2_MASK, PPCVLE, PPCNONE, {BI16, B8}},
+{"se_bc", BD8IO(28), BD8IO_MASK, PPCVLE, PPCNONE, {BO16, BI16, B8}},
+{"se_b", BD8(58,0,0), BD8_MASK, PPCVLE, PPCNONE, {B8}},
+{"se_bl", BD8(58,0,1), BD8_MASK, PPCVLE, PPCNONE, {B8}},
+};
+
+const int vle_num_opcodes =
+ sizeof (vle_opcodes) / sizeof (vle_opcodes[0]);
+
/* The macro table. This is only used by the assembler. */
/* The expressions of the form (-x ! 31) & (x | 31) have the value 0
@@ -5589,6 +6450,18 @@
{"clrrwi.", 3, PPCCOM, "rlwinm. %0,%1,0,0,31-(%2)"},
{"clrlslwi", 4, PPCCOM, "rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"},
{"clrlslwi.",4, PPCCOM, "rlwinm. %0,%1,%3,(%2)-(%3),31-(%3)"},
+
+{"e_extlwi", 4, PPCVLE, "e_rlwinm %0,%1,%3,0,(%2)-1"},
+{"e_extrwi", 4, PPCVLE, "e_rlwinm %0,%1,((%2)+(%3))&((%2)+(%3)<>32),32-(%2),31"},
+{"e_inslwi", 4, PPCVLE, "e_rlwimi %0,%1,(-(%3)!31)&((%3)|31),%3,(%2)+(%3)-1"},
+{"e_insrwi", 4, PPCVLE, "e_rlwimi %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1"},
+{"e_rotlwi", 3, PPCVLE, "e_rlwinm %0,%1,%2,0,31"},
+{"e_rotrwi", 3, PPCVLE, "e_rlwinm %0,%1,(-(%2)!31)&((%2)|31),0,31"},
+{"e_slwi", 3, PPCVLE, "e_rlwinm %0,%1,%2,0,31-(%2)"},
+{"e_srwi", 3, PPCVLE, "e_rlwinm %0,%1,(-(%2)!31)&((%2)|31),%2,31"},
+{"e_clrlwi", 3, PPCVLE, "e_rlwinm %0,%1,0,%2,31"},
+{"e_clrrwi", 3, PPCVLE, "e_rlwinm %0,%1,0,0,31-(%2)"},
+{"e_clrlslwi",4, PPCVLE, "e_rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"},
};
const int powerpc_num_macros =
diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c
index cb54bd4..7fb2519 100644
--- a/opcodes/rl78-decode.c
+++ b/opcodes/rl78-decode.c
@@ -1,10 +1,9 @@
#line 1 "rl78-decode.opc"
/* -*- c -*- */
+#include "sysdep.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-
-#include "config.h"
#include "ansidecl.h"
#include "opcode/rl78.h"
diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc
index 4af2bf3..1fe84a6 100644
--- a/opcodes/rl78-decode.opc
+++ b/opcodes/rl78-decode.opc
@@ -1,9 +1,8 @@
/* -*- c -*- */
+#include "sysdep.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-
-#include "config.h"
#include "ansidecl.h"
#include "opcode/rl78.h"
diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c
index 826235a..3c365ad 100644
--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -1,5 +1,5 @@
/* Disassembler code for Renesas RL78.
- Copyright 2011 Free Software Foundation, Inc.
+ Copyright 2011, 2012 Free Software Foundation, Inc.
Contributed by Red Hat.
Written by DJ Delorie.
@@ -20,6 +20,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
#include "bfd.h"
diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c
index a98de74..00d61e6 100644
--- a/opcodes/rx-decode.c
+++ b/opcodes/rx-decode.c
@@ -1,10 +1,9 @@
#line 1 "rx-decode.opc"
/* -*- c -*- */
+#include "sysdep.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-
-#include "config.h"
#include "ansidecl.h"
#include "opcode/rx.h"
@@ -271,7 +270,7 @@
op[0]);
}
SYNTAX("brk");
-#line 956 "rx-decode.opc"
+#line 955 "rx-decode.opc"
ID(brk);
}
@@ -286,7 +285,7 @@
op[0]);
}
SYNTAX("dbt");
-#line 959 "rx-decode.opc"
+#line 958 "rx-decode.opc"
ID(dbt);
}
@@ -301,7 +300,7 @@
op[0]);
}
SYNTAX("rts");
-#line 745 "rx-decode.opc"
+#line 744 "rx-decode.opc"
ID(rts);
/*----------------------------------------------------------------------*/
@@ -319,7 +318,7 @@
op[0]);
}
SYNTAX("nop");
-#line 751 "rx-decode.opc"
+#line 750 "rx-decode.opc"
ID(nop);
/*----------------------------------------------------------------------*/
@@ -337,7 +336,7 @@
op[0]);
}
SYNTAX("bra.a %a0");
-#line 723 "rx-decode.opc"
+#line 722 "rx-decode.opc"
ID(branch); DC(pc + IMMex(3));
}
@@ -352,7 +351,7 @@
op[0]);
}
SYNTAX("bsr.a %a0");
-#line 739 "rx-decode.opc"
+#line 738 "rx-decode.opc"
ID(jsr); DC(pc + IMMex(3));
}
@@ -369,13 +368,13 @@
op_semantics_1:
{
/** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */
-#line 519 "rx-decode.opc"
+#line 518 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 519 "rx-decode.opc"
+#line 518 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 519 "rx-decode.opc"
+#line 518 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 519 "rx-decode.opc"
+#line 518 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -388,7 +387,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sub %2%S2, %1");
-#line 519 "rx-decode.opc"
+#line 518 "rx-decode.opc"
ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC;
}
@@ -430,13 +429,13 @@
op_semantics_2:
{
/** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */
-#line 507 "rx-decode.opc"
+#line 506 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 507 "rx-decode.opc"
+#line 506 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 507 "rx-decode.opc"
+#line 506 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 507 "rx-decode.opc"
+#line 506 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -449,7 +448,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("cmp %2%S2, %1");
-#line 507 "rx-decode.opc"
+#line 506 "rx-decode.opc"
ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -494,13 +493,13 @@
op_semantics_3:
{
/** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */
-#line 483 "rx-decode.opc"
+#line 482 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 483 "rx-decode.opc"
+#line 482 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 483 "rx-decode.opc"
+#line 482 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 483 "rx-decode.opc"
+#line 482 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -513,7 +512,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add %1%S1, %0");
-#line 483 "rx-decode.opc"
+#line 482 "rx-decode.opc"
ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC;
}
@@ -555,13 +554,13 @@
op_semantics_4:
{
/** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */
-#line 588 "rx-decode.opc"
+#line 587 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 588 "rx-decode.opc"
+#line 587 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 588 "rx-decode.opc"
+#line 587 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 588 "rx-decode.opc"
+#line 587 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -574,7 +573,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul %1%S1, %0");
-#line 588 "rx-decode.opc"
+#line 587 "rx-decode.opc"
ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____;
}
@@ -616,13 +615,13 @@
op_semantics_5:
{
/** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */
-#line 396 "rx-decode.opc"
+#line 395 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 396 "rx-decode.opc"
+#line 395 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 396 "rx-decode.opc"
+#line 395 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 396 "rx-decode.opc"
+#line 395 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -635,7 +634,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and %1%S1, %0");
-#line 396 "rx-decode.opc"
+#line 395 "rx-decode.opc"
ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
}
@@ -677,13 +676,13 @@
op_semantics_6:
{
/** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */
-#line 414 "rx-decode.opc"
+#line 413 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 414 "rx-decode.opc"
+#line 413 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 414 "rx-decode.opc"
+#line 413 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 414 "rx-decode.opc"
+#line 413 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -696,7 +695,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or %1%S1, %0");
-#line 414 "rx-decode.opc"
+#line 413 "rx-decode.opc"
ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
}
@@ -742,13 +741,13 @@
op_semantics_7:
{
/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
-#line 532 "rx-decode.opc"
+#line 531 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 532 "rx-decode.opc"
+#line 531 "rx-decode.opc"
int sp AU = op[1] & 0x03;
-#line 532 "rx-decode.opc"
+#line 531 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 532 "rx-decode.opc"
+#line 531 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -761,7 +760,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sbb %1%S1, %0");
-#line 532 "rx-decode.opc"
+#line 531 "rx-decode.opc"
ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -779,13 +778,13 @@
op_semantics_8:
{
/** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */
-#line 561 "rx-decode.opc"
+#line 560 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 561 "rx-decode.opc"
+#line 560 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 561 "rx-decode.opc"
+#line 560 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 561 "rx-decode.opc"
+#line 560 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -798,7 +797,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("max %1%S1, %0");
-#line 561 "rx-decode.opc"
+#line 560 "rx-decode.opc"
ID(max); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -816,13 +815,13 @@
op_semantics_9:
{
/** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */
-#line 573 "rx-decode.opc"
+#line 572 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 573 "rx-decode.opc"
+#line 572 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 573 "rx-decode.opc"
+#line 572 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 573 "rx-decode.opc"
+#line 572 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -835,7 +834,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("min %1%S1, %0");
-#line 573 "rx-decode.opc"
+#line 572 "rx-decode.opc"
ID(min); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -853,13 +852,13 @@
op_semantics_10:
{
/** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */
-#line 603 "rx-decode.opc"
+#line 602 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 603 "rx-decode.opc"
+#line 602 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 603 "rx-decode.opc"
+#line 602 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 603 "rx-decode.opc"
+#line 602 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -872,7 +871,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emul %1%S1, %0");
-#line 603 "rx-decode.opc"
+#line 602 "rx-decode.opc"
ID(emul); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -890,13 +889,13 @@
op_semantics_11:
{
/** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */
-#line 615 "rx-decode.opc"
+#line 614 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 615 "rx-decode.opc"
+#line 614 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 615 "rx-decode.opc"
+#line 614 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 615 "rx-decode.opc"
+#line 614 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -909,7 +908,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emulu %1%S1, %0");
-#line 615 "rx-decode.opc"
+#line 614 "rx-decode.opc"
ID(emulu); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -927,13 +926,13 @@
op_semantics_12:
{
/** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */
-#line 627 "rx-decode.opc"
+#line 626 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 627 "rx-decode.opc"
+#line 626 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 627 "rx-decode.opc"
+#line 626 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 627 "rx-decode.opc"
+#line 626 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -946,7 +945,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("div %1%S1, %0");
-#line 627 "rx-decode.opc"
+#line 626 "rx-decode.opc"
ID(div); SPm(ss, rsrc, mx); DR(rdst); F_O___;
/*----------------------------------------------------------------------*/
@@ -964,13 +963,13 @@
op_semantics_13:
{
/** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */
-#line 639 "rx-decode.opc"
+#line 638 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 639 "rx-decode.opc"
+#line 638 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 639 "rx-decode.opc"
+#line 638 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 639 "rx-decode.opc"
+#line 638 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -983,7 +982,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("divu %1%S1, %0");
-#line 639 "rx-decode.opc"
+#line 638 "rx-decode.opc"
ID(divu); SPm(ss, rsrc, mx); DR(rdst); F_O___;
/*----------------------------------------------------------------------*/
@@ -1001,13 +1000,13 @@
op_semantics_14:
{
/** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */
-#line 450 "rx-decode.opc"
+#line 449 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 450 "rx-decode.opc"
+#line 449 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 450 "rx-decode.opc"
+#line 449 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 450 "rx-decode.opc"
+#line 449 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1020,7 +1019,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("tst %1%S1, %2");
-#line 450 "rx-decode.opc"
+#line 449 "rx-decode.opc"
ID(and); SPm(ss, rsrc, mx); S2R(rdst); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -1038,13 +1037,13 @@
op_semantics_15:
{
/** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */
-#line 429 "rx-decode.opc"
+#line 428 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 429 "rx-decode.opc"
+#line 428 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 429 "rx-decode.opc"
+#line 428 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 429 "rx-decode.opc"
+#line 428 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1057,7 +1056,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xor %1%S1, %0");
-#line 429 "rx-decode.opc"
+#line 428 "rx-decode.opc"
ID(xor); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -1075,13 +1074,13 @@
op_semantics_16:
{
/** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */
-#line 363 "rx-decode.opc"
+#line 362 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 363 "rx-decode.opc"
+#line 362 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 363 "rx-decode.opc"
+#line 362 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 363 "rx-decode.opc"
+#line 362 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1094,7 +1093,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xchg %1%S1, %0");
-#line 363 "rx-decode.opc"
+#line 362 "rx-decode.opc"
ID(xchg); DR(rdst); SPm(ss, rsrc, mx);
/*----------------------------------------------------------------------*/
@@ -1112,13 +1111,13 @@
op_semantics_17:
{
/** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */
-#line 868 "rx-decode.opc"
+#line 867 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 868 "rx-decode.opc"
+#line 867 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 868 "rx-decode.opc"
+#line 867 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 868 "rx-decode.opc"
+#line 867 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1131,7 +1130,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("itof %1%S1, %0");
-#line 868 "rx-decode.opc"
+#line 867 "rx-decode.opc"
ID(itof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -2339,11 +2338,11 @@
op_semantics_18:
{
/** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */
-#line 471 "rx-decode.opc"
+#line 470 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 471 "rx-decode.opc"
+#line 470 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 471 "rx-decode.opc"
+#line 470 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -2355,7 +2354,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("adc %1%S1, %0");
-#line 471 "rx-decode.opc"
+#line 470 "rx-decode.opc"
ID(adc); SPm(ss, rsrc, 2); DR(rdst); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -3456,7 +3455,7 @@
case 0x0f:
{
/** 0000 1dsp bra.s %a0 */
-#line 714 "rx-decode.opc"
+#line 713 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
if (trace)
{
@@ -3466,7 +3465,7 @@
printf (" dsp = 0x%x\n", dsp);
}
SYNTAX("bra.s %a0");
-#line 714 "rx-decode.opc"
+#line 713 "rx-decode.opc"
ID(branch); DC(pc + dsp3map[dsp]);
}
@@ -3489,9 +3488,9 @@
case 0x1f:
{
/** 0001 n dsp b%1.s %a0 */
-#line 704 "rx-decode.opc"
+#line 703 "rx-decode.opc"
int n AU = (op[0] >> 3) & 0x01;
-#line 704 "rx-decode.opc"
+#line 703 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
if (trace)
{
@@ -3502,7 +3501,7 @@
printf (" dsp = 0x%x\n", dsp);
}
SYNTAX("b%1.s %a0");
-#line 704 "rx-decode.opc"
+#line 703 "rx-decode.opc"
ID(branch); Scc(n); DC(pc + dsp3map[dsp]);
}
@@ -3524,7 +3523,7 @@
case 0x2f:
{
/** 0010 cond b%1.b %a0 */
-#line 707 "rx-decode.opc"
+#line 706 "rx-decode.opc"
int cond AU = op[0] & 0x0f;
if (trace)
{
@@ -3534,7 +3533,7 @@
printf (" cond = 0x%x\n", cond);
}
SYNTAX("b%1.b %a0");
-#line 707 "rx-decode.opc"
+#line 706 "rx-decode.opc"
ID(branch); Scc(cond); DC(pc + IMMex (1));
}
@@ -3549,7 +3548,7 @@
op[0]);
}
SYNTAX("bra.b %a0");
-#line 717 "rx-decode.opc"
+#line 716 "rx-decode.opc"
ID(branch); DC(pc + IMMex(1));
}
@@ -3564,7 +3563,7 @@
op[0]);
}
SYNTAX("bra.w %a0");
-#line 720 "rx-decode.opc"
+#line 719 "rx-decode.opc"
ID(branch); DC(pc + IMMex(2));
}
@@ -3579,7 +3578,7 @@
op[0]);
}
SYNTAX("bsr.w %a0");
-#line 736 "rx-decode.opc"
+#line 735 "rx-decode.opc"
ID(jsr); DC(pc + IMMex(2));
}
@@ -3588,7 +3587,7 @@
case 0x3b:
{
/** 0011 101c b%1.w %a0 */
-#line 710 "rx-decode.opc"
+#line 709 "rx-decode.opc"
int c AU = op[0] & 0x01;
if (trace)
{
@@ -3598,7 +3597,7 @@
printf (" c = 0x%x\n", c);
}
SYNTAX("b%1.w %a0");
-#line 710 "rx-decode.opc"
+#line 709 "rx-decode.opc"
ID(branch); Scc(c); DC(pc + IMMex (2));
@@ -3612,13 +3611,13 @@
op_semantics_19:
{
/** 0011 11sz d dst sppp mov%s #%1, %0 */
-#line 284 "rx-decode.opc"
+#line 283 "rx-decode.opc"
int sz AU = op[0] & 0x03;
-#line 284 "rx-decode.opc"
+#line 283 "rx-decode.opc"
int d AU = (op[1] >> 7) & 0x01;
-#line 284 "rx-decode.opc"
+#line 283 "rx-decode.opc"
int dst AU = (op[1] >> 4) & 0x07;
-#line 284 "rx-decode.opc"
+#line 283 "rx-decode.opc"
int sppp AU = op[1] & 0x0f;
if (trace)
{
@@ -3631,7 +3630,7 @@
printf (" sppp = 0x%x\n", sppp);
}
SYNTAX("mov%s #%1, %0");
-#line 284 "rx-decode.opc"
+#line 283 "rx-decode.opc"
ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F_____;
}
@@ -3663,9 +3662,9 @@
case 0x00:
{
/** 0011 1111 rega regb rtsd #%1, %2-%0 */
-#line 381 "rx-decode.opc"
+#line 380 "rx-decode.opc"
int rega AU = (op[1] >> 4) & 0x0f;
-#line 381 "rx-decode.opc"
+#line 380 "rx-decode.opc"
int regb AU = op[1] & 0x0f;
if (trace)
{
@@ -3676,7 +3675,7 @@
printf (" regb = 0x%x\n", regb);
}
SYNTAX("rtsd #%1, %2-%0");
-#line 381 "rx-decode.opc"
+#line 380 "rx-decode.opc"
ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
/*----------------------------------------------------------------------*/
@@ -3694,11 +3693,11 @@
op_semantics_20:
{
/** 0100 00ss rsrc rdst sub %2%S2, %1 */
-#line 516 "rx-decode.opc"
+#line 515 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 516 "rx-decode.opc"
+#line 515 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 516 "rx-decode.opc"
+#line 515 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3710,7 +3709,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sub %2%S2, %1");
-#line 516 "rx-decode.opc"
+#line 515 "rx-decode.opc"
ID(sub); S2P(ss, rsrc); SR(rdst); DR(rdst); F_OSZC;
}
@@ -3752,11 +3751,11 @@
op_semantics_21:
{
/** 0100 01ss rsrc rdst cmp %2%S2, %1 */
-#line 504 "rx-decode.opc"
+#line 503 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 504 "rx-decode.opc"
+#line 503 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 504 "rx-decode.opc"
+#line 503 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3768,7 +3767,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("cmp %2%S2, %1");
-#line 504 "rx-decode.opc"
+#line 503 "rx-decode.opc"
ID(sub); S2P(ss, rsrc); SR(rdst); F_OSZC;
}
@@ -3810,11 +3809,11 @@
op_semantics_22:
{
/** 0100 10ss rsrc rdst add %1%S1, %0 */
-#line 480 "rx-decode.opc"
+#line 479 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 480 "rx-decode.opc"
+#line 479 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 480 "rx-decode.opc"
+#line 479 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3826,7 +3825,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add %1%S1, %0");
-#line 480 "rx-decode.opc"
+#line 479 "rx-decode.opc"
ID(add); SP(ss, rsrc); DR(rdst); F_OSZC;
}
@@ -3868,11 +3867,11 @@
op_semantics_23:
{
/** 0100 11ss rsrc rdst mul %1%S1, %0 */
-#line 585 "rx-decode.opc"
+#line 584 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 585 "rx-decode.opc"
+#line 584 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 585 "rx-decode.opc"
+#line 584 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3884,7 +3883,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul %1%S1, %0");
-#line 585 "rx-decode.opc"
+#line 584 "rx-decode.opc"
ID(mul); SP(ss, rsrc); DR(rdst); F_____;
}
@@ -3926,11 +3925,11 @@
op_semantics_24:
{
/** 0101 00ss rsrc rdst and %1%S1, %0 */
-#line 393 "rx-decode.opc"
+#line 392 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 393 "rx-decode.opc"
+#line 392 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 393 "rx-decode.opc"
+#line 392 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3942,7 +3941,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and %1%S1, %0");
-#line 393 "rx-decode.opc"
+#line 392 "rx-decode.opc"
ID(and); SP(ss, rsrc); DR(rdst); F__SZ_;
}
@@ -3984,11 +3983,11 @@
op_semantics_25:
{
/** 0101 01ss rsrc rdst or %1%S1, %0 */
-#line 411 "rx-decode.opc"
+#line 410 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 411 "rx-decode.opc"
+#line 410 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 411 "rx-decode.opc"
+#line 410 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4000,7 +3999,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or %1%S1, %0");
-#line 411 "rx-decode.opc"
+#line 410 "rx-decode.opc"
ID(or); SP(ss, rsrc); DR(rdst); F__SZ_;
}
@@ -4042,13 +4041,13 @@
op_semantics_26:
{
/** 0101 1 s ss rsrc rdst movu%s %1, %0 */
-#line 332 "rx-decode.opc"
+#line 331 "rx-decode.opc"
int s AU = (op[0] >> 2) & 0x01;
-#line 332 "rx-decode.opc"
+#line 331 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 332 "rx-decode.opc"
+#line 331 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 332 "rx-decode.opc"
+#line 331 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4061,7 +4060,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movu%s %1, %0");
-#line 332 "rx-decode.opc"
+#line 331 "rx-decode.opc"
ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F_____;
}
@@ -4138,9 +4137,9 @@
case 0x00:
{
/** 0110 0000 immm rdst sub #%2, %0 */
-#line 513 "rx-decode.opc"
+#line 512 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 513 "rx-decode.opc"
+#line 512 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4151,7 +4150,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sub #%2, %0");
-#line 513 "rx-decode.opc"
+#line 512 "rx-decode.opc"
ID(sub); S2C(immm); SR(rdst); DR(rdst); F_OSZC;
}
@@ -4165,9 +4164,9 @@
case 0x00:
{
/** 0110 0001 immm rdst cmp #%2, %1 */
-#line 495 "rx-decode.opc"
+#line 494 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 495 "rx-decode.opc"
+#line 494 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4178,7 +4177,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("cmp #%2, %1");
-#line 495 "rx-decode.opc"
+#line 494 "rx-decode.opc"
ID(sub); S2C(immm); SR(rdst); F_OSZC;
}
@@ -4192,9 +4191,9 @@
case 0x00:
{
/** 0110 0010 immm rdst add #%1, %0 */
-#line 477 "rx-decode.opc"
+#line 476 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 477 "rx-decode.opc"
+#line 476 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4205,7 +4204,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add #%1, %0");
-#line 477 "rx-decode.opc"
+#line 476 "rx-decode.opc"
ID(add); SC(immm); DR(rdst); F_OSZC;
}
@@ -4219,9 +4218,9 @@
case 0x00:
{
/** 0110 0011 immm rdst mul #%1, %0 */
-#line 579 "rx-decode.opc"
+#line 578 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 579 "rx-decode.opc"
+#line 578 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4232,7 +4231,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul #%1, %0");
-#line 579 "rx-decode.opc"
+#line 578 "rx-decode.opc"
ID(mul); DR(rdst); SC(immm); F_____;
}
@@ -4246,9 +4245,9 @@
case 0x00:
{
/** 0110 0100 immm rdst and #%1, %0 */
-#line 387 "rx-decode.opc"
+#line 386 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 387 "rx-decode.opc"
+#line 386 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4259,7 +4258,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and #%1, %0");
-#line 387 "rx-decode.opc"
+#line 386 "rx-decode.opc"
ID(and); SC(immm); DR(rdst); F__SZ_;
}
@@ -4273,9 +4272,9 @@
case 0x00:
{
/** 0110 0101 immm rdst or #%1, %0 */
-#line 405 "rx-decode.opc"
+#line 404 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 405 "rx-decode.opc"
+#line 404 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4286,7 +4285,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or #%1, %0");
-#line 405 "rx-decode.opc"
+#line 404 "rx-decode.opc"
ID(or); SC(immm); DR(rdst); F__SZ_;
}
@@ -4300,9 +4299,9 @@
case 0x00:
{
/** 0110 0110 immm rdst mov%s #%1, %0 */
-#line 281 "rx-decode.opc"
+#line 280 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 281 "rx-decode.opc"
+#line 280 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4313,7 +4312,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s #%1, %0");
-#line 281 "rx-decode.opc"
+#line 280 "rx-decode.opc"
ID(mov); DR(rdst); SC(immm); F_____;
}
@@ -4330,7 +4329,7 @@
op[0]);
}
SYNTAX("rtsd #%1");
-#line 378 "rx-decode.opc"
+#line 377 "rx-decode.opc"
ID(rtsd); SC(IMM(1) * 4);
}
@@ -4343,11 +4342,11 @@
op_semantics_27:
{
/** 0110 100i mmmm rdst shlr #%2, %0 */
-#line 665 "rx-decode.opc"
+#line 664 "rx-decode.opc"
int i AU = op[0] & 0x01;
-#line 665 "rx-decode.opc"
+#line 664 "rx-decode.opc"
int mmmm AU = (op[1] >> 4) & 0x0f;
-#line 665 "rx-decode.opc"
+#line 664 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4359,7 +4358,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shlr #%2, %0");
-#line 665 "rx-decode.opc"
+#line 664 "rx-decode.opc"
ID(shlr); S2C(i*16+mmmm); SR(rdst); DR(rdst); F__SZC;
}
@@ -4383,11 +4382,11 @@
op_semantics_28:
{
/** 0110 101i mmmm rdst shar #%2, %0 */
-#line 655 "rx-decode.opc"
+#line 654 "rx-decode.opc"
int i AU = op[0] & 0x01;
-#line 655 "rx-decode.opc"
+#line 654 "rx-decode.opc"
int mmmm AU = (op[1] >> 4) & 0x0f;
-#line 655 "rx-decode.opc"
+#line 654 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4399,7 +4398,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shar #%2, %0");
-#line 655 "rx-decode.opc"
+#line 654 "rx-decode.opc"
ID(shar); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_0SZC;
}
@@ -4423,11 +4422,11 @@
op_semantics_29:
{
/** 0110 110i mmmm rdst shll #%2, %0 */
-#line 645 "rx-decode.opc"
+#line 644 "rx-decode.opc"
int i AU = op[0] & 0x01;
-#line 645 "rx-decode.opc"
+#line 644 "rx-decode.opc"
int mmmm AU = (op[1] >> 4) & 0x0f;
-#line 645 "rx-decode.opc"
+#line 644 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4439,7 +4438,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shll #%2, %0");
-#line 645 "rx-decode.opc"
+#line 644 "rx-decode.opc"
ID(shll); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_OSZC;
}
@@ -4462,9 +4461,9 @@
case 0x00:
{
/** 0110 1110 dsta dstb pushm %1-%2 */
-#line 345 "rx-decode.opc"
+#line 344 "rx-decode.opc"
int dsta AU = (op[1] >> 4) & 0x0f;
-#line 345 "rx-decode.opc"
+#line 344 "rx-decode.opc"
int dstb AU = op[1] & 0x0f;
if (trace)
{
@@ -4475,7 +4474,7 @@
printf (" dstb = 0x%x\n", dstb);
}
SYNTAX("pushm %1-%2");
-#line 345 "rx-decode.opc"
+#line 344 "rx-decode.opc"
ID(pushm); SR(dsta); S2R(dstb); F_____;
}
@@ -4489,9 +4488,9 @@
case 0x00:
{
/** 0110 1111 dsta dstb popm %1-%2 */
-#line 342 "rx-decode.opc"
+#line 341 "rx-decode.opc"
int dsta AU = (op[1] >> 4) & 0x0f;
-#line 342 "rx-decode.opc"
+#line 341 "rx-decode.opc"
int dstb AU = op[1] & 0x0f;
if (trace)
{
@@ -4502,7 +4501,7 @@
printf (" dstb = 0x%x\n", dstb);
}
SYNTAX("popm %1-%2");
-#line 342 "rx-decode.opc"
+#line 341 "rx-decode.opc"
ID(popm); SR(dsta); S2R(dstb); F_____;
}
@@ -4517,11 +4516,11 @@
op_semantics_30:
{
/** 0111 00im rsrc rdst add #%1, %2, %0 */
-#line 486 "rx-decode.opc"
+#line 485 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 486 "rx-decode.opc"
+#line 485 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 486 "rx-decode.opc"
+#line 485 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4533,7 +4532,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add #%1, %2, %0");
-#line 486 "rx-decode.opc"
+#line 485 "rx-decode.opc"
ID(add); SC(IMMex(im)); S2R(rsrc); DR(rdst); F_OSZC;
}
@@ -4575,9 +4574,9 @@
op_semantics_31:
{
/** 0111 01im 0000 rsrc cmp #%2, %1%S1 */
-#line 498 "rx-decode.opc"
+#line 497 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 498 "rx-decode.opc"
+#line 497 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -4588,7 +4587,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("cmp #%2, %1%S1");
-#line 498 "rx-decode.opc"
+#line 497 "rx-decode.opc"
ID(sub); SR(rsrc); S2C(IMMex(im)); F_OSZC;
}
@@ -4597,9 +4596,9 @@
op_semantics_32:
{
/** 0111 01im 0001rdst mul #%1, %0 */
-#line 582 "rx-decode.opc"
+#line 581 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 582 "rx-decode.opc"
+#line 581 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4610,7 +4609,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul #%1, %0");
-#line 582 "rx-decode.opc"
+#line 581 "rx-decode.opc"
ID(mul); DR(rdst); SC(IMMex(im)); F_____;
}
@@ -4619,9 +4618,9 @@
op_semantics_33:
{
/** 0111 01im 0010 rdst and #%1, %0 */
-#line 390 "rx-decode.opc"
+#line 389 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 390 "rx-decode.opc"
+#line 389 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4632,7 +4631,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and #%1, %0");
-#line 390 "rx-decode.opc"
+#line 389 "rx-decode.opc"
ID(and); SC(IMMex(im)); DR(rdst); F__SZ_;
}
@@ -4641,9 +4640,9 @@
op_semantics_34:
{
/** 0111 01im 0011 rdst or #%1, %0 */
-#line 408 "rx-decode.opc"
+#line 407 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 408 "rx-decode.opc"
+#line 407 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4654,7 +4653,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or #%1, %0");
-#line 408 "rx-decode.opc"
+#line 407 "rx-decode.opc"
ID(or); SC(IMMex(im)); DR(rdst); F__SZ_;
}
@@ -4756,7 +4755,7 @@
case 0x4f:
{
/** 0111 0101 0100 rdst mov%s #%1, %0 */
-#line 262 "rx-decode.opc"
+#line 261 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4766,7 +4765,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s #%1, %0");
-#line 262 "rx-decode.opc"
+#line 261 "rx-decode.opc"
ID(mov); DR(rdst); SC(IMM (1)); F_____;
}
@@ -4789,7 +4788,7 @@
case 0x5f:
{
/** 0111 0101 0101 rsrc cmp #%2, %1 */
-#line 501 "rx-decode.opc"
+#line 500 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -4799,7 +4798,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("cmp #%2, %1");
-#line 501 "rx-decode.opc"
+#line 500 "rx-decode.opc"
ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
}
@@ -4814,7 +4813,7 @@
op[0], op[1]);
}
SYNTAX("int #%1");
-#line 962 "rx-decode.opc"
+#line 961 "rx-decode.opc"
ID(int); SC(IMM(1));
}
@@ -4826,7 +4825,7 @@
case 0x00:
{
/** 0111 0101 0111 0000 0000 immm mvtipl #%1 */
-#line 929 "rx-decode.opc"
+#line 928 "rx-decode.opc"
int immm AU = op[2] & 0x0f;
if (trace)
{
@@ -4836,7 +4835,7 @@
printf (" immm = 0x%x\n", immm);
}
SYNTAX("mvtipl #%1");
-#line 929 "rx-decode.opc"
+#line 928 "rx-decode.opc"
ID(mvtipl); SC(immm);
}
@@ -4893,11 +4892,11 @@
op_semantics_35:
{
/** 0111 100b ittt rdst bset #%1, %0 */
-#line 880 "rx-decode.opc"
+#line 879 "rx-decode.opc"
int b AU = op[0] & 0x01;
-#line 880 "rx-decode.opc"
+#line 879 "rx-decode.opc"
int ittt AU = (op[1] >> 4) & 0x0f;
-#line 880 "rx-decode.opc"
+#line 879 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4909,7 +4908,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bset #%1, %0");
-#line 880 "rx-decode.opc"
+#line 879 "rx-decode.opc"
ID(bset); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
@@ -4934,11 +4933,11 @@
op_semantics_36:
{
/** 0111 101b ittt rdst bclr #%1, %0 */
-#line 890 "rx-decode.opc"
+#line 889 "rx-decode.opc"
int b AU = op[0] & 0x01;
-#line 890 "rx-decode.opc"
+#line 889 "rx-decode.opc"
int ittt AU = (op[1] >> 4) & 0x0f;
-#line 890 "rx-decode.opc"
+#line 889 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4950,7 +4949,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bclr #%1, %0");
-#line 890 "rx-decode.opc"
+#line 889 "rx-decode.opc"
ID(bclr); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
@@ -4975,11 +4974,11 @@
op_semantics_37:
{
/** 0111 110b ittt rdst btst #%2, %1 */
-#line 900 "rx-decode.opc"
+#line 899 "rx-decode.opc"
int b AU = op[0] & 0x01;
-#line 900 "rx-decode.opc"
+#line 899 "rx-decode.opc"
int ittt AU = (op[1] >> 4) & 0x0f;
-#line 900 "rx-decode.opc"
+#line 899 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4991,7 +4990,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("btst #%2, %1");
-#line 900 "rx-decode.opc"
+#line 899 "rx-decode.opc"
ID(btst); BWL(LSIZE); S2C(b*16+ittt); SR(rdst); F___ZC;
@@ -5015,7 +5014,7 @@
case 0x00:
{
/** 0111 1110 0000 rdst not %0 */
-#line 435 "rx-decode.opc"
+#line 434 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5025,7 +5024,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("not %0");
-#line 435 "rx-decode.opc"
+#line 434 "rx-decode.opc"
ID(xor); DR(rdst); SR(rdst); S2C(~0); F__SZ_;
}
@@ -5033,7 +5032,7 @@
case 0x10:
{
/** 0111 1110 0001 rdst neg %0 */
-#line 456 "rx-decode.opc"
+#line 455 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5043,7 +5042,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("neg %0");
-#line 456 "rx-decode.opc"
+#line 455 "rx-decode.opc"
ID(sub); DR(rdst); SC(0); S2R(rdst); F_OSZC;
}
@@ -5051,7 +5050,7 @@
case 0x20:
{
/** 0111 1110 0010 rdst abs %0 */
-#line 538 "rx-decode.opc"
+#line 537 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5061,7 +5060,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("abs %0");
-#line 538 "rx-decode.opc"
+#line 537 "rx-decode.opc"
ID(abs); DR(rdst); SR(rdst); F_OSZ_;
}
@@ -5069,7 +5068,7 @@
case 0x30:
{
/** 0111 1110 0011 rdst sat %0 */
-#line 820 "rx-decode.opc"
+#line 819 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5079,7 +5078,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sat %0");
-#line 820 "rx-decode.opc"
+#line 819 "rx-decode.opc"
ID(sat); DR (rdst);
}
@@ -5087,7 +5086,7 @@
case 0x40:
{
/** 0111 1110 0100 rdst rorc %0 */
-#line 680 "rx-decode.opc"
+#line 679 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5097,7 +5096,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rorc %0");
-#line 680 "rx-decode.opc"
+#line 679 "rx-decode.opc"
ID(rorc); DR(rdst); F__SZC;
}
@@ -5105,7 +5104,7 @@
case 0x50:
{
/** 0111 1110 0101 rdst rolc %0 */
-#line 677 "rx-decode.opc"
+#line 676 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5115,7 +5114,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rolc %0");
-#line 677 "rx-decode.opc"
+#line 676 "rx-decode.opc"
ID(rolc); DR(rdst); F__SZC;
}
@@ -5125,9 +5124,9 @@
case 0xa0:
{
/** 0111 1110 10sz rsrc push%s %1 */
-#line 351 "rx-decode.opc"
+#line 350 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 351 "rx-decode.opc"
+#line 350 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -5138,7 +5137,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("push%s %1");
-#line 351 "rx-decode.opc"
+#line 350 "rx-decode.opc"
ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F_____;
}
@@ -5146,7 +5145,7 @@
case 0xb0:
{
/** 0111 1110 1011 rdst pop %0 */
-#line 348 "rx-decode.opc"
+#line 347 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5156,7 +5155,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("pop %0");
-#line 348 "rx-decode.opc"
+#line 347 "rx-decode.opc"
ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(rdst); F_____;
}
@@ -5165,7 +5164,7 @@
case 0xd0:
{
/** 0111 1110 110 crsrc pushc %1 */
-#line 935 "rx-decode.opc"
+#line 934 "rx-decode.opc"
int crsrc AU = op[1] & 0x1f;
if (trace)
{
@@ -5175,7 +5174,7 @@
printf (" crsrc = 0x%x\n", crsrc);
}
SYNTAX("pushc %1");
-#line 935 "rx-decode.opc"
+#line 934 "rx-decode.opc"
ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(crsrc + 16);
}
@@ -5184,7 +5183,7 @@
case 0xf0:
{
/** 0111 1110 111 crdst popc %0 */
-#line 932 "rx-decode.opc"
+#line 931 "rx-decode.opc"
int crdst AU = op[1] & 0x1f;
if (trace)
{
@@ -5194,7 +5193,7 @@
printf (" crdst = 0x%x\n", crdst);
}
SYNTAX("popc %0");
-#line 932 "rx-decode.opc"
+#line 931 "rx-decode.opc"
ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
}
@@ -5224,7 +5223,7 @@
case 0x0f:
{
/** 0111 1111 0000 rsrc jmp %0 */
-#line 730 "rx-decode.opc"
+#line 729 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -5234,7 +5233,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("jmp %0");
-#line 730 "rx-decode.opc"
+#line 729 "rx-decode.opc"
ID(branch); DR(rsrc);
}
@@ -5257,7 +5256,7 @@
case 0x1f:
{
/** 0111 1111 0001 rsrc jsr %0 */
-#line 733 "rx-decode.opc"
+#line 732 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -5267,7 +5266,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("jsr %0");
-#line 733 "rx-decode.opc"
+#line 732 "rx-decode.opc"
ID(jsr); DR(rsrc);
}
@@ -5290,7 +5289,7 @@
case 0x4f:
{
/** 0111 1111 0100 rsrc bra.l %0 */
-#line 726 "rx-decode.opc"
+#line 725 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -5300,7 +5299,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bra.l %0");
-#line 726 "rx-decode.opc"
+#line 725 "rx-decode.opc"
ID(branchrel); DR(rsrc);
@@ -5324,7 +5323,7 @@
case 0x5f:
{
/** 0111 1111 0101 rsrc bsr.l %0 */
-#line 742 "rx-decode.opc"
+#line 741 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -5334,7 +5333,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bsr.l %0");
-#line 742 "rx-decode.opc"
+#line 741 "rx-decode.opc"
ID(jsrrel); DR(rsrc);
}
@@ -5344,7 +5343,7 @@
case 0x82:
{
/** 0111 1111 1000 00sz suntil%s */
-#line 766 "rx-decode.opc"
+#line 765 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -5354,7 +5353,7 @@
printf (" sz = 0x%x\n", sz);
}
SYNTAX("suntil%s");
-#line 766 "rx-decode.opc"
+#line 765 "rx-decode.opc"
ID(suntil); BWL(sz); F___ZC;
}
@@ -5369,7 +5368,7 @@
op[0], op[1]);
}
SYNTAX("scmpu");
-#line 757 "rx-decode.opc"
+#line 756 "rx-decode.opc"
ID(scmpu); F___ZC;
}
@@ -5379,7 +5378,7 @@
case 0x86:
{
/** 0111 1111 1000 01sz swhile%s */
-#line 769 "rx-decode.opc"
+#line 768 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -5389,7 +5388,7 @@
printf (" sz = 0x%x\n", sz);
}
SYNTAX("swhile%s");
-#line 769 "rx-decode.opc"
+#line 768 "rx-decode.opc"
ID(swhile); BWL(sz); F___ZC;
}
@@ -5404,7 +5403,7 @@
op[0], op[1]);
}
SYNTAX("smovu");
-#line 760 "rx-decode.opc"
+#line 759 "rx-decode.opc"
ID(smovu);
}
@@ -5414,7 +5413,7 @@
case 0x8a:
{
/** 0111 1111 1000 10sz sstr%s */
-#line 775 "rx-decode.opc"
+#line 774 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -5424,7 +5423,7 @@
printf (" sz = 0x%x\n", sz);
}
SYNTAX("sstr%s");
-#line 775 "rx-decode.opc"
+#line 774 "rx-decode.opc"
ID(sstr); BWL(sz);
/*----------------------------------------------------------------------*/
@@ -5442,7 +5441,7 @@
op[0], op[1]);
}
SYNTAX("smovb");
-#line 763 "rx-decode.opc"
+#line 762 "rx-decode.opc"
ID(smovb);
}
@@ -5452,7 +5451,7 @@
case 0x8e:
{
/** 0111 1111 1000 11sz rmpa%s */
-#line 781 "rx-decode.opc"
+#line 780 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -5462,7 +5461,7 @@
printf (" sz = 0x%x\n", sz);
}
SYNTAX("rmpa%s");
-#line 781 "rx-decode.opc"
+#line 780 "rx-decode.opc"
ID(rmpa); BWL(sz); F_OS__;
/*----------------------------------------------------------------------*/
@@ -5480,7 +5479,7 @@
op[0], op[1]);
}
SYNTAX("smovf");
-#line 772 "rx-decode.opc"
+#line 771 "rx-decode.opc"
ID(smovf);
}
@@ -5495,7 +5494,7 @@
op[0], op[1]);
}
SYNTAX("satr");
-#line 823 "rx-decode.opc"
+#line 822 "rx-decode.opc"
ID(satr);
/*----------------------------------------------------------------------*/
@@ -5513,7 +5512,7 @@
op[0], op[1]);
}
SYNTAX("rtfi");
-#line 950 "rx-decode.opc"
+#line 949 "rx-decode.opc"
ID(rtfi);
}
@@ -5528,7 +5527,7 @@
op[0], op[1]);
}
SYNTAX("rte");
-#line 953 "rx-decode.opc"
+#line 952 "rx-decode.opc"
ID(rte);
}
@@ -5543,7 +5542,7 @@
op[0], op[1]);
}
SYNTAX("wait");
-#line 965 "rx-decode.opc"
+#line 964 "rx-decode.opc"
ID(wait);
/*----------------------------------------------------------------------*/
@@ -5569,7 +5568,7 @@
case 0xaf:
{
/** 0111 1111 1010 rdst setpsw %0 */
-#line 926 "rx-decode.opc"
+#line 925 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5579,7 +5578,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("setpsw %0");
-#line 926 "rx-decode.opc"
+#line 925 "rx-decode.opc"
ID(setpsw); DF(rdst);
}
@@ -5602,7 +5601,7 @@
case 0xbf:
{
/** 0111 1111 1011 rdst clrpsw %0 */
-#line 923 "rx-decode.opc"
+#line 922 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5612,7 +5611,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("clrpsw %0");
-#line 923 "rx-decode.opc"
+#line 922 "rx-decode.opc"
ID(clrpsw); DF(rdst);
}
@@ -5628,17 +5627,17 @@
op_semantics_38:
{
/** 10sz 0dsp a dst b src mov%s %1, %0 */
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
int sz AU = (op[0] >> 4) & 0x03;
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
int a AU = (op[1] >> 7) & 0x01;
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
int dst AU = (op[1] >> 4) & 0x07;
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
int b AU = (op[1] >> 3) & 0x01;
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
int src AU = op[1] & 0x07;
if (trace)
{
@@ -5653,7 +5652,7 @@
printf (" src = 0x%x\n", src);
}
SYNTAX("mov%s %1, %0");
-#line 309 "rx-decode.opc"
+#line 308 "rx-decode.opc"
ID(mov); sBWL(sz); DIs(dst, dsp*4+a*2+b, sz); SR(src); F_____;
}
@@ -5731,17 +5730,17 @@
op_semantics_39:
{
/** 10sz 1dsp a src b dst mov%s %1, %0 */
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
int sz AU = (op[0] >> 4) & 0x03;
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
int a AU = (op[1] >> 7) & 0x01;
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
int src AU = (op[1] >> 4) & 0x07;
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
int b AU = (op[1] >> 3) & 0x01;
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
int dst AU = op[1] & 0x07;
if (trace)
{
@@ -5756,7 +5755,7 @@
printf (" dst = 0x%x\n", dst);
}
SYNTAX("mov%s %1, %0");
-#line 306 "rx-decode.opc"
+#line 305 "rx-decode.opc"
ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F_____;
}
@@ -6122,17 +6121,17 @@
op_semantics_40:
{
/** 1011 w dsp a src b dst movu%s %1, %0 */
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
int w AU = (op[0] >> 3) & 0x01;
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
int a AU = (op[1] >> 7) & 0x01;
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
int src AU = (op[1] >> 4) & 0x07;
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
int b AU = (op[1] >> 3) & 0x01;
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
int dst AU = op[1] & 0x07;
if (trace)
{
@@ -6147,7 +6146,7 @@
printf (" dst = 0x%x\n", dst);
}
SYNTAX("movu%s %1, %0");
-#line 329 "rx-decode.opc"
+#line 328 "rx-decode.opc"
ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
}
@@ -6297,15 +6296,15 @@
op_semantics_41:
{
/** 11sz sd ss rsrc rdst mov%s %1, %0 */
-#line 287 "rx-decode.opc"
+#line 286 "rx-decode.opc"
int sz AU = (op[0] >> 4) & 0x03;
-#line 287 "rx-decode.opc"
+#line 286 "rx-decode.opc"
int sd AU = (op[0] >> 2) & 0x03;
-#line 287 "rx-decode.opc"
+#line 286 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 287 "rx-decode.opc"
+#line 286 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 287 "rx-decode.opc"
+#line 286 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -6319,7 +6318,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s %1, %0");
-#line 287 "rx-decode.opc"
+#line 286 "rx-decode.opc"
if (ss == 3 && sz == 2 && rsrc == 0 && rdst == 0)
{
ID(nop2);
@@ -6773,11 +6772,11 @@
op_semantics_42:
{
/** 1111 00sd rdst 0bit bset #%1, %0%S0 */
-#line 874 "rx-decode.opc"
+#line 873 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 874 "rx-decode.opc"
+#line 873 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 874 "rx-decode.opc"
+#line 873 "rx-decode.opc"
int bit AU = op[1] & 0x07;
if (trace)
{
@@ -6789,7 +6788,7 @@
printf (" bit = 0x%x\n", bit);
}
SYNTAX("bset #%1, %0%S0");
-#line 874 "rx-decode.opc"
+#line 873 "rx-decode.opc"
ID(bset); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
}
@@ -6798,11 +6797,11 @@
op_semantics_43:
{
/** 1111 00sd rdst 1bit bclr #%1, %0%S0 */
-#line 884 "rx-decode.opc"
+#line 883 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 884 "rx-decode.opc"
+#line 883 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 884 "rx-decode.opc"
+#line 883 "rx-decode.opc"
int bit AU = op[1] & 0x07;
if (trace)
{
@@ -6814,7 +6813,7 @@
printf (" bit = 0x%x\n", bit);
}
SYNTAX("bclr #%1, %0%S0");
-#line 884 "rx-decode.opc"
+#line 883 "rx-decode.opc"
ID(bclr); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
}
@@ -6866,11 +6865,11 @@
op_semantics_44:
{
/** 1111 01sd rdst 0bit btst #%2, %1%S1 */
-#line 894 "rx-decode.opc"
+#line 893 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 894 "rx-decode.opc"
+#line 893 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 894 "rx-decode.opc"
+#line 893 "rx-decode.opc"
int bit AU = op[1] & 0x07;
if (trace)
{
@@ -6882,7 +6881,7 @@
printf (" bit = 0x%x\n", bit);
}
SYNTAX("btst #%2, %1%S1");
-#line 894 "rx-decode.opc"
+#line 893 "rx-decode.opc"
ID(btst); BWL(BSIZE); S2C(bit); SD(sd, rdst, BSIZE); F___ZC;
}
@@ -6891,11 +6890,11 @@
op_semantics_45:
{
/** 1111 01ss rsrc 10sz push%s %1 */
-#line 354 "rx-decode.opc"
+#line 353 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 354 "rx-decode.opc"
+#line 353 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 354 "rx-decode.opc"
+#line 353 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -6907,7 +6906,7 @@
printf (" sz = 0x%x\n", sz);
}
SYNTAX("push%s %1");
-#line 354 "rx-decode.opc"
+#line 353 "rx-decode.opc"
ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F_____;
/*----------------------------------------------------------------------*/
@@ -6968,13 +6967,13 @@
op_semantics_46:
{
/** 1111 10sd rdst im sz mov%s #%1, %0 */
-#line 265 "rx-decode.opc"
+#line 264 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 265 "rx-decode.opc"
+#line 264 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 265 "rx-decode.opc"
+#line 264 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 265 "rx-decode.opc"
+#line 264 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -6987,7 +6986,7 @@
printf (" sz = 0x%x\n", sz);
}
SYNTAX("mov%s #%1, %0");
-#line 265 "rx-decode.opc"
+#line 264 "rx-decode.opc"
ID(mov); DD(sd, rdst, sz);
if ((im == 1 && sz == 0)
|| (im == 2 && sz == 1)
@@ -7045,9 +7044,9 @@
case 0x00:
{
/** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */
-#line 528 "rx-decode.opc"
+#line 527 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 528 "rx-decode.opc"
+#line 527 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7058,7 +7057,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sbb %1, %0");
-#line 528 "rx-decode.opc"
+#line 527 "rx-decode.opc"
ID(sbb); SR (rsrc); DR(rdst); F_OSZC;
/* FIXME: only supports .L */
@@ -7073,9 +7072,9 @@
case 0x00:
{
/** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */
-#line 459 "rx-decode.opc"
+#line 458 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 459 "rx-decode.opc"
+#line 458 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7086,7 +7085,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("neg %2, %0");
-#line 459 "rx-decode.opc"
+#line 458 "rx-decode.opc"
ID(sub); DR(rdst); SC(0); S2R(rsrc); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -7103,9 +7102,9 @@
case 0x00:
{
/** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */
-#line 468 "rx-decode.opc"
+#line 467 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 468 "rx-decode.opc"
+#line 467 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7116,7 +7115,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("adc %1, %0");
-#line 468 "rx-decode.opc"
+#line 467 "rx-decode.opc"
ID(adc); SR(rsrc); DR(rdst); F_OSZC;
}
@@ -7130,9 +7129,9 @@
case 0x00:
{
/** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */
-#line 541 "rx-decode.opc"
+#line 540 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 541 "rx-decode.opc"
+#line 540 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7143,7 +7142,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("abs %1, %0");
-#line 541 "rx-decode.opc"
+#line 540 "rx-decode.opc"
ID(abs); DR(rdst); SR(rsrc); F_OSZ_;
/*----------------------------------------------------------------------*/
@@ -7161,11 +7160,11 @@
op_semantics_47:
{
/** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */
-#line 550 "rx-decode.opc"
+#line 549 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 550 "rx-decode.opc"
+#line 549 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 550 "rx-decode.opc"
+#line 549 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7177,7 +7176,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("max %1%S1, %0");
-#line 550 "rx-decode.opc"
+#line 549 "rx-decode.opc"
if (ss == 3 && rsrc == 0 && rdst == 0)
{
ID(nop3);
@@ -7227,11 +7226,11 @@
op_semantics_48:
{
/** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */
-#line 570 "rx-decode.opc"
+#line 569 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 570 "rx-decode.opc"
+#line 569 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 570 "rx-decode.opc"
+#line 569 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7243,7 +7242,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("min %1%S1, %0");
-#line 570 "rx-decode.opc"
+#line 569 "rx-decode.opc"
ID(min); SP(ss, rsrc); DR(rdst);
}
@@ -7285,11 +7284,11 @@
op_semantics_49:
{
/** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */
-#line 600 "rx-decode.opc"
+#line 599 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 600 "rx-decode.opc"
+#line 599 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 600 "rx-decode.opc"
+#line 599 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7301,7 +7300,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emul %1%S1, %0");
-#line 600 "rx-decode.opc"
+#line 599 "rx-decode.opc"
ID(emul); SP(ss, rsrc); DR(rdst);
}
@@ -7343,11 +7342,11 @@
op_semantics_50:
{
/** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */
-#line 612 "rx-decode.opc"
+#line 611 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 612 "rx-decode.opc"
+#line 611 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 612 "rx-decode.opc"
+#line 611 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7359,7 +7358,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emulu %1%S1, %0");
-#line 612 "rx-decode.opc"
+#line 611 "rx-decode.opc"
ID(emulu); SP(ss, rsrc); DR(rdst);
}
@@ -7401,11 +7400,11 @@
op_semantics_51:
{
/** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */
-#line 624 "rx-decode.opc"
+#line 623 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 624 "rx-decode.opc"
+#line 623 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 624 "rx-decode.opc"
+#line 623 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7417,7 +7416,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("div %1%S1, %0");
-#line 624 "rx-decode.opc"
+#line 623 "rx-decode.opc"
ID(div); SP(ss, rsrc); DR(rdst); F_O___;
}
@@ -7459,11 +7458,11 @@
op_semantics_52:
{
/** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */
-#line 636 "rx-decode.opc"
+#line 635 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 636 "rx-decode.opc"
+#line 635 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 636 "rx-decode.opc"
+#line 635 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7475,7 +7474,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("divu %1%S1, %0");
-#line 636 "rx-decode.opc"
+#line 635 "rx-decode.opc"
ID(divu); SP(ss, rsrc); DR(rdst); F_O___;
}
@@ -7517,11 +7516,11 @@
op_semantics_53:
{
/** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */
-#line 447 "rx-decode.opc"
+#line 446 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 447 "rx-decode.opc"
+#line 446 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 447 "rx-decode.opc"
+#line 446 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7533,7 +7532,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("tst %1%S1, %2");
-#line 447 "rx-decode.opc"
+#line 446 "rx-decode.opc"
ID(and); SP(ss, rsrc); S2R(rdst); F__SZ_;
}
@@ -7575,11 +7574,11 @@
op_semantics_54:
{
/** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */
-#line 426 "rx-decode.opc"
+#line 425 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 426 "rx-decode.opc"
+#line 425 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 426 "rx-decode.opc"
+#line 425 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7591,7 +7590,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xor %1%S1, %0");
-#line 426 "rx-decode.opc"
+#line 425 "rx-decode.opc"
ID(xor); SP(ss, rsrc); DR(rdst); F__SZ_;
}
@@ -7632,9 +7631,9 @@
case 0x00:
{
/** 1111 1100 0011 1011 rsrc rdst not %1, %0 */
-#line 438 "rx-decode.opc"
+#line 437 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 438 "rx-decode.opc"
+#line 437 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7645,7 +7644,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("not %1, %0");
-#line 438 "rx-decode.opc"
+#line 437 "rx-decode.opc"
ID(xor); DR(rdst); SR(rsrc); S2C(~0); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -7663,11 +7662,11 @@
op_semantics_55:
{
/** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */
-#line 360 "rx-decode.opc"
+#line 359 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 360 "rx-decode.opc"
+#line 359 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 360 "rx-decode.opc"
+#line 359 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7679,7 +7678,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xchg %1%S1, %0");
-#line 360 "rx-decode.opc"
+#line 359 "rx-decode.opc"
ID(xchg); DR(rdst); SP(ss, rsrc);
}
@@ -7721,11 +7720,11 @@
op_semantics_56:
{
/** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */
-#line 865 "rx-decode.opc"
+#line 864 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 865 "rx-decode.opc"
+#line 864 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 865 "rx-decode.opc"
+#line 864 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -7737,7 +7736,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("itof %1%S1, %0");
-#line 865 "rx-decode.opc"
+#line 864 "rx-decode.opc"
ID(itof); DR (rdst); SP(sd, rsrc); F__SZ_;
}
@@ -7779,11 +7778,11 @@
op_semantics_57:
{
/** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */
-#line 877 "rx-decode.opc"
+#line 876 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 877 "rx-decode.opc"
+#line 876 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 877 "rx-decode.opc"
+#line 876 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -7795,7 +7794,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bset %1, %0%S0");
-#line 877 "rx-decode.opc"
+#line 876 "rx-decode.opc"
ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
}
@@ -7837,11 +7836,11 @@
op_semantics_58:
{
/** 1111 1100 0110 01sd rdst rsrc bclr %1, %0%S0 */
-#line 887 "rx-decode.opc"
+#line 886 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 887 "rx-decode.opc"
+#line 886 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 887 "rx-decode.opc"
+#line 886 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -7853,7 +7852,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bclr %1, %0%S0");
-#line 887 "rx-decode.opc"
+#line 886 "rx-decode.opc"
ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
}
@@ -7895,11 +7894,11 @@
op_semantics_59:
{
/** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */
-#line 897 "rx-decode.opc"
+#line 896 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 897 "rx-decode.opc"
+#line 896 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 897 "rx-decode.opc"
+#line 896 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -7911,7 +7910,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("btst %2, %1%S1");
-#line 897 "rx-decode.opc"
+#line 896 "rx-decode.opc"
ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F___ZC;
}
@@ -7953,11 +7952,11 @@
op_semantics_60:
{
/** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */
-#line 907 "rx-decode.opc"
+#line 906 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 907 "rx-decode.opc"
+#line 906 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 907 "rx-decode.opc"
+#line 906 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -7969,7 +7968,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bnot %1, %0%S0");
-#line 907 "rx-decode.opc"
+#line 906 "rx-decode.opc"
ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
}
@@ -8011,11 +8010,11 @@
op_semantics_61:
{
/** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */
-#line 844 "rx-decode.opc"
+#line 843 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 844 "rx-decode.opc"
+#line 843 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 844 "rx-decode.opc"
+#line 843 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8027,7 +8026,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fsub %1%S1, %0");
-#line 844 "rx-decode.opc"
+#line 843 "rx-decode.opc"
ID(fsub); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -8069,11 +8068,11 @@
op_semantics_62:
{
/** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */
-#line 838 "rx-decode.opc"
+#line 837 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 838 "rx-decode.opc"
+#line 837 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 838 "rx-decode.opc"
+#line 837 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8085,7 +8084,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fcmp %1%S1, %0");
-#line 838 "rx-decode.opc"
+#line 837 "rx-decode.opc"
ID(fcmp); DR(rdst); SD(sd, rsrc, LSIZE); F_OSZ_;
}
@@ -8127,11 +8126,11 @@
op_semantics_63:
{
/** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */
-#line 832 "rx-decode.opc"
+#line 831 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 832 "rx-decode.opc"
+#line 831 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 832 "rx-decode.opc"
+#line 831 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8143,7 +8142,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fadd %1%S1, %0");
-#line 832 "rx-decode.opc"
+#line 831 "rx-decode.opc"
ID(fadd); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -8185,11 +8184,11 @@
op_semantics_64:
{
/** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */
-#line 853 "rx-decode.opc"
+#line 852 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 853 "rx-decode.opc"
+#line 852 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 853 "rx-decode.opc"
+#line 852 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8201,7 +8200,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fmul %1%S1, %0");
-#line 853 "rx-decode.opc"
+#line 852 "rx-decode.opc"
ID(fmul); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -8243,11 +8242,11 @@
op_semantics_65:
{
/** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */
-#line 859 "rx-decode.opc"
+#line 858 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 859 "rx-decode.opc"
+#line 858 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 859 "rx-decode.opc"
+#line 858 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8259,7 +8258,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fdiv %1%S1, %0");
-#line 859 "rx-decode.opc"
+#line 858 "rx-decode.opc"
ID(fdiv); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -8301,11 +8300,11 @@
op_semantics_66:
{
/** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */
-#line 847 "rx-decode.opc"
+#line 846 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 847 "rx-decode.opc"
+#line 846 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 847 "rx-decode.opc"
+#line 846 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8317,7 +8316,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("ftoi %1%S1, %0");
-#line 847 "rx-decode.opc"
+#line 846 "rx-decode.opc"
ID(ftoi); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -8359,11 +8358,11 @@
op_semantics_67:
{
/** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */
-#line 862 "rx-decode.opc"
+#line 861 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 862 "rx-decode.opc"
+#line 861 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 862 "rx-decode.opc"
+#line 861 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -8375,7 +8374,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("round %1%S1, %0");
-#line 862 "rx-decode.opc"
+#line 861 "rx-decode.opc"
ID(round); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -8417,13 +8416,13 @@
op_semantics_68:
{
/** 1111 1100 1101 sz sd rdst cond sc%1%s %0 */
-#line 971 "rx-decode.opc"
+#line 970 "rx-decode.opc"
int sz AU = (op[1] >> 2) & 0x03;
-#line 971 "rx-decode.opc"
+#line 970 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 971 "rx-decode.opc"
+#line 970 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 971 "rx-decode.opc"
+#line 970 "rx-decode.opc"
int cond AU = op[2] & 0x0f;
if (trace)
{
@@ -8436,7 +8435,7 @@
printf (" cond = 0x%x\n", cond);
}
SYNTAX("sc%1%s %0");
-#line 971 "rx-decode.opc"
+#line 970 "rx-decode.opc"
ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
}
@@ -8564,13 +8563,13 @@
op_semantics_69:
{
/** 1111 1100 111bit sd rdst cond bm%2 #%1, %0%S0 */
-#line 914 "rx-decode.opc"
+#line 913 "rx-decode.opc"
int bit AU = (op[1] >> 2) & 0x07;
-#line 914 "rx-decode.opc"
+#line 913 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 914 "rx-decode.opc"
+#line 913 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 914 "rx-decode.opc"
+#line 913 "rx-decode.opc"
int cond AU = op[2] & 0x0f;
if (trace)
{
@@ -8583,7 +8582,7 @@
printf (" cond = 0x%x\n", cond);
}
SYNTAX("bm%2 #%1, %0%S0");
-#line 914 "rx-decode.opc"
+#line 913 "rx-decode.opc"
ID(bmcc); BWL(BSIZE); S2cc(cond); SC(bit); DD(sd, rdst, BSIZE);
}
@@ -8592,11 +8591,11 @@
op_semantics_70:
{
/** 1111 1100 111bit sd rdst 1111 bnot #%1, %0%S0 */
-#line 904 "rx-decode.opc"
+#line 903 "rx-decode.opc"
int bit AU = (op[1] >> 2) & 0x07;
-#line 904 "rx-decode.opc"
+#line 903 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 904 "rx-decode.opc"
+#line 903 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
if (trace)
{
@@ -8608,7 +8607,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bnot #%1, %0%S0");
-#line 904 "rx-decode.opc"
+#line 903 "rx-decode.opc"
ID(bnot); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE);
}
@@ -9435,9 +9434,9 @@
case 0x00:
{
/** 1111 1101 0000 0000 srca srcb mulhi %1, %2 */
-#line 787 "rx-decode.opc"
+#line 786 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 787 "rx-decode.opc"
+#line 786 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -9448,7 +9447,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mulhi %1, %2");
-#line 787 "rx-decode.opc"
+#line 786 "rx-decode.opc"
ID(mulhi); SR(srca); S2R(srcb); F_____;
}
@@ -9462,9 +9461,9 @@
case 0x00:
{
/** 1111 1101 0000 0001 srca srcb mullo %1, %2 */
-#line 790 "rx-decode.opc"
+#line 789 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 790 "rx-decode.opc"
+#line 789 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -9475,7 +9474,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mullo %1, %2");
-#line 790 "rx-decode.opc"
+#line 789 "rx-decode.opc"
ID(mullo); SR(srca); S2R(srcb); F_____;
}
@@ -9489,9 +9488,9 @@
case 0x00:
{
/** 1111 1101 0000 0100 srca srcb machi %1, %2 */
-#line 793 "rx-decode.opc"
+#line 792 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 793 "rx-decode.opc"
+#line 792 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -9502,7 +9501,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("machi %1, %2");
-#line 793 "rx-decode.opc"
+#line 792 "rx-decode.opc"
ID(machi); SR(srca); S2R(srcb); F_____;
}
@@ -9516,9 +9515,9 @@
case 0x00:
{
/** 1111 1101 0000 0101 srca srcb maclo %1, %2 */
-#line 796 "rx-decode.opc"
+#line 795 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 796 "rx-decode.opc"
+#line 795 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -9529,7 +9528,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("maclo %1, %2");
-#line 796 "rx-decode.opc"
+#line 795 "rx-decode.opc"
ID(maclo); SR(srca); S2R(srcb); F_____;
}
@@ -9543,7 +9542,7 @@
case 0x00:
{
/** 1111 1101 0001 0111 0000 rsrc mvtachi %1 */
-#line 799 "rx-decode.opc"
+#line 798 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -9553,7 +9552,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mvtachi %1");
-#line 799 "rx-decode.opc"
+#line 798 "rx-decode.opc"
ID(mvtachi); SR(rsrc); F_____;
}
@@ -9561,7 +9560,7 @@
case 0x10:
{
/** 1111 1101 0001 0111 0001 rsrc mvtaclo %1 */
-#line 802 "rx-decode.opc"
+#line 801 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -9571,7 +9570,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mvtaclo %1");
-#line 802 "rx-decode.opc"
+#line 801 "rx-decode.opc"
ID(mvtaclo); SR(rsrc); F_____;
}
@@ -9586,7 +9585,7 @@
case 0x00:
{
/** 1111 1101 0001 1000 000i 0000 racw #%1 */
-#line 814 "rx-decode.opc"
+#line 813 "rx-decode.opc"
int i AU = (op[2] >> 4) & 0x01;
if (trace)
{
@@ -9596,7 +9595,7 @@
printf (" i = 0x%x\n", i);
}
SYNTAX("racw #%1");
-#line 814 "rx-decode.opc"
+#line 813 "rx-decode.opc"
ID(racw); SC(i+1); F_____;
/*----------------------------------------------------------------------*/
@@ -9614,7 +9613,7 @@
case 0x00:
{
/** 1111 1101 0001 1111 0000 rdst mvfachi %0 */
-#line 805 "rx-decode.opc"
+#line 804 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9624,7 +9623,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfachi %0");
-#line 805 "rx-decode.opc"
+#line 804 "rx-decode.opc"
ID(mvfachi); DR(rdst); F_____;
}
@@ -9632,7 +9631,7 @@
case 0x10:
{
/** 1111 1101 0001 1111 0001 rdst mvfaclo %0 */
-#line 811 "rx-decode.opc"
+#line 810 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9642,7 +9641,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfaclo %0");
-#line 811 "rx-decode.opc"
+#line 810 "rx-decode.opc"
ID(mvfaclo); DR(rdst); F_____;
}
@@ -9650,7 +9649,7 @@
case 0x20:
{
/** 1111 1101 0001 1111 0010 rdst mvfacmi %0 */
-#line 808 "rx-decode.opc"
+#line 807 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9660,7 +9659,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfacmi %0");
-#line 808 "rx-decode.opc"
+#line 807 "rx-decode.opc"
ID(mvfacmi); DR(rdst); F_____;
}
@@ -9676,13 +9675,13 @@
op_semantics_71:
{
/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
-#line 321 "rx-decode.opc"
+#line 320 "rx-decode.opc"
int p AU = (op[1] >> 2) & 0x01;
-#line 321 "rx-decode.opc"
+#line 320 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 321 "rx-decode.opc"
+#line 320 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 321 "rx-decode.opc"
+#line 320 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -9695,7 +9694,7 @@
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mov%s %1, %0");
-#line 321 "rx-decode.opc"
+#line 320 "rx-decode.opc"
ID(mov); sBWL (sz); SR(rsrc); F_____;
OP(0, p ? RX_Operand_Predec : RX_Operand_Postinc, rdst, 0);
@@ -9756,13 +9755,13 @@
op_semantics_72:
{
/** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */
-#line 325 "rx-decode.opc"
+#line 324 "rx-decode.opc"
int p AU = (op[1] >> 2) & 0x01;
-#line 325 "rx-decode.opc"
+#line 324 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 325 "rx-decode.opc"
+#line 324 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 325 "rx-decode.opc"
+#line 324 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9775,7 +9774,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s %1, %0");
-#line 325 "rx-decode.opc"
+#line 324 "rx-decode.opc"
ID(mov); sBWL (sz); DR(rdst); F_____;
OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
@@ -9836,13 +9835,13 @@
op_semantics_73:
{
/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
-#line 335 "rx-decode.opc"
+#line 334 "rx-decode.opc"
int p AU = (op[1] >> 2) & 0x01;
-#line 335 "rx-decode.opc"
+#line 334 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 335 "rx-decode.opc"
+#line 334 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 335 "rx-decode.opc"
+#line 334 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9855,7 +9854,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movu%s %1, %0");
-#line 335 "rx-decode.opc"
+#line 334 "rx-decode.opc"
ID(mov); uBWL (sz); DR(rdst); F_____;
OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
@@ -9918,9 +9917,9 @@
case 0x00:
{
/** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */
-#line 668 "rx-decode.opc"
+#line 667 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 668 "rx-decode.opc"
+#line 667 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9931,7 +9930,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shlr %2, %0");
-#line 668 "rx-decode.opc"
+#line 667 "rx-decode.opc"
ID(shlr); S2R(rsrc); SR(rdst); DR(rdst); F__SZC;
}
@@ -9945,9 +9944,9 @@
case 0x00:
{
/** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */
-#line 658 "rx-decode.opc"
+#line 657 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 658 "rx-decode.opc"
+#line 657 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9958,7 +9957,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shar %2, %0");
-#line 658 "rx-decode.opc"
+#line 657 "rx-decode.opc"
ID(shar); S2R(rsrc); SR(rdst); DR(rdst); F_0SZC;
}
@@ -9972,9 +9971,9 @@
case 0x00:
{
/** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
-#line 648 "rx-decode.opc"
+#line 647 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 648 "rx-decode.opc"
+#line 647 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9985,7 +9984,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shll %2, %0");
-#line 648 "rx-decode.opc"
+#line 647 "rx-decode.opc"
ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F_OSZC;
}
@@ -9999,9 +9998,9 @@
case 0x00:
{
/** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
-#line 692 "rx-decode.opc"
+#line 691 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 692 "rx-decode.opc"
+#line 691 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10012,7 +10011,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotr %1, %0");
-#line 692 "rx-decode.opc"
+#line 691 "rx-decode.opc"
ID(rotr); SR(rsrc); DR(rdst); F__SZC;
}
@@ -10026,9 +10025,9 @@
case 0x00:
{
/** 1111 1101 0110 0101 rsrc rdst revw %1, %0 */
-#line 695 "rx-decode.opc"
+#line 694 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 695 "rx-decode.opc"
+#line 694 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10039,7 +10038,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("revw %1, %0");
-#line 695 "rx-decode.opc"
+#line 694 "rx-decode.opc"
ID(revw); SR(rsrc); DR(rdst);
}
@@ -10053,9 +10052,9 @@
case 0x00:
{
/** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */
-#line 686 "rx-decode.opc"
+#line 685 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 686 "rx-decode.opc"
+#line 685 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10066,7 +10065,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotl %1, %0");
-#line 686 "rx-decode.opc"
+#line 685 "rx-decode.opc"
ID(rotl); SR(rsrc); DR(rdst); F__SZC;
}
@@ -10080,9 +10079,9 @@
case 0x00:
{
/** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */
-#line 698 "rx-decode.opc"
+#line 697 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 698 "rx-decode.opc"
+#line 697 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10093,7 +10092,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("revl %1, %0");
-#line 698 "rx-decode.opc"
+#line 697 "rx-decode.opc"
ID(revl); SR(rsrc); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -10111,11 +10110,11 @@
op_semantics_74:
{
/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
-#line 941 "rx-decode.opc"
+#line 940 "rx-decode.opc"
int c AU = op[1] & 0x01;
-#line 941 "rx-decode.opc"
+#line 940 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 941 "rx-decode.opc"
+#line 940 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10127,7 +10126,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvtc %1, %0");
-#line 941 "rx-decode.opc"
+#line 940 "rx-decode.opc"
ID(mov); SR(rsrc); DR(c*16+rdst + 16);
}
@@ -10151,11 +10150,11 @@
op_semantics_75:
{
/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
-#line 944 "rx-decode.opc"
+#line 943 "rx-decode.opc"
int s AU = op[1] & 0x01;
-#line 944 "rx-decode.opc"
+#line 943 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 944 "rx-decode.opc"
+#line 943 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10167,7 +10166,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfc %1, %0");
-#line 944 "rx-decode.opc"
+#line 943 "rx-decode.opc"
ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -10194,11 +10193,11 @@
op_semantics_76:
{
/** 1111 1101 0110 110i mmmm rdst rotr #%1, %0 */
-#line 689 "rx-decode.opc"
+#line 688 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 689 "rx-decode.opc"
+#line 688 "rx-decode.opc"
int mmmm AU = (op[2] >> 4) & 0x0f;
-#line 689 "rx-decode.opc"
+#line 688 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10210,7 +10209,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotr #%1, %0");
-#line 689 "rx-decode.opc"
+#line 688 "rx-decode.opc"
ID(rotr); SC(i*16+mmmm); DR(rdst); F__SZC;
}
@@ -10234,11 +10233,11 @@
op_semantics_77:
{
/** 1111 1101 0110 111i mmmm rdst rotl #%1, %0 */
-#line 683 "rx-decode.opc"
+#line 682 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 683 "rx-decode.opc"
+#line 682 "rx-decode.opc"
int mmmm AU = (op[2] >> 4) & 0x0f;
-#line 683 "rx-decode.opc"
+#line 682 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10250,7 +10249,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotl #%1, %0");
-#line 683 "rx-decode.opc"
+#line 682 "rx-decode.opc"
ID(rotl); SC(i*16+mmmm); DR(rdst); F__SZC;
}
@@ -10274,9 +10273,9 @@
op_semantics_78:
{
/** 1111 1101 0111 im00 0010rdst adc #%1, %0 */
-#line 465 "rx-decode.opc"
+#line 464 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 465 "rx-decode.opc"
+#line 464 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10287,7 +10286,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("adc #%1, %0");
-#line 465 "rx-decode.opc"
+#line 464 "rx-decode.opc"
ID(adc); SC(IMMex(im)); DR(rdst); F_OSZC;
}
@@ -10296,9 +10295,9 @@
op_semantics_79:
{
/** 1111 1101 0111 im00 0100rdst max #%1, %0 */
-#line 547 "rx-decode.opc"
+#line 546 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 547 "rx-decode.opc"
+#line 546 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10309,7 +10308,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("max #%1, %0");
-#line 547 "rx-decode.opc"
+#line 546 "rx-decode.opc"
ID(max); DR(rdst); SC(IMMex(im));
}
@@ -10318,9 +10317,9 @@
op_semantics_80:
{
/** 1111 1101 0111 im00 0101rdst min #%1, %0 */
-#line 567 "rx-decode.opc"
+#line 566 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 567 "rx-decode.opc"
+#line 566 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10331,7 +10330,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("min #%1, %0");
-#line 567 "rx-decode.opc"
+#line 566 "rx-decode.opc"
ID(min); DR(rdst); SC(IMMex(im));
}
@@ -10340,9 +10339,9 @@
op_semantics_81:
{
/** 1111 1101 0111 im00 0110rdst emul #%1, %0 */
-#line 597 "rx-decode.opc"
+#line 596 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 597 "rx-decode.opc"
+#line 596 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10353,7 +10352,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emul #%1, %0");
-#line 597 "rx-decode.opc"
+#line 596 "rx-decode.opc"
ID(emul); DR(rdst); SC(IMMex(im));
}
@@ -10362,9 +10361,9 @@
op_semantics_82:
{
/** 1111 1101 0111 im00 0111rdst emulu #%1, %0 */
-#line 609 "rx-decode.opc"
+#line 608 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 609 "rx-decode.opc"
+#line 608 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10375,7 +10374,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emulu #%1, %0");
-#line 609 "rx-decode.opc"
+#line 608 "rx-decode.opc"
ID(emulu); DR(rdst); SC(IMMex(im));
}
@@ -10384,9 +10383,9 @@
op_semantics_83:
{
/** 1111 1101 0111 im00 1000rdst div #%1, %0 */
-#line 621 "rx-decode.opc"
+#line 620 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 621 "rx-decode.opc"
+#line 620 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10397,7 +10396,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("div #%1, %0");
-#line 621 "rx-decode.opc"
+#line 620 "rx-decode.opc"
ID(div); DR(rdst); SC(IMMex(im)); F_O___;
}
@@ -10406,9 +10405,9 @@
op_semantics_84:
{
/** 1111 1101 0111 im00 1001rdst divu #%1, %0 */
-#line 633 "rx-decode.opc"
+#line 632 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 633 "rx-decode.opc"
+#line 632 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10419,7 +10418,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("divu #%1, %0");
-#line 633 "rx-decode.opc"
+#line 632 "rx-decode.opc"
ID(divu); DR(rdst); SC(IMMex(im)); F_O___;
}
@@ -10428,9 +10427,9 @@
op_semantics_85:
{
/** 1111 1101 0111 im00 1100rdst tst #%1, %2 */
-#line 444 "rx-decode.opc"
+#line 443 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 444 "rx-decode.opc"
+#line 443 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10441,7 +10440,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("tst #%1, %2");
-#line 444 "rx-decode.opc"
+#line 443 "rx-decode.opc"
ID(and); SC(IMMex(im)); S2R(rdst); F__SZ_;
}
@@ -10450,9 +10449,9 @@
op_semantics_86:
{
/** 1111 1101 0111 im00 1101rdst xor #%1, %0 */
-#line 423 "rx-decode.opc"
+#line 422 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 423 "rx-decode.opc"
+#line 422 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10463,7 +10462,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xor #%1, %0");
-#line 423 "rx-decode.opc"
+#line 422 "rx-decode.opc"
ID(xor); SC(IMMex(im)); DR(rdst); F__SZ_;
}
@@ -10472,9 +10471,9 @@
op_semantics_87:
{
/** 1111 1101 0111 im00 1110rdst stz #%1, %0 */
-#line 369 "rx-decode.opc"
+#line 368 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 369 "rx-decode.opc"
+#line 368 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10485,7 +10484,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("stz #%1, %0");
-#line 369 "rx-decode.opc"
+#line 368 "rx-decode.opc"
ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_z);
}
@@ -10494,9 +10493,9 @@
op_semantics_88:
{
/** 1111 1101 0111 im00 1111rdst stnz #%1, %0 */
-#line 372 "rx-decode.opc"
+#line 371 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 372 "rx-decode.opc"
+#line 371 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10507,7 +10506,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("stnz #%1, %0");
-#line 372 "rx-decode.opc"
+#line 371 "rx-decode.opc"
ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_nz);
/*----------------------------------------------------------------------*/
@@ -10525,7 +10524,7 @@
case 0x00:
{
/** 1111 1101 0111 0010 0000 rdst fsub #%1, %0 */
-#line 841 "rx-decode.opc"
+#line 840 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10535,7 +10534,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fsub #%1, %0");
-#line 841 "rx-decode.opc"
+#line 840 "rx-decode.opc"
ID(fsub); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -10543,7 +10542,7 @@
case 0x10:
{
/** 1111 1101 0111 0010 0001 rdst fcmp #%1, %0 */
-#line 835 "rx-decode.opc"
+#line 834 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10553,7 +10552,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fcmp #%1, %0");
-#line 835 "rx-decode.opc"
+#line 834 "rx-decode.opc"
ID(fcmp); DR(rdst); SC(IMM(0)); F_OSZ_;
}
@@ -10561,7 +10560,7 @@
case 0x20:
{
/** 1111 1101 0111 0010 0010 rdst fadd #%1, %0 */
-#line 829 "rx-decode.opc"
+#line 828 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10571,7 +10570,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fadd #%1, %0");
-#line 829 "rx-decode.opc"
+#line 828 "rx-decode.opc"
ID(fadd); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -10579,7 +10578,7 @@
case 0x30:
{
/** 1111 1101 0111 0010 0011 rdst fmul #%1, %0 */
-#line 850 "rx-decode.opc"
+#line 849 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10589,7 +10588,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fmul #%1, %0");
-#line 850 "rx-decode.opc"
+#line 849 "rx-decode.opc"
ID(fmul); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -10597,7 +10596,7 @@
case 0x40:
{
/** 1111 1101 0111 0010 0100 rdst fdiv #%1, %0 */
-#line 856 "rx-decode.opc"
+#line 855 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10607,7 +10606,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fdiv #%1, %0");
-#line 856 "rx-decode.opc"
+#line 855 "rx-decode.opc"
ID(fdiv); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -10623,9 +10622,9 @@
op_semantics_89:
{
/** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */
-#line 938 "rx-decode.opc"
+#line 937 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 938 "rx-decode.opc"
+#line 937 "rx-decode.opc"
int crdst AU = op[2] & 0x1f;
if (trace)
{
@@ -10636,7 +10635,7 @@
printf (" crdst = 0x%x\n", crdst);
}
SYNTAX("mvtc #%1, %0");
-#line 938 "rx-decode.opc"
+#line 937 "rx-decode.opc"
ID(mov); SC(IMMex(im)); DR(crdst + 16);
}
@@ -10802,11 +10801,11 @@
op_semantics_90:
{
/** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */
-#line 671 "rx-decode.opc"
+#line 670 "rx-decode.opc"
int immmm AU = op[1] & 0x1f;
-#line 671 "rx-decode.opc"
+#line 670 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 671 "rx-decode.opc"
+#line 670 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10818,7 +10817,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shlr #%2, %1, %0");
-#line 671 "rx-decode.opc"
+#line 670 "rx-decode.opc"
ID(shlr); S2C(immmm); SR(rsrc); DR(rdst); F__SZC;
/*----------------------------------------------------------------------*/
@@ -11115,11 +11114,11 @@
op_semantics_91:
{
/** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */
-#line 661 "rx-decode.opc"
+#line 660 "rx-decode.opc"
int immmm AU = op[1] & 0x1f;
-#line 661 "rx-decode.opc"
+#line 660 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 661 "rx-decode.opc"
+#line 660 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -11131,7 +11130,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shar #%2, %1, %0");
-#line 661 "rx-decode.opc"
+#line 660 "rx-decode.opc"
ID(shar); S2C(immmm); SR(rsrc); DR(rdst); F_0SZC;
@@ -11426,11 +11425,11 @@
op_semantics_92:
{
/** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
-#line 651 "rx-decode.opc"
+#line 650 "rx-decode.opc"
int immmm AU = op[1] & 0x1f;
-#line 651 "rx-decode.opc"
+#line 650 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 651 "rx-decode.opc"
+#line 650 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -11442,7 +11441,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shll #%2, %1, %0");
-#line 651 "rx-decode.opc"
+#line 650 "rx-decode.opc"
ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F_OSZC;
@@ -11751,11 +11750,11 @@
op_semantics_93:
{
/** 1111 1101 111 bittt cond rdst bm%2 #%1, %0%S0 */
-#line 917 "rx-decode.opc"
+#line 916 "rx-decode.opc"
int bittt AU = op[1] & 0x1f;
-#line 917 "rx-decode.opc"
+#line 916 "rx-decode.opc"
int cond AU = (op[2] >> 4) & 0x0f;
-#line 917 "rx-decode.opc"
+#line 916 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -11767,7 +11766,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bm%2 #%1, %0%S0");
-#line 917 "rx-decode.opc"
+#line 916 "rx-decode.opc"
ID(bmcc); BWL(LSIZE); S2cc(cond); SC(bittt); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -11779,9 +11778,9 @@
op_semantics_94:
{
/** 1111 1101 111bittt 1111 rdst bnot #%1, %0 */
-#line 910 "rx-decode.opc"
+#line 909 "rx-decode.opc"
int bittt AU = op[1] & 0x1f;
-#line 910 "rx-decode.opc"
+#line 909 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -11792,7 +11791,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bnot #%1, %0");
-#line 910 "rx-decode.opc"
+#line 909 "rx-decode.opc"
ID(bnot); BWL(LSIZE); SC(bittt); DR(rdst);
@@ -12621,13 +12620,13 @@
op_semantics_95:
{
/** 1111 1110 00sz isrc bsrc rdst mov%s %0, [%1, %2] */
-#line 315 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 315 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int isrc AU = op[1] & 0x0f;
-#line 315 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int bsrc AU = (op[2] >> 4) & 0x0f;
-#line 315 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12640,7 +12639,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s %0, [%1, %2]");
-#line 315 "rx-decode.opc"
+#line 314 "rx-decode.opc"
ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
}
@@ -13078,13 +13077,13 @@
op_semantics_96:
{
/** 1111 1110 01sz isrc bsrc rdst mov%s [%1, %2], %0 */
-#line 312 "rx-decode.opc"
+#line 311 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 312 "rx-decode.opc"
+#line 311 "rx-decode.opc"
int isrc AU = op[1] & 0x0f;
-#line 312 "rx-decode.opc"
+#line 311 "rx-decode.opc"
int bsrc AU = (op[2] >> 4) & 0x0f;
-#line 312 "rx-decode.opc"
+#line 311 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13097,7 +13096,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s [%1, %2], %0");
-#line 312 "rx-decode.opc"
+#line 311 "rx-decode.opc"
ID(movbi); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
}
@@ -13535,13 +13534,13 @@
op_semantics_97:
{
/** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */
-#line 318 "rx-decode.opc"
+#line 317 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 318 "rx-decode.opc"
+#line 317 "rx-decode.opc"
int isrc AU = op[1] & 0x0f;
-#line 318 "rx-decode.opc"
+#line 317 "rx-decode.opc"
int bsrc AU = (op[2] >> 4) & 0x0f;
-#line 318 "rx-decode.opc"
+#line 317 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13554,7 +13553,7 @@
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movu%s [%1, %2], %0");
-#line 318 "rx-decode.opc"
+#line 317 "rx-decode.opc"
ID(movbi); uBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
}
@@ -13999,11 +13998,11 @@
op_semantics_98:
{
/** 1111 1111 0000 rdst srca srcb sub %2, %1, %0 */
-#line 522 "rx-decode.opc"
+#line 521 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 522 "rx-decode.opc"
+#line 521 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 522 "rx-decode.opc"
+#line 521 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -14015,7 +14014,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("sub %2, %1, %0");
-#line 522 "rx-decode.opc"
+#line 521 "rx-decode.opc"
ID(sub); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -14168,11 +14167,11 @@
op_semantics_99:
{
/** 1111 1111 0010 rdst srca srcb add %2, %1, %0 */
-#line 489 "rx-decode.opc"
+#line 488 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 489 "rx-decode.opc"
+#line 488 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 489 "rx-decode.opc"
+#line 488 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -14184,7 +14183,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("add %2, %1, %0");
-#line 489 "rx-decode.opc"
+#line 488 "rx-decode.opc"
ID(add); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -14337,11 +14336,11 @@
op_semantics_100:
{
/** 1111 1111 0011 rdst srca srcb mul %2, %1, %0 */
-#line 591 "rx-decode.opc"
+#line 590 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 591 "rx-decode.opc"
+#line 590 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 591 "rx-decode.opc"
+#line 590 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -14353,7 +14352,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mul %2, %1, %0");
-#line 591 "rx-decode.opc"
+#line 590 "rx-decode.opc"
ID(mul); DR(rdst); SR(srcb); S2R(srca); F_____;
/*----------------------------------------------------------------------*/
@@ -14506,11 +14505,11 @@
op_semantics_101:
{
/** 1111 1111 0100 rdst srca srcb and %2, %1, %0 */
-#line 399 "rx-decode.opc"
+#line 398 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 399 "rx-decode.opc"
+#line 398 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 399 "rx-decode.opc"
+#line 398 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -14522,7 +14521,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("and %2, %1, %0");
-#line 399 "rx-decode.opc"
+#line 398 "rx-decode.opc"
ID(and); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -14675,11 +14674,11 @@
op_semantics_102:
{
/** 1111 1111 0101 rdst srca srcb or %2, %1, %0 */
-#line 417 "rx-decode.opc"
+#line 416 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 417 "rx-decode.opc"
+#line 416 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 417 "rx-decode.opc"
+#line 416 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -14691,7 +14690,7 @@
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("or %2, %1, %0");
-#line 417 "rx-decode.opc"
+#line 416 "rx-decode.opc"
ID(or); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -14841,7 +14840,7 @@
break;
default: UNSUPPORTED(); break;
}
-#line 974 "rx-decode.opc"
+#line 973 "rx-decode.opc"
return rx->n_bytes;
}
diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc
index b28ea8c..27ff5d4 100644
--- a/opcodes/rx-decode.opc
+++ b/opcodes/rx-decode.opc
@@ -1,9 +1,8 @@
/* -*- c -*- */
+#include "sysdep.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-
-#include "config.h"
#include "ansidecl.h"
#include "opcode/rx.h"
diff --git a/opcodes/rx-dis.c b/opcodes/rx-dis.c
index 1cdb710..e771612 100644
--- a/opcodes/rx-dis.c
+++ b/opcodes/rx-dis.c
@@ -1,5 +1,5 @@
/* Disassembler code for Renesas RX.
- Copyright 2008, 2009 Free Software Foundation, Inc.
+ Copyright 2008, 2009, 2012 Free Software Foundation, Inc.
Contributed by Red Hat.
Written by DJ Delorie.
@@ -20,6 +20,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
#include "bfd.h"
diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
index 37ed2e7..ef73d85 100644
--- a/opcodes/s390-dis.c
+++ b/opcodes/s390-dis.c
@@ -1,5 +1,5 @@
/* s390-dis.c -- Disassemble S390 instructions
- Copyright 2000, 2001, 2002, 2003, 2005, 2007, 2008
+ Copyright 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2012
Free Software Foundation, Inc.
Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
@@ -20,9 +20,9 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "sysdep.h"
#include "dis-asm.h"
#include "opintl.h"
#include "opcode/s390.h"
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 76d1233..e531558 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -1,6 +1,6 @@
/* Disassemble SH instructions.
Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007 Free Software Foundation, Inc.
+ 2006, 2007, 2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +19,9 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
+
#define STATIC_TABLE
#define DEFINE_TABLE
diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c
index 60963e7..1480a3d 100644
--- a/opcodes/sh64-dis.c
+++ b/opcodes/sh64-dis.c
@@ -1,5 +1,6 @@
/* Disassemble SH64 instructions.
- Copyright 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 2000, 2001, 2002, 2003, 2005, 2007, 2012
+ Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -18,10 +19,9 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
-
-#include "dis-asm.h"
#include "sysdep.h"
+#include <stdio.h>
+#include "dis-asm.h"
#include "sh64-opc.h"
#include "libiberty.h"
/* We need to refer to the ELF header structure. */
diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c
index b0899a6..73f01d3 100644
--- a/opcodes/sparc-dis.c
+++ b/opcodes/sparc-dis.c
@@ -1,6 +1,6 @@
/* Print SPARC instructions.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
+ 2000, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -20,9 +20,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
-
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/sparc.h"
#include "dis-asm.h"
#include "libiberty.h"
diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index cf00a89..b2e5344 100644
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -1,6 +1,6 @@
/* Table of opcodes for the sparc.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2002, 2004, 2005, 2006, 2007, 2008, 2011
+ 2000, 2002, 2004, 2005, 2006, 2007, 2008, 2011, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -25,8 +25,8 @@
instruction's name rather than the args. This would make gas faster, pinsn
slower, but would mess up some macros a bit. xoxorich. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/sparc.h"
/* Some defines to make life easy. */
diff --git a/opcodes/spu-dis.c b/opcodes/spu-dis.c
index 3e6a762..717daab 100644
--- a/opcodes/spu-dis.c
+++ b/opcodes/spu-dis.c
@@ -1,6 +1,6 @@
/* Disassemble SPU instructions
- Copyright 2006, 2007 Free Software Foundation, Inc.
+ Copyright 2006, 2007, 2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +19,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "dis-asm.h"
#include "opcode/spu.h"
diff --git a/opcodes/sysdep.h b/opcodes/sysdep.h
index 2ca3935..b09d19e 100644
--- a/opcodes/sysdep.h
+++ b/opcodes/sysdep.h
@@ -1,5 +1,5 @@
/* Random host-dependent support code.
- Copyright 1995, 1997, 2000, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1995, 1997, 2000, 2005, 2007, 2012 Free Software Foundation, Inc.
Written by Ken Raeburn.
This file is part of the GNU opcodes library.
@@ -27,6 +27,10 @@
trying to replace often did that. If it can be dropped from this
file (check in a non-ANSI environment!), it should be. */
+#ifdef PACKAGE
+#error sysdep.h must be included in lieu of config.h
+#endif
+
#include "config.h"
#include "ansidecl.h"
@@ -35,6 +39,10 @@
#include <stdlib.h>
#endif
+#ifdef STRING_WITH_STRINGS
+#include <string.h>
+#include <strings.h>
+#else
#ifdef HAVE_STRING_H
#include <string.h>
#else
@@ -42,6 +50,7 @@
#include <strings.h>
#endif
#endif
+#endif
#if !HAVE_DECL_STPCPY
extern char *stpcpy (char *__dest, const char *__src);
diff --git a/opcodes/tic30-dis.c b/opcodes/tic30-dis.c
index c6d0e3e..e2a5e6b 100644
--- a/opcodes/tic30-dis.c
+++ b/opcodes/tic30-dis.c
@@ -1,5 +1,5 @@
/* Disassembly routines for TMS320C30 architecture
- Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2009
+ Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2009, 2012
Free Software Foundation, Inc.
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
@@ -20,9 +20,9 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <errno.h>
#include <math.h>
-#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/tic30.h"
diff --git a/opcodes/tic4x-dis.c b/opcodes/tic4x-dis.c
index 4e15070..e07434b 100644
--- a/opcodes/tic4x-dis.c
+++ b/opcodes/tic4x-dis.c
@@ -1,6 +1,6 @@
/* Print instructions for the Texas TMS320C[34]X, for GDB and GNU Binutils.
- Copyright 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 2002, 2003, 2005, 2007, 2012 Free Software Foundation, Inc.
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
@@ -21,6 +21,7 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <math.h>
#include "libiberty.h"
#include "dis-asm.h"
diff --git a/opcodes/tic54x-dis.c b/opcodes/tic54x-dis.c
index 578af10..ba33d5e 100644
--- a/opcodes/tic54x-dis.c
+++ b/opcodes/tic54x-dis.c
@@ -1,5 +1,6 @@
/* Disassembly routines for TMS320C54X architecture
- Copyright 1999, 2000, 2001, 2005, 2007, 2009 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2005, 2007, 2009, 2012
+ Free Software Foundation, Inc.
Contributed by Timothy Wall (twall@cygnus.com)
This file is part of the GNU opcodes library.
@@ -19,10 +20,10 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <errno.h>
#include <math.h>
#include <stdlib.h>
-#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/tic54x.h"
#include "coff/tic54x.h"
diff --git a/opcodes/tic80-dis.c b/opcodes/tic80-dis.c
index 3089acc..a2f3ae6 100644
--- a/opcodes/tic80-dis.c
+++ b/opcodes/tic80-dis.c
@@ -1,5 +1,6 @@
/* Print TI TMS320C80 (MVP) instructions
- Copyright 1996, 1997, 1998, 2000, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 2000, 2005, 2007, 2012
+ Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -18,9 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
-
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/tic80.h"
#include "dis-asm.h"
diff --git a/opcodes/tic80-opc.c b/opcodes/tic80-opc.c
index 70e38ec..b4ac198 100644
--- a/opcodes/tic80-opc.c
+++ b/opcodes/tic80-opc.c
@@ -1,5 +1,6 @@
/* Opcode table for TI TMS320C80 (MVP).
- Copyright 1996, 1997, 2000, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 2000, 2005, 2007, 2012
+ Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -18,8 +19,8 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/tic80.h"
/* This file holds various tables for the TMS320C80 (MVP).
diff --git a/opcodes/tilegx-dis.c b/opcodes/tilegx-dis.c
index 3754756..fb713c1 100644
--- a/opcodes/tilegx-dis.c
+++ b/opcodes/tilegx-dis.c
@@ -1,5 +1,5 @@
/* tilegx-dis.c. Disassembly routines for the TILE-Gx architecture.
- Copyright 2011 Free Software Foundation, Inc.
+ Copyright 2011, 2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -18,12 +18,12 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stddef.h>
#include <assert.h>
#include "bfd.h"
#include "elf/tilegx.h"
#include "elf-bfd.h"
-#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/tilegx.h"
diff --git a/opcodes/tilegx-opc.c b/opcodes/tilegx-opc.c
index 682dd1b..b900cd1 100644
--- a/opcodes/tilegx-opc.c
+++ b/opcodes/tilegx-opc.c
@@ -17,9 +17,10 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
+
/* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */
#define BFD_RELOC(x) BFD_RELOC_##x
-
#include "bfd.h"
/* Special registers. */
diff --git a/opcodes/tilepro-dis.c b/opcodes/tilepro-dis.c
index bf9910c..a0a8c9a 100644
--- a/opcodes/tilepro-dis.c
+++ b/opcodes/tilepro-dis.c
@@ -1,5 +1,5 @@
/* tilepro-dis.c. Disassembly routines for the TILEPro architecture.
- Copyright 2011 Free Software Foundation, Inc.
+ Copyright 2011, 2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -18,12 +18,12 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stddef.h>
#include <assert.h>
#include "bfd.h"
#include "elf/tilepro.h"
#include "elf-bfd.h"
-#include "sysdep.h"
#include "dis-asm.h"
#include "opcode/tilepro.h"
diff --git a/opcodes/tilepro-opc.c b/opcodes/tilepro-opc.c
index 9158d0e..eca7280 100644
--- a/opcodes/tilepro-opc.c
+++ b/opcodes/tilepro-opc.c
@@ -17,9 +17,10 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
+
/* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */
#define BFD_RELOC(x) BFD_RELOC_##x
-
#include "bfd.h"
/* Special registers. */
diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c
index cf0d386..b4e786e 100644
--- a/opcodes/v850-dis.c
+++ b/opcodes/v850-dis.c
@@ -1,6 +1,6 @@
/* Disassemble V850 instructions.
- Copyright 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2010
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2010,
+ 2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -20,9 +20,8 @@
MA 02110-1301, USA. */
-#include <stdio.h>
-
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/v850.h"
#include "dis-asm.h"
#include "opintl.h"
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 4ba20d3..0867d43 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -19,8 +19,8 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "opcode/v850.h"
#include "bfd.h"
#include "opintl.h"
diff --git a/opcodes/vax-dis.c b/opcodes/vax-dis.c
index a119f05..818b41a 100644
--- a/opcodes/vax-dis.c
+++ b/opcodes/vax-dis.c
@@ -1,5 +1,5 @@
/* Print VAX instructions.
- Copyright 1995, 1998, 2000, 2001, 2002, 2005, 2007, 2009
+ Copyright 1995, 1998, 2000, 2001, 2002, 2005, 2007, 2009, 2012
Free Software Foundation, Inc.
Contributed by Pauline Middelink <middelin@polyware.iaf.nl>
@@ -20,9 +20,9 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <setjmp.h>
#include <string.h>
-#include "sysdep.h"
#include "opcode/vax.h"
#include "dis-asm.h"
diff --git a/opcodes/w65-dis.c b/opcodes/w65-dis.c
index 60d9b04..943e432 100644
--- a/opcodes/w65-dis.c
+++ b/opcodes/w65-dis.c
@@ -1,5 +1,5 @@
/* Disassemble WDC 65816 instructions.
- Copyright 1995, 1998, 2000, 2001, 2002, 2005, 2007
+ Copyright 1995, 1998, 2000, 2001, 2002, 2005, 2007, 2012
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +19,9 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
+
#define STATIC_TABLE
#define DEFINE_TABLE
diff --git a/opcodes/xgate-dis.c b/opcodes/xgate-dis.c
index f703055..8c722f5 100644
--- a/opcodes/xgate-dis.c
+++ b/opcodes/xgate-dis.c
@@ -1,5 +1,5 @@
/* xgate-dis.c -- Freescale XGATE disassembly
- Copyright 2009, 2010, 2011
+ Copyright 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
Written by Sean Keys (skeys@ipdatasys.com)
@@ -18,11 +18,10 @@
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA.
-*/
+ MA 02110-1301, USA. */
-#include <assert.h>
#include "sysdep.h"
+#include <assert.h>
#include "dis-asm.h"
#include "opintl.h"
#include "libiberty.h"
@@ -35,34 +34,31 @@
#define XGATE_NINE_SIGNBIT 0x100
#define XGATE_TEN_SIGNBIT 0x200
-/* Structures */
-struct decodeInfo {
+/* Structures. */
+struct decodeInfo
+{
unsigned int operMask;
unsigned int operMasksRegisterBits;
struct xgate_opcode *opcodePTR;
};
/* Prototypes for local functions. */
-static int
-print_insn( bfd_vma, struct disassemble_info *);
-static int
-read_memory( bfd_vma, bfd_byte*, int, struct disassemble_info *);
-static int
-ripBits(unsigned int *, int,
- struct xgate_opcode *, unsigned int);
-int
-macro_search(char *, char *);
-struct decodeInfo *
-find_match(unsigned int raw_code);
+static int print_insn (bfd_vma, struct disassemble_info *);
+static int read_memory (bfd_vma, bfd_byte*, int, struct disassemble_info *);
+static int ripBits (unsigned int *, int,
+ struct xgate_opcode *, unsigned int);
+static int macro_search (char *, char *);
+static struct decodeInfo * find_match (unsigned int);
-/* statics */
+/* Statics. */
static struct decodeInfo *decodeTable;
static int initialized;
static char previousOpName[10];
static unsigned int perviousBin;
/* Disassemble one instruction at address 'memaddr'. Returns the number
- of bytes used by that instruction. */
+ of bytes used by that instruction. */
+
static int
print_insn (bfd_vma memaddr, struct disassemble_info* info)
{
@@ -82,11 +78,11 @@
bfd_vma absAddress;
unsigned int operMaskReg = 0;
- /* initialize our array of opcode masks and check them against our constant
- table */
+ /* Initialize our array of opcode masks and check them against our constant
+ table. */
if (!initialized)
{
- decodeTable = xmalloc(sizeof(struct decodeInfo) * xgate_num_opcodes);
+ decodeTable = xmalloc (sizeof (struct decodeInfo) * xgate_num_opcodes);
for (i = 0, decodeTablePTR = decodeTable; i < xgate_num_opcodes;
i++, decodeTablePTR++, opcodePTR++)
{
@@ -101,33 +97,35 @@
mask |= (*s == '0' || *s == '1');
operandRegisterBits |= (*s == 'r');
}
- /* asserting will uncover inconsistencies in our table */
- assert(
- (s - opcodePTR->format) == 16 || (s - opcodePTR->format) == 32);
- assert(opcodePTR->bin_opcode == bin);
+ /* Asserting will uncover inconsistencies in our table. */
+ assert ((s - opcodePTR->format) == 16 || (s - opcodePTR->format) == 32);
+ assert (opcodePTR->bin_opcode == bin);
+
decodeTablePTR->operMask = mask;
decodeTablePTR->operMasksRegisterBits = operandRegisterBits;
decodeTablePTR->opcodePTR = opcodePTR;
}
initialized = 1;
}
- /* read 16 bits */
+
+ /* Read 16 bits. */
bytesRead += XGATE_TWO_BYTES;
- status = read_memory(memaddr, buffer, XGATE_TWO_BYTES, info);
+ status = read_memory (memaddr, buffer, XGATE_TWO_BYTES, info);
if (status == 0)
{
raw_code = buffer[0];
raw_code <<= 8;
raw_code += buffer[1];
- decodePTR = find_match(raw_code);
+ decodePTR = find_match (raw_code);
if (decodePTR)
{
operMaskReg = decodePTR->operMasksRegisterBits;
(*info->fprintf_func)(info->stream, "%s", decodePTR->opcodePTR->name);
+
/* First we compare the shorthand format of the constraints. If we
- still are unable to pinpoint the operands
- we analyze the opcodes constraint string. */
+ still are unable to pinpoint the operands
+ we analyze the opcodes constraint string. */
switch (decodePTR->opcodePTR->sh_format)
{
case XG_R_C:
@@ -145,13 +143,13 @@
case XG_INH:
break;
case XG_R_R_R:
- if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_TRI))
+ if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_TRI))
{
(*info->fprintf_func)(info->stream, " R%x, R%x, R%x",
(raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7,
(raw_code >> 2) & 0x7);
}
- else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_IDR))
+ else if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_IDR))
{
if (raw_code & 0x01)
{
@@ -179,19 +177,19 @@
}
break;
case XG_R_R:
- if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_DYA_MON))
+ if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_DYA_MON))
{
- operandOne = ripBits(&operMaskReg, 3, decodePTR->opcodePTR,
+ operandOne = ripBits (&operMaskReg, 3, decodePTR->opcodePTR,
raw_code);
- operandTwo = ripBits(&operMaskReg, 3, decodePTR->opcodePTR,
+ operandTwo = ripBits (&operMaskReg, 3, decodePTR->opcodePTR,
raw_code);
(*info->fprintf_func)(info->stream, " R%x, R%x", operandOne,
operandTwo);
}
- else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_DYA))
+ else if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_DYA))
{
- operandOne = ripBits(&operMaskReg, 3, opcodePTR, raw_code);
- operandTwo = ripBits(&operMaskReg, 3, opcodePTR, raw_code);
+ operandOne = ripBits (&operMaskReg, 3, opcodePTR, raw_code);
+ operandTwo = ripBits (&operMaskReg, 3, opcodePTR, raw_code);
(*info->fprintf_func)(info->stream, " R%x, R%x", operandOne,
operandTwo);
}
@@ -206,20 +204,20 @@
(raw_code >> 8) & 0x7, (raw_code >> 5) & 0x7, raw_code & 0x1f);
break;
case XG_R:
- operandOne = ripBits(&operMaskReg, 3, decodePTR->opcodePTR,
+ operandOne = ripBits (&operMaskReg, 3, decodePTR->opcodePTR,
raw_code);
(*info->fprintf_func)(info->stream, " R%x", operandOne);
break;
case XG_I | XG_PCREL:
- if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_REL9))
+ if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_REL9))
{
- /* if address is negative handle it accordingly */
+ /* If address is negative handle it accordingly. */
if (raw_code & XGATE_NINE_SIGNBIT)
{
- relAddr = XGATE_NINE_BITS >> 1; /* clip sign bit */
- relAddr = ~relAddr; /* make signed */
- relAddr |= (raw_code & 0xFF) + 1; /* apply our value */
- relAddr <<= 1; /* multiply by two as per processor docs */
+ relAddr = XGATE_NINE_BITS >> 1; /* Clip sign bit. */
+ relAddr = ~relAddr; /* Make signed. */
+ relAddr |= (raw_code & 0xFF) + 1; /* Apply our value. */
+ relAddr <<= 1; /* Multiply by two as per processor docs. */
}
else
{
@@ -230,15 +228,15 @@
(*info->fprintf_func)(info->stream, " Abs* 0x");
(*info->print_address_func)(memaddr + relAddr, info);
}
- else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_REL10))
+ else if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_REL10))
{
- /* if address is negative handle it accordingly */
+ /* If address is negative handle it accordingly. */
if (raw_code & XGATE_TEN_SIGNBIT)
{
- relAddr = XGATE_TEN_BITS >> 1; /* clip sign bit */
- relAddr = ~relAddr; /* make signed */
- relAddr |= (raw_code & 0x1FF) + 1; /* apply our value */
- relAddr <<= 1; /* multiply by two as per processor docs */
+ relAddr = XGATE_TEN_BITS >> 1; /* Clip sign bit. */
+ relAddr = ~relAddr; /* Make signed. */
+ relAddr |= (raw_code & 0x1FF) + 1; /* Apply our value. */
+ relAddr <<= 1; /* Multiply by two as per processor docs. */
}
else
{
@@ -257,14 +255,14 @@
}
break;
case XG_R_I:
- if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_IMM4))
+ if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_IMM4))
{
(*info->fprintf_func)(info->stream, " R%x, #0x%02x",
(raw_code >> 8) & 0x7, (raw_code >> 4) & 0xF);
}
- else if (!strcmp(decodePTR->opcodePTR->constraints, XGATE_OP_IMM8))
+ else if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_IMM8))
{
- if (macro_search(decodePTR->opcodePTR->name, previousOpName) &&
+ if (macro_search (decodePTR->opcodePTR->name, previousOpName) &&
previousOpName[0])
{
absAddress = (0xFF & raw_code) << 8;
@@ -276,7 +274,7 @@
}
else
{
- strcpy(previousOpName, decodePTR->opcodePTR->name);
+ strcpy (previousOpName, decodePTR->opcodePTR->name);
(*info->fprintf_func)(info->stream, " R%x, #0x%02x",
(raw_code >> 8) & 0x7, raw_code & 0xff);
}
@@ -302,7 +300,7 @@
else
{
(*info->fprintf_func)(info->stream,
- " unable to find opcode match #0%x", raw_code);
+ " unable to find opcode match #0%x", raw_code);
}
}
return bytesRead;
@@ -329,45 +327,51 @@
}
static int
-ripBits(unsigned int *operandBitsRemaining, int numBitsRequested,
- struct xgate_opcode *opcodePTR, unsigned int memory)
+ripBits (unsigned int *operandBitsRemaining,
+ int numBitsRequested,
+ struct xgate_opcode *opcodePTR,
+ unsigned int memory)
{
unsigned int currentBit;
int operand;
int numBitsFound;
+
for (operand = 0, numBitsFound = 0, currentBit = 1
- << ((opcodePTR->size * 8) - 1);
- (numBitsFound < numBitsRequested) && currentBit; currentBit >>= 1)
+ << ((opcodePTR->size * 8) - 1);
+ (numBitsFound < numBitsRequested) && currentBit; currentBit >>= 1)
{
- if(currentBit & *operandBitsRemaining) {
- *operandBitsRemaining &= ~(currentBit); /* consume the current bit */
- operand <<= 1; /* make room for our next bit */
- numBitsFound++;
- operand |= (currentBit & memory) > 0;
- }
- }
+ if (currentBit & *operandBitsRemaining)
+ {
+ *operandBitsRemaining &= ~(currentBit); /* Consume the current bit. */
+ operand <<= 1; /* Make room for our next bit. */
+ numBitsFound++;
+ operand |= (currentBit & memory) > 0;
+ }
+ }
return operand;
}
-int
-macro_search(char *currentName, char *lastName)
+static int
+macro_search (char *currentName, char *lastName)
{
int i;
int length = 0;
char *where;
+
for (i = 0; i < xgate_num_opcodes; i++)
{
- where = strstr(xgate_opcodes[i].constraints, lastName);
+ where = strstr (xgate_opcodes[i].constraints, lastName);
+
if (where)
{
- length = strlen(where);
+ length = strlen (where);
}
if (length)
{
- where = strstr(xgate_opcodes[i].constraints, currentName);
+ where = strstr (xgate_opcodes[i].constraints, currentName);
if (where)
{
- length = strlen(where);
+ length = strlen (where);
return 1;
}
}
@@ -375,8 +379,8 @@
return 0;
}
-struct decodeInfo*
-find_match(unsigned int raw_code)
+static struct decodeInfo *
+find_match (unsigned int raw_code)
{
struct decodeInfo *decodeTablePTR = 0;
int i;
@@ -387,16 +391,14 @@
if ((raw_code & decodeTablePTR->operMask)
== decodeTablePTR->opcodePTR->bin_opcode)
{
- /* make sure we didn't run into a macro or alias */
+ /* Make sure we didn't run into a macro or alias. */
if (decodeTablePTR->opcodePTR->cycles_min != 0)
{
return decodeTablePTR;
break;
}
else
- {
- continue;
- }
+ continue;
}
}
return 0;
diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c
index 768d8f3..c21024e 100644
--- a/opcodes/xtensa-dis.c
+++ b/opcodes/xtensa-dis.c
@@ -1,5 +1,5 @@
/* xtensa-dis.c. Disassembly functions for Xtensa.
- Copyright 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
+ Copyright 2003, 2004, 2005, 2007, 2012 Free Software Foundation, Inc.
Contributed by Bob Wilson at Tensilica, Inc. (bwilson@tensilica.com)
This file is part of the GNU opcodes library.
@@ -19,6 +19,7 @@
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#include "sysdep.h"
#include <stdlib.h>
#include <stdio.h>
#include <sys/types.h>
@@ -26,7 +27,6 @@
#include "xtensa-isa.h"
#include "ansidecl.h"
#include "libiberty.h"
-#include "sysdep.h"
#include "dis-asm.h"
#include <setjmp.h>
diff --git a/opcodes/z8kgen.c b/opcodes/z8kgen.c
index ecb56b7..8f22efd 100644
--- a/opcodes/z8kgen.c
+++ b/opcodes/z8kgen.c
@@ -1,4 +1,5 @@
-/* Copyright 2001, 2002, 2003, 2005, 2007, 2009 Free Software Foundation, Inc.
+/* Copyright 2001, 2002, 2003, 2005, 2007, 2009, 2012
+ Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@ -19,8 +20,8 @@
/* This program generates z8k-opc.h. */
-#include <stdio.h>
#include "sysdep.h"
+#include <stdio.h>
#include "libiberty.h"
#define BYTE_INFO_LEN 10
diff --git a/patches/ChangeLog b/patches/ChangeLog
index 6312c8e..229edb3 100644
--- a/patches/ChangeLog
+++ b/patches/ChangeLog
@@ -1,3 +1,70 @@
+2012-06-04 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-lto-mixed-18.patch: Fix ar/nm/ranlib --plugin.
+
+2012-05-25 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-lto-mixed-18.patch: Updated.
+
+2012-05-25 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-shr-100.patch: Updated.
+
+2012-05-25 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr13909.patch: Removed.
+ * README: Likewise.
+
+2012-05-23 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr13909.patch: Updated.
+
+2012-05-22 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr13909.patch: Updated.
+
+ * binutils-pr14105.patch: Removed.
+ * README: Likewise.
+
+2012-05-21 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-indirect-5.patch: Updated.
+
+2012-05-15 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr13962.patch: Removed.
+ * README: Likewise.
+
+2012-05-14 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr13909.patch: New.
+ * README: Apply it.
+
+2012-05-14 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr14105.patch: New.
+ * README: Apply it.
+
+2012-05-14 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr13962.patch: New.
+ * README: Apply it.
+
+2012-05-13 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-signed-8.patch: Removed.
+ * README: Likewise.
+
+2012-05-12 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr14088.patch: Removed.
+ * README: Likewise.
+
+2012-05-10 H.J. Lu <hjl.tools@gmail.com>
+
+ * binutils-pr14088.patch: New.
+ * README: Apply it.
+
2012-05-07 H.J. Lu <hjl.tools@gmail.com>
* binutils-lto-mixed-18.patch: Updated.
diff --git a/patches/README b/patches/README
index c24a505..667e473 100644
--- a/patches/README
+++ b/patches/README
@@ -19,7 +19,6 @@
binutils-indirect-5.patch
binutils-shr-100.patch
binutils-error-15.patch
- binutils-signed-8.patch
binutils-weakdef-2.patch
bfd-64k-2.patch
binutils-lto-mixed-18.patch
diff --git a/patches/binutils-indirect-5.patch b/patches/binutils-indirect-5.patch
index 1063dec..c779161 100644
--- a/patches/binutils-indirect-5.patch
+++ b/patches/binutils-indirect-5.patch
@@ -43,7 +43,7 @@
* ld-elf/indirect4c.c: Likewise.
diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 65d3a2c..69b7755 100644
+index 3614575..74a1b53 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -893,6 +893,33 @@ elf_merge_st_other (bfd *abfd, struct elf_link_hash_entry *h,
@@ -221,7 +221,7 @@
switch (h->root.type)
{
default:
-@@ -8657,6 +8697,11 @@ elf_link_output_extsym (struct bfd_hash_entry *bh, void *data)
+@@ -8659,6 +8699,11 @@ elf_link_output_extsym (struct bfd_hash_entry *bh, void *data)
{
bfd *def_bfd;
const char *msg;
@@ -233,18 +233,18 @@
if (ELF_ST_VISIBILITY (h->other) == STV_INTERNAL)
msg = _("%B: internal symbol `%s' in %B is referenced by DSO");
-@@ -8665,8 +8710,8 @@ elf_link_output_extsym (struct bfd_hash_entry *bh, void *data)
+@@ -8667,8 +8712,8 @@ elf_link_output_extsym (struct bfd_hash_entry *bh, void *data)
else
msg = _("%B: local symbol `%s' in %B is referenced by DSO");
- def_bfd = flaginfo->output_bfd;
+ def_bfd = flinfo->output_bfd;
- if (h->root.u.def.section != bfd_abs_section_ptr)
- def_bfd = h->root.u.def.section->owner;
+ if (hi->root.u.def.section != bfd_abs_section_ptr)
+ def_bfd = hi->root.u.def.section->owner;
- (*_bfd_error_handler) (msg, flaginfo->output_bfd, def_bfd,
+ (*_bfd_error_handler) (msg, flinfo->output_bfd, def_bfd,
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
-@@ -8903,6 +8948,23 @@ elf_link_output_extsym (struct bfd_hash_entry *bh, void *data)
+@@ -8905,6 +8950,23 @@ elf_link_output_extsym (struct bfd_hash_entry *bh, void *data)
{
bfd_byte *esym;
@@ -259,15 +259,15 @@
+ {
+ (*_bfd_error_handler)
+ (_("%B: No symbol version section for versioned symbol `%s'"),
-+ flaginfo->output_bfd, h->root.root.string);
++ flinfo->output_bfd, h->root.root.string);
+ eoinfo->failed = TRUE;
+ return FALSE;
+ }
+ }
+
sym.st_name = h->dynstr_index;
- esym = flaginfo->dynsym_sec->contents + h->dynindx * bed->s->sizeof_sym;
- if (! check_dynsym (flaginfo->output_bfd, &sym))
+ esym = flinfo->dynsym_sec->contents + h->dynindx * bed->s->sizeof_sym;
+ if (!check_dynsym (flinfo->output_bfd, &sym))
diff --git a/ld/testsuite/ld-elf/indirect.exp b/ld/testsuite/ld-elf/indirect.exp
new file mode 100644
index 0000000..603179a
diff --git a/patches/binutils-lto-mixed-18.patch b/patches/binutils-lto-mixed-18.patch
index 2e0af18..f61564c 100644
--- a/patches/binutils-lto-mixed-18.patch
+++ b/patches/binutils-lto-mixed-18.patch
@@ -1,5 +1,10 @@
bfd/
+2012-06-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * plugin.c (add_symbols): Set tdata.plugin_data before calling
+ bfd_plugin_get_symbols_in_object_only.
+
2011-10-16 H.J. Lu <hongjiu.lu@intel.com>
* plugin.c (add_symbols): Call
@@ -106,8 +111,8 @@
2011-05-15 H.J. Lu <hongjiu.lu@intel.com>
- * lexsup.c (option_values): Add OPTION_PLUGIN_SAVE_TEMPS.
- (ld_options): Add -plugin-save-temps.
+ * ldlex.h (option_values): Add OPTION_PLUGIN_SAVE_TEMPS.
+ * lexsup.c (ld_options): Add -plugin-save-temps.
(parse_args): Handle OPTION_PLUGIN_SAVE_TEMPS.
* plugin.c (plugin_save_temps): New.
@@ -423,10 +428,10 @@
* lib/ld-lib.exp (check_lto_available): New.
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index a66c74f..fe2d74e 100644
+index 585a54a..3429d96 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
-@@ -1022,6 +1022,9 @@ struct bfd_section *bfd_create_gnu_debuglink_section
+@@ -1028,6 +1028,9 @@ struct bfd_section *bfd_create_gnu_debuglink_section
bfd_boolean bfd_fill_in_gnu_debuglink_section
(bfd *abfd, struct bfd_section *sect, const char *filename);
@@ -436,7 +441,7 @@
/* Extracted from libbfd.c. */
/* Byte swapping macros for user section data. */
-@@ -1550,6 +1553,9 @@ extern asection std_section[4];
+@@ -1553,6 +1556,9 @@ extern asection std_section[4];
#define BFD_COM_SECTION_NAME "*COM*"
#define BFD_IND_SECTION_NAME "*IND*"
@@ -446,7 +451,7 @@
/* Pointer to the common section. */
#define bfd_com_section_ptr (&std_section[0])
/* Pointer to the undefined section. */
-@@ -5378,6 +5384,14 @@ enum bfd_direction
+@@ -5438,6 +5444,14 @@ enum bfd_direction
both_direction = 3
};
@@ -461,7 +466,7 @@
struct bfd
{
/* A unique identifier of the BFD */
-@@ -5525,6 +5539,9 @@ struct bfd
+@@ -5585,6 +5599,9 @@ struct bfd
/* The last section on the section list. */
struct bfd_section *section_last;
@@ -471,7 +476,7 @@
/* The number of sections. */
unsigned int section_count;
-@@ -5643,6 +5660,9 @@ struct bfd
+@@ -5703,6 +5720,9 @@ struct bfd
/* Set if only required symbols should be added in the link hash table for
this object. Used by VMS linkers. */
unsigned int selective_search : 1;
@@ -481,7 +486,7 @@
};
typedef enum bfd_error
-@@ -5859,6 +5879,8 @@ void bfd_emul_set_commonpagesize (const char *, bfd_vma);
+@@ -5919,6 +5939,8 @@ void bfd_emul_set_commonpagesize (const char *, bfd_vma);
char *bfd_demangle (bfd *, const char *, int);
@@ -491,7 +496,7 @@
symindex bfd_get_next_mapent
(bfd *abfd, symindex previous, carsym **sym);
diff --git a/bfd/bfd.c b/bfd/bfd.c
-index a1664b5..8ec3d6e 100644
+index 640b420..9cdac38 100644
--- a/bfd/bfd.c
+++ b/bfd/bfd.c
@@ -43,6 +43,14 @@ CODE_FRAGMENT
@@ -567,10 +572,10 @@
+ return NULL;
+}
diff --git a/bfd/elf.c b/bfd/elf.c
-index d040d14..d8e3585 100644
+index ac7be2c..cb5d6c9 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
-@@ -2086,6 +2086,7 @@ static const struct bfd_elf_special_section special_sections_g[] =
+@@ -2104,6 +2104,7 @@ static const struct bfd_elf_special_section special_sections_g[] =
{ STRING_COMMA_LEN (".gnu.linkonce.b"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE },
{ STRING_COMMA_LEN (".gnu.lto_"), -1, SHT_PROGBITS, SHF_EXCLUDE },
{ STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE },
@@ -579,10 +584,10 @@
{ STRING_COMMA_LEN (".gnu.version_d"), 0, SHT_GNU_verdef, 0 },
{ STRING_COMMA_LEN (".gnu.version_r"), 0, SHT_GNU_verneed, 0 },
diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 65d3a2c..7baa713 100644
+index e715942..ce80bc2 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
-@@ -5078,6 +5078,9 @@ elf_link_add_archive_symbols (bfd *abfd, struct bfd_link_info *info)
+@@ -5085,6 +5085,9 @@ elf_link_add_archive_symbols (bfd *abfd, struct bfd_link_info *info)
something wrong with the archive. */
if (element->archive_pass != 0)
{
@@ -653,10 +658,10 @@
}
diff --git a/bfd/opncls.c b/bfd/opncls.c
-index 9d33f39..673c7f8 100644
+index 7c1d2f9..75d498b 100644
--- a/bfd/opncls.c
+++ b/bfd/opncls.c
-@@ -1529,3 +1529,69 @@ bfd_fill_in_gnu_debuglink_section (bfd *abfd,
+@@ -1543,3 +1543,69 @@ bfd_fill_in_gnu_debuglink_section (bfd *abfd,
return TRUE;
}
@@ -727,10 +732,10 @@
+ return name;
+}
diff --git a/bfd/plugin.c b/bfd/plugin.c
-index 0a29e37..9206595 100644
+index 8d2c4b2..1e6d82b 100644
--- a/bfd/plugin.c
+++ b/bfd/plugin.c
-@@ -131,6 +131,139 @@ register_claim_file (ld_plugin_claim_file_handler handler)
+@@ -130,6 +130,139 @@ register_claim_file (ld_plugin_claim_file_handler handler)
return LDPS_OK;
}
@@ -870,18 +875,23 @@
static enum ld_plugin_status
add_symbols (void * handle,
int nsyms,
-@@ -143,7 +276,9 @@ add_symbols (void * handle,
+@@ -142,10 +275,13 @@ add_symbols (void * handle,
plugin_data->nsyms = nsyms;
plugin_data->syms = syms;
- if (nsyms != 0)
++ abfd->tdata.plugin_data = plugin_data;
++
+ bfd_plugin_get_symbols_in_object_only (abfd);
+
+ if ((nsyms + plugin_data->object_only_nsyms) != 0)
abfd->flags |= HAS_SYMS;
- abfd->tdata.plugin_data = plugin_data;
-@@ -390,7 +525,8 @@ static long
+- abfd->tdata.plugin_data = plugin_data;
+ return LDPS_OK;
+ }
+
+@@ -389,7 +525,8 @@ static long
bfd_plugin_get_symtab_upper_bound (bfd *abfd)
{
struct plugin_data_struct *plugin_data = abfd->tdata.plugin_data;
@@ -891,7 +901,7 @@
BFD_ASSERT (nsyms >= 0);
-@@ -424,12 +560,7 @@ bfd_plugin_canonicalize_symtab (bfd *abfd,
+@@ -423,12 +560,7 @@ bfd_plugin_canonicalize_symtab (bfd *abfd,
struct plugin_data_struct *plugin_data = abfd->tdata.plugin_data;
long nsyms = plugin_data->nsyms;
const struct ld_plugin_symbol *syms = plugin_data->syms;
@@ -905,7 +915,7 @@
for (i = 0; i < nsyms; i++)
{
-@@ -442,10 +573,11 @@ bfd_plugin_canonicalize_symtab (bfd *abfd,
+@@ -441,10 +573,11 @@ bfd_plugin_canonicalize_symtab (bfd *abfd,
s->name = syms[i].name;
s->value = 0;
s->flags = convert_flags (&syms[i]);
@@ -918,7 +928,7 @@
break;
case LDPK_UNDEF:
case LDPK_WEAKUNDEF:
-@@ -453,15 +585,18 @@ bfd_plugin_canonicalize_symtab (bfd *abfd,
+@@ -452,15 +585,18 @@ bfd_plugin_canonicalize_symtab (bfd *abfd,
break;
case LDPK_DEF:
case LDPK_WEAKDEF:
@@ -954,10 +964,10 @@
plugin_data_struct;
diff --git a/bfd/section.c b/bfd/section.c
-index db7e239..3246ab1 100644
+index 0a7908e..b48da6c 100644
--- a/bfd/section.c
+++ b/bfd/section.c
-@@ -555,6 +555,9 @@ CODE_FRAGMENT
+@@ -552,6 +552,9 @@ CODE_FRAGMENT
.#define BFD_COM_SECTION_NAME "*COM*"
.#define BFD_IND_SECTION_NAME "*IND*"
.
@@ -968,10 +978,10 @@
.#define bfd_com_section_ptr (&std_section[0])
.{* Pointer to the undefined section. *}
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
-index bd93d00..f56dc22 100644
+index 40250ad..d0d112f 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
-@@ -908,30 +908,6 @@ is_specified_symbol (const char *name, htab_t htab)
+@@ -918,30 +918,6 @@ is_specified_symbol (const char *name, htab_t htab)
return htab_find (htab, name) != NULL;
}
@@ -999,10 +1009,10 @@
- return NULL;
-}
-
- /* See if a non-group section is being removed. */
+ /* Return TRUE if the section is a DWO section. */
static bfd_boolean
-@@ -982,7 +958,7 @@ is_strip_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec)
+@@ -1009,7 +985,7 @@ is_strip_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec)
/* PR binutils/3181
If we are going to strip the group signature symbol, then
strip the group section too. */
@@ -1011,7 +1021,7 @@
if (gsym != NULL)
gname = gsym->name;
else
-@@ -2579,7 +2555,7 @@ setup_section (bfd *ibfd, sec_ptr isection, void *obfdarg)
+@@ -2608,7 +2584,7 @@ setup_section (bfd *ibfd, sec_ptr isection, void *obfdarg)
if ((isection->flags & SEC_GROUP) != 0)
{
@@ -1021,10 +1031,10 @@
if (gsym != NULL)
{
diff --git a/binutils/readelf.c b/binutils/readelf.c
-index 937cac1..5034ef3 100644
+index 527edf2..296d977 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
-@@ -3051,6 +3051,7 @@ get_section_type_name (unsigned int sh_type)
+@@ -3052,6 +3052,7 @@ get_section_type_name (unsigned int sh_type)
case 0x7ffffffd: return "AUXILIARY";
case 0x7fffffff: return "FILTER";
case SHT_GNU_LIBLIST: return "GNU_LIBLIST";
@@ -1095,7 +1105,7 @@
EOF
diff --git a/ld/emultempl/armelf.em b/ld/emultempl/armelf.em
-index 78224f4..0ab2ed1 100644
+index 3b881dd..a37a35d 100644
--- a/ld/emultempl/armelf.em
+++ b/ld/emultempl/armelf.em
@@ -365,7 +365,7 @@ gld${EMULATION_NAME}_after_allocation (void)
@@ -1123,7 +1133,7 @@
-LDEMUL_FINISH=gld${EMULATION_NAME}_finish
+LDEMUL_FINISH=arm_finish
diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
-index 7d31864..5c5ffe5 100644
+index 2b7a352..afbc719 100644
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -68,6 +68,7 @@ static void gld${EMULATION_NAME}_before_allocation (void);
@@ -1134,7 +1144,7 @@
EOF
if [ "x${USE_LIBPATH}" = xyes ] ; then
-@@ -1758,6 +1759,8 @@ output_rel_find (asection *sec, int isdyn)
+@@ -1759,6 +1760,8 @@ output_rel_find (asection *sec, int isdyn)
return last;
}
@@ -1143,7 +1153,7 @@
/* Place an orphan section. We use this to put random SHF_ALLOC
sections in the right segment. */
-@@ -1766,7 +1769,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
+@@ -1767,7 +1770,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
const char *secname,
int constraint)
{
@@ -1152,7 +1162,7 @@
{
{ ".text",
SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE,
-@@ -1793,6 +1796,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
+@@ -1794,6 +1797,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
SEC_HAS_CONTENTS,
0, 0, 0, 0 },
};
@@ -1160,7 +1170,7 @@
enum orphan_save_index
{
orphan_text = 0,
-@@ -1804,7 +1808,6 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
+@@ -1805,7 +1809,6 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
orphan_sdata,
orphan_nonalloc
};
@@ -1168,7 +1178,7 @@
struct orphan_save *place;
lang_output_section_statement_type *after;
lang_output_section_statement_type *os;
-@@ -1881,15 +1884,22 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
+@@ -1882,15 +1885,22 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
if (!orphan_init_done)
{
@@ -1192,7 +1202,7 @@
orphan_init_done = 1;
}
-@@ -1959,6 +1969,27 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
+@@ -1960,6 +1970,27 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
EOF
fi
@@ -1220,7 +1230,7 @@
if test x"$LDEMUL_AFTER_ALLOCATION" != xgld"$EMULATION_NAME"_after_allocation; then
fragment <<EOF
-@@ -2491,7 +2522,7 @@ struct ld_emulation_xfer_struct ld_${EMULATION_NAME}_emulation =
+@@ -2492,7 +2523,7 @@ struct ld_emulation_xfer_struct ld_${EMULATION_NAME}_emulation =
${LDEMUL_GET_SCRIPT-gld${EMULATION_NAME}_get_script},
"${EMULATION_NAME}",
"${OUTPUT_FORMAT}",
@@ -1230,10 +1240,10 @@
${LDEMUL_OPEN_DYNAMIC_ARCHIVE-gld${EMULATION_NAME}_open_dynamic_archive},
${LDEMUL_PLACE_ORPHAN-gld${EMULATION_NAME}_place_orphan},
diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em
-index 0923d21..3b2e4bb 100644
+index d578f7f..bad3e2c 100644
--- a/ld/emultempl/ppc64elf.em
+++ b/ld/emultempl/ppc64elf.em
-@@ -532,7 +532,7 @@ gld${EMULATION_NAME}_after_allocation (void)
+@@ -533,7 +533,7 @@ gld${EMULATION_NAME}_after_allocation (void)
/* Final emulation specific call. */
static void
@@ -1242,7 +1252,7 @@
{
/* e_entry on PowerPC64 points to the function descriptor for
_start. If _start is missing, default to the first function
-@@ -564,7 +564,7 @@ gld${EMULATION_NAME}_finish (void)
+@@ -565,7 +565,7 @@ gld${EMULATION_NAME}_finish (void)
}
ppc64_elf_restore_symbols (&link_info);
@@ -1251,7 +1261,7 @@
}
-@@ -856,6 +856,6 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
+@@ -867,6 +867,6 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
#
LDEMUL_BEFORE_ALLOCATION=ppc_before_allocation
LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
@@ -1260,7 +1270,7 @@
LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=ppc_create_output_section_statements
LDEMUL_NEW_VERS_PATTERN=gld${EMULATION_NAME}_new_vers_pattern
diff --git a/ld/emultempl/spuelf.em b/ld/emultempl/spuelf.em
-index d3e3c70..cd1316f 100644
+index 2bcfcc2..35c4d41 100644
--- a/ld/emultempl/spuelf.em
+++ b/ld/emultempl/spuelf.em
@@ -416,7 +416,7 @@ spu_elf_relink (void)
@@ -1303,7 +1313,7 @@
/* It opened OK, the format checked out, and the plugins have had
their chance to claim it, so this is success. */
diff --git a/ld/ldlang.c b/ld/ldlang.c
-index beb84d3..66216c5 100644
+index 4e75624..9674f2e 100644
--- a/ld/ldlang.c
+++ b/ld/ldlang.c
@@ -38,6 +38,7 @@
@@ -1345,7 +1355,7 @@
/* Exported variables. */
const char *output_target;
-@@ -1206,14 +1217,17 @@ output_section_statement_table_free (void)
+@@ -1204,14 +1215,17 @@ output_section_statement_table_free (void)
/* Build enough state so that the parser can build its tree. */
void
@@ -1365,7 +1375,7 @@
lang_list_init (stat_ptr);
lang_list_init (&input_file_chain);
-@@ -1232,10 +1246,11 @@ lang_init (void)
+@@ -1230,10 +1244,11 @@ lang_init (void)
simpler to re-use working machinery than using a linked list in terms
of code-complexity here in ld, besides the initialization which just
looks like other code here. */
@@ -1381,7 +1391,7 @@
einfo (_("%P%F: can not create hash table: %E\n"));
}
-@@ -2782,6 +2797,12 @@ load_symbols (lang_input_statement_type *entry,
+@@ -2768,6 +2783,12 @@ load_symbols (lang_input_statement_type *entry,
loaded = FALSE;
}
@@ -1394,7 +1404,7 @@
subsbfd = member;
if (!(*link_info.callbacks
->add_archive_element) (&link_info, member,
-@@ -6596,7 +6617,38 @@ lang_process (void)
+@@ -6583,7 +6604,38 @@ lang_process (void)
open_input_bfds (statement_list.head, OPEN_BFD_RESCAN);
}
}
@@ -1433,7 +1443,7 @@
link_info.gc_sym_list = &entry_symbol;
if (entry_symbol.name == NULL)
-@@ -8056,3 +8108,961 @@ lang_ld_feature (char *str)
+@@ -8046,3 +8098,961 @@ lang_ld_feature (char *str)
p = q;
}
}
@@ -2396,10 +2406,10 @@
+ }
+}
diff --git a/ld/ldlang.h b/ld/ldlang.h
-index e36a066..e2d19b1 100644
+index 7f1e743..a973fcb 100644
--- a/ld/ldlang.h
+++ b/ld/ldlang.h
-@@ -485,7 +485,7 @@ extern lang_statement_list_type input_file_chain;
+@@ -486,7 +486,7 @@ extern lang_statement_list_type input_file_chain;
extern int lang_statement_iteration;
extern void lang_init
@@ -2408,7 +2418,7 @@
extern void lang_finish
(void);
extern lang_memory_region_type * lang_memory_region_lookup
-@@ -663,4 +663,45 @@ ldlang_override_segment_assignment
+@@ -664,4 +664,45 @@ ldlang_override_segment_assignment
extern void
lang_ld_feature (char *);
@@ -2454,6 +2464,18 @@
+extern void cmdline_remove_object_only_files (void);
+
#endif
+diff --git a/ld/ldlex.h b/ld/ldlex.h
+index 5e3d2fc..e14107c 100644
+--- a/ld/ldlex.h
++++ b/ld/ldlex.h
+@@ -132,6 +132,7 @@ enum option_values
+ #ifdef ENABLE_PLUGINS
+ OPTION_PLUGIN,
+ OPTION_PLUGIN_OPT,
++ OPTION_PLUGIN_SAVE_TEMPS,
+ #endif /* ENABLE_PLUGINS */
+ OPTION_DEFAULT_SCRIPT,
+ OPTION_PRINT_OUTPUT_FORMAT,
diff --git a/ld/ldmain.c b/ld/ldmain.c
index 3bdaf4d..0692e57 100644
--- a/ld/ldmain.c
@@ -2602,18 +2624,10 @@
+
#endif
diff --git a/ld/lexsup.c b/ld/lexsup.c
-index ea34104..05d0edb 100644
+index b5e3468..95eb477 100644
--- a/ld/lexsup.c
+++ b/ld/lexsup.c
-@@ -170,6 +170,7 @@ enum option_values
- #ifdef ENABLE_PLUGINS
- OPTION_PLUGIN,
- OPTION_PLUGIN_OPT,
-+ OPTION_PLUGIN_SAVE_TEMPS,
- #endif /* ENABLE_PLUGINS */
- OPTION_DEFAULT_SCRIPT,
- OPTION_PRINT_OUTPUT_FORMAT,
-@@ -281,6 +282,9 @@ static const struct ld_option ld_options[] =
+@@ -168,6 +168,9 @@ static const struct ld_option ld_options[] =
'\0', N_("PLUGIN"), N_("Load named plugin"), ONE_DASH },
{ {"plugin-opt", required_argument, NULL, OPTION_PLUGIN_OPT},
'\0', N_("ARG"), N_("Send arg to last-loaded plugin"), ONE_DASH },
@@ -2623,7 +2637,7 @@
{ {"flto", optional_argument, NULL, OPTION_IGNORE},
'\0', NULL, N_("Ignored for GCC LTO option compatibility"),
ONE_DASH },
-@@ -1071,6 +1075,9 @@ parse_args (unsigned argc, char **argv)
+@@ -958,6 +961,9 @@ parse_args (unsigned argc, char **argv)
if (plugin_opt_plugin_arg (optarg))
einfo(_("%P%F: bad -plugin-opt option\n"));
break;
@@ -2714,26 +2728,26 @@
its own newly-added input files and libs to claim. */
extern bfd_boolean no_more_claiming;
diff --git a/ld/scripttempl/armbpabi.sc b/ld/scripttempl/armbpabi.sc
-index 8b3ea0a..88028f2 100644
+index ea01ce2..43a7018 100644
--- a/ld/scripttempl/armbpabi.sc
+++ b/ld/scripttempl/armbpabi.sc
@@ -30,7 +30,7 @@ INTERP=".interp 0 : { *(.interp) }"
PLT=".plt ${RELOCATING-0} : { *(.plt) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
- DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }"
+ DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro .data.rel.ro.*) }"
-DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }"
+DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".sbss ${RELOCATING-0} :
{
diff --git a/ld/scripttempl/elf.sc b/ld/scripttempl/elf.sc
-index 5796b0a..0504c01 100644
+index 37a3124..0470bb7 100644
--- a/ld/scripttempl/elf.sc
+++ b/ld/scripttempl/elf.sc
@@ -158,7 +158,7 @@ RELA_IPLT=".rela.iplt ${RELOCATING-0} :
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".${RODATA_NAME} ${RELOCATING-0} : { *(.${RODATA_NAME}${RELOCATING+ .${RODATA_NAME}.* .gnu.linkonce.r.*}) }"
- DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
+ DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
-DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }"
+DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
@@ -2753,39 +2767,39 @@
INIT_ARRAY=".init_array ${RELOCATING-0} :
{
diff --git a/ld/scripttempl/elf64hppa.sc b/ld/scripttempl/elf64hppa.sc
-index 584192a..bd3035d 100644
+index 136156d..1bd82dc 100644
--- a/ld/scripttempl/elf64hppa.sc
+++ b/ld/scripttempl/elf64hppa.sc
@@ -127,7 +127,7 @@ fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
- DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
+ DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
-DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }"
+DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
SBSS=".sbss ${RELOCATING-0} :
{
diff --git a/ld/scripttempl/elfxtensa.sc b/ld/scripttempl/elfxtensa.sc
-index 53cec71..dff245b 100644
+index f9e5745..532348c 100644
--- a/ld/scripttempl/elfxtensa.sc
+++ b/ld/scripttempl/elfxtensa.sc
@@ -140,7 +140,7 @@ fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
- DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) }"
+ DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
-DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }"
+DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
INIT_LIT=".init.literal 0 : { *(.init.literal) }"
INIT=".init 0 : { *(.init) }"
FINI_LIT=".fini.literal 0 : { *(.fini.literal) }"
diff --git a/ld/scripttempl/mep.sc b/ld/scripttempl/mep.sc
-index e61342d..6c7b451 100644
+index 23b6c54..d7ddae6 100644
--- a/ld/scripttempl/mep.sc
+++ b/ld/scripttempl/mep.sc
@@ -114,7 +114,7 @@ fi
DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
RODATA=".rodata ${RELOCATING-0} : { *(.rodata${RELOCATING+ .rodata.* .gnu.linkonce.r.*}) }"
- DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }"
+ DATARELRO=".data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro .data.rel.ro.*) }"
-DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }"
+DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) *(.gnu_object_only) }"
if test -z "${NO_SMALL_DATA}"; then
@@ -4010,10 +4024,10 @@
+ run_ld_link_exec_tests [] $lto_run_elf_tests
+}
diff --git a/ld/testsuite/ld-plugin/plugin.exp b/ld/testsuite/ld-plugin/plugin.exp
-index 02319bf..96459e7 100644
+index d28505d..803ccee 100644
--- a/ld/testsuite/ld-plugin/plugin.exp
+++ b/ld/testsuite/ld-plugin/plugin.exp
-@@ -153,7 +153,11 @@ set plugin_extra_elf_tests [list \
+@@ -157,7 +157,11 @@ set plugin_extra_elf_tests [list \
-plugin-opt sym:${_}func3::0:3:0 \
-plugin-opt dumpresolutions \
-plugin-opt add:tmpdir/func.o \
@@ -4026,7 +4040,7 @@
]
if { !$can_compile || $failed_compile } {
-@@ -170,7 +174,10 @@ if { !$can_compile || $failed_compile } {
+@@ -174,7 +178,10 @@ if { !$can_compile || $failed_compile } {
run_ld_link_tests $plugin_tests
@@ -4668,10 +4682,10 @@
@@ -0,0 +1 @@
+IE: 4
diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp
-index 9797dff..10fe86e 100644
+index a481ce7..5f21757 100644
--- a/ld/testsuite/lib/ld-lib.exp
+++ b/ld/testsuite/lib/ld-lib.exp
-@@ -923,7 +923,7 @@ proc set_file_contents { filename contents } {
+@@ -934,7 +934,7 @@ proc set_file_contents { filename contents } {
proc ar_simple_create { ar aropts target objects } {
remote_file host delete $target
@@ -4680,7 +4694,7 @@
set exec_output [prune_warnings $exec_output]
if [string match "" $exec_output] then {
-@@ -1551,6 +1551,34 @@ proc check_plugin_api_available { } {
+@@ -1562,6 +1562,34 @@ proc check_plugin_api_available { } {
return $plugin_api_available_saved
}
diff --git a/patches/binutils-shr-100.patch b/patches/binutils-shr-100.patch
index 84d8f90..2ea59ba 100644
--- a/patches/binutils-shr-100.patch
+++ b/patches/binutils-shr-100.patch
@@ -131,10 +131,10 @@
* scripttempl/elf.sc: Support sharable sections.
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
-index db414e9..c309924 100644
+index 5426c93..295b6f4 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
-@@ -2118,6 +2118,28 @@ extern bfd_boolean bfd_elf_link_add_symbols
+@@ -2123,6 +2123,28 @@ extern bfd_boolean bfd_elf_link_add_symbols
(bfd *, struct bfd_link_info *);
extern bfd_boolean _bfd_elf_add_dynamic_entry
(struct bfd_link_info *, bfd_vma, bfd_vma);
@@ -164,10 +164,10 @@
extern bfd_boolean bfd_elf_link_record_dynamic_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *);
diff --git a/bfd/elf.c b/bfd/elf.c
-index 5aabeeb..802a0ed 100644
+index c5b04ac..d4a4329 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
-@@ -2092,6 +2092,8 @@ static const struct bfd_elf_special_section special_sections_g[] =
+@@ -2110,6 +2110,8 @@ static const struct bfd_elf_special_section special_sections_g[] =
{ STRING_COMMA_LEN (".gnu.liblist"), 0, SHT_GNU_LIBLIST, SHF_ALLOC },
{ STRING_COMMA_LEN (".gnu.conflict"), 0, SHT_RELA, SHF_ALLOC },
{ STRING_COMMA_LEN (".gnu.hash"), 0, SHT_GNU_HASH, SHF_ALLOC },
@@ -176,7 +176,7 @@
{ NULL, 0, 0, 0, 0 }
};
-@@ -2146,6 +2148,8 @@ static const struct bfd_elf_special_section special_sections_s[] =
+@@ -2164,6 +2166,8 @@ static const struct bfd_elf_special_section special_sections_s[] =
/* See struct bfd_elf_special_section declaration for the semantics of
this special case where .prefix_length != strlen (.prefix). */
{ ".stabstr", 5, 3, SHT_STRTAB, 0 },
@@ -185,7 +185,7 @@
{ NULL, 0, 0, 0, 0 }
};
-@@ -3591,6 +3595,32 @@ get_program_header_size (bfd *abfd, struct bfd_link_info *info)
+@@ -3609,6 +3613,32 @@ get_program_header_size (bfd *abfd, struct bfd_link_info *info)
}
}
@@ -218,7 +218,7 @@
/* Let the backend count up any program headers it might need. */
bed = get_elf_backend_data (abfd);
if (bed->elf_backend_additional_program_headers)
-@@ -3758,6 +3788,8 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
+@@ -3780,6 +3810,8 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
bfd_boolean phdr_in_segment = TRUE;
bfd_boolean writable;
int tls_count = 0;
@@ -227,7 +227,7 @@
asection *first_tls = NULL;
asection *dynsec, *eh_frame_hdr;
bfd_size_type amt;
-@@ -4065,6 +4097,22 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
+@@ -4087,6 +4119,22 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
first_tls = s;
tls_count++;
}
@@ -250,7 +250,7 @@
}
/* If there are any SHF_TLS output sections, add PT_TLS segment. */
-@@ -4092,6 +4140,60 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
+@@ -4114,6 +4162,60 @@ _bfd_elf_map_sections_to_segments (bfd *abfd, struct bfd_link_info *info)
pm = &m->next;
}
@@ -311,7 +311,7 @@
/* If there is a .eh_frame_hdr section, throw in a PT_GNU_EH_FRAME
segment. */
eh_frame_hdr = elf_tdata (abfd)->eh_frame_hdr;
-@@ -4622,6 +4724,7 @@ assign_file_positions_for_load_sections (bfd *abfd,
+@@ -4644,6 +4746,7 @@ assign_file_positions_for_load_sections (bfd *abfd,
align = (bfd_size_type) 1 << bfd_get_section_alignment (abfd, sec);
if ((p->p_type == PT_LOAD
@@ -320,10 +320,10 @@
&& (this_hdr->sh_type != SHT_NOBITS
|| ((this_hdr->sh_flags & SHF_ALLOC) != 0
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
-index 3014a0a..6dd1391 100644
+index 7b33d77..43a03d7 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
-@@ -812,6 +812,9 @@ struct elf_i386_link_hash_table
+@@ -813,6 +813,9 @@ struct elf_i386_link_hash_table
/* The index of the next unused R_386_IRELATIVE slot in .rel.plt. */
bfd_vma next_irelative_index;
@@ -333,7 +333,7 @@
};
/* Get the i386 ELF linker hash table from a link_info structure. */
-@@ -954,6 +957,8 @@ elf_i386_link_hash_table_create (bfd *abfd)
+@@ -955,6 +958,8 @@ elf_i386_link_hash_table_create (bfd *abfd)
ret->tls_module_base = NULL;
ret->next_jump_slot_index = 0;
ret->next_irelative_index = 0;
@@ -342,7 +342,7 @@
ret->loc_hash_table = htab_try_create (1024,
elf_i386_local_htab_hash,
-@@ -1002,10 +1007,19 @@ elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
+@@ -1003,10 +1008,19 @@ elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
if (!info->shared)
@@ -364,7 +364,7 @@
abort ();
if (get_elf_i386_backend_data (dynobj)->is_vxworks
-@@ -2187,17 +2201,23 @@ elf_i386_adjust_dynamic_symbol (struct bfd_link_info *info,
+@@ -2184,17 +2198,23 @@ elf_i386_adjust_dynamic_symbol (struct bfd_link_info *info,
both the dynamic object and the regular object will refer to the
same memory location for the variable. */
@@ -391,15 +391,15 @@
return _bfd_elf_adjust_dynamic_copy (h, s);
}
-@@ -2754,6 +2774,7 @@ elf_i386_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
- || s == htab->elf.sgotplt
- || s == htab->elf.iplt
- || s == htab->elf.igotplt
-+ || s == htab->sdynsharablebss
- || s == htab->sdynbss)
+@@ -2770,6 +2790,7 @@ elf_i386_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
+ || s == htab->elf.iplt
+ || s == htab->elf.igotplt
+ || s == htab->plt_eh_frame
++ || s == htab->sdynsharablebss
+ || s == htab->sdynbss)
{
- /* Strip this section if we don't need it; see the
-@@ -4580,21 +4601,27 @@ do_glob_dat:
+ /* Strip these too. */
+@@ -4592,21 +4613,27 @@ do_glob_dat:
{
Elf_Internal_Rela rel;
bfd_byte *loc;
@@ -430,7 +430,7 @@
bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
}
-@@ -4924,7 +4951,8 @@ elf_i386_add_symbol_hook (bfd * abfd,
+@@ -4926,7 +4953,8 @@ elf_i386_add_symbol_hook (bfd * abfd,
|| ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
@@ -440,7 +440,7 @@
}
#define TARGET_LITTLE_SYM bfd_elf32_i386_vec
-@@ -4978,6 +5006,19 @@ elf_i386_add_symbol_hook (bfd * abfd,
+@@ -4980,6 +5008,19 @@ elf_i386_add_symbol_hook (bfd * abfd,
#undef elf_backend_post_process_headers
#define elf_backend_post_process_headers _bfd_elf_set_osabi
@@ -461,10 +461,10 @@
/* FreeBSD support. */
diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c
-index 88c47f9..7511099 100644
+index abd8d60..4b1acf0 100644
--- a/bfd/elf64-x86-64.c
+++ b/bfd/elf64-x86-64.c
-@@ -698,6 +698,9 @@ struct elf_x86_64_link_hash_table
+@@ -763,6 +763,9 @@ struct elf_x86_64_link_hash_table
bfd_vma next_jump_slot_index;
/* The index of the next R_X86_64_IRELATIVE entry in .rela.plt. */
bfd_vma next_irelative_index;
@@ -474,16 +474,16 @@
};
/* Get the x86-64 ELF linker hash table from a link_info structure. */
-@@ -841,6 +844,8 @@ elf_x86_64_link_hash_table_create (bfd *abfd)
+@@ -906,6 +909,8 @@ elf_x86_64_link_hash_table_create (bfd *abfd)
ret->tls_module_base = NULL;
- ret->next_jump_slot_index = 0;
+ ret->next_jump_slot_index = 0;
ret->next_irelative_index = 0;
+ ret->sdynsharablebss = NULL;
+ ret->srelsharablebss = NULL;
if (ABI_64_P (abfd))
{
-@@ -907,10 +912,19 @@ elf_x86_64_create_dynamic_sections (bfd *dynobj,
+@@ -972,10 +977,19 @@ elf_x86_64_create_dynamic_sections (bfd *dynobj,
htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
if (!info->shared)
@@ -505,7 +505,7 @@
abort ();
if (!info->no_ld_generated_unwind_info
-@@ -2180,6 +2194,8 @@ elf_x86_64_adjust_dynamic_symbol (struct bfd_link_info *info,
+@@ -2249,6 +2263,8 @@ elf_x86_64_adjust_dynamic_symbol (struct bfd_link_info *info,
if (htab == NULL)
return FALSE;
@@ -514,7 +514,7 @@
/* We must generate a R_X86_64_COPY reloc to tell the dynamic linker
to copy the initial value out of the dynamic object and into the
runtime process image. */
-@@ -2187,12 +2203,16 @@ elf_x86_64_adjust_dynamic_symbol (struct bfd_link_info *info,
+@@ -2256,12 +2272,16 @@ elf_x86_64_adjust_dynamic_symbol (struct bfd_link_info *info,
{
const struct elf_backend_data *bed;
bed = get_elf_backend_data (info->output_bfd);
@@ -534,15 +534,15 @@
return _bfd_elf_adjust_dynamic_copy (h, s);
}
-@@ -2731,6 +2751,7 @@ elf_x86_64_size_dynamic_sections (bfd *output_bfd,
- || s == htab->elf.sgotplt
+@@ -2814,6 +2834,7 @@ elf_x86_64_size_dynamic_sections (bfd *output_bfd,
|| s == htab->elf.iplt
|| s == htab->elf.igotplt
+ || s == htab->plt_eh_frame
+ || s == htab->sdynsharablebss
|| s == htab->sdynbss)
{
/* Strip this section if we don't need it; see the
-@@ -4372,13 +4393,19 @@ do_glob_dat:
+@@ -4493,13 +4514,19 @@ do_glob_dat:
if (h->needs_copy)
{
Elf_Internal_Rela rela;
@@ -563,7 +563,7 @@
abort ();
rela.r_offset = (h->root.u.def.value
-@@ -4386,7 +4413,7 @@ do_glob_dat:
+@@ -4507,7 +4534,7 @@ do_glob_dat:
+ h->root.u.def.section->output_offset);
rela.r_info = htab->r_info (h->dynindx, R_X86_64_COPY);
rela.r_addend = 0;
@@ -571,8 +571,8 @@
+ elf_append_rela (output_bfd, s, &rela);
}
- /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
-@@ -4722,7 +4749,8 @@ elf_x86_64_add_symbol_hook (bfd *abfd,
+ return TRUE;
+@@ -4840,7 +4867,8 @@ elf_x86_64_add_symbol_hook (bfd *abfd,
|| ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
@@ -582,7 +582,7 @@
}
-@@ -4738,7 +4766,8 @@ elf_x86_64_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
+@@ -4856,7 +4884,8 @@ elf_x86_64_elf_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
*index_return = SHN_X86_64_LCOMMON;
return TRUE;
}
@@ -592,7 +592,7 @@
}
/* Process a symbol. */
-@@ -4756,22 +4785,26 @@ elf_x86_64_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
+@@ -4874,22 +4903,26 @@ elf_x86_64_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
asym->value = elfsym->internal_elf_sym.st_size;
/* Common symbol doesn't set BSF_GLOBAL. */
asym->flags &= ~BSF_GLOBAL;
@@ -621,7 +621,7 @@
else
return SHN_X86_64_LCOMMON;
}
-@@ -4780,7 +4813,7 @@ static asection *
+@@ -4898,7 +4931,7 @@ static asection *
elf_x86_64_common_section (asection *sec)
{
if ((elf_section_flags (sec) & SHF_X86_64_LARGE) == 0)
@@ -630,7 +630,7 @@
else
return &_bfd_elf_large_com_section;
}
-@@ -4817,7 +4850,8 @@ elf_x86_64_merge_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED,
+@@ -4935,7 +4968,8 @@ elf_x86_64_merge_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED,
&& h->root.type == bfd_link_hash_common
&& !*newdef
&& bfd_is_com_section (*sec)
@@ -640,7 +640,7 @@
{
if (sym->st_shndx == SHN_COMMON
&& (elf_section_flags (*oldsec) & SHF_X86_64_LARGE) != 0)
-@@ -4825,13 +4859,26 @@ elf_x86_64_merge_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED,
+@@ -4943,13 +4977,26 @@ elf_x86_64_merge_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED,
h->root.u.c.p->section
= bfd_make_section_old_way (oldbfd, "COMMON");
h->root.u.c.p->section->flags = SEC_ALLOC;
@@ -670,7 +670,7 @@
static int
diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 7f9ec60..05dd9f5 100644
+index 7f35e7f..0b4816c 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -383,6 +383,27 @@ _bfd_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
@@ -701,7 +701,7 @@
}
}
-@@ -12855,3 +12876,219 @@ elf_append_rel (bfd *abfd, asection *s, Elf_Internal_Rela *rel)
+@@ -12856,3 +12877,219 @@ elf_append_rel (bfd *abfd, asection *s, Elf_Internal_Rela *rel)
BFD_ASSERT (loc + bed->s->sizeof_rel <= s->contents + s->size);
bed->s->swap_reloca_out (abfd, rel, loc);
}
@@ -922,10 +922,10 @@
+ return TRUE;
+}
diff --git a/bfd/elfnn-ia64.c b/bfd/elfnn-ia64.c
-index d70b28e..c547a5a 100644
+index fdefb03..72a0aea 100644
--- a/bfd/elfnn-ia64.c
+++ b/bfd/elfnn-ia64.c
-@@ -1064,7 +1064,8 @@ elfNN_ia64_add_symbol_hook (bfd *abfd,
+@@ -1056,7 +1056,8 @@ elfNN_ia64_add_symbol_hook (bfd *abfd,
*valp = sym->st_size;
}
@@ -935,7 +935,7 @@
}
/* Return the number of additional phdrs we will need. */
-@@ -5341,6 +5342,19 @@ elfNN_vms_close_and_cleanup (bfd *abfd)
+@@ -5062,6 +5063,19 @@ elfNN_hpux_backend_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
#define elf_backend_special_sections elfNN_ia64_special_sections
#define elf_backend_default_execstack 0
@@ -956,10 +956,10 @@
SHF_LINK_ORDER. But it doesn't set the sh_link or sh_info fields.
We don't want to flood users with so many error messages. We turn
diff --git a/binutils/readelf.c b/binutils/readelf.c
-index f42039e..2122d10 100644
+index 212f70e..cedc7bf 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
-@@ -1334,6 +1334,8 @@ dump_relocations (FILE * file,
+@@ -1338,6 +1338,8 @@ dump_relocations (FILE * file,
sec_name = "ABS";
else if (psym->st_shndx == SHN_COMMON)
sec_name = "COMMON";
@@ -968,7 +968,7 @@
else if ((elf_header.e_machine == EM_MIPS
&& psym->st_shndx == SHN_MIPS_SCOMMON)
|| (elf_header.e_machine == EM_TI_C6000
-@@ -2798,6 +2800,7 @@ get_segment_type (unsigned long p_type)
+@@ -2806,6 +2808,7 @@ get_segment_type (unsigned long p_type)
case PT_SHLIB: return "SHLIB";
case PT_PHDR: return "PHDR";
case PT_TLS: return "TLS";
@@ -976,7 +976,7 @@
case PT_GNU_EH_FRAME:
return "GNU_EH_FRAME";
-@@ -8902,6 +8905,8 @@ get_symbol_index_type (unsigned int type)
+@@ -8915,6 +8918,8 @@ get_symbol_index_type (unsigned int type)
case SHN_UNDEF: return "UND";
case SHN_ABS: return "ABS";
case SHN_COMMON: return "COM";
@@ -986,7 +986,7 @@
if (type == SHN_IA_64_ANSI_COMMON
&& elf_header.e_machine == EM_IA_64
diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c
-index a101e8a..df2dafc 100644
+index ffee6f6..146ec91 100644
--- a/gas/config/obj-elf.c
+++ b/gas/config/obj-elf.c
@@ -73,6 +73,7 @@ static void obj_elf_symver (int);
@@ -1065,7 +1065,7 @@
&& ssect->type != SHT_FINI_ARRAY
&& ssect->type != SHT_PREINIT_ARRAY)
diff --git a/include/bfdlink.h b/include/bfdlink.h
-index c79d8f0..adb9a81 100644
+index d900b47..0c0adc2 100644
--- a/include/bfdlink.h
+++ b/include/bfdlink.h
@@ -387,6 +387,9 @@ struct bfd_link_info
@@ -1152,7 +1152,7 @@
if [ "x${host}" = "x${target}" ]; then
case " $EMULATION_LIBPATH " in
diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
-index 7d31864..76f8e8d 100644
+index 2b7a352..f9b15e5 100644
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -104,6 +104,7 @@ gld${EMULATION_NAME}_before_parse (void)
@@ -1163,7 +1163,7 @@
}
EOF
-@@ -1813,6 +1814,12 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
+@@ -1814,6 +1815,12 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
int iself = s->owner->xvec->flavour == bfd_target_elf_flavour;
unsigned int sh_type = iself ? elf_section_type (s) : SHT_NULL;
@@ -1177,10 +1177,10 @@
&& link_info.combreloc
&& (s->flags & SEC_ALLOC))
diff --git a/ld/ldmain.c b/ld/ldmain.c
-index b2810a7..8c8e83c 100644
+index 3bdaf4d..6244a50 100644
--- a/ld/ldmain.c
+++ b/ld/ldmain.c
-@@ -270,6 +270,7 @@ main (int argc, char **argv)
+@@ -288,6 +288,7 @@ main (int argc, char **argv)
link_info.pei386_auto_import = -1;
link_info.spare_dynamic_tags = 5;
link_info.path_separator = ':';
@@ -1189,10 +1189,10 @@
ldfile_add_arch ("");
emulation = get_emulation (argc, argv);
diff --git a/ld/scripttempl/elf.sc b/ld/scripttempl/elf.sc
-index 7994b5f..9113380 100644
+index 37a3124..f3e6fee 100644
--- a/ld/scripttempl/elf.sc
+++ b/ld/scripttempl/elf.sc
-@@ -296,6 +296,40 @@ STACK=" .stack ${RELOCATING-0}${RELOCATING+${STACK_ADDR}} :
+@@ -299,6 +299,40 @@ STACK=" .stack ${RELOCATING-0}${RELOCATING+${STACK_ADDR}} :
${RELOCATING+${USER_LABEL_PREFIX}_stack = .;}
*(.stack)
}"
@@ -1233,7 +1233,7 @@
TEXT_START_ADDR="SEGMENT_START(\"text-segment\", ${TEXT_START_ADDR})"
SHLIB_TEXT_START_ADDR="SEGMENT_START(\"text-segment\", ${SHLIB_TEXT_START_ADDR:-0})"
-@@ -376,6 +410,7 @@ eval $COMBRELOCCAT <<EOF
+@@ -393,6 +427,7 @@ eval $COMBRELOCCAT <<EOF
.rel.got ${RELOCATING-0} : { *(.rel.got) }
.rela.got ${RELOCATING-0} : { *(.rela.got) }
${OTHER_GOT_RELOC_SECTIONS}
diff --git a/patches/binutils-signed-8.patch b/patches/binutils-signed-8.patch
deleted file mode 100644
index d078b4b..0000000
--- a/patches/binutils-signed-8.patch
+++ /dev/null
@@ -1,811 +0,0 @@
-diff --git a/binutils/ChangeLog.addend b/binutils/ChangeLog.addend
-new file mode 100644
-index 0000000..e0bd096
---- /dev/null
-+++ b/binutils/ChangeLog.addend
-@@ -0,0 +1,4 @@
-+2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
-+
-+ * objdump.c (disassemble_bytes): Print addend as signed.
-+ (dump_reloc_set): Likewise.
-diff --git a/binutils/objdump.c b/binutils/objdump.c
-index 0be662f..dbbdad1 100644
---- a/binutils/objdump.c
-+++ b/binutils/objdump.c
-@@ -1806,8 +1806,15 @@ disassemble_bytes (struct disassemble_info * inf,
-
- if (q->addend)
- {
-- printf ("+0x");
-- objdump_print_value (q->addend, inf, TRUE);
-+ bfd_signed_vma addend = q->addend;
-+ if (addend < 0)
-+ {
-+ printf ("-0x");
-+ addend = -addend;
-+ }
-+ else
-+ printf ("+0x");
-+ objdump_print_value (addend, inf, TRUE);
- }
-
- printf ("\n");
-@@ -2901,8 +2908,15 @@ dump_reloc_set (bfd *abfd, asection *sec, arelent **relpp, long relcount)
-
- if (q->addend)
- {
-- printf ("+0x");
-- bfd_printf_vma (abfd, q->addend);
-+ bfd_signed_vma addend = q->addend;
-+ if (addend < 0)
-+ {
-+ printf ("-0x");
-+ addend = -addend;
-+ }
-+ else
-+ printf ("+0x");
-+ bfd_printf_vma (abfd, addend);
- }
-
- printf ("\n");
-diff --git a/gas/testsuite/ChangeLog.addend b/gas/testsuite/ChangeLog.addend
-new file mode 100644
-index 0000000..7b10497
---- /dev/null
-+++ b/gas/testsuite/ChangeLog.addend
-@@ -0,0 +1,26 @@
-+2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
-+
-+ * gas/i386/ilp32/mixed-mode-reloc64.d: Expect addend as signed.
-+ * gas/i386/ilp32/reloc64.d: Likewise.
-+
-+2010-10-01 H.J. Lu <hongjiu.lu@intel.com>
-+
-+ * gas/all/fwdexp.d: Expect addend as signed.
-+
-+2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
-+
-+ * gas/alpha/elf-reloc-1.d: Expect addend as signed.
-+ * gas/i386/mixed-mode-reloc64.d: Likewise.
-+ * gas/i386/reloc64.d: Likewise.
-+ * gas/ia64/pcrel.d: Likewise.
-+ * gas/mips/branch-misc-2-64.d: Likewise.
-+ * gas/mips/branch-misc-2pic-64.d: Likewise.
-+ * gas/mips/ldstla-n64-sym32.d: Likewise.
-+ * gas/mips/mips16-hilo-n32.d: Likewise.
-+ * gas/ppc/astest.d: Likewise.
-+ * gas/ppc/astest2.d: Likewise.
-+ * gas/ppc/astest2_64.d: Likewise.
-+ * gas/ppc/astest64.d: Likewise.
-+ * gas/ppc/test1elf32.d: Likewise.
-+ * gas/ppc/test1elf64.d: Likewise.
-+ * gas/sparc/reloc64.d: Likewise.
-diff --git a/gas/testsuite/gas/all/fwdexp.d b/gas/testsuite/gas/all/fwdexp.d
-index 222dab2..5c16ea9 100644
---- a/gas/testsuite/gas/all/fwdexp.d
-+++ b/gas/testsuite/gas/all/fwdexp.d
-@@ -5,7 +5,7 @@
-
- RELOCATION RECORDS FOR .*
- OFFSET +TYPE +VALUE
--0+ .*(\.data|i)(|\+0xf+e|\+0xf+c|\+0xf+8)
-+0+ .*(\.data|i)(|\+0xf+e|\+0xf+c|\+0xf+8|-0x0*2|-0x0*4|-0x0*8)
-
- Contents of section .*
- 0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8) .*
-diff --git a/gas/testsuite/gas/alpha/elf-reloc-1.d b/gas/testsuite/gas/alpha/elf-reloc-1.d
-index 3985975..69a16b7 100644
---- a/gas/testsuite/gas/alpha/elf-reloc-1.d
-+++ b/gas/testsuite/gas/alpha/elf-reloc-1.d
-@@ -16,6 +16,6 @@ OFFSET TYPE VALUE
- 0*000001c GPRELHIGH d
- 0*0000020 GPRELLOW e
- 0*0000024 GPDISP \.text\+0x0*0000008
--0*0000030 GPDISP \.text\+0xf*ffffff8
-+0*0000030 GPDISP \.text-0x0*0000008
-
-
-diff --git a/gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d b/gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d
-index c54b7d3..a48c502 100644
---- a/gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d
-+++ b/gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d
-@@ -7,8 +7,8 @@
- RELOCATION RECORDS FOR \[.text\]:
- OFFSET[ ]+TYPE[ ]+VALUE[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-diff --git a/gas/testsuite/gas/i386/ilp32/reloc64.d b/gas/testsuite/gas/i386/ilp32/reloc64.d
-index 08c15e4..af75c51 100644
---- a/gas/testsuite/gas/i386/ilp32/reloc64.d
-+++ b/gas/testsuite/gas/i386/ilp32/reloc64.d
-@@ -14,10 +14,10 @@ Disassembly of section \.text:
- .*[ ]+R_X86_64_PC32[ ]+xtrn\+0x0*2
- .*[ ]+R_X86_64_PC16[ ]+xtrn\+0x0*2
- .*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC8[ ]+xtrn\+0xf+f
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
-@@ -26,31 +26,31 @@ Disassembly of section \.text:
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
--.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
--.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
--.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
-+.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_-0x0*4
-+.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_-0x0*4
- .*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
--.*[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
--.*[ ]+R_X86_64_TLSGD[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_TLSGD[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
--.*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
--.*[ ]+R_X86_64_TLSLD[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_TLSLD[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
-diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc64.d b/gas/testsuite/gas/i386/mixed-mode-reloc64.d
-index dc50e43..9b82cb5 100644
---- a/gas/testsuite/gas/i386/mixed-mode-reloc64.d
-+++ b/gas/testsuite/gas/i386/mixed-mode-reloc64.d
-@@ -7,8 +7,8 @@
- RELOCATION RECORDS FOR \[.text\]:
- OFFSET[ ]+TYPE[ ]+VALUE[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-diff --git a/gas/testsuite/gas/i386/reloc64.d b/gas/testsuite/gas/i386/reloc64.d
-index 5c14019..b4780d4 100644
---- a/gas/testsuite/gas/i386/reloc64.d
-+++ b/gas/testsuite/gas/i386/reloc64.d
-@@ -16,33 +16,33 @@ Disassembly of section \.text:
- .*[ ]+R_X86_64_PC32[ ]+xtrn\+0x0*2
- .*[ ]+R_X86_64_PC16[ ]+xtrn\+0x0*2
- .*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC8[ ]+xtrn\+0xf+f
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
- .*[ ]+R_X86_64_GOT64[ ]+xtrn
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
- .*[ ]+R_X86_64_GOTOFF64[ ]+xtrn
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
--.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
--.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
--.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
-+.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_-0x0*4
-+.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_-0x0*4
- .*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
--.*[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
--.*[ ]+R_X86_64_TLSGD[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_TLSGD[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
--.*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
--.*[ ]+R_X86_64_TLSLD[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_TLSLD[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_DTPOFF64[ ]+xtrn
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
-diff --git a/gas/testsuite/gas/ia64/pcrel.d b/gas/testsuite/gas/ia64/pcrel.d
-index 674060d..a01c006 100644
---- a/gas/testsuite/gas/ia64/pcrel.d
-+++ b/gas/testsuite/gas/ia64/pcrel.d
-@@ -9,28 +9,28 @@ OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+10[[:space:]]+PCREL22[[:space:]]+esym
- 0+20[[:space:]]+PCREL22[[:space:]]+esym\+0x0+20
- 0+30[[:space:]]+PCREL22[[:space:]]+esym
--0+40[[:space:]]+PCREL22[[:space:]]+esym\+0xf+e0
-+0+40[[:space:]]+PCREL22[[:space:]]+esym-0x0+20
-
- RELOCATION RECORDS FOR \[\.movl\]:
- OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+12[[:space:]]+PCREL64I[[:space:]]+esym
- 0+22[[:space:]]+PCREL64I[[:space:]]+esym\+0x0+20
- 0+32[[:space:]]+PCREL64I[[:space:]]+esym
--0+42[[:space:]]+PCREL64I[[:space:]]+esym\+0xf+e0
-+0+42[[:space:]]+PCREL64I[[:space:]]+esym-0x0+20
-
- RELOCATION RECORDS FOR \[\.data8\]:
- OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+10[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
- 0+20[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0x0+20
- 0+30[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
--0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0xf+e0
-+0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym-0x0+20
-
- RELOCATION RECORDS FOR \[\.data4\]:
- OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+10[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
- 0+20[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0x0+20
- 0+30[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
--0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0xf+e0
-+0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym-0x0+20
-
-
- Contents of section \.mov:
-diff --git a/gas/testsuite/gas/mips/branch-misc-2-64.d b/gas/testsuite/gas/mips/branch-misc-2-64.d
-index 064c42f..b540b8a 100644
---- a/gas/testsuite/gas/mips/branch-misc-2-64.d
-+++ b/gas/testsuite/gas/mips/branch-misc-2-64.d
-@@ -13,51 +13,51 @@ Disassembly of section .text:
- \.\.\.
- \.\.\.
- 0+003c <[^>]*> 04110000 bal 0000000000000040 <x\+0x4>
--[ ]*3c: R_MIPS_PC16 g1\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*3c: R_MIPS_PC16 g1-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
- 0+0040 <[^>]*> 00000000 nop
- 0+0044 <[^>]*> 04110000 bal 0000000000000048 <x\+0xc>
--[ ]*44: R_MIPS_PC16 g2\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*44: R_MIPS_PC16 g2-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
- 0+0048 <[^>]*> 00000000 nop
- 0+004c <[^>]*> 04110000 bal 0000000000000050 <x\+0x14>
--[ ]*4c: R_MIPS_PC16 g3\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*4c: R_MIPS_PC16 g3-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
- 0+0050 <[^>]*> 00000000 nop
- 0+0054 <[^>]*> 04110000 bal 0000000000000058 <x\+0x1c>
--[ ]*54: R_MIPS_PC16 g4\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*54: R_MIPS_PC16 g4-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
- 0+0058 <[^>]*> 00000000 nop
- 0+005c <[^>]*> 04110000 bal 0000000000000060 <x\+0x24>
--[ ]*5c: R_MIPS_PC16 g5\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*5c: R_MIPS_PC16 g5-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
- 0+0060 <[^>]*> 00000000 nop
- 0+0064 <[^>]*> 04110000 bal 0000000000000068 <x\+0x2c>
--[ ]*64: R_MIPS_PC16 g6\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*64: R_MIPS_PC16 g6-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
- 0+0068 <[^>]*> 00000000 nop
- \.\.\.
- \.\.\.
- \.\.\.
- 0+00a8 <[^>]*> 10000000 b 00000000000000ac <g6\+0x4>
--[ ]*a8: R_MIPS_PC16 x1\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*a8: R_MIPS_PC16 x1-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
- 0+00ac <[^>]*> 00000000 nop
- 0+00b0 <[^>]*> 10000000 b 00000000000000b4 <g6\+0xc>
--[ ]*b0: R_MIPS_PC16 x2\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b0: R_MIPS_PC16 x2-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
- 0+00b4 <[^>]*> 00000000 nop
- 0+00b8 <[^>]*> 10000000 b 00000000000000bc <g6\+0x14>
--[ ]*b8: R_MIPS_PC16 \.data\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b8: R_MIPS_PC16 \.data-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
- 0+00bc <[^>]*> 00000000 nop
- \.\.\.
-diff --git a/gas/testsuite/gas/mips/branch-misc-2pic-64.d b/gas/testsuite/gas/mips/branch-misc-2pic-64.d
-index 6b8720d..3cb292d 100644
---- a/gas/testsuite/gas/mips/branch-misc-2pic-64.d
-+++ b/gas/testsuite/gas/mips/branch-misc-2pic-64.d
-@@ -13,51 +13,51 @@ Disassembly of section .text:
- \.\.\.
- \.\.\.
- 0+003c <[^>]*> 04110000 bal 0000000000000040 <x\+0x4>
--[ ]*3c: R_MIPS_PC16 g1\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*3c: R_MIPS_PC16 g1-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
- 0+0040 <[^>]*> 00000000 nop
- 0+0044 <[^>]*> 04110000 bal 0000000000000048 <x\+0xc>
--[ ]*44: R_MIPS_PC16 g2\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*44: R_MIPS_PC16 g2-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
- 0+0048 <[^>]*> 00000000 nop
- 0+004c <[^>]*> 04110000 bal 0000000000000050 <x\+0x14>
--[ ]*4c: R_MIPS_PC16 g3\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*4c: R_MIPS_PC16 g3-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
- 0+0050 <[^>]*> 00000000 nop
- 0+0054 <[^>]*> 04110000 bal 0000000000000058 <x\+0x1c>
--[ ]*54: R_MIPS_PC16 g4\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*54: R_MIPS_PC16 g4-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
- 0+0058 <[^>]*> 00000000 nop
- 0+005c <[^>]*> 04110000 bal 0000000000000060 <x\+0x24>
--[ ]*5c: R_MIPS_PC16 g5\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*5c: R_MIPS_PC16 g5-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
- 0+0060 <[^>]*> 00000000 nop
- 0+0064 <[^>]*> 04110000 bal 0000000000000068 <x\+0x2c>
--[ ]*64: R_MIPS_PC16 g6\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*64: R_MIPS_PC16 g6-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
- 0+0068 <[^>]*> 00000000 nop
- \.\.\.
- \.\.\.
- \.\.\.
- 0+00a8 <[^>]*> 10000000 b 00000000000000ac <g6\+0x4>
--[ ]*a8: R_MIPS_PC16 x1\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*a8: R_MIPS_PC16 x1-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
- 0+00ac <[^>]*> 00000000 nop
- 0+00b0 <[^>]*> 10000000 b 00000000000000b4 <g6\+0xc>
--[ ]*b0: R_MIPS_PC16 x2\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b0: R_MIPS_PC16 x2-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
- 0+00b4 <[^>]*> 00000000 nop
- 0+00b8 <[^>]*> 10000000 b 00000000000000bc <g6\+0x14>
--[ ]*b8: R_MIPS_PC16 \.data\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b8: R_MIPS_PC16 \.data-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
- 0+00bc <[^>]*> 00000000 nop
- \.\.\.
-diff --git a/gas/testsuite/gas/mips/ldstla-n64-sym32.d b/gas/testsuite/gas/mips/ldstla-n64-sym32.d
-index 8d30cfb..066d749 100644
---- a/gas/testsuite/gas/mips/ldstla-n64-sym32.d
-+++ b/gas/testsuite/gas/mips/ldstla-n64-sym32.d
-@@ -196,19 +196,19 @@ Disassembly .*:
- .*: R_MIPS_NONE .*
- .* daddu a0,a0,v1
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu a0,a0,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu a0,a0,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu a0,a0,v1
-@@ -406,20 +406,20 @@ Disassembly .*:
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lw a0,0\(a0\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu a0,a0,v1
- .* lw a0,0\(a0\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- #
-@@ -616,20 +616,20 @@ Disassembly .*:
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* sw a0,0\(at\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu at,at,v1
- .* sw a0,0\(at\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- #
-@@ -880,21 +880,21 @@ Disassembly .*:
- .* swl a0,0\(at\)
- .* swr a0,3\(at\)
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu at,at,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* swl a0,0\(at\)
- .* swr a0,3\(at\)
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu at,at,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu at,at,v1
-diff --git a/gas/testsuite/gas/mips/mips16-hilo-n32.d b/gas/testsuite/gas/mips/mips16-hilo-n32.d
-index 2e3c8a1..5ac680d 100644
---- a/gas/testsuite/gas/mips/mips16-hilo-n32.d
-+++ b/gas/testsuite/gas/mips/mips16-hilo-n32.d
-@@ -141,45 +141,45 @@ Disassembly of section \.text:
- 13c: f400 3480 sll a0,16
- 140: f010 4c00 addiu a0,-32768
- 144: f000 6c00 li a0,0
-- 144: R_MIPS16_HI16 \.data\+0xffff8000
-+ 144: R_MIPS16_HI16 \.data-0x8000
- 148: f400 3480 sll a0,16
- 14c: f000 4c00 addiu a0,0
-- 14c: R_MIPS16_LO16 \.data\+0xffff8000
-+ 14c: R_MIPS16_LO16 \.data-0x8000
- 150: f000 6c00 li a0,0
-- 150: R_MIPS16_HI16 \.data\+0xffff8004
-+ 150: R_MIPS16_HI16 \.data-0x7ffc
- 154: f400 3480 sll a0,16
- 158: f000 4c00 addiu a0,0
-- 158: R_MIPS16_LO16 \.data\+0xffff8004
-+ 158: R_MIPS16_LO16 \.data-0x7ffc
- 15c: f000 6c00 li a0,0
-- 15c: R_MIPS16_HI16 big_external_data_label\+0xffff8000
-+ 15c: R_MIPS16_HI16 big_external_data_label-0x8000
- 160: f400 3480 sll a0,16
- 164: f000 4c00 addiu a0,0
-- 164: R_MIPS16_LO16 big_external_data_label\+0xffff8000
-+ 164: R_MIPS16_LO16 big_external_data_label-0x8000
- 168: f000 6c00 li a0,0
-- 168: R_MIPS16_HI16 small_external_data_label\+0xffff8000
-+ 168: R_MIPS16_HI16 small_external_data_label-0x8000
- 16c: f400 3480 sll a0,16
- 170: f000 4c00 addiu a0,0
-- 170: R_MIPS16_LO16 small_external_data_label\+0xffff8000
-+ 170: R_MIPS16_LO16 small_external_data_label-0x8000
- 174: f000 6c00 li a0,0
-- 174: R_MIPS16_HI16 big_external_common\+0xffff8000
-+ 174: R_MIPS16_HI16 big_external_common-0x8000
- 178: f400 3480 sll a0,16
- 17c: f000 4c00 addiu a0,0
-- 17c: R_MIPS16_LO16 big_external_common\+0xffff8000
-+ 17c: R_MIPS16_LO16 big_external_common-0x8000
- 180: f000 6c00 li a0,0
-- 180: R_MIPS16_HI16 small_external_common\+0xffff8000
-+ 180: R_MIPS16_HI16 small_external_common-0x8000
- 184: f400 3480 sll a0,16
- 188: f000 4c00 addiu a0,0
-- 188: R_MIPS16_LO16 small_external_common\+0xffff8000
-+ 188: R_MIPS16_LO16 small_external_common-0x8000
- 18c: f000 6c00 li a0,0
-- 18c: R_MIPS16_HI16 \.bss\+0xffff8000
-+ 18c: R_MIPS16_HI16 \.bss-0x8000
- 190: f400 3480 sll a0,16
- 194: f000 4c00 addiu a0,0
-- 194: R_MIPS16_LO16 \.bss\+0xffff8000
-+ 194: R_MIPS16_LO16 \.bss-0x8000
- 198: f000 6c00 li a0,0
-- 198: R_MIPS16_HI16 \.sbss\+0xffff8000
-+ 198: R_MIPS16_HI16 \.sbss-0x8000
- 19c: f400 3480 sll a0,16
- 1a0: f000 4c00 addiu a0,0
-- 1a0: R_MIPS16_LO16 \.sbss\+0xffff8000
-+ 1a0: R_MIPS16_LO16 \.sbss-0x8000
- 1a4: 6c01 li a0,1
- 1a6: f400 3480 sll a0,16
- 1aa: 4c00 addiu a0,0
-@@ -399,45 +399,45 @@ Disassembly of section \.text:
- 3b4: f400 35a0 sll a1,16
- 3b8: f010 9d80 lw a0,-32768\(a1\)
- 3bc: f000 6d00 li a1,0
-- 3bc: R_MIPS16_HI16 \.data\+0xffff8000
-+ 3bc: R_MIPS16_HI16 \.data-0x8000
- 3c0: f400 35a0 sll a1,16
- 3c4: f000 9d80 lw a0,0\(a1\)
-- 3c4: R_MIPS16_LO16 \.data\+0xffff8000
-+ 3c4: R_MIPS16_LO16 \.data-0x8000
- 3c8: f000 6d00 li a1,0
-- 3c8: R_MIPS16_HI16 \.data\+0xffff8004
-+ 3c8: R_MIPS16_HI16 \.data-0x7ffc
- 3cc: f400 35a0 sll a1,16
- 3d0: f000 9d80 lw a0,0\(a1\)
-- 3d0: R_MIPS16_LO16 \.data\+0xffff8004
-+ 3d0: R_MIPS16_LO16 \.data-0x7ffc
- 3d4: f000 6d00 li a1,0
-- 3d4: R_MIPS16_HI16 big_external_data_label\+0xffff8000
-+ 3d4: R_MIPS16_HI16 big_external_data_label-0x8000
- 3d8: f400 35a0 sll a1,16
- 3dc: f000 9d80 lw a0,0\(a1\)
-- 3dc: R_MIPS16_LO16 big_external_data_label\+0xffff8000
-+ 3dc: R_MIPS16_LO16 big_external_data_label-0x8000
- 3e0: f000 6d00 li a1,0
-- 3e0: R_MIPS16_HI16 small_external_data_label\+0xffff8000
-+ 3e0: R_MIPS16_HI16 small_external_data_label-0x8000
- 3e4: f400 35a0 sll a1,16
- 3e8: f000 9d80 lw a0,0\(a1\)
-- 3e8: R_MIPS16_LO16 small_external_data_label\+0xffff8000
-+ 3e8: R_MIPS16_LO16 small_external_data_label-0x8000
- 3ec: f000 6d00 li a1,0
-- 3ec: R_MIPS16_HI16 big_external_common\+0xffff8000
-+ 3ec: R_MIPS16_HI16 big_external_common-0x8000
- 3f0: f400 35a0 sll a1,16
- 3f4: f000 9d80 lw a0,0\(a1\)
-- 3f4: R_MIPS16_LO16 big_external_common\+0xffff8000
-+ 3f4: R_MIPS16_LO16 big_external_common-0x8000
- 3f8: f000 6d00 li a1,0
-- 3f8: R_MIPS16_HI16 small_external_common\+0xffff8000
-+ 3f8: R_MIPS16_HI16 small_external_common-0x8000
- 3fc: f400 35a0 sll a1,16
- 400: f000 9d80 lw a0,0\(a1\)
-- 400: R_MIPS16_LO16 small_external_common\+0xffff8000
-+ 400: R_MIPS16_LO16 small_external_common-0x8000
- 404: f000 6d00 li a1,0
-- 404: R_MIPS16_HI16 \.bss\+0xffff8000
-+ 404: R_MIPS16_HI16 \.bss-0x8000
- 408: f400 35a0 sll a1,16
- 40c: f000 9d80 lw a0,0\(a1\)
-- 40c: R_MIPS16_LO16 \.bss\+0xffff8000
-+ 40c: R_MIPS16_LO16 \.bss-0x8000
- 410: f000 6d00 li a1,0
-- 410: R_MIPS16_HI16 \.sbss\+0xffff8000
-+ 410: R_MIPS16_HI16 \.sbss-0x8000
- 414: f400 35a0 sll a1,16
- 418: f000 9d80 lw a0,0\(a1\)
-- 418: R_MIPS16_LO16 \.sbss\+0xffff8000
-+ 418: R_MIPS16_LO16 \.sbss-0x8000
- 41c: 6d01 li a1,1
- 41e: f400 35a0 sll a1,16
- 422: 9d80 lw a0,0\(a1\)
-diff --git a/gas/testsuite/gas/ppc/astest.d b/gas/testsuite/gas/ppc/astest.d
-index 715bc4e..aebc745 100644
---- a/gas/testsuite/gas/ppc/astest.d
-+++ b/gas/testsuite/gas/ppc/astest.d
-@@ -52,11 +52,11 @@ Disassembly of section \.text:
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC_ADDR32 z
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC_ADDR32 x\+0xf+ffffffc
-+ 64: R_PPC_ADDR32 x-0x4
- 68: 00 00 00 00 \.long 0x0
- 68: R_PPC_ADDR32 \.data
- 6c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 6c: R_PPC_ADDR32 z\+0xf+ffffffc
-+ 6c: R_PPC_ADDR32 z-0x4
- 70: ff ff ff 9c \.long 0xffffff9c
- 74: ff ff ff 9c \.long 0xffffff9c
- 78: 00 00 00 00 \.long 0x0
-diff --git a/gas/testsuite/gas/ppc/astest2.d b/gas/testsuite/gas/ppc/astest2.d
-index e0e1943..030e985 100644
---- a/gas/testsuite/gas/ppc/astest2.d
-+++ b/gas/testsuite/gas/ppc/astest2.d
-@@ -48,11 +48,11 @@ Disassembly of section \.text:
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC_ADDR32 z
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC_ADDR32 x\+0xf+ffffffc
-+ 64: R_PPC_ADDR32 x-0x4
- 68: 00 00 00 00 \.long 0x0
- 68: R_PPC_ADDR32 \.data
- 6c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 6c: R_PPC_ADDR32 z\+0xf+ffffffc
-+ 6c: R_PPC_ADDR32 z-0x4
- 70: 00 00 00 08 \.long 0x8
- 74: 00 00 00 08 \.long 0x8
-
-diff --git a/gas/testsuite/gas/ppc/astest2_64.d b/gas/testsuite/gas/ppc/astest2_64.d
-index 356db54..901d425 100644
---- a/gas/testsuite/gas/ppc/astest2_64.d
-+++ b/gas/testsuite/gas/ppc/astest2_64.d
-@@ -45,11 +45,11 @@ Disassembly of section \.text:
- 58: 00 00 00 00 \.long 0x0
- 58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
-+ 5c: R_PPC64_ADDR32 x-0x4
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC64_ADDR32 \.data
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
-+ 64: R_PPC64_ADDR32 z-0x4
- 68: 00 00 00 08 \.long 0x8
- 6c: 00 00 00 08 \.long 0x8
-
-diff --git a/gas/testsuite/gas/ppc/astest64.d b/gas/testsuite/gas/ppc/astest64.d
-index d8edf05..a1a39cc 100644
---- a/gas/testsuite/gas/ppc/astest64.d
-+++ b/gas/testsuite/gas/ppc/astest64.d
-@@ -49,11 +49,11 @@ Disassembly of section \.text:
- 58: 00 00 00 00 \.long 0x0
- 58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
-+ 5c: R_PPC64_ADDR32 x-0x4
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC64_ADDR32 \.data
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
-+ 64: R_PPC64_ADDR32 z-0x4
- 68: ff ff ff a4 \.long 0xffffffa4
- 6c: ff ff ff a4 \.long 0xffffffa4
- 70: 00 00 00 00 \.long 0x0
-diff --git a/gas/testsuite/gas/ppc/test1elf32.d b/gas/testsuite/gas/ppc/test1elf32.d
-index 2e76061..80cc667 100644
---- a/gas/testsuite/gas/ppc/test1elf32.d
-+++ b/gas/testsuite/gas/ppc/test1elf32.d
-@@ -79,7 +79,7 @@ Disassembly of section \.data:
-
- 0+000c <dat0>:
- c: ff ff ff fc fnmsub f31,f31,f31,f31
-- c: R_PPC_REL32 jk\+0xf+fffc
-+ c: R_PPC_REL32 jk-0x4
-
- 0+0010 <dat1>:
- 10: 00 00 00 00 \.long 0x0
-diff --git a/gas/testsuite/gas/ppc/test1elf64.d b/gas/testsuite/gas/ppc/test1elf64.d
-index 8ea8230..33fb6db 100644
---- a/gas/testsuite/gas/ppc/test1elf64.d
-+++ b/gas/testsuite/gas/ppc/test1elf64.d
-@@ -114,7 +114,7 @@ Disassembly of section \.data:
-
- 0000000000000014 <dat0>:
- 14: ff ff ff fc fnmsub f31,f31,f31,f31
-- 14: R_PPC64_REL32 jk\+0xfffffffffffffffc
-+ 14: R_PPC64_REL32 jk-0x4
-
- 0000000000000018 <dat1>:
- 18: 00 00 00 00 \.long 0x0
-diff --git a/gas/testsuite/gas/sparc/reloc64.d b/gas/testsuite/gas/sparc/reloc64.d
-index da40d0c..70bc99d 100644
---- a/gas/testsuite/gas/sparc/reloc64.d
-+++ b/gas/testsuite/gas/sparc/reloc64.d
-@@ -35,13 +35,13 @@ Disassembly of section .text:
- 44: R_SPARC_LO10 .text
- 48: 01 00 00 00 nop
- 4c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
-- 4c: R_SPARC_HH22 .text\+0xfedcba9876543210
-+ 4c: R_SPARC_HH22 .text\-0x123456789abcdf0
- 50: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
-- 50: R_SPARC_HM10 .text\+0xfedcba9876543210
-+ 50: R_SPARC_HM10 .text\-0x123456789abcdf0
- 54: 05 00 00 00 sethi %hi\((0x|)0\), %g2
-- 54: R_SPARC_LM22 .text\+0xfedcba9876543210
-+ 54: R_SPARC_LM22 .text\-0x123456789abcdf0
- 58: 84 10 60 00 mov %g1, %g2
-- 58: R_SPARC_LO10 .text\+0xfedcba9876543210
-+ 58: R_SPARC_LO10 .text\-0x123456789abcdf0
- 5c: 01 00 00 00 nop
- 60: 03 2a 61 d9 sethi %hi\(0xa9876400\), %g1
- 64: 82 10 61 43 or %g1, 0x143, %g1.*
-@@ -70,7 +70,7 @@ Disassembly of section .text:
- a0: R_SPARC_LOX10 .text
- a4: 01 00 00 00 nop
- a8: 03 00 00 00 sethi %hi\((0x|)0\), %g1
-- a8: R_SPARC_HIX22 .text\+0xffffffff76543210
-+ a8: R_SPARC_HIX22 .text-0x89abcdf0
- ac: 82 18 60 00 xor %g1, 0, %g1
-- ac: R_SPARC_LOX10 .text\+0xffffffff76543210
-+ ac: R_SPARC_LOX10 .text-0x89abcdf0
- b0: 01 00 00 00 nop
