Merge branch 'rcar-3.5.3/dts-rcar-gen3.rc3' into v4.9/rcar-3.5.4
* rcar-3.5.3/dts-rcar-gen3.rc3: (39 commits)
arm64: dts: r8a7796: Add Audio Mix support on DTSI
Revert "arm64: dts: r8a7796: Add Audio Mix support on DTSI"
arm64: dts: r8a7795: Add MFIS Lock device node
arm64: dts: r8a7796: Add MFIS device node
arm64: dts: r8a7795: Add MFIS Lock device node
arm64: dts: r8a7795: Add MFIS device node
arm64: dts: r8a7795-es1: Add MFIS Lock device node
arm64: dts: r8a7795-es1: Add MFIS device node
Revert "arm64: dts: r8a7795-es1: Add MFIS device node"
Revert "arm64: dts: r8a7795-es1: Add MFIS Lock device node"
Revert "arm64: dts: r8a7795: Add MFIS device node"
Revert "arm64: dts: r8a7795: Add MFIS Lock device node"
Revert "arm64: dts: r8a7796: Add MFIS device node"
Revert "arm64: dts: r8a7796: Add MFIS Lock device node"
Revert "arm64: dts: r8a7795: Remove clocks and power-domains from MFIS device node"
Revert "arm64: dts: r8a7795: Remove clocks and power-domains from MFIS Lock device node"
Revert "arm64: dts: r8a7796: Remove clocks and power-domains from MFIS device node"
Revert "arm64: dts: r8a7796: Remove clocks and power-domains from MFIS Lock device node"
Revert "arm64: dts: r8a7795-es1: Remove clocks and power-domains from MFIS device node"
Revert "arm64: dts: r8a7795-es1: Remove clocks and power-domains from MFIS Lock device node"
arm64: dts: r8a7796-salvator-x: add 12288000 for sound ADG
arm64: dts: r8a7795-salvator-x: add 12288000 for sound ADG
arm64: dts: r8a7796: Use IPMMU(MMU mode) in IPMMU-VC0
arm64: dts: r8a7795-es1: Use IPMMU (MMU mode) for IPMMU-VP and IPMMU-VC0/1
arm64: dts: r8a7795: Use IPMMU(MMU mode) for IPMMU-VP0/1 and IPMMU-VC0/1
arm64: dts: r8a7795-es1: Add DEVFREQ support for GSX
arm64: dts: r8a7796: Add DEVFREQ support for GSX
arm64: dts: r8a7795: Add DEVFREQ support for GSX
arm64: dts: r8a7796-salvator-xs: Enable USB3.0 peripheral ch0
arm64: dts: r8a7795-salvator-xs: Enable USB3.0 peripheral ch0
...
diff --git a/Documentation/ABI/testing/sysfs-platform-renesas_usb3 b/Documentation/ABI/testing/sysfs-platform-renesas_usb3
new file mode 100644
index 0000000..5621c15
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-platform-renesas_usb3
@@ -0,0 +1,15 @@
+What: /sys/devices/platform/<renesas_usb3's name>/role
+Date: March 2017
+KernelVersion: 4.13
+Contact: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Description:
+ This file can be read and write.
+ The file can show/change the drd mode of usb.
+
+ Write the following string to change the mode:
+ "host" - switching mode from peripheral to host.
+ "peripheral" - switching mode from host to peripheral.
+
+ Read the file, then it shows the following strings:
+ "host" - The mode is host now.
+ "peripheral" - The mode is peripheral now.
diff --git a/Documentation/devicetree/bindings/hwlock/rcar-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/rcar-hwspinlock.txt
index 133673d..e342ae4 100644
--- a/Documentation/devicetree/bindings/hwlock/rcar-hwspinlock.txt
+++ b/Documentation/devicetree/bindings/hwlock/rcar-hwspinlock.txt
@@ -8,10 +8,6 @@
- reg : start address and length for MFIS lock registers.
-- clocks : clock phandle and specifier pair.
-
-- power-domains : the power domain the MFIS belongs to.
-
Examples:
@@ -19,6 +15,4 @@
compatible = "renesas,mfis-lock-r8a7795",
"renesas,mfis-lock";
reg = <0 0xe62600c0 0 0x0020>;
- clocks = <&cpg CPG_MOD 213>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2-clksel.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2-clksel.txt
new file mode 100644
index 0000000..caef034
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2-clksel.txt
@@ -0,0 +1,60 @@
+* Renesas R-Car generation 3 USB 2.0 clock selector PHY
+
+This file provides information on what the device node for the R-Car generation
+3 USB 2.0 clock selector PHY contains.
+
+If you connect an external clock to the USB_EXTAL pin, you can use the
+"renesas,usb_extal_only" property for it.
+If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module
+is not needed because this is default setting.
+
+Case 1: An external clock connects to R-Car SoC
+ +----------+ +--- R-Car ---------------------+
+ |External |---|USB_EXTAL ---> all usb channels|
+ |clock | |USB_XTAL |
+ +----------+ +-------------------------------+
+In this case, we need this driver with "usb-extal-only" property.
+
+Case 2: An oscillator connects to R-Car SoC
+ +----------+ +--- R-Car ---------------------+
+ |Oscillator|---|USB_EXTAL -+-> all usb channels|
+ | |---|USB_XTAL --+ |
+ +----------+ +-------------------------------+
+In this case, we don't need this selector.
+
+Required properties:
+- compatible: "renesas,usb2-clksel-phy-r8a7795" if the device is a part of an
+ R8A7795 SoC.
+ "renesas,usb2-clksel-phy-r8a7796" if the device is a part of an
+ R8A7796 SoC.
+ "renesas,rcar-gen3-usb2-clksel-phy" for a generic R-Car Gen3
+ compatible device.
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first
+ followed by the generic version.
+
+- reg: offset and length of the USB 2.0 clock selector register block.
+- clocks: clock phandle and specifier pair(s).
+- #phy-cells: see phy-bindings.txt in the same directory, must be <0>.
+
+Optional properties:
+- renesas,usb-extal-only: to connect a clock generator to USB_EXTAL pin.
+
+Example (R-Car H3):
+
+ usb2_clksel_phy: usb-phy@e6590630 {
+ compatible = "renesas,usb2-clksel-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-clksel-phy";
+ reg = <0 0xe6590630 0 0x02>;
+ clocks = <&cpg CPG_MOD 703>;
+ renesas,usb-extal-only;
+ };
+
+ &ehci0 {
+ /* We should set usb2_clksel_phy into the first phys prop */
+ phys = <&usb2_clksel_phy>, <&usb2_phy0>;
+ phy-names = "usb_clk", "usb";
+
+ status = "okay";
+ };
diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt
new file mode 100644
index 0000000..2092058b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt
@@ -0,0 +1,41 @@
+* Renesas R-Car generation 3 USB 3.0 PHY
+
+This file provides information on what the device node for the R-Car generation
+3 USB 3.0 PHY contains.
+If you want to enable spread spectrum clock (ssc) and/or use USB_EXTAL instead
+of USB3_CLK, you need this driver. However, if you don't want to these feature,
+you don't need this driver.
+
+Required properties:
+- compatible: "renesas,usb3-phy-r8a7795" if the device is a part of an R8A7795
+ SoC.
+ "renesas,usb3-phy-r8a7796" if the device is a part of an R8A7796
+ SoC.
+ "renesas,rcar-gen3-usb3-phy" for a generic R-Car Gen3 compatible
+ device.
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first
+ followed by the generic version.
+
+- reg: offset and length of the USB 3.0 PHY register block.
+- clocks: clock phandle and specifier pair(s).
+- #phy-cells: see phy-bindings.txt in the same directory, must be <0>.
+
+Optional properties:
+- renesas,ssc-range: Enable/disable spread spectrum clock (ssc) by using
+ the following values as u32:
+ - 0 (or the property doesn't exist): disable the ssc
+ - 4980: enable the ssc as -4980 ppm
+ - 4492: enable the ssc as -4492 ppm
+ - 4003: enable the ssc as -4003 ppm
+- renesas,usb-extal: Use USB_[E]XTAL pins instead of USB3S0_CLK_[PN].
+
+Example (R-Car H3):
+
+ usb-phy@e65ee000 {
+ compatible = "renesas,usb3-phy-r8a7795",
+ "renesas,rcar-gen3-usb3-phy";
+ reg = <0 0xe65ee000 0 0x90>;
+ clocks = <&cpg CPG_MOD 328>;
+ };
diff --git a/Documentation/devicetree/bindings/usb/generic.txt b/Documentation/devicetree/bindings/usb/generic.txt
index bfadeb1..0a74ab8 100644
--- a/Documentation/devicetree/bindings/usb/generic.txt
+++ b/Documentation/devicetree/bindings/usb/generic.txt
@@ -22,6 +22,7 @@
property is used if any real OTG features(HNP/SRP/ADP)
is enabled, if ADP is required, otg-rev should be
0x0200 or above.
+ - companion: phandle of a companion
- hnp-disable: tells OTG controllers we want to disable OTG HNP, normally HNP
is the basic function of real OTG except you want it
to be a srp-capable only B device.
diff --git a/MAINTAINERS b/MAINTAINERS
index 63cefa6..7a5afea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10216,11 +10216,11 @@
F: drivers/net/ethernet/renesas/
F: include/linux/sh_eth.h
-RENESAS USB2 PHY DRIVER
+RENESAS USB2/3 PHY DRIVER
M: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
L: linux-renesas-soc@vger.kernel.org
S: Maintained
-F: drivers/phy/phy-rcar-gen3-usb2.c
+F: drivers/phy/phy-rcar-gen3-usb*.c
RESET CONTROLLER FRAMEWORK
M: Philipp Zabel <p.zabel@pengutronix.de>
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
index 69be26c..7fcd8f3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
@@ -896,6 +896,14 @@
status = "okay";
};
+&usb3_peri0 {
+ status = "okay";
+};
+
+&usb3_peri1 {
+ status = "okay";
+};
+
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 4e030c8..3a70fb2 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -371,6 +371,7 @@
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=y
+CONFIG_USB_RENESAS_USB3=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_ARMMMCI=y
@@ -436,6 +437,12 @@
CONFIG_QCOM_SMD_RPM=y
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
+CONFIG_PM_DEVFREQ=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_POWERSAVE=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+CONFIG_DEVFREQ_GOV_PASSIVE=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_PWM=y
CONFIG_PWM_TEGRA=m
diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
index 59d2dc0..08f0829 100644
--- a/drivers/ata/sata_rcar.c
+++ b/drivers/ata/sata_rcar.c
@@ -890,7 +890,10 @@ static int sata_rcar_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to get access to sata clock\n");
return PTR_ERR(priv->clk);
}
- clk_prepare_enable(priv->clk);
+
+ ret = clk_prepare_enable(priv->clk);
+ if (ret)
+ return ret;
host = ata_host_alloc(&pdev->dev, 1);
if (!host) {
@@ -971,8 +974,11 @@ static int sata_rcar_resume(struct device *dev)
struct sata_rcar_priv *priv = host->private_data;
void __iomem *base = priv->base;
u32 val;
+ int ret;
- clk_prepare_enable(priv->clk);
+ ret = clk_prepare_enable(priv->clk);
+ if (ret)
+ return ret;
/* Re-use from sata_rcar_init_controller() */
/* reset and setup phy */
@@ -1020,8 +1026,11 @@ static int sata_rcar_restore(struct device *dev)
{
struct ata_host *host = dev_get_drvdata(dev);
struct sata_rcar_priv *priv = host->private_data;
+ int ret;
- clk_prepare_enable(priv->clk);
+ ret = clk_prepare_enable(priv->clk);
+ if (ret)
+ return ret;
sata_rcar_setup_port(host);
diff --git a/drivers/clk/clk-5p49x.c b/drivers/clk/clk-5p49x.c
index 928bacb..bca6587 100644
--- a/drivers/clk/clk-5p49x.c
+++ b/drivers/clk/clk-5p49x.c
@@ -39,15 +39,15 @@
#define C5P49_CLK_OE_SHUTDOWN 0x68
-#define hw_to_priv(_hw) container_of(_hw, struct clk_5p49_priv, hw)
-#define priv_to_client(priv) (priv->client)
+#define hw_to_priv(_hw) container_of(_hw, struct clk_5p49_data, hw)
+#define priv_to_client(data) ((data)->client)
#define priv_to_dev(priv) (&(priv_to_client(priv)->dev))
struct clk_5p49_info {
unsigned long xtal_fre;
};
-struct clk_5p49_priv {
+struct clk_5p49_data {
struct clk_hw hw;
struct i2c_client *client;
struct clk *clk_out;
@@ -56,6 +56,10 @@ struct clk_5p49_priv {
const struct clk_5p49_info *info;
};
+struct clk_5p49_priv {
+ struct clk_5p49_data data[CLK_MAX];
+};
+
static const struct clk_5p49_info clk_5p49v5923a = {
.xtal_fre = 25000000,
};
@@ -84,12 +88,12 @@ static const struct i2c_device_id clk_5p49_id[] = {
};
MODULE_DEVICE_TABLE(i2c, clk_5p49_id);
-#define clk_5p49_read(priv, addr) \
- i2c_smbus_read_byte_data(priv_to_client(priv), \
- (addr + (0x10 * priv->index)))
-#define clk_5p49_write(priv, addr, val) \
- i2c_smbus_write_byte_data(priv_to_client(priv), \
- (addr + (0x10 * priv->index)), val)
+#define clk_5p49_read(data, addr) \
+ i2c_smbus_read_byte_data(priv_to_client(data), \
+ ((addr) + (0x10 * ((data)->index))))
+#define clk_5p49_write(data, addr, val) \
+ i2c_smbus_write_byte_data(priv_to_client(data), \
+ ((addr) + (0x10 * ((data)->index))), val)
static int clk_5p49_set_rate(struct clk_hw *hw,
unsigned long rate, unsigned long parent_rate)
@@ -99,21 +103,21 @@ static int clk_5p49_set_rate(struct clk_hw *hw,
static void clk_5p49_power(struct clk_hw *hw, bool power)
{
- struct clk_5p49_priv *priv = hw_to_priv(hw);
+ struct clk_5p49_data *data = hw_to_priv(hw);
u8 reg;
if (power) {
- reg = i2c_smbus_read_byte_data(priv->client,
- C5P49_CLK_OE_SHUTDOWN);
- reg |= (0x80 >> (priv->index - 1));
- i2c_smbus_write_byte_data(priv->client,
- C5P49_CLK_OE_SHUTDOWN, reg);
+ reg = i2c_smbus_read_byte_data(data->client,
+ C5P49_CLK_OE_SHUTDOWN);
+ reg |= (0x80 >> (data->index - 1));
+ i2c_smbus_write_byte_data(data->client,
+ C5P49_CLK_OE_SHUTDOWN, reg);
} else {
- reg = i2c_smbus_read_byte_data(priv->client,
- C5P49_CLK_OE_SHUTDOWN);
- reg &= ~(0x80 >> (priv->index - 1));
- i2c_smbus_write_byte_data(priv->client,
- C5P49_CLK_OE_SHUTDOWN, reg);
+ reg = i2c_smbus_read_byte_data(data->client,
+ C5P49_CLK_OE_SHUTDOWN);
+ reg &= ~(0x80 >> (data->index - 1));
+ i2c_smbus_write_byte_data(data->client,
+ C5P49_CLK_OE_SHUTDOWN, reg);
}
}
@@ -132,47 +136,47 @@ static void clk_5p49_disable(struct clk_hw *hw)
static unsigned long clk_5p49_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
- struct clk_5p49_priv *priv = hw_to_priv(hw);
+ struct clk_5p49_data *data = hw_to_priv(hw);
- return priv->clk_rate;
+ return data->clk_rate;
}
static int clk_5p49_div_calculation(struct clk_hw *hw, unsigned long rate)
{
- struct clk_5p49_priv *priv = hw_to_priv(hw);
+ struct clk_5p49_data *data = hw_to_priv(hw);
int integ_div, frac_div, div, vco_div, vco_clk;
- u32 shift_1kHz = 1000;
+ u32 shift_1khz = 1000;
u8 frac_0, frac_1, frac_2, frac_3;
- vco_div = ((i2c_smbus_read_byte_data(priv->client,
+ vco_div = ((i2c_smbus_read_byte_data(data->client,
C5P49_FB_INT_DIV_REG0) & 0xF0) >> 4)
- + (i2c_smbus_read_byte_data(priv->client,
+ + (i2c_smbus_read_byte_data(data->client,
C5P49_FB_INT_DIV_REG1) << 4);
clk_5p49_power(hw, false);
- vco_clk = priv->info->xtal_fre * vco_div / shift_1kHz;
- dev_dbg(&priv->client->dev, "vco clock:%d kHz\n", vco_clk);
+ vco_clk = data->info->xtal_fre * vco_div / shift_1khz;
+ dev_dbg(&data->client->dev, "vco clock:%d kHz\n", vco_clk);
vco_clk = (vco_clk / 2);
- rate = rate / shift_1kHz;
+ rate = rate / shift_1khz;
integ_div = (vco_clk / rate);
- div = ((vco_clk * shift_1kHz) / rate);
- frac_div = div - (integ_div * shift_1kHz);
+ div = ((vco_clk * shift_1khz) / rate);
+ frac_div = div - (integ_div * shift_1khz);
if (frac_div > 0x3fffffff)
return -EINVAL;
- clk_5p49_write(priv, C5P49_DIV_INTEGER_11_4,
- ((0x0ff0 & (u16)integ_div) >> 4));
- clk_5p49_write(priv, C5P49_DIV_INTEGER_3_0,
- ((0x000f & (u16)integ_div) << 4));
+ clk_5p49_write(data, C5P49_DIV_INTEGER_11_4,
+ ((0x0ff0 & (u16)integ_div) >> 4));
+ clk_5p49_write(data, C5P49_DIV_INTEGER_3_0,
+ ((0x000f & (u16)integ_div) << 4));
/* spread = 0.01% */
frac_div = frac_div - ((div / (100 * 100 / 1)) / 2);
- frac_div = ((0x1000000 / shift_1kHz) * frac_div);
- dev_dbg(&priv->client->dev,
+ frac_div = ((0x1000000 / shift_1khz) * frac_div);
+ dev_dbg(&data->client->dev,
"integer:0x%x, fraction:0x%x\n",
integ_div, frac_div);
@@ -181,10 +185,10 @@ static int clk_5p49_div_calculation(struct clk_hw *hw, unsigned long rate)
frac_2 = (frac_div & 0x00003fc0) >> 6;
frac_3 = (frac_div & 0x0000003f) << 2;
- clk_5p49_write(priv, C5P49_DIV_FRAC_29_22, frac_0);
- clk_5p49_write(priv, C5P49_DIV_FRAC_21_14, frac_1);
- clk_5p49_write(priv, C5P49_DIV_FRAC_13_6, frac_2);
- clk_5p49_write(priv, C5P49_DIV_FRAC_5_0, frac_3);
+ clk_5p49_write(data, C5P49_DIV_FRAC_29_22, frac_0);
+ clk_5p49_write(data, C5P49_DIV_FRAC_21_14, frac_1);
+ clk_5p49_write(data, C5P49_DIV_FRAC_13_6, frac_2);
+ clk_5p49_write(data, C5P49_DIV_FRAC_5_0, frac_3);
clk_5p49_power(hw, true);
@@ -194,16 +198,16 @@ static int clk_5p49_div_calculation(struct clk_hw *hw, unsigned long rate)
static long clk_5p49_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
- struct clk_5p49_priv *priv = hw_to_priv(hw);
+ struct clk_5p49_data *data = hw_to_priv(hw);
int ret;
- priv->clk_rate = 0;
+ data->clk_rate = 0;
ret = clk_5p49_div_calculation(hw, rate);
if (ret < 0)
return ret;
- priv->clk_rate = rate;
+ data->clk_rate = rate;
return 0;
}
@@ -222,7 +226,7 @@ static const struct clk_ops clk_5p49_ops = {
.round_rate = clk_5p49_round_rate,
};
-static int clk_5p49_clk_register(struct clk_5p49_priv *priv,
+static int clk_5p49_clk_register(struct clk_5p49_data *data,
struct device_node *np)
{
struct clk_init_data init;
@@ -240,9 +244,9 @@ static int clk_5p49_clk_register(struct clk_5p49_priv *priv,
init.parent_names = parent_names;
init.num_parents = ARRAY_SIZE(parent_names);
- priv->hw.init = &init;
+ data->hw.init = &init;
- clk = clk_register(NULL, &priv->hw);
+ clk = clk_register(NULL, &data->hw);
if (IS_ERR(clk))
return PTR_ERR(clk);
@@ -252,7 +256,7 @@ static int clk_5p49_clk_register(struct clk_5p49_priv *priv,
return ret;
}
- priv->clk_out = clk;
+ data->clk_out = clk;
return 0;
}
@@ -260,7 +264,7 @@ static int clk_5p49_clk_register(struct clk_5p49_priv *priv,
static int clk_5p49_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
- struct clk_5p49_priv *priv = NULL;
+ struct clk_5p49_priv *priv;
struct device *dev = &client->dev;
struct device_node *np = dev->of_node, *ch_np;
const struct of_device_id *match;
@@ -271,6 +275,10 @@ static int clk_5p49_probe(struct i2c_client *client,
if (!match)
return -ENODEV;
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
for (i = ch; i < CLK_MAX; i++) {
char name[20];
@@ -279,16 +287,12 @@ static int clk_5p49_probe(struct i2c_client *client,
if (!ch_np)
continue;
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->info = match->data;
- priv->client = client;
- priv->index = i + 1;
+ priv->data[i].info = match->data;
+ priv->data[i].client = client;
+ priv->data[i].index = i + 1;
i2c_set_clientdata(client, priv);
- ret = clk_5p49_clk_register(priv, ch_np);
+ ret = clk_5p49_clk_register(&priv->data[i], ch_np);
if (ret < 0)
return ret;
probe_cnt++;
@@ -300,7 +304,7 @@ static int clk_5p49_probe(struct i2c_client *client,
}
dev_info(dev, "Rev.0x%x, probed\n",
- i2c_smbus_read_byte_data(priv->client, 0x01));
+ i2c_smbus_read_byte_data(priv->data[ch].client, 0x01));
return 0;
}
@@ -310,10 +314,12 @@ static int clk_5p49_remove(struct i2c_client *client)
struct clk_5p49_priv *priv = i2c_get_clientdata(client);
struct device *dev = &client->dev;
struct device_node *np = dev->of_node;
+ int i, ch = 1; /* ch = 0 reserved.*/
of_clk_del_provider(np);
- clk_unregister(priv->clk_out);
+ for (i = ch; i < CLK_MAX; i++)
+ clk_unregister(priv->data[i].clk_out);
return 0;
}
diff --git a/drivers/clk/clk-cs2000-cp.c b/drivers/clk/clk-cs2000-cp.c
index 736085c..f9a345f 100644
--- a/drivers/clk/clk-cs2000-cp.c
+++ b/drivers/clk/clk-cs2000-cp.c
@@ -36,15 +36,35 @@
/* DEVICE_CTRL */
#define PLL_UNLOCK (1 << 7)
+#define AUXOUTDIS (1 << 1)
+#define CLKOUTDIS (1 << 0)
/* DEVICE_CFG1 */
#define RSEL(x) (((x) & 0x3) << 3)
#define RSEL_MASK RSEL(0x3)
#define ENDEV1 (0x1)
+/* DEVICE_CFG2 */
+#define AUTORMOD (1 << 3)
+#define LOCKCLK(x) (((x) & 0x3) << 1)
+#define LOCKCLK_MASK LOCKCLK(0x3)
+#define FRACNSRC_MASK (1 << 0)
+#define FRACNSRC_STATIC (0 << 0)
+#define FRACNSRC_DYNAMIC (1 << 1)
+
/* GLOBAL_CFG */
#define ENDEV2 (0x1)
+/* FUNC_CFG1 */
+#define CLKSKIPEN (1 << 7)
+#define REFCLKDIV(x) (((x) & 0x3) << 3)
+#define REFCLKDIV_MASK REFCLKDIV(0x3)
+
+/* FUNC_CFG2 */
+#define LFRATIO_MASK (1 << 3)
+#define LFRATIO_20_12 (0 << 3)
+#define LFRATIO_12_20 (1 << 3)
+
#define CH_SIZE_ERR(ch) ((ch < 0) || (ch >= CH_MAX))
#define hw_to_priv(_hw) container_of(_hw, struct cs2000_priv, hw)
#define priv_to_client(priv) (priv->client)
@@ -110,6 +130,17 @@ static int cs2000_enable_dev_config(struct cs2000_priv *priv, bool enable)
if (ret < 0)
return ret;
+ ret = cs2000_bset(priv, FUNC_CFG1, CLKSKIPEN,
+ enable ? CLKSKIPEN : 0);
+ if (ret < 0)
+ return ret;
+
+ /* FIXME: for Static ratio mode */
+ ret = cs2000_bset(priv, FUNC_CFG2, LFRATIO_MASK,
+ LFRATIO_12_20);
+ if (ret < 0)
+ return ret;
+
return 0;
}
@@ -127,7 +158,9 @@ static int cs2000_clk_in_bound_rate(struct cs2000_priv *priv,
else
return -EINVAL;
- return cs2000_bset(priv, FUNC_CFG1, 0x3 << 3, val << 3);
+ return cs2000_bset(priv, FUNC_CFG1,
+ REFCLKDIV_MASK,
+ REFCLKDIV(val));
}
static int cs2000_wait_pll_lock(struct cs2000_priv *priv)
@@ -153,7 +186,10 @@ static int cs2000_wait_pll_lock(struct cs2000_priv *priv)
static int cs2000_clk_out_enable(struct cs2000_priv *priv, bool enable)
{
/* enable both AUX_OUT, CLK_OUT */
- return cs2000_write(priv, DEVICE_CTRL, enable ? 0 : 0x3);
+ return cs2000_bset(priv, DEVICE_CTRL,
+ (AUXOUTDIS | CLKOUTDIS),
+ enable ? 0 :
+ (AUXOUTDIS | CLKOUTDIS));
}
static u32 cs2000_rate_to_ratio(u32 rate_in, u32 rate_out)
@@ -243,7 +279,9 @@ static int cs2000_ratio_select(struct cs2000_priv *priv, int ch)
if (ret < 0)
return ret;
- ret = cs2000_write(priv, DEVICE_CFG2, 0x0);
+ ret = cs2000_bset(priv, DEVICE_CFG2,
+ (AUTORMOD | LOCKCLK_MASK | FRACNSRC_MASK),
+ (LOCKCLK(ch) | FRACNSRC_STATIC));
if (ret < 0)
return ret;
@@ -364,8 +402,7 @@ static const struct clk_ops cs2000_ops = {
static int cs2000_clk_get(struct cs2000_priv *priv)
{
- struct i2c_client *client = priv_to_client(priv);
- struct device *dev = &client->dev;
+ struct device *dev = priv_to_dev(priv);
struct clk *clk_in, *ref_clk;
clk_in = devm_clk_get(dev, "clk_in");
@@ -433,8 +470,7 @@ static int cs2000_clk_register(struct cs2000_priv *priv)
static int cs2000_version_print(struct cs2000_priv *priv)
{
- struct i2c_client *client = priv_to_client(priv);
- struct device *dev = &client->dev;
+ struct device *dev = priv_to_dev(priv);
s32 val;
const char *revision;
@@ -465,7 +501,7 @@ static int cs2000_version_print(struct cs2000_priv *priv)
static int cs2000_remove(struct i2c_client *client)
{
struct cs2000_priv *priv = i2c_get_clientdata(client);
- struct device *dev = &client->dev;
+ struct device *dev = priv_to_dev(priv);
struct device_node *np = dev->of_node;
of_clk_del_provider(np);
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 718afd6..9e5abc3 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -77,7 +77,7 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
/* Core Clock Outputs */
DEF_BASE("z", R8A7795_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0),
DEF_BASE("z2", R8A7795_CLK_Z2, CLK_TYPE_GEN3_Z2, CLK_PLL2),
- DEF_FIXED("zg", R8A7795_CLK_ZG, CLK_PLL4, 4, 1),
+ DEF_BASE("zg", R8A7795_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4),
DEF_FIXED("ztr", R8A7795_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A7795_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A7795_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -112,8 +112,8 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
DEF_DIV6P1("csi0", R8A7795_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
- DEF_DIV6_RO("osc", R8A7795_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
- DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
+ DEF_BASE("osc", R8A7795_CLK_OSC, CLK_TYPE_GEN3_OSC, CLK_EXTAL),
+ DEF_BASE("r_int", CLK_RINT, CLK_TYPE_GEN3_RINT, CLK_EXTAL),
DEF_BASE("r", R8A7795_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
};
@@ -177,7 +177,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
DEF_MOD("hscif1", 519, R8A7795_CLK_S3D1),
DEF_MOD("hscif0", 520, R8A7795_CLK_S3D1),
DEF_MOD("thermal", 522, R8A7795_CLK_CP),
- DEF_MOD("pwm", 523, R8A7795_CLK_S3D4),
+ DEF_MOD("pwm", 523, R8A7795_CLK_S0D12),
DEF_MOD("fcpvd3", 600, R8A7795_CLK_S2D1), /* ES1.x */
DEF_MOD("fcpvd2", 601, R8A7795_CLK_S2D1),
DEF_MOD("fcpvd1", 602, R8A7795_CLK_S2D1),
@@ -229,23 +229,23 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
DEF_MOD("vin0", 811, R8A7795_CLK_S0D2),
DEF_MOD("etheravb", 812, R8A7795_CLK_S0D6),
DEF_MOD("sata0", 815, R8A7795_CLK_S3D2),
- DEF_MOD("gpio7", 905, R8A7795_CLK_CP),
- DEF_MOD("gpio6", 906, R8A7795_CLK_CP),
- DEF_MOD("gpio5", 907, R8A7795_CLK_CP),
- DEF_MOD("gpio4", 908, R8A7795_CLK_CP),
- DEF_MOD("gpio3", 909, R8A7795_CLK_CP),
- DEF_MOD("gpio2", 910, R8A7795_CLK_CP),
- DEF_MOD("gpio1", 911, R8A7795_CLK_CP),
- DEF_MOD("gpio0", 912, R8A7795_CLK_CP),
+ DEF_MOD("gpio7", 905, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio5", 907, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio4", 908, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio3", 909, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio2", 910, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio1", 911, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio0", 912, R8A7795_CLK_S3D4),
DEF_MOD("can-fd", 914, R8A7795_CLK_S3D2),
DEF_MOD("can-if1", 915, R8A7795_CLK_S3D4),
DEF_MOD("can-if0", 916, R8A7795_CLK_S3D4),
- DEF_MOD("i2c6", 918, R8A7795_CLK_S3D2),
- DEF_MOD("i2c5", 919, R8A7795_CLK_S3D2),
+ DEF_MOD("i2c6", 918, R8A7795_CLK_S0D6),
+ DEF_MOD("i2c5", 919, R8A7795_CLK_S0D6),
DEF_MOD("adg", 922, R8A7795_CLK_S0D1),
DEF_MOD("i2c-dvfs", 926, R8A7795_CLK_CP),
- DEF_MOD("i2c4", 927, R8A7795_CLK_S3D2),
- DEF_MOD("i2c3", 928, R8A7795_CLK_S3D2),
+ DEF_MOD("i2c4", 927, R8A7795_CLK_S0D6),
+ DEF_MOD("i2c3", 928, R8A7795_CLK_S0D6),
DEF_MOD("i2c2", 929, R8A7795_CLK_S3D2),
DEF_MOD("i2c1", 930, R8A7795_CLK_S3D2),
DEF_MOD("i2c0", 931, R8A7795_CLK_S3D2),
@@ -306,30 +306,54 @@ static const unsigned int r8a7795_crit_mod_clks[] __initconst = {
* 1 1 0 1 33.33 / 2 x180 x192 x144 x168 x144
* 1 1 1 0 33.33 / 2 x180 x192 x144 x144 x144
* 1 1 1 1 33.33 / 2 x180 x192 x144 x192 x144
+ *
+ * MD Internal
+ * 14 13 19 17 RCLK OSCCLK
+ *-----------------------------------------------------------------
+ * 0 0 0 0 x 1/512 (x 1/16 x 1/32) 128 (x 1/16 x 1/8)
+ * 0 0 0 1 x 1/512 (x 1/16 x 1/32) 128 (x 1/16 x 1/8)
+ * 0 0 1 0 x 1/512 (x 1/16 x 1/32) 128 (x 1/16 x 1/8)
+ * 0 0 1 1 x 1/512 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 0 0 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 0 1 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 1 0 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 1 1 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 1 0 0 0 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 0 0 1 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 0 1 0 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 0 1 1 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 1 0 0 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
+ * 1 1 0 1 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
+ * 1 1 1 0 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
+ * 1 1 1 1 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
*/
+
#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \
(((md) & BIT(13)) >> 11) | \
(((md) & BIT(19)) >> 18) | \
(((md) & BIT(17)) >> 17))
static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
- /* EXTAL div PLL1 mult PLL3 mult */
- { 1, 192, 192, },
- { 1, 192, 168, },
- { 1, 192, 144, },
- { 1, 192, 192, },
- { 1, 160, 160, },
- { 1, 160, 140, },
- { 1, 160, 120, },
- { 1, 160, 160, },
- { 1, 128, 128, },
- { 1, 128, 112, },
- { 1, 128, 96, },
- { 1, 128, 128, },
- { 2, 192, 192, },
- { 2, 192, 168, },
- { 2, 192, 144, },
- { 2, 192, 192, },
+ /*
+ * internal R OSC
+ * EXTAL div PLL1 mult PLL3 mult div div
+ */
+ { 1, 192, 192, 512, 128 },
+ { 1, 192, 168, 512, 128 },
+ { 1, 192, 144, 512, 128 },
+ { 1, 192, 192, 512, 128 },
+ { 1, 160, 160, 608, 152 },
+ { 1, 160, 140, 608, 152 },
+ { 1, 160, 120, 608, 152 },
+ { 1, 160, 160, 608, 152 },
+ { 1, 128, 128, 768, 192 },
+ { 1, 128, 112, 768, 192 },
+ { 1, 128, 96, 768, 192 },
+ { 1, 128, 128, 768, 192 },
+ { 2, 192, 192, 1024, 256 },
+ { 2, 192, 168, 1024, 256 },
+ { 2, 192, 144, 1024, 256 },
+ { 2, 192, 192, 1024, 256 },
};
static const struct soc_device_attribute r8a7795es1[] __initconst = {
@@ -359,6 +383,7 @@ static const struct mssr_mod_reparent r8a7795es1_mod_reparent[] __initconst = {
{ MOD_CLK_ID(219), R8A7795_CLK_S3D1 }, /* SYS-DMAC0 */
{ MOD_CLK_ID(501), R8A7795_CLK_S3D4 }, /* AUDMAC1 */
{ MOD_CLK_ID(502), R8A7795_CLK_S3D4 }, /* AUDMAC0 */
+ { MOD_CLK_ID(523), R8A7795_CLK_S3D4 }, /* PWM */
{ MOD_CLK_ID(621), R8A7795_CLK_S2D1 }, /* VSPD2 */
{ MOD_CLK_ID(622), R8A7795_CLK_S2D1 }, /* VSPD1 */
{ MOD_CLK_ID(623), R8A7795_CLK_S2D1 }, /* VSPD0 */
@@ -375,6 +400,18 @@ static const struct mssr_mod_reparent r8a7795es1_mod_reparent[] __initconst = {
{ MOD_CLK_ID(810), R8A7795_CLK_S2D1 }, /* VIN1 */
{ MOD_CLK_ID(811), R8A7795_CLK_S2D1 }, /* VIN0 */
{ MOD_CLK_ID(812), R8A7795_CLK_S3D2 }, /* EAVB-IF */
+ { MOD_CLK_ID(905), R8A7795_CLK_CP }, /* GPIO7 */
+ { MOD_CLK_ID(906), R8A7795_CLK_CP }, /* GPIO6 */
+ { MOD_CLK_ID(907), R8A7795_CLK_CP }, /* GPIO5 */
+ { MOD_CLK_ID(908), R8A7795_CLK_CP }, /* GPIO4 */
+ { MOD_CLK_ID(909), R8A7795_CLK_CP }, /* GPIO3 */
+ { MOD_CLK_ID(910), R8A7795_CLK_CP }, /* GPIO2 */
+ { MOD_CLK_ID(911), R8A7795_CLK_CP }, /* GPIO1 */
+ { MOD_CLK_ID(912), R8A7795_CLK_CP }, /* GPIO0 */
+ { MOD_CLK_ID(918), R8A7795_CLK_S3D2 }, /* I2C6 */
+ { MOD_CLK_ID(919), R8A7795_CLK_S3D2 }, /* I2C5 */
+ { MOD_CLK_ID(927), R8A7795_CLK_S3D2 }, /* I2C4 */
+ { MOD_CLK_ID(928), R8A7795_CLK_S3D2 }, /* I2C3 */
};
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index b938750..015591e 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -77,7 +77,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
/* Core Clock Outputs */
DEF_BASE("z", R8A7796_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0),
DEF_BASE("z2", R8A7796_CLK_Z2, CLK_TYPE_GEN3_Z2, CLK_PLL2),
- DEF_FIXED("zg", R8A7796_CLK_ZG, CLK_PLL4, 4, 1),
+ DEF_BASE("zg", R8A7796_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4),
DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A7796_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -112,8 +112,8 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
DEF_DIV6P1("mso", R8A7796_CLK_MSO, CLK_PLL1_DIV4, 0x014),
DEF_DIV6P1("hdmi", R8A7796_CLK_HDMI, CLK_PLL1_DIV4, 0x250),
- DEF_DIV6_RO("osc", R8A7796_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
- DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
+ DEF_BASE("osc", R8A7796_CLK_OSC, CLK_TYPE_GEN3_OSC, CLK_EXTAL),
+ DEF_BASE("r_int", CLK_RINT, CLK_TYPE_GEN3_RINT, CLK_EXTAL),
DEF_BASE("r", R8A7796_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
};
@@ -280,6 +280,26 @@ static const unsigned int r8a7796_crit_mod_clks[] __initconst = {
* 1 1 0 1 33.33 / 2 x180 x192 x144 x168 x144
* 1 1 1 0 33.33 / 2 x180 x192 x144 x144 x144
* 1 1 1 1 33.33 / 2 x180 x192 x144 x192 x144
+ *
+ * MD Internal
+ * 14 13 19 17 RCLK OSCCLK
+ *-----------------------------------------------------------------
+ * 0 0 0 0 x 1/512 (x 1/16 x 1/32) 128 (x 1/16 x 1/8)
+ * 0 0 0 1 x 1/512 (x 1/16 x 1/32) 128 (x 1/16 x 1/8)
+ * 0 0 1 0 x 1/512 (x 1/16 x 1/32) 128 (x 1/16 x 1/8)
+ * 0 0 1 1 x 1/512 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 0 0 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 0 1 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 1 0 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 0 1 1 1 x 1/608 (x 1/19 x 1/32) 128 (x 1/19 x 1/8)
+ * 1 0 0 0 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 0 0 1 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 0 1 0 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 0 1 1 x 1/768 (x 1/24 x 1/32) 128 (x 1/24 x 1/8)
+ * 1 1 0 0 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
+ * 1 1 0 1 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
+ * 1 1 1 0 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
+ * 1 1 1 1 x 1/1024 (x 1/28 x 1/32) 128 (x 1/28 x 1/8)
*/
#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \
(((md) & BIT(13)) >> 11) | \
@@ -287,23 +307,26 @@ static const unsigned int r8a7796_crit_mod_clks[] __initconst = {
(((md) & BIT(17)) >> 17))
static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = {
- /* EXTAL div PLL1 mult PLL3 mult */
- { 1, 192, 192, },
- { 1, 192, 168, },
- { 1, 192, 144, },
- { 1, 192, 192, },
- { 1, 160, 160, },
- { 1, 160, 140, },
- { 1, 160, 120, },
- { 1, 160, 160, },
- { 1, 128, 128, },
- { 1, 128, 112, },
- { 1, 128, 96, },
- { 1, 128, 128, },
- { 2, 192, 192, },
- { 2, 192, 168, },
- { 2, 192, 144, },
- { 2, 192, 192, },
+ /*
+ * internal R OSC
+ * EXTAL div PLL1 mult PLL3 mult div div
+ */
+ { 1, 192, 192, 512, 128 },
+ { 1, 192, 168, 512, 128 },
+ { 1, 192, 144, 512, 128 },
+ { 1, 192, 192, 512, 128 },
+ { 1, 160, 160, 608, 152 },
+ { 1, 160, 140, 608, 152 },
+ { 1, 160, 120, 608, 152 },
+ { 1, 160, 160, 608, 152 },
+ { 1, 128, 128, 768, 192 },
+ { 1, 128, 112, 768, 192 },
+ { 1, 128, 96, 768, 192 },
+ { 1, 128, 128, 768, 192 },
+ { 2, 192, 192, 1024, 256 },
+ { 2, 192, 168, 1024, 256 },
+ { 2, 192, 144, 1024, 256 },
+ { 2, 192, 192, 1024, 256 },
};
static int __init r8a7796_cpg_mssr_init(struct device *dev)
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
index f9d1763..1cd2c05 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.c
+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
@@ -48,7 +48,7 @@
static u32 cpg_quirks;
#define PLL_ERRATA BIT(0) /* Missing PLL0/2/4 post-divider */
-#define RCKCR_CKSEL BIT(1) /* Manual RCLK parent selection */
+#define RCLK_CKSEL_RESEVED BIT(1) /* Resverd RCLK clock soruce select */
struct cpg_pll0_clk {
struct clk_hw hw;
@@ -187,12 +187,13 @@ static struct clk * __init cpg_pll0_clk_register(const char *name,
*/
#define CPG_FRQCRB 0x00000004
#define CPG_FRQCRB_KICK BIT(31)
+#define CPG_FRQCRB_ZGFC_MASK (0x1f << 24)
+#define CPG_FRQCRB_ZGFC_SHIFT 24
#define CPG_FRQCRC 0x000000e0
#define CPG_FRQCRC_ZFC_MASK (0x1f << 8)
#define CPG_FRQCRC_ZFC_SHIFT 8
#define CPG_FRQCRC_Z2FC_MASK 0x1f
-
struct cpg_z_clk {
struct clk_hw hw;
void __iomem *reg;
@@ -236,6 +237,26 @@ static unsigned long cpg_z2_clk_recalc_rate(struct clk_hw *hw,
return rate;
}
+static unsigned long cpg_zg_clk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct cpg_z_clk *zclk = to_z_clk(hw);
+ unsigned long prate = parent_rate / 2; /* PLL4 clock divided by 2 */
+ unsigned int mult;
+ unsigned int val;
+ unsigned long rate;
+
+ val = (clk_readl(zclk->reg) & CPG_FRQCRB_ZGFC_MASK)
+ >> CPG_FRQCRB_ZGFC_SHIFT;
+ mult = 32 - val;
+
+ rate = div_u64((u64)prate * mult + 16, 32);
+ /* Round to closest value at 10MHz unit */
+ rate = 10000000 * DIV_ROUND_CLOSEST(rate, 10000000);
+
+ return rate;
+}
+
static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
@@ -278,6 +299,18 @@ static long cpg_z2_clk_round_rate(struct clk_hw *hw, unsigned long rate,
return prate / 32 * mult;
}
+static long cpg_zg_clk_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ unsigned long prate = *parent_rate / 2; /* PLL4 clock divided by 2 */
+ unsigned int mult;
+
+ mult = div_u64((u64)rate * 32 + prate / 2, prate);
+ mult = clamp(mult, 1U, 32U);
+
+ return prate / 32 * mult;
+}
+
static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -377,6 +410,53 @@ static int cpg_z2_clk_set_rate(struct clk_hw *hw, unsigned long rate,
return -ETIMEDOUT;
}
+static int cpg_zg_clk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct cpg_z_clk *zclk = to_z_clk(hw);
+ unsigned long prate = parent_rate / 2; /* PLL4 clock divided by 2 */
+ unsigned int mult;
+ u32 val, kick;
+ unsigned int i;
+
+ mult = div_u64((u64)rate * 32 + prate / 2, prate);
+ mult = clamp(mult, 1U, 32U);
+
+ if (clk_readl(zclk->kick_reg) & CPG_FRQCRB_KICK)
+ return -EBUSY;
+
+ val = clk_readl(zclk->reg);
+ val &= ~CPG_FRQCRB_ZGFC_MASK;
+ val |= (32 - mult) << CPG_FRQCRB_ZGFC_SHIFT;
+ clk_writel(val, zclk->reg);
+
+ /*
+ * Set KICK bit in FRQCRB to update hardware setting and wait for
+ * clock change completion.
+ */
+ kick = clk_readl(zclk->kick_reg);
+ kick |= CPG_FRQCRB_KICK;
+ clk_writel(kick, zclk->kick_reg);
+
+ /*
+ * Note: There is no HW information about the worst case latency.
+ *
+ * Using experimental measurements, it seems that no more than
+ * ~10 iterations are needed, independently of the CPU rate.
+ * Since this value might be dependent of external xtal rate, pll1
+ * rate or even the other emulation clocks rate, use 1000 as a
+ * "super" safe value.
+ */
+ for (i = 1000; i; i--) {
+ if (!(clk_readl(zclk->kick_reg) & CPG_FRQCRB_KICK))
+ return 0;
+
+ cpu_relax();
+ }
+
+ return -ETIMEDOUT;
+}
+
static const struct clk_ops cpg_z_clk_ops = {
.recalc_rate = cpg_z_clk_recalc_rate,
.round_rate = cpg_z_clk_round_rate,
@@ -389,6 +469,12 @@ static const struct clk_ops cpg_z2_clk_ops = {
.set_rate = cpg_z2_clk_set_rate,
};
+static const struct clk_ops cpg_zg_clk_ops = {
+ .recalc_rate = cpg_zg_clk_recalc_rate,
+ .round_rate = cpg_zg_clk_round_rate,
+ .set_rate = cpg_zg_clk_set_rate,
+};
+
static struct clk * __init cpg_z_clk_register(const char *name,
const char *parent_name,
void __iomem *reg)
@@ -446,6 +532,35 @@ static struct clk * __init cpg_z2_clk_register(const char *name,
return clk;
}
+
+static struct clk * __init cpg_zg_clk_register(const char *name,
+ const char *parent_name,
+ void __iomem *reg)
+{
+ struct clk_init_data init;
+ struct cpg_z_clk *zclk;
+ struct clk *clk;
+
+ zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
+ if (!zclk)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &cpg_zg_clk_ops;
+ init.flags = 0;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+
+ zclk->reg = reg + CPG_FRQCRB;
+ zclk->kick_reg = reg + CPG_FRQCRB;
+ zclk->hw.init = &init;
+
+ clk = clk_register(NULL, &zclk->hw);
+ if (IS_ERR(clk))
+ kfree(zclk);
+
+ return clk;
+}
/** End of modifying for Z-clock, Z2-clock and PLL0-clock */
/*
@@ -671,15 +786,15 @@ static u32 cpg_mode __initdata;
static const struct soc_device_attribute cpg_quirks_match[] __initconst = {
{
.soc_id = "r8a7795", .revision = "ES1.0",
- .data = (void *)(PLL_ERRATA | RCKCR_CKSEL),
+ .data = (void *)(PLL_ERRATA | RCLK_CKSEL_RESEVED),
},
{
.soc_id = "r8a7795", .revision = "ES1.*",
- .data = (void *)RCKCR_CKSEL,
+ .data = (void *)RCLK_CKSEL_RESEVED,
},
{
.soc_id = "r8a7796", .revision = "ES1.0",
- .data = (void *)RCKCR_CKSEL,
+ .data = (void *)RCLK_CKSEL_RESEVED,
},
{ /* sentinel */ }
};
@@ -741,7 +856,7 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
* the multiplier value.
*/
value = readl(base + CPG_PLL4CR);
- mult = (((value >> 24) & 0x7f) + 1) * 2;
+ mult = ((value >> 24) & 0x7f) + 1;
if (cpg_quirks & PLL_ERRATA)
mult *= 2;
break;
@@ -749,22 +864,21 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
case CLK_TYPE_GEN3_SD:
return cpg_sd_clk_register(core, base, __clk_get_name(parent));
+ case CLK_TYPE_GEN3_RINT:
+ div = cpg_pll_config->rint;
+ break;
+
+ case CLK_TYPE_GEN3_OSC:
+ div = cpg_pll_config->osc;
+ break;
+
case CLK_TYPE_GEN3_R:
- if (cpg_quirks & RCKCR_CKSEL) {
- /*
- * RINT is default.
- * Only if EXTALR is populated, we switch to it.
- */
- value = readl(base + CPG_RCKCR) & 0x3f;
-
- if (clk_get_rate(clks[cpg_clk_extalr])) {
- parent = clks[cpg_clk_extalr];
- value |= BIT(15);
- }
-
- writel(value, base + CPG_RCKCR);
+ /*
+ * SoC not compatible with RCLK clock source selection by MD pin
+ * is internal RCLK fixed.
+ */
+ if (cpg_quirks & RCLK_CKSEL_RESEVED)
break;
- }
/* Select parent clock of RCLK by MD28 */
if (cpg_mode & BIT(28))
@@ -779,6 +893,10 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
return cpg_z2_clk_register(core->name, __clk_get_name(parent),
base);
+ case CLK_TYPE_GEN3_ZG:
+ return cpg_zg_clk_register(core->name, __clk_get_name(parent),
+ base);
+
default:
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h
index 4155023..51ae7b8 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.h
+++ b/drivers/clk/renesas/rcar-gen3-cpg.h
@@ -22,6 +22,9 @@ enum rcar_gen3_clk_types {
CLK_TYPE_GEN3_R,
CLK_TYPE_GEN3_Z,
CLK_TYPE_GEN3_Z2,
+ CLK_TYPE_GEN3_ZG,
+ CLK_TYPE_GEN3_RINT,
+ CLK_TYPE_GEN3_OSC,
};
#define DEF_GEN3_SD(_name, _id, _parent, _offset) \
@@ -31,10 +34,10 @@ struct rcar_gen3_cpg_pll_config {
unsigned int extal_div;
unsigned int pll1_mult;
unsigned int pll3_mult;
+ unsigned int rint;
+ unsigned int osc;
};
-#define CPG_RCKCR 0x240
-
struct clk *rcar_gen3_cpg_clk_register(struct device *dev,
const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
struct clk **clks, void __iomem *base);
diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 02ee212..d2d56b7 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -333,14 +333,6 @@ static bool rcar_dmac_chan_is_busy(struct rcar_dmac_chan *chan)
return !!(chcr & (RCAR_DMACHCR_DE | RCAR_DMACHCR_TE));
}
-/* Transfer completed but not yet handled */
-static bool rcar_dmac_last_tx_complete(struct rcar_dmac_chan *chan)
-{
- u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
-
- return (chcr & RCAR_DMACHCR_TE) == RCAR_DMACHCR_TE;
-}
-
static void rcar_dmac_chan_start_xfer(struct rcar_dmac_chan *chan)
{
struct rcar_dmac_desc *desc = chan->desc.running;
@@ -743,38 +735,14 @@ static int rcar_dmac_fill_hwdesc(struct rcar_dmac_chan *chan,
/* -----------------------------------------------------------------------------
* Stop and reset
*/
-#define NR_READS_TO_WAIT 5 /* number of times to check if DE = 0 */
-static inline int rcar_dmac_wait_stop(struct rcar_dmac_chan *chan)
+
+static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
{
- unsigned int i = 0;
+ u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
- do {
- u32 chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
-
- if (!(chcr & RCAR_DMACHCR_DE))
- return 0;
- cpu_relax();
- dev_dbg(chan->chan.device->dev, "DMA xfer couldn't be stopped");
- } while (++i < NR_READS_TO_WAIT);
-
- return -EBUSY;
-}
-
-/* Called with chan lock held */
-static int rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)
-{
- u32 chcr;
- int ret;
-
- chcr = rcar_dmac_chan_read(chan, RCAR_DMACHCR);
chcr &= ~(RCAR_DMACHCR_DSE | RCAR_DMACHCR_DSIE | RCAR_DMACHCR_IE |
RCAR_DMACHCR_TE | RCAR_DMACHCR_DE);
rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
- ret = rcar_dmac_wait_stop(chan);
-
- WARN_ON(ret < 0);
-
- return ret;
}
static void rcar_dmac_chan_reinit(struct rcar_dmac_chan *chan)
@@ -801,26 +769,6 @@ static void rcar_dmac_chan_reinit(struct rcar_dmac_chan *chan)
}
}
-static int rcar_dmac_chan_pause(struct dma_chan *chan)
-{
- u32 chcr;
- int ret;
- unsigned long flags;
- struct rcar_dmac_chan *rchan = to_rcar_dmac_chan(chan);
-
- spin_lock_irqsave(&rchan->lock, flags);
-
- chcr = rcar_dmac_chan_read(rchan, RCAR_DMACHCR);
- chcr &= ~RCAR_DMACHCR_DE;
- rcar_dmac_chan_write(rchan, RCAR_DMACHCR, chcr);
- ret = rcar_dmac_wait_stop(rchan);
-
- spin_unlock_irqrestore(&rchan->lock, flags);
-
- WARN_ON(ret < 0);
- return ret;
-}
-
static void rcar_dmac_stop(struct rcar_dmac *dmac)
{
rcar_dmac_write(dmac, RCAR_DMAOR, 0);
@@ -1038,6 +986,7 @@ static void rcar_dmac_free_chan_resources(struct dma_chan *chan)
{
struct rcar_dmac_chan *rchan = to_rcar_dmac_chan(chan);
struct rcar_dmac *dmac = to_rcar_dmac(chan->device);
+ struct rcar_dmac_chan_map *map = &rchan->map;
struct rcar_dmac_desc_page *page, *_page;
struct rcar_dmac_desc *desc;
LIST_HEAD(list);
@@ -1071,6 +1020,13 @@ static void rcar_dmac_free_chan_resources(struct dma_chan *chan)
free_page((unsigned long)page);
}
+ /* Remove slave mapping if present. */
+ if (map->slave.xfer_size) {
+ dma_unmap_resource(chan->device->dev, map->addr,
+ map->slave.xfer_size, map->dir, 0);
+ map->slave.xfer_size = 0;
+ }
+
pm_runtime_put(chan->device->dev);
}
@@ -1365,10 +1321,6 @@ static enum dma_status rcar_dmac_tx_status(struct dma_chan *chan,
unsigned long flags;
unsigned int residue;
- /* Interrupt not yet serviced */
- if (rcar_dmac_last_tx_complete(rchan))
- return DMA_COMPLETE;
-
status = dma_cookie_status(chan, cookie, txstate);
if (status == DMA_COMPLETE || !txstate)
return status;
@@ -1917,7 +1869,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
engine->device_prep_slave_sg = rcar_dmac_prep_slave_sg;
engine->device_prep_dma_cyclic = rcar_dmac_prep_dma_cyclic;
engine->device_config = rcar_dmac_device_config;
- engine->device_pause = rcar_dmac_chan_pause;
engine->device_terminate_all = rcar_dmac_chan_terminate_all;
engine->device_synchronize = rcar_dmac_synchronize;
engine->device_tx_status = rcar_dmac_tx_status;
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index f721a89..7685d31 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -29,7 +29,16 @@
#include <linux/pm_runtime.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
-#include <linux/soc/renesas/s2ram_ddr_backup.h>
+
+struct gpio_rcar_bank_info {
+ bool iointsel;
+ bool inoutsel;
+ bool outdt;
+ bool active_high_rising_edge;
+ bool level_trigger;
+ bool both;
+ bool intmsk;
+};
struct gpio_rcar_priv {
void __iomem *base;
@@ -41,6 +50,7 @@ struct gpio_rcar_priv {
unsigned int irq_parent;
bool has_both_edge_trigger;
bool needs_clk;
+ struct gpio_rcar_bank_info bank_info[32];
};
#define IOINTSEL 0x00 /* General IO/Interrupt Switching Register */
@@ -58,232 +68,6 @@ struct gpio_rcar_priv {
#define RCAR_MAX_GPIO_PER_BANK 32
-#ifdef CONFIG_RCAR_DDR_BACKUP
-static struct hw_register gpio0_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio0_ip = {
- .ip_name = "GPIO0",
- .reg_count = ARRAY_SIZE(gpio0_ip_regs),
- .ip_reg = gpio0_ip_regs,
-};
-
-static struct hw_register gpio1_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio1_ip = {
- .ip_name = "GPIO1",
- .reg_count = ARRAY_SIZE(gpio1_ip_regs),
- .ip_reg = gpio1_ip_regs,
-};
-
-static struct hw_register gpio2_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio2_ip = {
- .ip_name = "GPIO2",
- .reg_count = ARRAY_SIZE(gpio2_ip_regs),
- .ip_reg = gpio2_ip_regs,
-};
-
-static struct hw_register gpio3_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio3_ip = {
- .ip_name = "GPIO3",
- .reg_count = ARRAY_SIZE(gpio3_ip_regs),
- .ip_reg = gpio3_ip_regs,
-};
-
-static struct hw_register gpio4_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio4_ip = {
- .ip_name = "GPIO4",
- .reg_count = ARRAY_SIZE(gpio4_ip_regs),
- .ip_reg = gpio4_ip_regs,
-};
-
-static struct hw_register gpio5_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio5_ip = {
- .ip_name = "GPIO5",
- .reg_count = ARRAY_SIZE(gpio5_ip_regs),
- .ip_reg = gpio5_ip_regs,
-};
-
-static struct hw_register gpio6_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio6_ip = {
- .ip_name = "GPIO6",
- .reg_count = ARRAY_SIZE(gpio6_ip_regs),
- .ip_reg = gpio6_ip_regs,
-};
-
-static struct hw_register gpio7_ip_regs[] = {
- {"IOINTSEL", 0x0000, 32, 0},
- {"INOUTSEL", 0x0004, 32, 0},
- {"OUTDT", 0x0008, 32, 0},
- {"POSNEG", 0x0020, 32, 0},
- {"EDGLEVEL", 0x0024, 32, 0},
- {"FILONOFF", 0x0028, 32, 0},
- {"OUTDTSEL", 0x0040, 32, 0},
- {"OUTDTH", 0x0044, 32, 0},
- {"OUTDTL", 0x0048, 32, 0},
- {"BOTHEDGE", 0x004C, 32, 0},
- {"INTCLR", 0x0014, 32, 0},
- {"INTMSK", 0x0018, 32, 0},
- {"MSKCLR", 0x001C, 32, 0},
- {"INTMSKS", 0x0038, 32, 0},
- {"MSKCLRS", 0x003C, 32, 0},
-};
-
-static struct rcar_ip gpio7_ip = {
- .ip_name = "GPIO7",
- .reg_count = ARRAY_SIZE(gpio7_ip_regs),
- .ip_reg = gpio7_ip_regs,
-};
-
-struct gpio_ip_info {
- const char *name;
- struct rcar_ip *ip;
-};
-
-static struct gpio_ip_info ip_info_tbl[] = {
- {"e6050000.gpio", &gpio0_ip},
- {"e6051000.gpio", &gpio1_ip},
- {"e6052000.gpio", &gpio2_ip},
- {"e6053000.gpio", &gpio3_ip},
- {"e6054000.gpio", &gpio4_ip},
- {"e6055000.gpio", &gpio5_ip},
- {"e6055400.gpio", &gpio6_ip},
- {"e6055800.gpio", &gpio7_ip},
-};
-
-static struct rcar_ip *gpio_rcar_get_ip(const char *name)
-{
- struct gpio_ip_info *ip_info = ip_info_tbl;
- struct rcar_ip *ip = NULL;
-
- while (ip_info->name) {
- if (!strcmp(ip_info->name, name)) {
- ip = ip_info->ip;
- break;
- }
- ip_info++;
- }
-
- return ip;
-}
-#endif /* CONFIG_RCAR_DDR_BACKUP */
-
static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
{
return ioread32(p->base + offs);
@@ -617,6 +401,83 @@ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int gpio_rcar_suspend(struct device *dev)
+{
+ struct gpio_rcar_priv *p = dev_get_drvdata(dev);
+ int offset;
+ u32 bit_mask;
+ struct gpio_rcar_bank_info *bank_info;
+
+ for (offset = 0; offset < p->gpio_chip.ngpio; offset++) {
+ bank_info = &p->bank_info[offset];
+ bit_mask = BIT(offset);
+ bank_info->iointsel = !!(gpio_rcar_read(p, IOINTSEL) &
+ bit_mask);
+
+ /* I/O pin */
+ if (!bank_info->iointsel) {
+ bank_info->inoutsel = !!(gpio_rcar_read(p, INOUTSEL) &
+ bit_mask);
+ bank_info->outdt = !!(gpio_rcar_read(p, OUTDT) &
+ bit_mask);
+ /* Interrupt pin */
+ } else {
+ bank_info->intmsk = !!(gpio_rcar_read(p, INTMSK) &
+ bit_mask);
+ bank_info->active_high_rising_edge =
+ !(!!(gpio_rcar_read(p, POSNEG) & bit_mask));
+ bank_info->level_trigger =
+ !(!!(gpio_rcar_read(p, EDGLEVEL) & bit_mask));
+ bank_info->both = !!(gpio_rcar_read(p, BOTHEDGE) &
+ bit_mask);
+ }
+ }
+
+ return 0;
+}
+
+static int gpio_rcar_resume(struct device *dev)
+{
+ struct gpio_rcar_priv *p = dev_get_drvdata(dev);
+ int offset;
+ struct gpio_rcar_bank_info *bank_info;
+
+ for (offset = 0; offset < p->gpio_chip.ngpio; offset++) {
+ bank_info = &p->bank_info[offset];
+ /* I/O pin */
+ if (!bank_info->iointsel) {
+ if (bank_info->inoutsel)
+ gpio_rcar_direction_output(&p->gpio_chip,
+ offset,
+ bank_info->outdt);
+ else
+ gpio_rcar_direction_input(&p->gpio_chip,
+ offset);
+ /* Interrupt pin */
+ } else {
+ gpio_rcar_config_interrupt_input_mode(
+ p,
+ offset,
+ bank_info->active_high_rising_edge,
+ bank_info->level_trigger,
+ bank_info->both);
+
+ if (bank_info->intmsk)
+ gpio_rcar_write(p, MSKCLR, BIT(offset));
+ }
+ }
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(gpio_rcar_pm_ops,
+ gpio_rcar_suspend, gpio_rcar_resume);
+#define DEV_PM_OPS (&gpio_rcar_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif /* CONFIG_PM_SLEEP*/
+
static int gpio_rcar_probe(struct platform_device *pdev)
{
struct gpio_rcar_priv *p;
@@ -737,60 +598,12 @@ static int gpio_rcar_remove(struct platform_device *pdev)
return 0;
}
-#ifdef CONFIG_PM_SLEEP
-static int gpio_rcar_suspend(struct device *dev)
-{
- int ret = 0;
-#ifdef CONFIG_RCAR_DDR_BACKUP
- struct platform_device *pdev = to_platform_device(dev);
- struct rcar_ip *ip = gpio_rcar_get_ip(pdev->name);
-
- if (ip) {
- struct gpio_rcar_priv *p = dev_get_drvdata(dev);
-
- if (!ip->virt_addr)
- ip->virt_addr = p->base;
-
- ret = rcar_handle_registers(ip, DO_BACKUP);
- pr_debug("%s: Backup %s register\n", __func__, ip->ip_name);
- } else
- pr_err("%s: Failed to backup %s register\n", __func__,
- pdev->name);
-
-#endif /* CONFIG_RCAR_DDR_BACKUP */
- return ret;
-}
-
-static int gpio_rcar_resume(struct device *dev)
-{
- int ret = 0;
-#ifdef CONFIG_RCAR_DDR_BACKUP
- struct platform_device *pdev = to_platform_device(dev);
- struct rcar_ip *ip = gpio_rcar_get_ip(pdev->name);
-
- if (ip) {
- ret = rcar_handle_registers(ip, DO_RESTORE);
- pr_debug("%s: Restore %s register\n", __func__, ip->ip_name);
- } else
- pr_err("%s: Failed to restore %s register\n", __func__,
- pdev->name);
-
-#endif /* CONFIG_RCAR_DDR_BACKUP */
- return ret;
-}
-static SIMPLE_DEV_PM_OPS(gpio_rcar_pm_ops,
- gpio_rcar_suspend, gpio_rcar_resume);
-#define DEV_PM_OPS (&gpio_rcar_pm_ops)
-#else
-#define DEV_PM_OPS NULL
-#endif /* CONFIG_PM_SLEEP */
-
static struct platform_driver gpio_rcar_device_driver = {
.probe = gpio_rcar_probe,
.remove = gpio_rcar_remove,
.driver = {
.name = "gpio_rcar",
- .pm = DEV_PM_OPS,
+ .pm = DEV_PM_OPS,
.of_match_table = of_match_ptr(gpio_rcar_of_table),
}
};
diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
index 19a8c58..ff3dcc2 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
@@ -224,7 +224,11 @@ static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
/* Set Standard Mode speed (determined to be 100KHz on iMX6) */
- hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
+ if (hdmi->dev_type == RCAR_HDMI)
+ hdmi_modb(hdmi, 0x00, HDMI_I2CM_DIV_FAST_STD_MODE_MASK,
+ HDMI_I2CM_DIV);
+ else
+ hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
/* Set done, not acknowledged and arbitration interrupt polarities */
hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
@@ -720,8 +724,11 @@ static void hdmi_video_csc(struct dw_hdmi *hdmi)
/* Configure the CSC registers */
hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
- hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
- HDMI_CSC_SCALE);
+
+ if (hdmi->dev_type != RCAR_HDMI)
+ hdmi_modb(hdmi, color_depth,
+ HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
+ HDMI_CSC_SCALE);
dw_hdmi_update_csc_coeffs(hdmi);
}
@@ -771,12 +778,14 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
}
/* set the packetizer registers */
- val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
- HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
- ((hdmi_data->pix_repet_factor <<
- HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
- HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
- hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
+ if (hdmi->dev_type != RCAR_HDMI) {
+ val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
+ HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
+ ((hdmi_data->pix_repet_factor <<
+ HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
+ HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
+ hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
+ }
hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
HDMI_VP_STUFF_PR_STUFFING_MASK, HDMI_VP_STUFF);
@@ -790,14 +799,20 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER;
}
- hdmi_modb(hdmi, vp_conf,
- HDMI_VP_CONF_PR_EN_MASK |
- HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
+ if (hdmi->dev_type == RCAR_HDMI)
+ hdmi_modb(hdmi, vp_conf,
+ HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
+ else
+ hdmi_modb(hdmi, vp_conf,
+ HDMI_VP_CONF_PR_EN_MASK |
+ HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
- hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
+ if (hdmi->dev_type != RCAR_HDMI) {
+ hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
+ }
if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_PP) {
vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
@@ -815,9 +830,15 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
return;
}
- hdmi_modb(hdmi, vp_conf,
- HDMI_VP_CONF_BYPASS_EN_MASK | HDMI_VP_CONF_PP_EN_ENMASK |
- HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
+ if (hdmi->dev_type == RCAR_HDMI)
+ hdmi_modb(hdmi, vp_conf,
+ HDMI_VP_CONF_BYPASS_EN_MASK |
+ HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
+ else
+ hdmi_modb(hdmi, vp_conf,
+ HDMI_VP_CONF_BYPASS_EN_MASK |
+ HDMI_VP_CONF_PP_EN_ENMASK |
+ HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE,
@@ -826,11 +847,19 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
HDMI_VP_CONF);
+
+ /* ycc422_stuffing bit only in R-Car */
+ if (hdmi->dev_type == RCAR_HDMI)
+ hdmi_writeb(hdmi, HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE,
+ HDMI_VP_STUFF);
}
static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
unsigned char bit)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
}
@@ -838,6 +867,9 @@ static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi,
unsigned char bit)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET,
HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0);
}
@@ -845,6 +877,9 @@ static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi,
static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi,
unsigned char bit)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET,
HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0);
}
@@ -852,12 +887,18 @@ static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi,
static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi,
unsigned char bit)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_writeb(hdmi, bit, HDMI_PHY_TST1);
}
static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
unsigned char bit)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
}
@@ -903,6 +944,9 @@ static int hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_PDZ_OFFSET,
HDMI_PHY_CONF0_PDZ_MASK);
@@ -910,6 +954,9 @@ static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
{
+ if (hdmi->dev_type == RCAR_HDMI)
+ return;
+
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_ENTMDS_OFFSET,
HDMI_PHY_CONF0_ENTMDS_MASK);
@@ -1035,7 +1082,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ);
hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_ASSERT, HDMI_MC_PHYRSTZ);
- hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
+ if (hdmi->dev_type != RCAR_HDMI)
+ hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT,
+ HDMI_MC_HEACPHY_RST);
hdmi_phy_test_clear(hdmi, 1);
hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2,
@@ -1538,20 +1587,20 @@ static void initialize_hdmi_rcar_ih_mutes(struct dw_hdmi *hdmi)
hdmi_writeb(hdmi, 0x0c, HDMI_PHY_I2CM_INT_ADDR);
hdmi_writeb(hdmi, 0xcc, HDMI_PHY_I2CM_CTLINT_ADDR);
hdmi_writeb(hdmi, 0x0c, HDMI_AUD_INT);
- hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK);
+ hdmi_writeb(hdmi, 0xdf, HDMI_A_APIINTMSK);
hdmi_writeb(hdmi, 0x7f, HDMI_CEC_MASK);
hdmi_writeb(hdmi, 0x44, HDMI_I2CM_INT);
hdmi_writeb(hdmi, 0x44, HDMI_I2CM_CTLINT);
/* Disable interrupts in the IH_MUTE_* registers */
- hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
+ hdmi_writeb(hdmi, 0xc7, HDMI_IH_MUTE_FC_STAT0);
hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_FC_STAT2);
hdmi_writeb(hdmi, 0x1f, HDMI_IH_MUTE_AS_STAT0);
hdmi_writeb(hdmi, 0x3f, HDMI_IH_MUTE_PHY_STAT0);
- hdmi_writeb(hdmi, 0x0f, HDMI_IH_MUTE_I2CM_STAT0);
+ hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_I2CM_STAT0);
hdmi_writeb(hdmi, 0x7f, HDMI_IH_MUTE_CEC_STAT0);
- hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
+ hdmi_writeb(hdmi, 0x0f, HDMI_IH_MUTE_VP_STAT0);
hdmi_writeb(hdmi, 0x03, HDMI_IH_MUTE_I2CMPHY_STAT0);
/* Enable top level interrupt bits in HDMI block */
@@ -1685,6 +1734,36 @@ static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
mutex_unlock(&hdmi->mutex);
}
+/*
+ * This function controls clocks of dw_hdmi through drm_bridge
+ * at system suspend/resume.
+ * Arguments:
+ * bridge: drm_bridge that contains dw_hdmi.
+ * flag: controlled flag.
+ * 0: is used when suspend.
+ * 1: is used when resume.
+ */
+void dw_hdmi_s2r_ctrl(struct drm_bridge *bridge, int flag)
+{
+ struct dw_hdmi *hdmi = bridge->driver_private;
+
+ if (hdmi->dev_type != RCAR_HDMI)
+ return;
+
+ if (flag) { /* enable clk */
+ if (hdmi->isfr_clk)
+ clk_prepare_enable(hdmi->isfr_clk);
+ if (hdmi->iahb_clk)
+ clk_prepare_enable(hdmi->iahb_clk);
+ } else { /* disable clk */
+ if (hdmi->isfr_clk)
+ clk_disable_unprepare(hdmi->isfr_clk);
+ if (hdmi->iahb_clk)
+ clk_disable_unprepare(hdmi->iahb_clk);
+ }
+}
+EXPORT_SYMBOL_GPL(dw_hdmi_s2r_ctrl);
+
static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
{
struct dw_hdmi *hdmi = bridge->driver_private;
@@ -1693,12 +1772,6 @@ static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
hdmi->disabled = true;
dw_hdmi_update_power(hdmi);
dw_hdmi_update_phy_mask(hdmi);
-
- if (hdmi->dev_type == RCAR_HDMI) {
- hdmi_writeb(hdmi, 0x3f, HDMI_IH_MUTE_PHY_STAT0);
- hdmi_writeb(hdmi, HDMI_PHY_HPD | HDMI_PHY_RX_SENSE,
- HDMI_PHY_POL0);
- }
mutex_unlock(&hdmi->mutex);
}
diff --git a/drivers/gpu/drm/bridge/dw-hdmi.h b/drivers/gpu/drm/bridge/dw-hdmi.h
index 00ac86a..0f171db 100644
--- a/drivers/gpu/drm/bridge/dw-hdmi.h
+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
@@ -1059,6 +1059,9 @@ enum {
HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
HDMI_I2CM_CTLINT_ARB_POL = 0x8,
HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
+
+/* I2CM_DIV field values */
+ HDMI_I2CM_DIV_FAST_STD_MODE_MASK = 0x08,
};
#endif /* __DW_HDMI_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index 53a4322..2442eb2 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -657,11 +657,33 @@ static void rcar_du_crtc_atomic_flush(struct drm_crtc *crtc,
rcar_du_vsp_atomic_flush(rcrtc);
}
+static bool rcar_du_crtc_mode_fixup(struct drm_crtc *crtc,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
+ struct rcar_du_device *rcdu = rcrtc->group->dev;
+ int vdsr_reg = mode->crtc_vtotal - mode->crtc_vsync_end - 2;
+
+ /* It is prohibited to set a value less than 1 to VDSR register
+ * by the H/W specification.
+ */
+ if (vdsr_reg < 1) {
+ dev_err(rcdu->dev,
+ "setting value (%d) to VDSR register is invalid.\n",
+ vdsr_reg);
+ return false;
+ }
+
+ return true;
+}
+
static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
.disable = rcar_du_crtc_disable,
.enable = rcar_du_crtc_enable,
.atomic_begin = rcar_du_crtc_atomic_begin,
.atomic_flush = rcar_du_crtc_atomic_flush,
+ .mode_fixup = rcar_du_crtc_mode_fixup,
};
static const struct drm_crtc_funcs crtc_funcs = {
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
index c15611c..ccf5159 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
@@ -286,9 +286,15 @@ int rcar_du_group_set_routing(struct rcar_du_group *rgrp)
void rcar_du_pre_group_set_routing(struct rcar_du_group *rgrp,
struct rcar_du_crtc *rcrtc)
{
- unsigned int possible_crtcs =
- rgrp->dev->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs;
- u32 crtc = ffs(possible_crtcs) - 1;
+ unsigned int possible_crtcs;
+ u32 crtc;
+
+ if ((!rgrp) || (!rcrtc))
+ return;
+
+ possible_crtcs =
+ rgrp->dev->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs;
+ crtc = ffs(possible_crtcs) - 1;
if (rcrtc->index != crtc)
return;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
index ef3e87f..f9ebc5e 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
@@ -40,18 +40,15 @@ void rcar_du_hdmienc_suspend(struct drm_encoder *encoder)
if ((bfuncs) && (bfuncs->disable))
bfuncs->disable(encoder->bridge);
-}
-#define SMSTPCR7 0xE615014C
+ dw_hdmi_s2r_ctrl(encoder->bridge, 0);
+}
void rcar_du_hdmienc_resume(struct drm_encoder *encoder)
{
- void __iomem *smstpcr = ioremap_nocache(SMSTPCR7, 4);
const struct drm_bridge_funcs *bfuncs = encoder->bridge->funcs;
- u32 temp;
- temp = readl(smstpcr);
- writel(temp & ~(0x3 << 28), smstpcr);
+ dw_hdmi_s2r_ctrl(encoder->bridge, 1);
if ((bfuncs) && (bfuncs->enable))
bfuncs->enable(encoder->bridge);
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index ff9f591..17a172c 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -285,6 +285,17 @@
If unsure, say N.
+config IPMMU_VMSA_CTX_NUM
+ int "Input MMU number of MMU's really used"
+ depends on IPMMU_VMSA
+ range 1 8
+ default 8
+ help
+ Specify the number of MMU contexts that you want to use.
+
+ The specified number of MMU contexts are used for the Renesas
+ IPMMU driver and the remaining contexts are unused.
+
config SPAPR_TCE_IOMMU
bool "sPAPR TCE IOMMU Support"
depends on PPC_POWERNV || PPC_PSERIES
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index 2b380ff..4cf30c8 100644
--- a/drivers/iommu/ipmmu-vmsa.c
+++ b/drivers/iommu/ipmmu-vmsa.c
@@ -1335,6 +1335,9 @@ static int ipmmu_probe(struct platform_device *pdev)
else
mmu->num_ctx = 1;
+ mmu->num_ctx = min_t(unsigned int, CONFIG_IPMMU_VMSA_CTX_NUM,
+ mmu->num_ctx);
+
WARN_ON(mmu->num_ctx > IPMMU_CTX_MAX);
irq = platform_get_irq(pdev, 0);
diff --git a/drivers/media/i2c/adv7482.c b/drivers/media/i2c/adv7482.c
index f91bdeef..9ecd723 100644
--- a/drivers/media/i2c/adv7482.c
+++ b/drivers/media/i2c/adv7482.c
@@ -923,6 +923,7 @@ struct adv7482_link_config {
bool hdmi_in;
bool sdp_in;
int vc_ch;
+ int num_lane;
};
struct adv7482_state {
@@ -970,6 +971,9 @@ static inline struct adv7482_state *to_state(struct v4l2_subdev *sd)
static int adv7482_write_registers(struct i2c_client *client,
const struct adv7482_reg_value *regs)
{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct adv7482_state *state = to_state(sd);
+ struct adv7482_link_config *config = &state->mipi_csi2_link[0];
struct i2c_msg msg;
u8 data_buf[2];
int ret = -EINVAL;
@@ -984,12 +988,21 @@ static int adv7482_write_registers(struct i2c_client *client,
while (regs->addr != ADV7482_I2C_EOR) {
if (regs->addr == ADV7482_I2C_WAIT)
- msleep(regs->value);
+ usleep_range(regs->value * 1000,
+ (regs->value * 1000) + 1000);
else {
- msg.addr = regs->addr;
- data_buf[0] = regs->reg;
- data_buf[1] = regs->value;
-
+ /* Lane configuration for TXA */
+ if ((regs->addr == ADV7482_I2C_TXA) &&
+ (regs->reg == 0x00)) {
+ msg.addr = regs->addr;
+ data_buf[0] = regs->reg;
+ data_buf[1] = (regs->value & ~0x07) |
+ config->num_lane;
+ } else {
+ msg.addr = regs->addr;
+ data_buf[0] = regs->reg;
+ data_buf[1] = regs->value;
+ }
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0)
break;
@@ -2044,6 +2057,11 @@ static int adv7482_parse_dt(struct device_node *np,
return ret;
if (!strcmp(str, "rgb888")) {
+ config->num_lane = bus_cfg.bus.mipi_csi2.num_data_lanes;
+ if ((config->num_lane != 1) && (config->num_lane != 2) &&
+ (config->num_lane != 4))
+ return -EINVAL;
+
config->input_interface = DECODER_INPUT_INTERFACE_RGB888;
config->regs =
(struct adv7482_reg_value *)adv7482_init_txa_4lane;
@@ -2054,6 +2072,10 @@ static int adv7482_parse_dt(struct device_node *np,
config->init_controls =
(int (*)(void *))adv7482_cp_init_controls;
} else {
+ config->num_lane = bus_cfg.bus.mipi_csi2.num_data_lanes;
+ if (config->num_lane != 1)
+ return -EINVAL;
+
config->input_interface = DECODER_INPUT_INTERFACE_YCBCR422;
config->regs =
(struct adv7482_reg_value *)adv7482_init_txb_1lane;
@@ -2155,6 +2177,7 @@ static int adv7482_probe(struct i2c_client *client,
}
state->mipi_csi2_link[0].input_interface = link_config.input_interface;
+ state->mipi_csi2_link[0].num_lane = link_config.num_lane;
mutex_init(&state->mutex);
state->curr_norm = V4L2_STD_NTSC;
diff --git a/drivers/media/platform/rcar-vin/rcar-csi2.c b/drivers/media/platform/rcar-vin/rcar-csi2.c
index 48a5757..a7e3c8e 100644
--- a/drivers/media/platform/rcar-vin/rcar-csi2.c
+++ b/drivers/media/platform/rcar-vin/rcar-csi2.c
@@ -96,92 +96,120 @@
#define LSWAP_L1SEL(n) ((n & 0x3) << 2)
#define LSWAP_L0SEL(n) ((n & 0x3) << 0)
+/* PHY Frequency Control bits */
+#define PHYPLL_HSFREQRANGE(n) ((n) << 16)
+
/* PHY Test Interface Clear bits */
#define PHTC_TESTCLR (1 << 0)
+/* Interrupt Status Monitor bits */
+#define INT_ULPS_START (1 << 7)
+#define INT_ULPS_END (1 << 6)
+
/* PHY Frequency Control */
#define CSI2_FRE_NUM 43
-enum fre_range {
- BPS_80M,
- BPS_90M,
- BPS_100M,
- BPS_110M,
- BPS_120M,
- BPS_130M,
- BPS_140M,
- BPS_150M,
- BPS_160M,
- BPS_170M,
- BPS_180M,
- BPS_190M,
- BPS_205M,
- BPS_220M,
- BPS_235M,
- BPS_250M,
- BPS_275M,
- BPS_300M,
- BPS_325M,
- BPS_350M,
- BPS_400M,
- BPS_450M,
- BPS_500M,
- BPS_550M,
- BPS_600M,
- BPS_650M,
- BPS_700M,
- BPS_750M,
- BPS_800M,
- BPS_850M,
- BPS_900M,
- BPS_950M,
- BPS_1000M,
- BPS_1050M,
- BPS_1100M,
- BPS_1150M,
- BPS_1200M,
- BPS_1250M,
- BPS_1300M,
- BPS_1350M,
- BPS_1400M,
- BPS_1450M,
- BPS_1500M,
-};
+#define MB_OFFSET 1000000
struct rcar_csi2_info {
- int fre_range[CSI2_FRE_NUM];
+ unsigned int mbps;
+ unsigned char reg;
};
-static const struct rcar_csi2_info rcar_csi2_info_r8a7795 = {
- .fre_range = {
- (0x00 << 16), (0x10 << 16), (0x20 << 16), (0x30 << 16),
- (0x01 << 16), (0x11 << 16), (0x21 << 16), (0x31 << 16),
- (0x02 << 16), (0x12 << 16), (0x22 << 16), (0x32 << 16),
- (0x03 << 16), (0x13 << 16), (0x23 << 16), (0x33 << 16),
- (0x04 << 16), (0x14 << 16), (0x25 << 16), (0x35 << 16),
- (0x05 << 16), (0x26 << 16), (0x36 << 16), (0x37 << 16),
- (0x07 << 16), (0x18 << 16), (0x28 << 16), (0x39 << 16),
- (0x09 << 16), (0x19 << 16), (0x29 << 16), (0x3a << 16),
- (0x0a << 16), (0x1a << 16), (0x2a << 16), (0x3b << 16),
- (0x0b << 16), (0x1b << 16), (0x2b << 16), (0x3c << 16),
- (0x0c << 16), (0x1c << 16), (0x2c << 16),
- },
+static const struct rcar_csi2_info rcar_csi2_info_r8a7795[] = {
+ { .mbps = 80, .reg = 0x00 },
+ { .mbps = 90, .reg = 0x10 },
+ { .mbps = 100, .reg = 0x20 },
+ { .mbps = 110, .reg = 0x30 },
+ { .mbps = 120, .reg = 0x01 },
+ { .mbps = 130, .reg = 0x11 },
+ { .mbps = 140, .reg = 0x21 },
+ { .mbps = 150, .reg = 0x31 },
+ { .mbps = 160, .reg = 0x02 },
+ { .mbps = 170, .reg = 0x12 },
+ { .mbps = 180, .reg = 0x22 },
+ { .mbps = 190, .reg = 0x32 },
+ { .mbps = 205, .reg = 0x03 },
+ { .mbps = 220, .reg = 0x13 },
+ { .mbps = 235, .reg = 0x23 },
+ { .mbps = 250, .reg = 0x33 },
+ { .mbps = 275, .reg = 0x04 },
+ { .mbps = 300, .reg = 0x14 },
+ { .mbps = 325, .reg = 0x25 },
+ { .mbps = 350, .reg = 0x35 },
+ { .mbps = 400, .reg = 0x05 },
+ { .mbps = 450, .reg = 0x26 },
+ { .mbps = 500, .reg = 0x36 },
+ { .mbps = 550, .reg = 0x37 },
+ { .mbps = 600, .reg = 0x07 },
+ { .mbps = 650, .reg = 0x18 },
+ { .mbps = 700, .reg = 0x28 },
+ { .mbps = 750, .reg = 0x39 },
+ { .mbps = 800, .reg = 0x09 },
+ { .mbps = 850, .reg = 0x19 },
+ { .mbps = 900, .reg = 0x29 },
+ { .mbps = 950, .reg = 0x3a },
+ { .mbps = 1000, .reg = 0x0a },
+ { .mbps = 1050, .reg = 0x1a },
+ { .mbps = 1100, .reg = 0x2a },
+ { .mbps = 1150, .reg = 0x3b },
+ { .mbps = 1200, .reg = 0x0b },
+ { .mbps = 1250, .reg = 0x1b },
+ { .mbps = 1300, .reg = 0x2b },
+ { .mbps = 1350, .reg = 0x3c },
+ { .mbps = 1400, .reg = 0x0c },
+ { .mbps = 1450, .reg = 0x1c },
+ { .mbps = 1500, .reg = 0x2c },
+ /* guard */
+ { .mbps = 0, .reg = 0x00 },
};
-static const struct rcar_csi2_info rcar_csi2_info_r8a7796 = {
- .fre_range = {
- (0x00 << 16), (0x10 << 16), (0x20 << 16), (0x30 << 16),
- (0x01 << 16), (0x11 << 16), (0x21 << 16), (0x31 << 16),
- (0x02 << 16), (0x12 << 16), (0x22 << 16), (0x32 << 16),
- (0x03 << 16), (0x13 << 16), (0x23 << 16), (0x33 << 16),
- (0x04 << 16), (0x14 << 16), (0x05 << 16), (0x15 << 16),
- (0x25 << 16), (0x06 << 16), (0x16 << 16), (0x07 << 16),
- (0x17 << 16), (0x08 << 16), (0x18 << 16), (0x09 << 16),
- (0x19 << 16), (0x29 << 16), (0x39 << 16), (0x0a << 16),
- (0x1a << 16), (0x2a << 16), (0x3a << 16), (0x0b << 16),
- (0x1b << 16), (0x2b << 16), (0x3b << 16), (0x0c << 16),
- (0x1c << 16), (0x2c << 16), (0x3c << 16),
- },
+static const struct rcar_csi2_info rcar_csi2_info_r8a7796[] = {
+ { .mbps = 80, .reg = 0x00 },
+ { .mbps = 90, .reg = 0x10 },
+ { .mbps = 100, .reg = 0x20 },
+ { .mbps = 110, .reg = 0x30 },
+ { .mbps = 120, .reg = 0x01 },
+ { .mbps = 130, .reg = 0x11 },
+ { .mbps = 140, .reg = 0x21 },
+ { .mbps = 150, .reg = 0x31 },
+ { .mbps = 160, .reg = 0x02 },
+ { .mbps = 170, .reg = 0x12 },
+ { .mbps = 180, .reg = 0x22 },
+ { .mbps = 190, .reg = 0x32 },
+ { .mbps = 205, .reg = 0x03 },
+ { .mbps = 220, .reg = 0x13 },
+ { .mbps = 235, .reg = 0x23 },
+ { .mbps = 250, .reg = 0x33 },
+ { .mbps = 275, .reg = 0x04 },
+ { .mbps = 300, .reg = 0x14 },
+ { .mbps = 325, .reg = 0x05 },
+ { .mbps = 350, .reg = 0x15 },
+ { .mbps = 400, .reg = 0x25 },
+ { .mbps = 450, .reg = 0x06 },
+ { .mbps = 500, .reg = 0x16 },
+ { .mbps = 550, .reg = 0x07 },
+ { .mbps = 600, .reg = 0x17 },
+ { .mbps = 650, .reg = 0x08 },
+ { .mbps = 700, .reg = 0x18 },
+ { .mbps = 750, .reg = 0x09 },
+ { .mbps = 800, .reg = 0x19 },
+ { .mbps = 850, .reg = 0x29 },
+ { .mbps = 900, .reg = 0x39 },
+ { .mbps = 950, .reg = 0x0A },
+ { .mbps = 1000, .reg = 0x1A },
+ { .mbps = 1050, .reg = 0x2A },
+ { .mbps = 1100, .reg = 0x3A },
+ { .mbps = 1150, .reg = 0x0B },
+ { .mbps = 1200, .reg = 0x1B },
+ { .mbps = 1250, .reg = 0x2B },
+ { .mbps = 1300, .reg = 0x3B },
+ { .mbps = 1350, .reg = 0x0C },
+ { .mbps = 1400, .reg = 0x1C },
+ { .mbps = 1450, .reg = 0x2C },
+ { .mbps = 1500, .reg = 0x3C },
+ /* guard */
+ { .mbps = 0, .reg = 0x00 },
};
enum rcar_csi2_pads {
@@ -259,7 +287,7 @@ static irqreturn_t rcar_csi2_irq(int irq, void *data)
static void rcar_csi2_reset(struct rcar_csi2 *priv)
{
iowrite32(SRST_SRST, priv->base + SRST_REG);
- udelay(5);
+ usleep_range(100, 150);
iowrite32(0, priv->base + SRST_REG);
}
@@ -292,15 +320,80 @@ static void rcar_csi2_wait_phy_start(struct rcar_csi2 *priv)
}
+static int rcar_csi2_calc_phypll(struct rcar_csi2 *priv,
+ u32 *phypll)
+{
+ const struct rcar_csi2_info *hsfreq;
+ unsigned int bpp;
+ u64 hblank, vblank, h_freq, dot_clk, v_freq, mbps;
+
+ switch (priv->mf.code) {
+ case MEDIA_BUS_FMT_RGB888_1X24:
+ bpp = 24;
+ break;
+ case MEDIA_BUS_FMT_UYVY8_1X16:
+ case MEDIA_BUS_FMT_UYVY8_2X8:
+ case MEDIA_BUS_FMT_YUYV10_2X10:
+ bpp = 16;
+ break;
+ default:
+ bpp = 24;
+ dev_warn(priv->dev, "Unknown bits per pixel assume 24\n");
+ break;
+ }
+
+ /* In case of 720x576 size, the refresh rate supports 50Hz. */
+ if ((priv->mf.width == 720) && (priv->mf.height == 576))
+ v_freq = 50;
+ else
+ v_freq = 60;
+
+ /* Hblank's margin is 1.05 times of the horizontal size */
+ hblank = priv->mf.width * 105 / 100;
+ h_freq = hblank * v_freq;
+
+ /* Vblank's margin is 1.13 times of the vertical size */
+ vblank = priv->mf.height * 113 / 100;
+ dot_clk = h_freq * vblank;
+
+ if (priv->mf.field != V4L2_FIELD_NONE)
+ dot_clk /= 2;
+
+ csi_dbg(priv, "Dot clock %llu Hz\n", dot_clk);
+
+ mbps = ((dot_clk * bpp * 4) / (priv->lanes * 8) * 2) / MB_OFFSET;
+
+ for (hsfreq = priv->info; hsfreq->mbps != 0; hsfreq++)
+ if (hsfreq->mbps >= mbps)
+ break;
+
+ if (!hsfreq->mbps) {
+ dev_err(priv->dev, "Unsupported PHY speed (%llu Mbps)", mbps);
+ return -ERANGE;
+ }
+
+ csi_dbg(priv, "PHY HSFREQRANGE requested %llu got %u Mbps\n",
+ mbps, hsfreq->mbps);
+
+ *phypll = PHYPLL_HSFREQRANGE(hsfreq->reg);
+
+ if (priv->ths_quirks & CSI2_PHY_ADD_INIT)
+ iowrite32((INT_ULPS_START | INT_ULPS_END),
+ priv->base + INTSTATE_REG);
+
+ return 0;
+}
+
static int rcar_csi2_start(struct rcar_csi2 *priv)
{
- u32 fld, phycnt, phypll, vcdt, vcdt2, tmp, pixels;
- int i;
+ u32 fld_num, phycnt, phypll, vcdt, vcdt2, tmp;
+ int i, ret;
csi_dbg(priv, "Input size (%dx%d%c)\n", priv->mf.width, priv->mf.height,
priv->mf.field == V4L2_FIELD_NONE ? 'p' : 'i');
vcdt = vcdt2 = 0;
+ fld_num = 0;
for (i = 0; i < priv->vc_num; i++) {
tmp = VCDT_SEL_VC(i) | VCDT_VCDTN_EN | VCDT_SEL_DTN_ON;
@@ -308,12 +401,14 @@ static int rcar_csi2_start(struct rcar_csi2 *priv)
case MEDIA_BUS_FMT_RGB888_1X24:
/* 24 == RGB888 */
tmp |= 0x24;
+ fld_num |= FLD_FLD_NUM(2);
break;
case MEDIA_BUS_FMT_UYVY8_1X16:
case MEDIA_BUS_FMT_UYVY8_2X8:
case MEDIA_BUS_FMT_YUYV10_2X10:
/* 1E == YUV422 8-bit */
tmp |= 0x1e;
+ fld_num |= FLD_FLD_NUM(1);
break;
default:
csi_warn(priv,
@@ -330,49 +425,37 @@ static int rcar_csi2_start(struct rcar_csi2 *priv)
switch (priv->lanes) {
case 1:
- fld = FLD_FLD_NUM(1) | FLD_FLD_EN4 | FLD_FLD_EN3 |
- FLD_FLD_EN2 | FLD_FLD_EN;
phycnt = PHYCNT_ENABLECLK | PHYCNT_ENABLE_0;
- phypll = priv->info->fre_range[BPS_205M];
+ break;
+ case 2:
+ phycnt = PHYCNT_ENABLECLK | PHYCNT_ENABLE_1 | PHYCNT_ENABLE_0;
break;
case 4:
- fld = FLD_FLD_NUM(2) | FLD_FLD_EN4 | FLD_FLD_EN3 |
- FLD_FLD_EN2 | FLD_FLD_EN;
- phycnt = PHYCNT_ENABLECLK | PHYCNT_ENABLE_3 |
- PHYCNT_ENABLE_2 | PHYCNT_ENABLE_1 | PHYCNT_ENABLE_0;
-
- /* Calculate MBPS per lane, assume 32 bits per pixel at 60Hz */
- pixels = (priv->mf.width * priv->mf.height);
- if (pixels <= 640 * 480)
- phypll = priv->info->fre_range[BPS_100M];
- else if (pixels <= 720 * 480)
- phypll = priv->info->fre_range[BPS_160M];
- else if (pixels <= 720 * 576)
- phypll = priv->info->fre_range[BPS_190M];
- else if (pixels <= 1280 * 720)
- phypll = priv->info->fre_range[BPS_450M];
- else if (pixels <= 1920 * 1080) {
- if (priv->mf.field == V4L2_FIELD_NONE)
- phypll = priv->info->fre_range[BPS_900M];
- else
- phypll = priv->info->fre_range[BPS_450M];
- } else
- goto error;
-
+ phycnt = PHYCNT_ENABLECLK | PHYCNT_ENABLE_3 | PHYCNT_ENABLE_2 |
+ PHYCNT_ENABLE_1 | PHYCNT_ENABLE_0;
break;
default:
- goto error;
+ return -EINVAL;
}
csi_dbg(priv, "PHYPLL:0x%x\n", phypll);
+ ret = rcar_csi2_calc_phypll(priv, &phypll);
+ if (ret) {
+ csi_err(priv, "Unsupported resolution (%dx%d%c)\n",
+ priv->mf.width, priv->mf.height,
+ priv->mf.field == V4L2_FIELD_NONE ? 'p' : 'i');
+ return ret;
+ }
+
/* Init */
iowrite32(TREF_TREF, priv->base + TREF_REG);
rcar_csi2_reset(priv);
iowrite32(0, priv->base + PHTC_REG);
/* Configure */
- iowrite32(fld, priv->base + FLD_REG);
+ iowrite32(fld_num | FLD_FLD_EN4 | FLD_FLD_EN3 |
+ FLD_FLD_EN2 | FLD_FLD_EN, priv->base + FLD_REG);
iowrite32(vcdt, priv->base + VCDT_REG);
iowrite32(vcdt2, priv->base + VCDT2_REG);
iowrite32(LSWAP_L0SEL(priv->swap[0]) | LSWAP_L1SEL(priv->swap[1]) |
@@ -386,7 +469,7 @@ static int rcar_csi2_start(struct rcar_csi2 *priv)
iowrite32(0x010101e4, priv->base + PHTW_REG);
iowrite32(0x01100104, priv->base + PHTW_REG);
iowrite32(0x01030100, priv->base + PHTW_REG);
- iowrite32(0x01800107, priv->base + PHTW_REG);
+ iowrite32(0x01800100, priv->base + PHTW_REG);
}
/* Start */
@@ -408,12 +491,6 @@ static int rcar_csi2_start(struct rcar_csi2 *priv)
rcar_csi2_wait_phy_start(priv);
return 0;
-error:
- csi_err(priv, "Unsupported resolution (%dx%d%c)\n",
- priv->mf.width, priv->mf.height,
- priv->mf.field == V4L2_FIELD_NONE ? 'p' : 'i');
-
- return -EINVAL;
}
static void rcar_csi2_stop(struct rcar_csi2 *priv)
@@ -538,6 +615,7 @@ static int rcar_csi2_parse_dt(struct rcar_csi2 *priv)
switch (v4l2_ep.bus.mipi_csi2.num_data_lanes) {
case 1:
+ case 2:
case 4:
priv->lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
break;
@@ -628,7 +706,7 @@ static int rcar_csi2_probe(struct platform_device *pdev)
/* HSFREQRANGE bit information of H3(ES1.x) and M3(ES1.0) are same. */
if (priv->ths_quirks & CSI2_FREQ_RANGE_TABLE_WA)
- priv->info = &rcar_csi2_info_r8a7796;
+ priv->info = rcar_csi2_info_r8a7796;
priv->dev = &pdev->dev;
spin_lock_init(&priv->lock);
diff --git a/drivers/media/platform/rcar-vin/rcar-dma.c b/drivers/media/platform/rcar-vin/rcar-dma.c
index 47eeba5..c34c541 100644
--- a/drivers/media/platform/rcar-vin/rcar-dma.c
+++ b/drivers/media/platform/rcar-vin/rcar-dma.c
@@ -1572,6 +1572,7 @@ int rvin_set_chsel(struct rvin_dev *vin, u8 chsel)
VNCSI_IFMD_CSI_CHSEL(chsel);
rvin_write(vin, ifmd, VNCSI_IFMD_REG);
+ vin->group->vin[vin->index]->chsel = chsel;
vin_dbg(vin, "Set IFMD 0x%x\n", ifmd);
@@ -1584,11 +1585,7 @@ int rvin_get_chsel(struct rvin_dev *vin)
{
int chsel;
- pm_runtime_get_sync(vin->dev);
-
- chsel = rvin_read(vin, VNCSI_IFMD_REG) & VNCSI_IFMD_CSI_CHSEL_MASK;
-
- pm_runtime_put(vin->dev);
+ chsel = vin->group->vin[vin->index]->chsel;
return chsel;
}
diff --git a/drivers/media/platform/rcar-vin/rcar-v4l2.c b/drivers/media/platform/rcar-vin/rcar-v4l2.c
index ade1f8b..1a4ca90 100644
--- a/drivers/media/platform/rcar-vin/rcar-v4l2.c
+++ b/drivers/media/platform/rcar-vin/rcar-v4l2.c
@@ -478,8 +478,8 @@ static int rvin_s_selection(struct file *file, void *fh,
max_rect.height = vin->source.height;
v4l2_rect_map_inside(&r, &max_rect);
- v4l_bound_align_image(&r.width, 2, vin->source.width, 1,
- &r.height, 4, vin->source.height, 2, 0);
+ v4l_bound_align_image(&r.width, 6, vin->source.width, 0,
+ &r.height, 2, vin->source.height, 0, 0);
r.top = clamp_t(s32, r.top, 0, vin->source.height - r.height);
r.left = clamp_t(s32, r.left, 0, vin->source.width - r.width);
diff --git a/drivers/media/platform/vsp1/vsp1_drm.c b/drivers/media/platform/vsp1/vsp1_drm.c
index adede29..45b0d7b 100644
--- a/drivers/media/platform/vsp1/vsp1_drm.c
+++ b/drivers/media/platform/vsp1/vsp1_drm.c
@@ -697,7 +697,8 @@ int vsp1_du_map_sg(struct device *dev, struct sg_table *sgt)
map_dev = vsp1->fcp ? rcar_fcp_get_device(vsp1->fcp) : dev;
- return dma_map_sg(map_dev, sgt->sgl, sgt->nents, DMA_TO_DEVICE);
+ return dma_map_sg_attrs(map_dev, sgt->sgl, sgt->nents, DMA_TO_DEVICE,
+ DMA_ATTR_SKIP_CPU_SYNC);
}
EXPORT_SYMBOL_GPL(vsp1_du_map_sg);
@@ -708,7 +709,8 @@ void vsp1_du_unmap_sg(struct device *dev, struct sg_table *sgt)
map_dev = vsp1->fcp ? rcar_fcp_get_device(vsp1->fcp) : dev;
- dma_unmap_sg(map_dev, sgt->sgl, sgt->nents, DMA_TO_DEVICE);
+ dma_unmap_sg_attrs(map_dev, sgt->sgl, sgt->nents, DMA_TO_DEVICE,
+ DMA_ATTR_SKIP_CPU_SYNC);
}
EXPORT_SYMBOL_GPL(vsp1_du_unmap_sg);
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 7ec33c5..e8de95e 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -568,6 +568,17 @@
When switching the transfer mode from DMA to PIO, say Y here.
When switching the transfer mode from PIO to DMA, say N here.
+config MMC_SDHI_SEQ_WORKAROUND
+ bool "Support SDHI Sequencer as R-Car H3(WS1.1)/M3(WS1.0) Workaround"
+ depends on MMC_SDHI && ARM64 && !MMC_SDHI_PIO
+ help
+ This option enables support for SDHI-SEQUENCER.
+
+ Since the bus response is not taken into account,
+ the data of the last sector might be missing.
+ In order to read the last sector data, use SDHI-SEQUENCER
+ to read data two extra.
+
config MMC_CB710
tristate "ENE CB710 MMC/SD Interface support"
depends on PCI
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
index 98c4e11..ab05815 100644
--- a/drivers/mmc/host/sh_mobile_sdhi.c
+++ b/drivers/mmc/host/sh_mobile_sdhi.c
@@ -147,7 +147,7 @@ struct sh_mobile_sdhi {
struct tmio_mmc_dma dma_priv;
struct pinctrl *pinctrl;
struct pinctrl_state *pins_default, *pins_uhs;
- void __iomem *scc_ctl;
+ int scc_offset;
};
static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
@@ -335,14 +335,14 @@ static int sh_mobile_sdhi_select_drive_strength(struct mmc_card *card,
static inline u32 sd_scc_read32(struct tmio_mmc_host *host,
struct sh_mobile_sdhi *priv, int addr)
{
- return readl(priv->scc_ctl + (addr << host->bus_shift));
+ return readl(host->ctl + priv->scc_offset + (addr << host->bus_shift));
}
static inline void sd_scc_write32(struct tmio_mmc_host *host,
struct sh_mobile_sdhi *priv,
int addr, u32 val)
{
- writel(val, priv->scc_ctl + (addr << host->bus_shift));
+ writel(val, host->ctl + priv->scc_offset + (addr << host->bus_shift));
}
static unsigned int sh_mobile_sdhi_init_tuning(struct tmio_mmc_host *host)
@@ -442,9 +442,6 @@ static void sh_mobile_sdhi_reset_hs400_mode(struct mmc_host *mmc)
MMC_CAP2_HS200_1_8V_SDR)))
return;
- if (!priv->scc_ctl)
- return;
-
sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
@@ -570,10 +567,8 @@ static bool sh_mobile_sdhi_check_scc_error(struct tmio_mmc_host *host)
{
struct sh_mobile_sdhi *priv;
- if (!(host->mmc->caps & MMC_CAP_UHS_SDR104) &&
- !(host->mmc->caps2 & MMC_CAP2_HS200_1_8V_SDR) &&
- !(host->mmc->caps2 & (MMC_CAP2_HS400_1_8V |
- MMC_CAP2_HS200_1_8V_SDR)))
+ if (!(host->mmc->ios.timing == MMC_TIMING_UHS_SDR104) &&
+ !(host->mmc->ios.timing == MMC_TIMING_MMC_HS200))
return 0;
priv = host_to_priv(host);
@@ -637,13 +632,13 @@ static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
if (host->pdata->flags & TMIO_MMC_USE_SCLKDIVEN) {
while (--timeout &&
- !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
- TMIO_STAT_SCLKDIVEN))
+ !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
+ TMIO_STAT_SCLKDIVEN))
udelay(1);
} else {
while (--timeout &&
- (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
- TMIO_STAT_CMD_BUSY))
+ (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
+ TMIO_STAT_CMD_BUSY))
udelay(1);
}
@@ -751,6 +746,14 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
goto eprobe;
}
+#ifdef CONFIG_MMC_SDHI_SEQ_WORKAROUND
+ if (soc_device_match(dma_quirks_match))
+ host->sequencer_enabled = true;
+ else
+ host->sequencer_enabled = false;
+#else
+ host->sequencer_enabled = false;
+#endif
if (of_id && of_id->data) {
const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
@@ -760,9 +763,24 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
mmc_data->dma_rx_offset = of_data->dma_rx_offset;
mmc_data->max_blk_count = of_data->max_blk_count;
mmc_data->max_segs = of_data->max_segs;
+ /*
+ * Gen3 SDHI SEQ can handle 0xffffffff/DM_SEQ_SIZE blk count
+ * and max 8 commands.
+ */
+ if (host->sequencer_enabled) {
+ mmc_data->max_blk_count = 0xffffffff / 512;
+#ifdef CONFIG_MMC_BLOCK_BOUNCE
+ /* (CMD23+CMD18)*1 + (dummy read command) */
+ mmc_data->max_segs = 1;
+#else
+ /* (CMD23+CMD18)*3 + (dummy read command) */
+ mmc_data->max_segs = 3;
+#endif
+ }
dma_priv->dma_buswidth = of_data->dma_buswidth;
dma_priv->sdbuf_64bit = of_data->sdbuf_64bit;
host->bus_shift = of_data->bus_shift;
+ priv->scc_offset = of_data->scc_offset;
}
host->dma = dma_priv;
@@ -864,8 +882,6 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
if (!hit)
dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
-
- priv->scc_ctl = host->ctl + of_data->scc_offset;
}
}
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 438e4f8..c70d662 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -25,6 +25,7 @@
#include <linux/pagemap.h>
#include <linux/scatterlist.h>
#include <linux/spinlock.h>
+#include <linux/sys_soc.h>
#define CTL_SD_CMD 0x00
#define CTL_ARG_REG 0x04
@@ -51,6 +52,27 @@
#define CTL_CLK_AND_WAIT_CTL 0x138
#define CTL_RESET_SDIO 0x1e0
+#define DM_CM_SEQ_REGSET 0x800
+#define DM_CM_SEQ_MODE 0x808
+#define DM_CM_SEQ_CTRL 0x810
+#define DM_CM_DTRAN_MODE 0x820
+#define DM_CM_DTRAN_CTRL 0x828
+#define DM_CM_RST 0x830
+#define DM_CM_INFO1 0x840
+#define DM_CM_INFO1_MASK 0x848
+#define DM_CM_INFO2 0x850
+#define DM_CM_INFO2_MASK 0x858
+#define DM_CM_TUNING_STAT 0x860
+#define DM_CM_SEQ_STAT 0x868
+#define DM_DTRAN_ADDR 0x880
+#define DM_SEQ_CMD 0x8a0
+#define DM_SEQ_ARG 0x8a8
+#define DM_SEQ_SIZE 0x8b0
+#define DM_SEQ_SECCNT 0x8b8
+#define DM_SEQ_RSP 0x8c0
+#define DM_SEQ_RSP_CHK 0x8c8
+#define DM_SEQ_ADDR 0x8d0
+
/* Definitions for values the CTRL_STATUS register can take. */
#define TMIO_STAT_CMDRESPEND BIT(0)
#define TMIO_STAT_DATAEND BIT(2)
@@ -94,6 +116,7 @@
/* Define some IRQ masks */
/* This is the mask used at reset by the chip */
+#define TMIO_MASK_INIT 0x8b7f031d /* H/W initial value */
#define TMIO_MASK_ALL 0x837f031d
#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \
TMIO_STAT_DATATIMEOUT)
@@ -104,12 +127,30 @@
#define TMIO_MASK_DMA (TMIO_STAT_DATAEND | TMIO_STAT_DATATIMEOUT)
#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
+/* DM_CM_INFO1 and DM_CM_INFO1_MASK */
+#define DM_CM_INFO1_SEQEND BIT(0)
+#define DM_CM_INFO1_SEQSUSPEND BIT(8)
+#define DM_CM_INFO1_DTRAEND0 BIT(16)
+#define DM_CM_INFO1_DTRAEND1_BIT17 BIT(17)
+#define DM_CM_INFO1_DTRAEND1_BIT20 BIT(20)
+
#define TMIO_TRANSTATE_DEND 0x00000001
#define TMIO_TRANSTATE_AEND 0x00000002
+static const struct soc_device_attribute dma_quirks_match[] = {
+ { .soc_id = "r8a7795", .revision = "ES1.*" },
+ { .soc_id = "r8a7796", .revision = "ES1.0" },
+ { },
+};
+
struct tmio_mmc_data;
struct tmio_mmc_host;
+enum tmio_cookie {
+ COOKIE_UNMAPPED,
+ COOKIE_PRE_MAPPED,
+};
+
struct tmio_mmc_dma {
enum dma_slave_buswidth dma_buswidth;
bool sdbuf_64bit;
@@ -145,10 +186,15 @@ struct tmio_mmc_host {
struct dma_chan *chan_tx;
struct tasklet_struct dma_complete;
struct tasklet_struct dma_issue;
+ struct tasklet_struct seq_complete;
+ bool bounce_sg_mapped;
struct scatterlist bounce_sg;
u8 *bounce_buf;
u32 dma_tranend1;
+ /* Sequencer support */
+ bool sequencer_enabled;
+
/* Track lost interrupts */
struct delayed_work delayed_reset_work;
struct work_struct done;
@@ -273,6 +319,7 @@ static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
&& defined(CONFIG_ARM64)
bool __tmio_mmc_dma_irq(struct tmio_mmc_host *host);
void tmio_mmc_reset_dma(struct tmio_mmc_host *host);
+void tmio_mmc_start_sequencer(struct tmio_mmc_host *host);
#else
static inline bool __tmio_mmc_dma_irq(struct tmio_mmc_host *host)
{
@@ -281,6 +328,10 @@ static inline bool __tmio_mmc_dma_irq(struct tmio_mmc_host *host)
static inline void tmio_mmc_reset_dma(struct tmio_mmc_host *host)
{
}
+
+static inline void tmio_mmc_start_sequencer(struct tmio_mmc_host *host)
+{
+}
#endif
#ifdef CONFIG_PM
@@ -327,4 +378,22 @@ static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int
writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
}
+/*
+ * Specification of this driver:
+ * - host->chan_{rx,tx} will be used as a flag of enabling/disabling the dma
+ * - Since this SDHI DMAC register set has actual 32-bit and "bus_shift" is 2,
+ * this driver cannot use original sd_ctrl_{write,read}32 functions.
+ */
+static inline void tmio_dm_write(struct tmio_mmc_host *host, int addr, u64 val)
+{
+ writel(val & 0xffffffff, host->ctl + addr);
+ writel(val >> 32, host->ctl + (addr + 4));
+}
+
+static inline u64 tmio_dm_read(struct tmio_mmc_host *host, int addr)
+{
+ return readl(host->ctl + addr) |
+ (u64)readl(host->ctl + (addr + 4)) << 32;
+}
+
#endif
diff --git a/drivers/mmc/host/tmio_mmc_dma_gen3.c b/drivers/mmc/host/tmio_mmc_dma_gen3.c
index d1c6c40..a60d100 100644
--- a/drivers/mmc/host/tmio_mmc_dma_gen3.c
+++ b/drivers/mmc/host/tmio_mmc_dma_gen3.c
@@ -16,21 +16,13 @@
#include <linux/dmaengine.h>
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
+#include <linux/mmc/sd.h>
+#include <linux/mmc/sdio.h>
#include <linux/pagemap.h>
#include <linux/scatterlist.h>
-#include <linux/sys_soc.h>
#include "tmio_mmc.h"
-#define DM_CM_DTRAN_MODE 0x820
-#define DM_CM_DTRAN_CTRL 0x828
-#define DM_CM_RST 0x830
-#define DM_CM_INFO1 0x840
-#define DM_CM_INFO1_MASK 0x848
-#define DM_CM_INFO2 0x850
-#define DM_CM_INFO2_MASK 0x858
-#define DM_DTRAN_ADDR 0x880
-
/* DM_CM_DTRAN_MODE */
#define DTRAN_MODE_CH_NUM_CH0 0 /* "downstream" = for write commands */
#define DTRAN_MODE_CH_NUM_CH1 BIT(16) /* "uptream" = for read commands */
@@ -43,41 +35,16 @@
/* DM_CM_RST */
#define RST_DTRANRST1 BIT(9)
#define RST_DTRANRST0 BIT(8)
+#define RST_SEQRST BIT(0)
#define RST_RESERVED_BITS GENMASK_ULL(32, 0)
/* DM_CM_INFO1 and DM_CM_INFO1_MASK */
#define INFO1_CLEAR 0
-#define INFO1_DTRANEND1_BIT20 BIT(20)
-#define INFO1_DTRANEND1_BIT17 BIT(17)
-#define INFO1_DTRANEND0 BIT(16)
/* DM_CM_INFO2 and DM_CM_INFO2_MASK */
#define INFO2_DTRANERR1 BIT(17)
#define INFO2_DTRANERR0 BIT(16)
-static const struct soc_device_attribute dma_quirks_match[] = {
- { .soc_id = "r8a7795", .revision = "ES1.*" },
- { .soc_id = "r8a7796", .revision = "ES1.0" },
- { },
-};
-
-/*
- * Specification of this driver:
- * - host->chan_{rx,tx} will be used as a flag of enabling/disabling the dma
- * - Since this SDHI DMAC register set has actual 32-bit and "bus_shift" is 2,
- * this driver cannot use original sd_ctrl_{write,read}32 functions.
- */
-
-static void tmio_dm_write(struct tmio_mmc_host *host, int addr, u64 val)
-{
- writeq(val, host->ctl + addr);
-}
-
-static u32 tmio_dm_read(struct tmio_mmc_host *host, int addr)
-{
- return readl(host->ctl + addr);
-}
-
void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
{
if (!host->chan_tx || !host->chan_rx)
@@ -87,7 +54,8 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
tmio_dm_write(host, DM_CM_INFO1, INFO1_CLEAR);
if (host->dma->enable) {
- host->dma_irq_mask = ~(host->dma_tranend1 | INFO1_DTRANEND0);
+ host->dma_irq_mask =
+ ~(host->dma_tranend1 | DM_CM_INFO1_DTRAEND0);
host->dma->enable(host, enable);
tmio_dm_write(host, DM_CM_INFO1_MASK, host->dma_irq_mask);
}
@@ -101,16 +69,26 @@ void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
tmio_mmc_enable_dma(host, false);
+ if (host->sequencer_enabled)
+ val |= RST_SEQRST;
tmio_dm_write(host, DM_CM_RST, RST_RESERVED_BITS & ~val);
tmio_dm_write(host, DM_CM_RST, RST_RESERVED_BITS | val);
tmio_mmc_enable_dma(host, true);
+
+ if (host->bounce_sg_mapped) {
+ dma_unmap_sg(&host->pdev->dev, &host->bounce_sg, 1,
+ DMA_FROM_DEVICE);
+ host->bounce_sg_mapped = false;
+ }
}
void tmio_mmc_reset_dma(struct tmio_mmc_host *host)
{
u64 val = RST_DTRANRST1 | RST_DTRANRST0;
+ if (host->sequencer_enabled)
+ val |= RST_SEQRST;
tmio_dm_write(host, DM_CM_RST, RST_RESERVED_BITS & ~val);
tmio_dm_write(host, DM_CM_RST, RST_RESERVED_BITS | val);
}
@@ -149,10 +127,13 @@ void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data)
irq_mask = TMIO_STAT_TXRQ;
}
- ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, dir);
- if (ret < 0) {
- dev_err(&host->pdev->dev, "%s: dma_map_sg failed\n", __func__);
- return;
+ if (host->data->host_cookie != COOKIE_PRE_MAPPED) {
+ ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, dir);
+ if (ret < 0) {
+ dev_err(&host->pdev->dev,
+ "%s: dma_map_sg failed\n", __func__);
+ return;
+ }
}
tmio_clear_transtate(host);
@@ -195,11 +176,464 @@ static void tmio_mmc_complete_tasklet_fn(unsigned long arg)
dir = DMA_TO_DEVICE;
tmio_mmc_enable_dma(host, false);
- dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->sg_len, dir);
+ if (host->data->host_cookie != COOKIE_PRE_MAPPED)
+ dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->sg_len, dir);
+
+ if (host->bounce_sg_mapped) {
+ dma_unmap_sg(&host->pdev->dev, &host->bounce_sg, 1,
+ DMA_FROM_DEVICE);
+ host->bounce_sg_mapped = false;
+ }
+
tmio_mmc_do_data_irq(host);
}
+
+static void tmio_mmc_seq_complete_tasklet_fn(unsigned long arg)
+{
+ tmio_mmc_complete_tasklet_fn(arg);
+}
#endif
+/* DM_CM_SEQ_REGSET bits */
+#define DM_CM_SEQ_REGSET_TABLE_NUM BIT(8)
+
+/* DM_CM_SEQ_CTRL bits */
+#define DM_CM_SEQ_CTRL_SEQ_TABLE BIT(28)
+#define DM_CM_SEQ_CTRL_T_NUM BIT(24)
+#define DM_CM_SEQ_CTRL_SEQ_TYPE_SD BIT(16)
+#define DM_CM_SEQ_CTRL_START_NUM(x) ((x) << 12)
+#define DM_CM_SEQ_CTRL_END_NUM(x) ((x) << 8)
+#define DM_CM_SEQ_CTRL_SEQ_START BIT(0)
+
+/* DM_SEQ_CMD bits */
+#define DM_SEQ_CMD_MULTI BIT(13)
+#define DM_SEQ_CMD_DIO BIT(12)
+#define DM_SEQ_CMD_CMDTYP BIT(11)
+#define DM_SEQ_CMD_RSP_NONE (BIT(9) | BIT(8))
+#define DM_SEQ_CMD_RSP_R1 BIT(10)
+#define DM_SEQ_CMD_RSP_R1B (BIT(10) | BIT(8))
+#define DM_SEQ_CMD_RSP_R2 (BIT(10) | BIT(9))
+#define DM_SEQ_CMD_RSP_R3 (BIT(10) | BIT(9) | BIT(8))
+#define DM_SEQ_CMD_NONAUTOSTP BIT(7)
+#define DM_SEQ_CMD_APP BIT(6)
+
+#define MAX_CONTEXT_NUM 8
+
+struct tmio_mmc_context {
+ u64 seq_cmd;
+ u64 seq_arg;
+ u64 seq_size;
+ u64 seq_seccnt;
+ u64 seq_rsp;
+ u64 seq_rsp_chk;
+ u64 seq_addr;
+};
+
+static void tmio_mmc_set_seq_context(struct tmio_mmc_host *host, int ctxt_num,
+ struct tmio_mmc_context *ctxt)
+{
+ u64 val;
+
+ WARN_ON(ctxt_num >= MAX_CONTEXT_NUM);
+
+ /* set sequencer table/context number */
+ if (ctxt_num < 4)
+ val = ctxt_num;
+ else
+ val = DM_CM_SEQ_REGSET_TABLE_NUM | (ctxt_num - 4);
+ tmio_dm_write(host, DM_CM_SEQ_REGSET, val);
+
+ /* set command parameter */
+ tmio_dm_write(host, DM_SEQ_CMD, ctxt->seq_cmd);
+ tmio_dm_write(host, DM_SEQ_ARG, ctxt->seq_arg);
+ tmio_dm_write(host, DM_SEQ_SIZE, ctxt->seq_size);
+ tmio_dm_write(host, DM_SEQ_SECCNT, ctxt->seq_seccnt);
+ tmio_dm_write(host, DM_SEQ_RSP, ctxt->seq_rsp);
+ tmio_dm_write(host, DM_SEQ_RSP_CHK, ctxt->seq_rsp_chk);
+ tmio_dm_write(host, DM_SEQ_ADDR, ctxt->seq_addr);
+}
+
+static int tmio_mmc_set_seq_table(struct tmio_mmc_host *host,
+ struct mmc_request *mrq,
+ struct scatterlist *sg,
+ bool ipmmu_on)
+{
+ struct mmc_card *card = host->mmc->card;
+ struct mmc_data *data = mrq->data;
+ struct scatterlist *sg_tmp;
+ struct tmio_mmc_context ctxt;
+ unsigned int blksz, blocks;
+ u32 cmd_opcode, cmd_flag, cmd_arg;
+ u32 sbc_opcode = 0, sbc_arg = 0;
+ int i, ctxt_cnt = 0;
+
+ /* SD_COMBO media not tested */
+ cmd_opcode = (mrq->cmd->opcode & 0x3f);
+ cmd_flag = DM_SEQ_CMD_CMDTYP;
+ if (data->flags & MMC_DATA_READ)
+ cmd_flag |= DM_SEQ_CMD_DIO;
+ if (mmc_op_multi(mrq->cmd->opcode) ||
+ (cmd_opcode == SD_IO_RW_EXTENDED && mrq->cmd->arg & 0x08000000))
+ cmd_flag |= DM_SEQ_CMD_MULTI;
+ if (mrq->sbc || cmd_opcode == SD_IO_RW_EXTENDED)
+ cmd_flag |= DM_SEQ_CMD_NONAUTOSTP;
+
+ switch (mmc_resp_type(mrq->cmd)) {
+ case MMC_RSP_NONE:
+ cmd_flag |= DM_SEQ_CMD_RSP_NONE;
+ break;
+ case MMC_RSP_R1:
+ case MMC_RSP_R1 & ~MMC_RSP_CRC:
+ cmd_flag |= DM_SEQ_CMD_RSP_R1;
+ break;
+ case MMC_RSP_R1B:
+ cmd_flag |= DM_SEQ_CMD_RSP_R1B;
+ break;
+ case MMC_RSP_R2:
+ cmd_flag |= DM_SEQ_CMD_RSP_R2;
+ break;
+ case MMC_RSP_R3:
+ cmd_flag |= DM_SEQ_CMD_RSP_R3;
+ break;
+ default:
+ pr_debug("Unknown response type %d\n", mmc_resp_type(mrq->cmd));
+ return -EINVAL;
+ }
+
+ cmd_arg = mrq->cmd->arg;
+ if (cmd_opcode == SD_IO_RW_EXTENDED && cmd_arg & 0x08000000) {
+ /* SDIO CMD53 block mode */
+ cmd_arg &= ~0x1ff;
+ }
+
+ if (mrq->sbc) {
+ sbc_opcode = (mrq->sbc->opcode & 0x3f) | DM_SEQ_CMD_RSP_R1;
+ sbc_arg = mrq->sbc->arg & (MMC_CMD23_ARG_REL_WR |
+ MMC_CMD23_ARG_PACKED | MMC_CMD23_ARG_TAG_REQ);
+ }
+
+ blksz = data->blksz;
+ if (ipmmu_on) {
+ blocks = data->blocks;
+ memset(&ctxt, 0, sizeof(ctxt));
+
+ if (sbc_opcode) {
+ /* set CMD23 */
+ ctxt.seq_cmd = sbc_opcode;
+ ctxt.seq_arg = sbc_arg | blocks;
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+ ctxt_cnt++;
+ }
+
+ /* set CMD */
+ ctxt.seq_cmd = cmd_opcode | cmd_flag;
+ ctxt.seq_arg = cmd_arg;
+ if (cmd_opcode == SD_IO_RW_EXTENDED && cmd_arg & 0x08000000) {
+ /* SDIO CMD53 block mode */
+ ctxt.seq_arg |= blocks;
+ }
+ ctxt.seq_size = blksz;
+ ctxt.seq_seccnt = blocks;
+ ctxt.seq_addr = sg_dma_address(sg);
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+ } else {
+ for_each_sg(sg, sg_tmp, host->sg_len, i) {
+ blocks = sg_tmp->length / blksz;
+ memset(&ctxt, 0, sizeof(ctxt));
+
+ if (sbc_opcode) {
+ /* set CMD23 */
+ ctxt.seq_cmd = sbc_opcode;
+ ctxt.seq_arg = sbc_arg | blocks;
+ if (sbc_arg & MMC_CMD23_ARG_TAG_REQ && card &&
+ card->ext_csd.data_tag_unit_size &&
+ blksz * blocks <
+ card->ext_csd.data_tag_unit_size)
+ ctxt.seq_arg &= ~MMC_CMD23_ARG_TAG_REQ;
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+ ctxt_cnt++;
+ }
+
+ /* set CMD */
+ ctxt.seq_cmd = cmd_opcode | cmd_flag;
+ ctxt.seq_arg = cmd_arg;
+ if (cmd_opcode == SD_IO_RW_EXTENDED &&
+ cmd_arg & 0x08000000) {
+ /* SDIO CMD53 block mode */
+ ctxt.seq_arg |= blocks;
+ }
+ ctxt.seq_size = blksz;
+ ctxt.seq_seccnt = blocks;
+ ctxt.seq_addr = sg_dma_address(sg_tmp);
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+
+ if (i < (host->sg_len - 1)) {
+ /* increment address */
+ if (cmd_opcode == SD_IO_RW_EXTENDED) {
+ /*
+ * sg_len should be 1 in SDIO CMD53
+ * byte mode
+ */
+ WARN_ON(!(cmd_arg & 0x08000000));
+ if (cmd_arg & 0x04000000) {
+ /*
+ * SDIO CMD53 address
+ * increment mode
+ */
+ cmd_arg +=
+ (blocks * blksz) << 9;
+ }
+ } else {
+ if (card && !mmc_card_blockaddr(card))
+ cmd_arg += blocks * blksz;
+ else
+ cmd_arg += blocks;
+ }
+ ctxt_cnt++;
+ }
+ }
+ }
+
+ if (data->flags & MMC_DATA_READ) {
+ /* dummy read */
+ if (cmd_opcode == MMC_READ_MULTIPLE_BLOCK && card &&
+ blksz == 512 && data->blocks > 1) {
+ memset(&ctxt, 0, sizeof(ctxt));
+ if (sbc_opcode) {
+ /* set CMD23 */
+ ctxt.seq_cmd = sbc_opcode;
+ ctxt.seq_arg = sbc_arg | 2;
+ if (sbc_arg & MMC_CMD23_ARG_TAG_REQ &&
+ card->ext_csd.data_tag_unit_size &&
+ blksz * 2 <
+ card->ext_csd.data_tag_unit_size)
+ ctxt.seq_arg &= ~MMC_CMD23_ARG_TAG_REQ;
+ ctxt_cnt++;
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+ }
+
+ /* set CMD18 */
+ ctxt.seq_cmd = cmd_opcode | cmd_flag;
+ ctxt.seq_arg = mrq->cmd->arg;
+ if (!mmc_card_blockaddr(card))
+ ctxt.seq_arg += (data->blocks - 2) * 512;
+ else
+ ctxt.seq_arg += data->blocks - 2;
+ ctxt.seq_size = 512;
+ ctxt.seq_seccnt = 2;
+ ctxt.seq_addr = sg_dma_address(&host->bounce_sg);
+ ctxt_cnt++;
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+ } else {
+ if (cmd_opcode == SD_SWITCH) {
+ /* set SD CMD6 twice */
+ ctxt.seq_addr =
+ sg_dma_address(&host->bounce_sg);
+ } else if ((card && (mmc_card_sdio(card) ||
+ card->type == MMC_TYPE_SD_COMBO)) ||
+ cmd_opcode == SD_IO_RW_EXTENDED) {
+ /*
+ * In case of SDIO/SD_COMBO,
+ * read Common I/O Area 0x0-0x1FF twice.
+ */
+ memset(&ctxt, 0, sizeof(ctxt));
+ ctxt.seq_cmd = SD_IO_RW_EXTENDED |
+ DM_SEQ_CMD_CMDTYP |
+ DM_SEQ_CMD_DIO |
+ DM_SEQ_CMD_NONAUTOSTP |
+ DM_SEQ_CMD_RSP_R1;
+ /*
+ * SD_IO_RW_EXTENDED argument format:
+ * [31] R/W flag -> 0
+ * [30:28] Function number -> 0x0 selects
+ * Common I/O Area
+ * [27] Block mode -> 0
+ * [26] Increment address -> 1
+ * [25:9] Regiser address -> 0x0
+ * [8:0] Byte/block count -> 0x0 -> 512Bytes
+ */
+ ctxt.seq_arg = 0x04000000;
+ ctxt.seq_size = 512;
+ ctxt.seq_seccnt = 1;
+ ctxt.seq_addr =
+ sg_dma_address(&host->bounce_sg);
+ } else {
+ /* set CMD17 twice */
+ memset(&ctxt, 0, sizeof(ctxt));
+ ctxt.seq_cmd = MMC_READ_SINGLE_BLOCK |
+ DM_SEQ_CMD_CMDTYP |
+ DM_SEQ_CMD_DIO |
+ DM_SEQ_CMD_RSP_R1;
+ if ((cmd_opcode == MMC_READ_SINGLE_BLOCK ||
+ cmd_opcode == MMC_READ_MULTIPLE_BLOCK) &&
+ blksz == 512)
+ ctxt.seq_arg = mrq->cmd->arg;
+ else
+ ctxt.seq_arg = 0;
+ ctxt.seq_size = 512;
+ ctxt.seq_seccnt = 1;
+ ctxt.seq_addr =
+ sg_dma_address(&host->bounce_sg);
+ }
+
+ for (i = 0; i < 2; i++) {
+ ctxt_cnt++;
+ tmio_mmc_set_seq_context(host, ctxt_cnt, &ctxt);
+ }
+ }
+ }
+
+ return ctxt_cnt;
+}
+
+void tmio_mmc_start_sequencer(struct tmio_mmc_host *host)
+{
+ struct mmc_card *card = host->mmc->card;
+ struct scatterlist *sg = host->sg_ptr, *sg_tmp;
+ struct mmc_host *mmc = host->mmc;
+ struct mmc_request *mrq = host->mrq;
+ struct mmc_data *data = mrq->data;
+ enum dma_data_direction dir;
+ int ret, i, ctxt_num;
+ u64 val;
+ bool ipmmu_on = false;
+
+ /* This DMAC cannot handle if sg_len larger than max_segs */
+ if (mmc->max_segs == 1 || mmc->max_segs == 3)
+ WARN_ON(host->sg_len > mmc->max_segs);
+ else
+ ipmmu_on = true;
+
+ dev_dbg(&host->pdev->dev, "%s: %d, %x\n", __func__, host->sg_len,
+ data->flags);
+
+ if (!card && host->mrq->cmd->opcode == MMC_SEND_TUNING_BLOCK) {
+ /*
+ * workaround: if card is NULL,
+ * we can not decide a dummy read command to be added
+ * to the CMD19.
+ */
+ goto force_pio;
+ }
+
+ if (ipmmu_on) {
+ if (!IS_ALIGNED(sg->offset, 8) ||
+ ((sg_dma_address(sg) + data->blksz * data->blocks) >
+ GENMASK_ULL(32, 0))) {
+ dev_dbg(&host->pdev->dev, "%s: force pio\n", __func__);
+ goto force_pio;
+ }
+ /*
+ * workaround: if we use IPMMU, sometimes unhandled error
+ * happened
+ */
+ switch (host->mrq->cmd->opcode) {
+ case MMC_SEND_TUNING_BLOCK_HS200:
+ case MMC_SEND_TUNING_BLOCK:
+ goto force_pio;
+ default:
+ break;
+ }
+ } else {
+ for_each_sg(sg, sg_tmp, host->sg_len, i) {
+ /*
+ * This DMAC cannot handle if buffer is not 8-bytes
+ * alignment
+ */
+ if (!IS_ALIGNED(sg_tmp->offset, 8) ||
+ !IS_ALIGNED(sg_tmp->length, data->blksz) ||
+ ((sg_dma_address(sg_tmp) + sg_tmp->length) >
+ GENMASK_ULL(32, 0))) {
+ dev_dbg(&host->pdev->dev, "%s: force pio\n",
+ __func__);
+ goto force_pio;
+ }
+ }
+ }
+
+ if (host->data->host_cookie != COOKIE_PRE_MAPPED) {
+ if (data->flags & MMC_DATA_READ)
+ dir = DMA_FROM_DEVICE;
+ else
+ dir = DMA_TO_DEVICE;
+
+ ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, dir);
+ if (ret <= 0) {
+ dev_err(&host->pdev->dev,
+ "%s: dma_map_sg failed\n", __func__);
+ goto force_pio;
+ }
+ }
+
+ if (data->flags & MMC_DATA_READ && !host->bounce_sg_mapped) {
+ if (dma_map_sg(&host->pdev->dev, &host->bounce_sg, 1,
+ DMA_FROM_DEVICE) <= 0) {
+ dev_err(&host->pdev->dev, "%s: bounce_sg map failed\n",
+ __func__);
+ goto unmap_sg;
+ }
+ host->bounce_sg_mapped = true;
+ }
+
+ tmio_mmc_enable_dma(host, true);
+ /* set context */
+ ctxt_num = tmio_mmc_set_seq_table(host, mrq, sg, ipmmu_on);
+ if (ctxt_num < 0)
+ goto unmap_sg;
+ /* set dma mode */
+ tmio_dm_write(host, DM_CM_DTRAN_MODE,
+ DTRAN_MODE_BUS_WID_TH);
+ /* enable SEQEND irq */
+ tmio_dm_write(host, DM_CM_INFO1_MASK,
+ GENMASK_ULL(32, 0) & ~DM_CM_INFO1_SEQEND);
+
+ if (ctxt_num < 4) {
+ /* issue table0 commands */
+ val = DM_CM_SEQ_CTRL_SEQ_TYPE_SD |
+ DM_CM_SEQ_CTRL_START_NUM(0) |
+ DM_CM_SEQ_CTRL_END_NUM(ctxt_num) |
+ DM_CM_SEQ_CTRL_SEQ_START;
+ tmio_dm_write(host, DM_CM_SEQ_CTRL, val);
+ } else {
+ /* issue table0 commands */
+ val = DM_CM_SEQ_CTRL_SEQ_TYPE_SD |
+ DM_CM_SEQ_CTRL_T_NUM |
+ DM_CM_SEQ_CTRL_START_NUM(0) |
+ DM_CM_SEQ_CTRL_END_NUM(3) |
+ DM_CM_SEQ_CTRL_SEQ_START;
+ tmio_dm_write(host, DM_CM_SEQ_CTRL, val);
+ /* issue table1 commands */
+ val = DM_CM_SEQ_CTRL_SEQ_TABLE |
+ DM_CM_SEQ_CTRL_SEQ_TYPE_SD |
+ DM_CM_SEQ_CTRL_T_NUM |
+ DM_CM_SEQ_CTRL_START_NUM(0) |
+ DM_CM_SEQ_CTRL_END_NUM(ctxt_num - 4) |
+ DM_CM_SEQ_CTRL_SEQ_START;
+ tmio_dm_write(host, DM_CM_SEQ_CTRL, val);
+ }
+
+ return;
+
+unmap_sg:
+ if (host->data->host_cookie != COOKIE_PRE_MAPPED) {
+ if (data->flags & MMC_DATA_READ)
+ dir = DMA_FROM_DEVICE;
+ else
+ dir = DMA_TO_DEVICE;
+ dma_unmap_sg(&host->pdev->dev, sg, host->sg_len, dir);
+ }
+ if (host->bounce_sg_mapped) {
+ dma_unmap_sg(&host->pdev->dev, &host->bounce_sg, 1,
+ DMA_FROM_DEVICE);
+ host->bounce_sg_mapped = false;
+ }
+force_pio:
+ host->force_pio = true;
+ tmio_mmc_enable_dma(host, false);
+
+ return; /* return for PIO */
+}
+
bool __tmio_mmc_dma_irq(struct tmio_mmc_host *host)
{
unsigned int ireg, status;
@@ -207,8 +641,8 @@ bool __tmio_mmc_dma_irq(struct tmio_mmc_host *host)
status = tmio_dm_read(host, DM_CM_INFO1);
ireg = status & ~host->dma_irq_mask;
- if (ireg & INFO1_DTRANEND0) {
- tmio_dm_write(host, DM_CM_INFO1, ireg & ~INFO1_DTRANEND0);
+ if (ireg & DM_CM_INFO1_DTRAEND0) {
+ tmio_dm_write(host, DM_CM_INFO1, ireg & ~DM_CM_INFO1_DTRAEND0);
tmio_set_transtate(host, TMIO_TRANSTATE_DEND);
return true;
}
@@ -229,14 +663,26 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host,
host->chan_rx = host->chan_tx = (void *)0xdeadbeaf;
if (soc_device_match(dma_quirks_match))
- host->dma_tranend1 = INFO1_DTRANEND1_BIT17;
+ host->dma_tranend1 = DM_CM_INFO1_DTRAEND1_BIT17;
else /* ES 2.0 */
- host->dma_tranend1 = INFO1_DTRANEND1_BIT20;
+ host->dma_tranend1 = DM_CM_INFO1_DTRAEND1_BIT20;
tasklet_init(&host->dma_complete, tmio_mmc_complete_tasklet_fn,
(unsigned long)host);
tasklet_init(&host->dma_issue, tmio_mmc_issue_tasklet_fn,
(unsigned long)host);
+ tasklet_init(&host->seq_complete, tmio_mmc_seq_complete_tasklet_fn,
+ (unsigned long)host);
+ /* alloc bounce_buf for dummy read */
+ host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
+ if (!host->bounce_buf) {
+ host->chan_rx = NULL;
+ host->chan_tx = NULL;
+ return;
+ }
+ /* setup bounce_sg for dummy read */
+ sg_init_one(&host->bounce_sg, host->bounce_buf, 1024);
+ host->bounce_sg_mapped = false;
#endif
}
@@ -244,4 +690,15 @@ void tmio_mmc_release_dma(struct tmio_mmc_host *host)
{
/* Each value is set to zero to assume "disabling" each DMA */
host->chan_rx = host->chan_tx = NULL;
+
+ /* free bounce_buf for dummy read */
+ if (host->bounce_buf) {
+ if (host->bounce_sg_mapped) {
+ dma_unmap_sg(&host->pdev->dev, &host->bounce_sg, 1,
+ DMA_FROM_DEVICE);
+ host->bounce_sg_mapped = false;
+ }
+ free_pages((unsigned long)host->bounce_buf, 0);
+ host->bounce_buf = NULL;
+ }
}
diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
index 57a954a..272f993 100644
--- a/drivers/mmc/host/tmio_mmc_pio.c
+++ b/drivers/mmc/host/tmio_mmc_pio.c
@@ -31,6 +31,7 @@
#include <linux/delay.h>
#include <linux/device.h>
+#include <linux/dma-mapping.h>
#include <linux/highmem.h>
#include <linux/interrupt.h>
#include <linux/io.h>
@@ -167,12 +168,10 @@ static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
~TMIO_SDIO_STAT_IOIRQ;
- sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
} else if (!enable && host->sdio_irq_enabled) {
host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
- sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
host->sdio_irq_enabled = false;
pm_runtime_mark_last_busy(mmc_dev(mmc));
@@ -261,6 +260,12 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
msleep(10);
+
+ if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
+ sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
+ sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
+ }
+
}
static void tmio_mmc_reset_work(struct work_struct *work)
@@ -344,8 +349,8 @@ static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
tmio_mmc_abort_dma(host);
}
- if (host->check_scc_error)
- host->check_scc_error(host);
+ if (host->check_scc_error && host->check_scc_error(host))
+ mrq->cmd->error = -EILSEQ;
if (cmd == mrq->sbc) {
/* finish SET_BLOCK_COUNT request */
@@ -391,8 +396,17 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command
}
} else if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
+ bool busy = false;
- if (status & TMIO_STAT_CMD_BUSY) {
+ if (host->pdata->flags &
+ (TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_SCLKDIVEN)) {
+ if (!(status & TMIO_STAT_SCLKDIVEN))
+ busy = true;
+ } else {
+ if (status & TMIO_STAT_CMD_BUSY)
+ busy = true;
+ }
+ if (busy) {
sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
return 0;
}
@@ -587,6 +601,74 @@ void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
schedule_work(&host->done);
}
+static void tmio_mmc_seq_irq(struct tmio_mmc_host *host, unsigned int stat,
+ u32 seq_stat1, u32 seq_stat2)
+{
+ struct mmc_data *data;
+ struct mmc_command *cmd, *sbc;
+
+ spin_lock(&host->lock);
+ data = host->data;
+ cmd = host->mrq->cmd;
+ sbc = host->mrq->sbc;
+
+ if (seq_stat2) {
+ pr_debug("sequencer error, CMD%d SD_INFO2=0x%x\n",
+ cmd->opcode, stat >> 16);
+ if (stat & TMIO_STAT_CMDTIMEOUT) {
+ cmd->error = -ETIMEDOUT;
+ if (sbc)
+ sbc->error = -ETIMEDOUT;
+ } else if ((stat & TMIO_STAT_CRCFAIL &&
+ cmd->flags & MMC_RSP_CRC) ||
+ stat & TMIO_STAT_STOPBIT_ERR ||
+ stat & TMIO_STAT_CMD_IDX_ERR) {
+ cmd->error = -EILSEQ;
+ if (sbc)
+ sbc->error = -EILSEQ;
+ }
+
+ if (stat & TMIO_STAT_DATATIMEOUT)
+ data->error = -ETIMEDOUT;
+ else if (stat & TMIO_STAT_CRCFAIL ||
+ stat & TMIO_STAT_STOPBIT_ERR ||
+ stat & TMIO_STAT_TXUNDERRUN)
+ data->error = -EILSEQ;
+ }
+
+ if (host->chan_tx && (data->flags & MMC_DATA_WRITE)) {
+ u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
+ bool done = false;
+
+ /*
+ * Has all data been written out yet? Testing on SuperH showed,
+ * that in most cases the first interrupt comes already with the
+ * BUSY status bit clear, but on some operations, like mount or
+ * in the beginning of a write / sync / umount, there is one
+ * DATAEND interrupt with the BUSY bit set, in this cases
+ * waiting for one more interrupt fixes the problem.
+ */
+ if (host->pdata->flags &
+ (TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_SCLKDIVEN)) {
+ if (status & TMIO_STAT_SCLKDIVEN)
+ done = true;
+ } else {
+ if (!(status & TMIO_STAT_CMD_BUSY))
+ done = true;
+ }
+
+ if (!done)
+ goto out;
+ }
+
+ /* mask sequencer irq */
+ tmio_dm_write(host, DM_CM_INFO1_MASK, 0xffffffff);
+ tasklet_schedule(&host->seq_complete);
+
+out:
+ spin_unlock(&host->lock);
+}
+
static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
{
struct mmc_data *data;
@@ -688,9 +770,11 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
cmd->error = -ETIMEDOUT;
else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
stat & TMIO_STAT_STOPBIT_ERR ||
- stat & TMIO_STAT_CMD_IDX_ERR)
+ stat & TMIO_STAT_CMD_IDX_ERR) {
cmd->error = -EILSEQ;
-
+ if (stat & TMIO_STAT_DATAEND)
+ tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
+ }
/* If there is data to handle we enable data IRQs here, and
* we will ultimatley finish the request in the data_end handler.
* If theres no data or we encountered an error, finish now.
@@ -737,6 +821,25 @@ static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
int ireg, int status)
{
+ u64 dm_cm_info1;
+
+ if (host->sequencer_enabled) {
+ dm_cm_info1 = tmio_dm_read(host, DM_CM_INFO1);
+ if (dm_cm_info1 & DM_CM_INFO1_SEQEND) {
+ u64 dm_cm_info2;
+
+ dm_cm_info2 = tmio_dm_read(host, DM_CM_INFO2);
+ tmio_dm_write(host, DM_CM_INFO1, 0x0);
+ tmio_dm_write(host, DM_CM_INFO2, 0x0);
+ tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ &
+ ~(TMIO_STAT_CARD_REMOVE |
+ TMIO_STAT_CARD_INSERT));
+ tmio_mmc_seq_irq(host, status,
+ dm_cm_info1, dm_cm_info2);
+ return true;
+ }
+ }
+
/* Command completion */
if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
tmio_mmc_ack_mmc_irqs(host,
@@ -775,7 +878,7 @@ static void tmio_mmc_sdio_irq(int irq, void *devid)
return;
status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
- ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
+ ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
sdio_status = status & ~TMIO_SDIO_MASK_ALL;
if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
@@ -814,6 +917,58 @@ irqreturn_t tmio_mmc_irq(int irq, void *devid)
}
EXPORT_SYMBOL(tmio_mmc_irq);
+static int tmio_mmc_start_seq(struct tmio_mmc_host *host,
+ struct mmc_request *mrq)
+{
+ struct tmio_mmc_data *pdata = host->pdata;
+ struct mmc_data *data = mrq->data;
+
+ pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
+ data->blksz, data->blocks);
+
+ if (!host->chan_rx || !host->chan_tx) {
+ host->force_pio = true;
+ return 0;
+ }
+
+ /* Some hardware cannot perform 2 byte requests in 4 bit mode */
+ if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
+ int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
+
+ if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
+ pr_err("%s: %d byte block unsupported in 4 bit mode\n",
+ mmc_hostname(host->mmc), data->blksz);
+ return -EINVAL;
+ }
+ }
+
+ tmio_mmc_init_sg(host, data);
+ host->cmd = mrq->cmd;
+ host->data = data;
+
+ sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
+
+ tmio_mmc_start_sequencer(host);
+
+ if (host->force_pio) {
+ host->cmd = NULL;
+ host->data = NULL;
+ }
+
+ return 0;
+}
+
+static void tmio_mmc_set_blklen_and_blkcnt(struct tmio_mmc_host *host,
+ struct mmc_data *data)
+{
+ host->force_pio = true;
+ tmio_mmc_init_sg(host, data);
+ host->data = data;
+
+ sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
+ sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
+}
+
static int tmio_mmc_start_data(struct tmio_mmc_host *host,
struct mmc_data *data)
{
@@ -846,6 +1001,47 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host,
return 0;
}
+static void tmio_mmc_post_req(struct mmc_host *mmc, struct mmc_request *req,
+ int err)
+{
+ struct tmio_mmc_host *host = mmc_priv(mmc);
+ struct mmc_data *data = req->data;
+ enum dma_data_direction dir;
+
+ if (data && data->host_cookie == COOKIE_PRE_MAPPED) {
+ if (req->data->flags & MMC_DATA_READ)
+ dir = DMA_FROM_DEVICE;
+ else
+ dir = DMA_TO_DEVICE;
+
+ dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
+ data->host_cookie = COOKIE_UNMAPPED;
+ }
+}
+
+static void tmio_mmc_pre_req(struct mmc_host *mmc, struct mmc_request *req,
+ bool is_first_req)
+{
+ struct tmio_mmc_host *host = mmc_priv(mmc);
+ struct mmc_data *data = req->data;
+ enum dma_data_direction dir;
+ int ret;
+
+ if (data && data->host_cookie == COOKIE_UNMAPPED) {
+ if (req->data->flags & MMC_DATA_READ)
+ dir = DMA_FROM_DEVICE;
+ else
+ dir = DMA_TO_DEVICE;
+
+ ret = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
+ if (ret <= 0)
+ dev_err(&host->pdev->dev,
+ "%s: dma_map_sg failed\n", __func__);
+ else
+ data->host_cookie = COOKIE_PRE_MAPPED;
+ }
+}
+
static void tmio_mmc_hw_reset(struct mmc_host *mmc)
{
struct tmio_mmc_host *host = mmc_priv(mmc);
@@ -914,7 +1110,6 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
struct tmio_mmc_host *host = mmc_priv(mmc);
unsigned long flags;
int ret;
- u32 opcode;
spin_lock_irqsave(&host->lock, flags);
@@ -934,6 +1129,24 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
spin_unlock_irqrestore(&host->lock, flags);
+ if (host->sequencer_enabled) {
+ if (mrq->data) {
+ /* Start SEQ */
+ ret = tmio_mmc_start_seq(host, mrq);
+ if (ret)
+ goto fail;
+ else if (!host->force_pio) {
+ /*
+ * Successed to start SEQ
+ * Wait SEQ interrupt
+ */
+ schedule_delayed_work(
+ &host->delayed_reset_work,
+ msecs_to_jiffies(CMDREQ_TIMEOUT));
+ return;
+ }
+ }
+ }
if (mrq->sbc) {
init_completion(&host->completion);
ret = tmio_mmc_start_command(host, mrq->sbc);
@@ -949,25 +1162,41 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
}
host->last_req_ts = jiffies;
host->mrq = mrq;
- if (((host->check_scc_error && host->check_scc_error(host)) ||
- (mrq->cmd->error == -EILSEQ)) && host->mmc->card) {
- if (mmc_card_mmc(host->mmc->card))
- opcode = MMC_SEND_TUNING_BLOCK_HS200;
- else
- opcode = MMC_SEND_TUNING_BLOCK;
- /* Start retuning */
- ret = tmio_mmc_execute_tuning(mmc, opcode);
- if (ret)
- goto fail;
- /* Restore request */
- host->mrq = mrq;
+ if (mrq->cmd->error && host->mmc->card) {
+ ret = mrq->cmd->error;
+ goto fail;
+ }
+ if (host->check_scc_error && host->check_scc_error(host)) {
+ ret = -EILSEQ;
+ goto fail;
}
}
if (mrq->data) {
- ret = tmio_mmc_start_data(host, mrq->data);
- if (ret)
- goto fail;
+ if (host->sequencer_enabled) {
+ /*
+ * Failed to start SEQ
+ * Set blklen and blkcnt to transfer in PIO mode
+ */
+ tmio_mmc_set_blklen_and_blkcnt(host, mrq->data);
+ } else {
+ ret = tmio_mmc_start_data(host, mrq->data);
+ if (ret)
+ goto fail;
+ }
+ if (host->force_pio &&
+ mrq->data->host_cookie == COOKIE_PRE_MAPPED) {
+ /* PIO mode, unmap pre_dma_mapped sg */
+ enum dma_data_direction dir;
+
+ if (mrq->data->flags & MMC_DATA_READ)
+ dir = DMA_FROM_DEVICE;
+ else
+ dir = DMA_TO_DEVICE;
+ dma_unmap_sg(&host->pdev->dev, mrq->data->sg,
+ mrq->data->sg_len, dir);
+ mrq->data->host_cookie = COOKIE_UNMAPPED;
+ }
}
ret = tmio_mmc_start_command(host, mrq->cmd);
@@ -1160,6 +1389,8 @@ static int tmio_multi_io_quirk(struct mmc_card *card,
}
static struct mmc_host_ops tmio_mmc_ops = {
+ .post_req = tmio_mmc_post_req,
+ .pre_req = tmio_mmc_pre_req,
.request = tmio_mmc_request,
.set_ios = tmio_mmc_set_ios,
.get_ro = tmio_mmc_get_ro,
@@ -1315,10 +1546,15 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
if (_host->native_hotplug)
pm_runtime_get_noresume(&pdev->dev);
+ _host->sdio_irq_enabled = false;
+ if (pdata->flags & TMIO_MMC_SDIO_IRQ)
+ _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
+
tmio_mmc_clk_stop(_host);
tmio_mmc_reset(_host);
tmio_mmc_reset_dma(_host);
+ sd_ctrl_write32_as_16_and_16(_host, CTL_IRQ_MASK, TMIO_MASK_INIT);
_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
@@ -1332,13 +1568,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
_host->sdcard_irq_mask &= ~irq_mask;
- _host->sdio_irq_enabled = false;
- if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
- _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
- sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
- sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
- }
-
spin_lock_init(&_host->lock);
mutex_init(&_host->ios_lock);
@@ -1387,6 +1616,9 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host)
struct platform_device *pdev = host->pdev;
struct mmc_host *mmc = host->mmc;
+ if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
+ sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
+
if (!host->native_hotplug)
pm_runtime_get_sync(&pdev->dev);
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fe00f91..a6b8209 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -154,6 +154,22 @@
help
Support for USB 2.0 PHY found on Renesas R-Car generation 3 SoCs.
+config PHY_RCAR_GEN3_USB2_CLKSEL
+ tristate "Renesas R-Car generation 3 USB 2.0 clock selector PHY driver"
+ depends on ARCH_RENESAS
+ select GENERIC_PHY
+ help
+ Support for USB 2.0 clock selector PHY found on Renesas R-Car
+ generation 3 SoCs.
+
+config PHY_RCAR_GEN3_USB3
+ tristate "Renesas R-Car generation 3 USB 3.0 PHY driver"
+ depends on ARCH_RENESAS
+ depends on EXTCON
+ select GENERIC_PHY
+ help
+ Support for USB 3.0 PHY found on Renesas R-Car generation 3 SoCs.
+
config OMAP_CONTROL_PHY
tristate "OMAP CONTROL PHY Driver"
depends on ARCH_OMAP2PLUS || COMPILE_TEST
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a534cf5..da7680f 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -21,6 +21,8 @@
obj-$(CONFIG_PHY_MIPHY365X) += phy-miphy365x.o
obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
obj-$(CONFIG_PHY_RCAR_GEN3_USB2) += phy-rcar-gen3-usb2.o
+obj-$(CONFIG_PHY_RCAR_GEN3_USB2_CLKSEL) += phy-rcar-gen3-usb2-clksel.o
+obj-$(CONFIG_PHY_RCAR_GEN3_USB3) += phy-rcar-gen3-usb3.o
obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o
obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
diff --git a/drivers/phy/phy-rcar-gen3-usb2-clksel.c b/drivers/phy/phy-rcar-gen3-usb2-clksel.c
new file mode 100644
index 0000000..c928246
--- /dev/null
+++ b/drivers/phy/phy-rcar-gen3-usb2-clksel.c
@@ -0,0 +1,129 @@
+/*
+ * Renesas R-Car Gen3 for USB2.0 clock selector PHY driver
+ *
+ * Copyright (C) 2017 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#define USB_CLOCK_TYPE 0x00
+#define USB_CLOCK_TYPE_EXTAL_ONLY 0x0801
+
+struct rcar_gen3_usb2_clksel {
+ void __iomem *base;
+ struct phy *phy;
+ bool usb_extal_only;
+};
+
+static int rcar_gen3_usb2_clksel_init(struct phy *p)
+{
+ struct rcar_gen3_usb2_clksel *r = phy_get_drvdata(p);
+ u16 val = readw(r->base + USB_CLOCK_TYPE);
+
+ dev_vdbg(&r->phy->dev, "%s: %d, %04x\n", __func__, r->usb_extal_only,
+ val);
+
+ if (r->usb_extal_only && val != USB_CLOCK_TYPE_EXTAL_ONLY)
+ writew(USB_CLOCK_TYPE_EXTAL_ONLY, r->base + USB_CLOCK_TYPE);
+
+ return 0;
+}
+
+static const struct phy_ops rcar_gen3_usb2_clksel_ops = {
+ .init = rcar_gen3_usb2_clksel_init,
+ .owner = THIS_MODULE,
+};
+
+static const struct of_device_id rcar_gen3_usb2_clksel_match_table[] = {
+ { .compatible = "renesas,usb2-clksel-phy-r8a7795" },
+ { .compatible = "renesas,usb2-clksel-phy-r8a7796" },
+ { .compatible = "renesas,rcar-gen3-usb2-clksel-phy" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, rcar_gen3_usb2_clksel_match_table);
+
+static int rcar_gen3_usb2_clksel_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct rcar_gen3_usb2_clksel *r;
+ struct phy_provider *provider;
+ struct resource *res;
+ int ret = 0;
+
+ if (!dev->of_node) {
+ dev_err(dev, "This driver needs device tree\n");
+ return -EINVAL;
+ }
+
+ r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
+ if (!r)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ r->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(r->base))
+ return PTR_ERR(r->base);
+
+ /*
+ * devm_phy_create() will call pm_runtime_enable(&phy->dev);
+ * And then, phy-core will manage runtime pm for this device.
+ */
+ pm_runtime_enable(dev);
+
+ r->phy = devm_phy_create(dev, NULL, &rcar_gen3_usb2_clksel_ops);
+ if (IS_ERR(r->phy)) {
+ dev_err(dev, "Failed to create USB 2.0 clock selector PHY\n");
+ ret = PTR_ERR(r->phy);
+ goto error;
+ }
+
+ r->usb_extal_only = of_property_read_bool(dev->of_node,
+ "renesas,usb-extal-only");
+
+ platform_set_drvdata(pdev, r);
+ phy_set_drvdata(r->phy, r);
+
+ provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+ if (IS_ERR(provider)) {
+ dev_err(dev, "Failed to register PHY provider\n");
+ ret = PTR_ERR(provider);
+ goto error;
+ }
+
+ return 0;
+
+error:
+ pm_runtime_disable(dev);
+
+ return ret;
+}
+
+static int rcar_gen3_usb2_clksel_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+};
+
+static struct platform_driver rcar_gen3_usb2_clksel_driver = {
+ .driver = {
+ .name = "phy_rcar_gen3_usb2_clksel",
+ .of_match_table = rcar_gen3_usb2_clksel_match_table,
+ },
+ .probe = rcar_gen3_usb2_clksel_probe,
+ .remove = rcar_gen3_usb2_clksel_remove,
+};
+module_platform_driver(rcar_gen3_usb2_clksel_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 clock selector PHY");
+MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
diff --git a/drivers/phy/phy-rcar-gen3-usb2.c b/drivers/phy/phy-rcar-gen3-usb2.c
index f106dee..34aaf7a 100644
--- a/drivers/phy/phy-rcar-gen3-usb2.c
+++ b/drivers/phy/phy-rcar-gen3-usb2.c
@@ -396,7 +396,7 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
struct rcar_gen3_chan *channel;
struct phy_provider *provider;
struct resource *res;
- int irq;
+ int irq, ret = 0;
if (!dev->of_node) {
dev_err(dev, "This driver needs device tree\n");
@@ -412,7 +412,6 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
if (IS_ERR(channel->base))
return PTR_ERR(channel->base);
- pm_runtime_enable(dev);
/* call request_irq for OTG */
irq = platform_get_irq(pdev, 0);
if (irq >= 0) {
@@ -436,17 +435,24 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
}
}
- /* devm_phy_create() will call pm_runtime_enable(dev); */
+ /*
+ * devm_phy_create() will call pm_runtime_enable(&phy->dev);
+ * And then, phy-core will manage runtime pm for this device.
+ */
+ pm_runtime_enable(dev);
channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
if (IS_ERR(channel->phy)) {
dev_err(dev, "Failed to create USB2 PHY\n");
- return PTR_ERR(channel->phy);
+ ret = PTR_ERR(channel->phy);
+ goto error;
}
channel->vbus = devm_regulator_get_optional(dev, "vbus");
if (IS_ERR(channel->vbus)) {
- if (PTR_ERR(channel->vbus) == -EPROBE_DEFER)
- return PTR_ERR(channel->vbus);
+ if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
+ ret = PTR_ERR(channel->vbus);
+ goto error;
+ }
channel->vbus = NULL;
}
@@ -456,15 +462,22 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
if (IS_ERR(provider)) {
dev_err(dev, "Failed to register PHY provider\n");
+ ret = PTR_ERR(provider);
+ goto error;
} else if (channel->has_otg) {
int ret;
ret = device_create_file(dev, &dev_attr_role);
if (ret < 0)
- return ret;
+ goto error;
}
- return PTR_ERR_OR_ZERO(provider);
+ return 0;
+
+error:
+ pm_runtime_disable(dev);
+
+ return ret;
}
static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
@@ -475,6 +488,7 @@ static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
device_remove_file(&pdev->dev, &dev_attr_role);
pm_runtime_disable(&pdev->dev);
+
return 0;
}
diff --git a/drivers/phy/phy-rcar-gen3-usb3.c b/drivers/phy/phy-rcar-gen3-usb3.c
new file mode 100644
index 0000000..a4d0c12
--- /dev/null
+++ b/drivers/phy/phy-rcar-gen3-usb3.c
@@ -0,0 +1,199 @@
+/*
+ * Renesas R-Car Gen3 for USB3.0 PHY driver
+ *
+ * Copyright (C) 2017 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+
+#define USB30_CLKSET0 0x034
+#define USB30_CLKSET1 0x036
+#define USB30_SSC_SET 0x038
+
+#define USB30_PHY_ENABLE 0x060
+
+#define USB30_VBUS_EN 0x064
+
+#define CLKSET0_RESERVED 0x05c0
+#define CLKSET0_USB_EXTAL (CLKSET0_RESERVED | 0x0002)
+
+#define CLKSET1_PLL_MULTI_SHIFT 6
+#define CLKSET1_PLL_MULTI_USB_EXTAL (0x64 << CLKSET1_PLL_MULTI_SHIFT)
+#define CLKSET1_PHYRESET BIT(4)
+#define CLKSET1_REF_CLKDIV_USB_EXTAL BIT(3)
+#define CLKSET1_RESERVED_1 BIT(1)
+#define CLKSET1_REF_CLK_SEL_USB_EXTAL 0
+#define CLKSET1_USB_EXTAL (CLKSET1_PLL_MULTI_USB_EXTAL | \
+ CLKSET1_REF_CLKDIV_USB_EXTAL | \
+ CLKSET1_RESERVED_1 | \
+ CLKSET1_REF_CLK_SEL_USB_EXTAL)
+
+#define SSC_SET_SSC_EN BIT(12)
+#define SSC_SET_RANGE_SHIFT 9
+#define SSC_SET_RANGE_4980 (0x0 << SSC_SET_RANGE_SHIFT)
+#define SSC_SET_RANGE_4492 (0x1 << SSC_SET_RANGE_SHIFT)
+#define SSC_SET_RANGE_4003 (0x2 << SSC_SET_RANGE_SHIFT)
+
+#define PHY_RESET_EN BIT(4)
+
+#define VBUS_EN_VBUS_EN BIT(1)
+
+struct rcar_gen3_usb3 {
+ void __iomem *base;
+ struct phy *phy;
+ u32 ssc_range;
+ bool usb_extal;
+};
+
+static void rcar_gen3_phy_usb3_enable_ssc(struct rcar_gen3_usb3 *r)
+{
+ u16 val = SSC_SET_SSC_EN;
+
+ switch (r->ssc_range) {
+ case 4980:
+ val |= SSC_SET_RANGE_4980;
+ break;
+ case 4492:
+ val |= SSC_SET_RANGE_4492;
+ break;
+ case 4003:
+ val |= SSC_SET_RANGE_4003;
+ break;
+ default:
+ dev_err(&r->phy->dev, "%s: unsupported range (%x)\n", __func__,
+ r->ssc_range);
+ return;
+ }
+
+ writew(val, r->base + USB30_SSC_SET);
+}
+
+static void rcar_gen3_phy_usb3_select_usb_extal(struct rcar_gen3_usb3 *r)
+{
+ writew(CLKSET0_USB_EXTAL, r->base + USB30_CLKSET0);
+ writew(PHY_RESET_EN, r->base + USB30_PHY_ENABLE);
+ writew(CLKSET1_USB_EXTAL | CLKSET1_PHYRESET, r->base + USB30_CLKSET1);
+ usleep_range(10, 20);
+ writew(CLKSET1_USB_EXTAL, r->base + USB30_CLKSET1);
+}
+
+static int rcar_gen3_phy_usb3_init(struct phy *p)
+{
+ struct rcar_gen3_usb3 *r = phy_get_drvdata(p);
+
+ dev_vdbg(&r->phy->dev, "%s: enter (%d, %d)\n", __func__, r->usb_extal,
+ r->ssc_range);
+
+ if (r->usb_extal)
+ rcar_gen3_phy_usb3_select_usb_extal(r);
+ if (r->ssc_range)
+ rcar_gen3_phy_usb3_enable_ssc(r);
+
+ /* Enables VBUS detection anyway */
+ writew(VBUS_EN_VBUS_EN, r->base + USB30_VBUS_EN);
+
+ return 0;
+}
+
+static const struct phy_ops rcar_gen3_phy_usb3_ops = {
+ .init = rcar_gen3_phy_usb3_init,
+ .owner = THIS_MODULE,
+};
+
+static const struct of_device_id rcar_gen3_phy_usb3_match_table[] = {
+ { .compatible = "renesas,usb3-phy-r8a7795" },
+ { .compatible = "renesas,usb3-phy-r8a7796" },
+ { .compatible = "renesas,rcar-gen3-usb3-phy" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb3_match_table);
+
+static int rcar_gen3_phy_usb3_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct rcar_gen3_usb3 *r;
+ struct phy_provider *provider;
+ struct resource *res;
+ int ret = 0;
+
+ if (!dev->of_node) {
+ dev_err(dev, "This driver needs device tree\n");
+ return -EINVAL;
+ }
+
+ r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
+ if (!r)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ r->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(r->base))
+ return PTR_ERR(r->base);
+
+ /*
+ * devm_phy_create() will call pm_runtime_enable(&phy->dev);
+ * And then, phy-core will manage runtime pm for this device.
+ */
+ pm_runtime_enable(dev);
+
+ r->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb3_ops);
+ if (IS_ERR(r->phy)) {
+ dev_err(dev, "Failed to create USB3 PHY\n");
+ ret = PTR_ERR(r->phy);
+ goto error;
+ }
+
+ if (of_property_read_u32(dev->of_node, "renesas,ssc-range",
+ &r->ssc_range) < 0)
+ r->ssc_range = 0;
+
+ r->usb_extal = of_property_read_bool(dev->of_node,
+ "renesas,usb-extal");
+
+ platform_set_drvdata(pdev, r);
+ phy_set_drvdata(r->phy, r);
+
+ provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+ if (IS_ERR(provider)) {
+ dev_err(dev, "Failed to register PHY provider\n");
+ ret = PTR_ERR(provider);
+ goto error;
+ }
+
+ return 0;
+
+error:
+ pm_runtime_disable(dev);
+
+ return ret;
+}
+
+static int rcar_gen3_phy_usb3_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+};
+
+static struct platform_driver rcar_gen3_phy_usb3_driver = {
+ .driver = {
+ .name = "phy_rcar_gen3_usb3",
+ .of_match_table = rcar_gen3_phy_usb3_match_table,
+ },
+ .probe = rcar_gen3_phy_usb3_probe,
+ .remove = rcar_gen3_phy_usb3_remove,
+};
+module_platform_driver(rcar_gen3_phy_usb3_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 3.0 PHY");
+MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 6399eb1..7ea6c8e 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -25,92 +25,9 @@
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <linux/soc/renesas/s2ram_ddr_backup.h>
#include "core.h"
-#ifdef CONFIG_RCAR_DDR_BACKUP
-static struct hw_register pfc_ip_regs[] = {
- {"PMMR", 0x0000, 32, 0},
- {"GPSR0", 0x0100, 32, 0},
- {"GPSR1", 0x0104, 32, 0},
- {"GPSR2", 0x0108, 32, 0},
- {"GPSR3", 0x010C, 32, 0},
- {"GPSR4", 0x0110, 32, 0},
- {"GPSR5", 0x0114, 32, 0},
- {"GPSR6", 0x0118, 32, 0},
- {"GPSR7", 0x011C, 32, 0},
- {"IPSR0", 0x0200, 32, 0},
- {"IPSR1", 0x0204, 32, 0},
- {"IPSR2", 0x0208, 32, 0},
- {"IPSR3", 0x020C, 32, 0},
- {"IPSR4", 0x0210, 32, 0},
- {"IPSR5", 0x0214, 32, 0},
- {"IPSR6", 0x0218, 32, 0},
- {"IPSR7", 0x021C, 32, 0},
- {"IPSR8", 0x0220, 32, 0},
- {"IPSR9", 0x0224, 32, 0},
- {"IPSR10", 0x0228, 32, 0},
- {"IPSR11", 0x022C, 32, 0},
- {"IPSR12", 0x0230, 32, 0},
- {"IPSR13", 0x0234, 32, 0},
- {"IPSR14", 0x0238, 32, 0},
- {"IPSR15", 0x023C, 32, 0},
- {"IPSR16", 0x0240, 32, 0},
- {"IPSR17", 0x0244, 32, 0},
- {"DRVCTRL0", 0x0300, 32, 0},
- {"DRVCTRL1", 0x0304, 32, 0},
- {"DRVCTRL2", 0x0308, 32, 0},
- {"DRVCTRL3", 0x030C, 32, 0},
- {"DRVCTRL4", 0x0310, 32, 0},
- {"DRVCTRL5", 0x0314, 32, 0},
- {"DRVCTRL6", 0x0318, 32, 0},
- {"DRVCTRL7", 0x031C, 32, 0},
- {"DRVCTRL8", 0x0320, 32, 0},
- {"DRVCTRL9", 0x0324, 32, 0},
- {"DRVCTRL10", 0x0328, 32, 0},
- {"DRVCTRL11", 0x032C, 32, 0},
- {"DRVCTRL12", 0x0330, 32, 0},
- {"DRVCTRL13", 0x0334, 32, 0},
- {"DRVCTRL14", 0x0338, 32, 0},
- {"DRVCTRL15", 0x033C, 32, 0},
- {"DRVCTRL16", 0x0340, 32, 0},
- {"DRVCTRL17", 0x0344, 32, 0},
- {"DRVCTRL18", 0x0348, 32, 0},
- {"DRVCTRL19", 0x034C, 32, 0},
- {"DRVCTRL20", 0x0350, 32, 0},
- {"DRVCTRL21", 0x0354, 32, 0},
- {"DRVCTRL22", 0x0358, 32, 0},
- {"DRVCTRL23", 0x035C, 32, 0},
- {"DRVCTRL24", 0x0360, 32, 0},
- {"PCCTRL0", 0x0380, 32, 0},
- {"TDSELCTRL0", 0x03C0, 32, 0},
- {"PUEN0", 0x0400, 32, 0},
- {"PUEN1", 0x0404, 32, 0},
- {"PUEN2", 0x0408, 32, 0},
- {"PUEN3", 0x040C, 32, 0},
- {"PUEN4", 0x0410, 32, 0},
- {"PUEN5", 0x0414, 32, 0},
- {"PUEN6", 0x0418, 32, 0},
- {"PUD0", 0x0440, 32, 0},
- {"PUD1", 0x0444, 32, 0},
- {"PUD2", 0x0448, 32, 0},
- {"PUD3", 0x044C, 32, 0},
- {"PUD4", 0x0450, 32, 0},
- {"PUD5", 0x0454, 32, 0},
- {"PUD6", 0x0458, 32, 0},
- {"MOD_SEL0", 0x0500, 32, 0},
- {"MOD_SEL1", 0x0504, 32, 0},
- {"MOD_SEL2", 0x0508, 32, 0},
-};
-
-static struct rcar_ip pfc_ip = {
- .ip_name = "PFC",
- .reg_count = ARRAY_SIZE(pfc_ip_regs),
- .ip_reg = pfc_ip_regs,
-};
-#endif /* CONFIG_RCAR_DDR_BACKUP */
-
static int sh_pfc_map_resources(struct sh_pfc *pfc,
struct platform_device *pdev)
{
@@ -632,6 +549,91 @@ static const struct of_device_id sh_pfc_of_table[] = {
};
#endif
+#ifdef CONFIG_PM_SLEEP
+static int sh_pfc_suspend(struct device *dev)
+{
+ struct sh_pfc *pfc = dev_get_drvdata(dev);
+ unsigned int i;
+
+ i = 0;
+ while (pfc->info->cfg_regs[i].reg) {
+ pfc->sav_regs.cfg_regs[i].addr = pfc->info->cfg_regs[i].reg;
+ pfc->sav_regs.cfg_regs[i].val = sh_pfc_read_reg(pfc,
+ pfc->sav_regs.cfg_regs[i].addr, 32);
+ i++;
+ }
+
+ i = 0;
+ while (pfc->info->drive_regs[i].reg) {
+ pfc->sav_regs.drv_regs[i].addr = pfc->info->drive_regs[i].reg;
+ pfc->sav_regs.drv_regs[i].val = sh_pfc_read_reg(pfc,
+ pfc->sav_regs.drv_regs[i].addr, 32);
+ i++;
+ }
+
+ if (pfc->info->nr_bias_regs)
+ for (i = 0; i < pfc->info->nr_bias_regs; i++) {
+ pfc->sav_regs.puen_regs[i].addr = pfc->info->puen_base +
+ (0x4 * i);
+ pfc->sav_regs.puen_regs[i].val = sh_pfc_read_reg(pfc,
+ pfc->sav_regs.puen_regs[i].addr, 32);
+
+ pfc->sav_regs.pud_regs[i].addr = pfc->info->pud_base +
+ (0x4 * i);
+ pfc->sav_regs.pud_regs[i].val = sh_pfc_read_reg(pfc,
+ pfc->sav_regs.pud_regs[i].addr, 32);
+ }
+
+ if (pfc->info->pocctrl_reg) {
+ pfc->sav_regs.pocctrl_reg.addr = pfc->info->pocctrl_reg;
+ pfc->sav_regs.pocctrl_reg.val = sh_pfc_read_reg(pfc,
+ pfc->sav_regs.pocctrl_reg.addr, 32);
+ }
+
+ return 0;
+}
+
+static int sh_pfc_resume(struct device *dev)
+{
+ struct sh_pfc *pfc = dev_get_drvdata(dev);
+ unsigned int i;
+
+ i = 0;
+ while (pfc->info->cfg_regs[i].reg) {
+ sh_pfc_write_reg(pfc, pfc->sav_regs.cfg_regs[i].addr, 32,
+ pfc->sav_regs.cfg_regs[i].val);
+ i++;
+ }
+
+ i = 0;
+ while (pfc->info->drive_regs[i].reg) {
+ sh_pfc_write_reg(pfc, pfc->sav_regs.drv_regs[i].addr, 32,
+ pfc->sav_regs.drv_regs[i].val);
+ i++;
+ }
+
+ if (pfc->info->nr_bias_regs)
+ for (i = 0; i < pfc->info->nr_bias_regs; i++) {
+ sh_pfc_write_reg(pfc, pfc->sav_regs.puen_regs[i].addr,
+ 32, pfc->sav_regs.puen_regs[i].val);
+ sh_pfc_write_reg(pfc, pfc->sav_regs.pud_regs[i].addr,
+ 32, pfc->sav_regs.pud_regs[i].val);
+ }
+
+ if (pfc->info->pocctrl_reg)
+ sh_pfc_write_reg(pfc, pfc->sav_regs.pocctrl_reg.addr, 32,
+ pfc->sav_regs.pocctrl_reg.val);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(sh_pfc_pm_ops,
+ sh_pfc_suspend, sh_pfc_resume);
+#define DEV_PM_OPS (&sh_pfc_pm_ops)
+#else
+#define DEV_PM_OPS NULL
+#endif /* CONFIG_PM_SLEEP */
+
static int sh_pfc_probe(struct platform_device *pdev)
{
const struct platform_device_id *platid = platform_get_device_id(pdev);
@@ -749,48 +751,12 @@ static const struct platform_device_id sh_pfc_id_table[] = {
{ },
};
-#ifdef CONFIG_PM_SLEEP
-static int sh_pfc_suspend(struct device *dev)
-{
- int ret = 0;
-#ifdef CONFIG_RCAR_DDR_BACKUP
- struct sh_pfc *pfc = dev_get_drvdata(dev);
-
- pr_debug("%s\n", __func__);
-
- if (!pfc_ip.virt_addr)
- pfc_ip.virt_addr = pfc->windows->virt;
- if (ret)
- return ret;
-
- ret = rcar_handle_registers(&pfc_ip, DO_BACKUP);
-#endif
- return ret;
-}
-
-static int sh_pfc_resume(struct device *dev)
-{
- int ret = 0;
-#ifdef CONFIG_RCAR_DDR_BACKUP
- pr_debug("%s\n", __func__);
- ret = rcar_handle_registers(&pfc_ip, DO_RESTORE);
-#endif
- return ret;
-}
-
-static SIMPLE_DEV_PM_OPS(sh_pfc_pm_ops,
- sh_pfc_suspend, sh_pfc_resume);
-#define DEV_PM_OPS (&sh_pfc_pm_ops)
-#else
-#define DEV_PM_OPS NULL
-#endif /* CONFIG_PM_SLEEP */
-
static struct platform_driver sh_pfc_driver = {
.probe = sh_pfc_probe,
.id_table = sh_pfc_id_table,
.driver = {
.name = DRV_NAME,
- .pm = DEV_PM_OPS,
+ .pm = DEV_PM_OPS,
.of_match_table = of_match_ptr(sh_pfc_of_table),
},
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
index 378065d..ceb94f6 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
@@ -199,8 +199,8 @@
#define GPSR6_9 F_(SSI_WS4, IP14_27_24)
#define GPSR6_8 F_(SSI_SCK4, IP14_23_20)
#define GPSR6_7 F_(SSI_SDATA3, IP14_19_16)
-#define GPSR6_6 F_(SSI_WS34, IP14_15_12)
-#define GPSR6_5 F_(SSI_SCK34, IP14_11_8)
+#define GPSR6_6 F_(SSI_WS349, IP14_15_12)
+#define GPSR6_5 F_(SSI_SCK349, IP14_11_8)
#define GPSR6_4 F_(SSI_SDATA2_A, IP14_7_4)
#define GPSR6_3 F_(SSI_SDATA1_A, IP14_3_0)
#define GPSR6_2 F_(SSI_SDATA0, IP13_31_28)
@@ -335,8 +335,8 @@
#define IP13_31_28 FM(SSI_SDATA0) F_(0, 0) FM(MSIOF1_SS2_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_3_0 FM(SSI_SDATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_7_4 FM(SSI_SDATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(SSI_SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP14_11_8 FM(SSI_SCK34) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP14_15_12 FM(SSI_WS34) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP14_11_8 FM(SSI_SCK349) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP14_15_12 FM(SSI_WS349) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_19_16 FM(SSI_SDATA3) FM(HRTS2_N_A) FM(MSIOF1_TXD_A) F_(0, 0) F_(0, 0) FM(TS_SCK0_A) FM(STP_ISCLK_0_A) FM(RIF0_D1_A) FM(RIF2_D0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_23_20 FM(SSI_SCK4) FM(HRX2_A) FM(MSIOF1_SCK_A) F_(0, 0) F_(0, 0) FM(TS_SDAT0_A) FM(STP_ISD_0_A) FM(RIF0_CLK_A) FM(RIF2_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_27_24 FM(SSI_WS4) FM(HTX2_A) FM(MSIOF1_SYNC_A) F_(0, 0) F_(0, 0) FM(TS_SDEN0_A) FM(STP_ISEN_0_A) FM(RIF0_SYNC_A) FM(RIF2_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -1276,11 +1276,11 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP14_7_4, SSI_SDATA2_A, SEL_SSI_0),
PINMUX_IPSR_MSEL(IP14_7_4, SSI_SCK1_B, SEL_SSI_1),
- PINMUX_IPSR_GPSR(IP14_11_8, SSI_SCK34),
+ PINMUX_IPSR_GPSR(IP14_11_8, SSI_SCK349),
PINMUX_IPSR_MSEL(IP14_11_8, MSIOF1_SS1_A, SEL_MSIOF1_0),
PINMUX_IPSR_MSEL(IP14_11_8, STP_OPWM_0_A, SEL_SSP1_0_0),
- PINMUX_IPSR_GPSR(IP14_15_12, SSI_WS34),
+ PINMUX_IPSR_GPSR(IP14_15_12, SSI_WS349),
PINMUX_IPSR_MSEL(IP14_15_12, HCTS2_N_A, SEL_HSCIF2_0),
PINMUX_IPSR_MSEL(IP14_15_12, MSIOF1_SS2_A, SEL_MSIOF1_0),
PINMUX_IPSR_MSEL(IP14_15_12, STP_IVCXO27_0_A, SEL_SSP1_0_0),
@@ -1417,7 +1417,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP16_27_24, AUDIO_CLKOUT_B, SEL_ADG_1),
PINMUX_IPSR_MSEL(IP16_27_24, SSI_SCK2_B, SEL_SSI_1),
PINMUX_IPSR_MSEL(IP16_27_24, TS_SDEN1_D, SEL_TSIF1_3),
- PINMUX_IPSR_MSEL(IP16_27_24, STP_ISEN_1_D, SEL_SSP1_1_2),
+ PINMUX_IPSR_MSEL(IP16_27_24, STP_ISEN_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP16_27_24, STP_OPWM_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP16_27_24, RIF3_D0_B, SEL_DRIF3_1),
PINMUX_IPSR_MSEL(IP16_27_24, TCLK2_B, SEL_TIMER_TMU_1),
@@ -3657,12 +3657,12 @@ static const unsigned int ssi3_data_pins[] = {
static const unsigned int ssi3_data_mux[] = {
SSI_SDATA3_MARK,
};
-static const unsigned int ssi34_ctrl_pins[] = {
+static const unsigned int ssi349_ctrl_pins[] = {
/* SCK, WS */
RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
};
-static const unsigned int ssi34_ctrl_mux[] = {
- SSI_SCK34_MARK, SSI_WS34_MARK,
+static const unsigned int ssi349_ctrl_mux[] = {
+ SSI_SCK349_MARK, SSI_WS349_MARK,
};
static const unsigned int ssi4_data_pins[] = {
/* SDATA */
@@ -4438,7 +4438,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(ssi2_ctrl_a),
SH_PFC_PIN_GROUP(ssi2_ctrl_b),
SH_PFC_PIN_GROUP(ssi3_data),
- SH_PFC_PIN_GROUP(ssi34_ctrl),
+ SH_PFC_PIN_GROUP(ssi349_ctrl),
SH_PFC_PIN_GROUP(ssi4_data),
SH_PFC_PIN_GROUP(ssi4_ctrl),
SH_PFC_PIN_GROUP(ssi5_data),
@@ -4924,7 +4924,7 @@ static const char * const ssi_groups[] = {
"ssi2_ctrl_a",
"ssi2_ctrl_b",
"ssi3_data",
- "ssi34_ctrl",
+ "ssi349_ctrl",
"ssi4_data",
"ssi4_ctrl",
"ssi5_data",
@@ -5834,8 +5834,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 2), 24, 3 }, /* SSI_SDATA0 */
{ RCAR_GP_PIN(6, 3), 20, 3 }, /* SSI_SDATA1 */
{ RCAR_GP_PIN(6, 4), 16, 3 }, /* SSI_SDATA2 */
- { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK34 */
- { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS34 */
+ { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK349 */
+ { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS349 */
{ RCAR_GP_PIN(6, 7), 4, 3 }, /* SSI_SDATA3 */
{ RCAR_GP_PIN(6, 8), 0, 3 }, /* SSI_SCK4 */
} },
@@ -6081,8 +6081,8 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */
{ RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */
{ RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */
- { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS34 */
- { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK34 */
+ { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */
+ { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */
{ RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */
{ RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */
{ RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */
@@ -6176,6 +6176,10 @@ const struct sh_pfc_soc_info r8a7795_es1_pinmux_info = {
.cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs,
+ .pocctrl_reg = 0xe6060380,
+ .puen_base = PUEN,
+ .pud_base = PUD,
+ .nr_bias_regs = 7,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 1198998..cb9c192 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -20,7 +20,7 @@
#define CPU_ALL_PORT(fn, sfx) \
PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
- PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
@@ -55,13 +55,14 @@
#define GPSR0_0 F_(D0, IP5_15_12)
/* GPSR1 */
+#define GPSR1_28 FM(CLKOUT)
#define GPSR1_27 F_(EX_WAIT0_A, IP5_11_8)
#define GPSR1_26 F_(WE1_N, IP5_7_4)
#define GPSR1_25 F_(WE0_N, IP5_3_0)
#define GPSR1_24 F_(RD_WR_N, IP4_31_28)
#define GPSR1_23 F_(RD_N, IP4_27_24)
#define GPSR1_22 F_(BS_N, IP4_23_20)
-#define GPSR1_21 F_(CS1_N_A26, IP4_19_16)
+#define GPSR1_21 F_(CS1_N, IP4_19_16)
#define GPSR1_20 F_(CS0_N, IP4_15_12)
#define GPSR1_19 F_(A19, IP4_11_8)
#define GPSR1_18 F_(A18, IP4_7_4)
@@ -157,19 +158,19 @@
#define GPSR5_11 F_(RX2_A, IP13_7_4)
#define GPSR5_10 F_(TX2_A, IP13_3_0)
#define GPSR5_9 F_(SCK2, IP12_31_28)
-#define GPSR5_8 F_(RTS1_N_TANS, IP12_27_24)
+#define GPSR5_8 F_(RTS1_N, IP12_27_24)
#define GPSR5_7 F_(CTS1_N, IP12_23_20)
#define GPSR5_6 F_(TX1_A, IP12_19_16)
#define GPSR5_5 F_(RX1_A, IP12_15_12)
-#define GPSR5_4 F_(RTS0_N_TANS, IP12_11_8)
+#define GPSR5_4 F_(RTS0_N, IP12_11_8)
#define GPSR5_3 F_(CTS0_N, IP12_7_4)
#define GPSR5_2 F_(TX0, IP12_3_0)
#define GPSR5_1 F_(RX0, IP11_31_28)
#define GPSR5_0 F_(SCK0, IP11_27_24)
/* GPSR6 */
-#define GPSR6_31 F_(USB3_OVC, IP18_7_4)
-#define GPSR6_30 F_(USB3_PWEN, IP18_3_0)
+#define GPSR6_31 F_(USB2_CH3_OVC, IP18_7_4)
+#define GPSR6_30 F_(USB2_CH3_PWEN, IP18_3_0)
#define GPSR6_29 F_(USB30_OVC, IP17_31_28)
#define GPSR6_28 F_(USB30_PWEN, IP17_27_24)
#define GPSR6_27 F_(USB1_OVC, IP17_23_20)
@@ -193,8 +194,8 @@
#define GPSR6_9 F_(SSI_WS4, IP15_27_24)
#define GPSR6_8 F_(SSI_SCK4, IP15_23_20)
#define GPSR6_7 F_(SSI_SDATA3, IP15_19_16)
-#define GPSR6_6 F_(SSI_WS34, IP15_15_12)
-#define GPSR6_5 F_(SSI_SCK34, IP15_11_8)
+#define GPSR6_6 F_(SSI_WS349, IP15_15_12)
+#define GPSR6_5 F_(SSI_SCK349, IP15_11_8)
#define GPSR6_4 F_(SSI_SDATA2_A, IP15_7_4)
#define GPSR6_3 F_(SSI_SDATA1_A, IP15_3_0)
#define GPSR6_2 F_(SSI_SDATA0, IP14_31_28)
@@ -214,16 +215,16 @@
#define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0_23_20 FM(AVB_AVTP_CAPTURE_A) F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_TANS_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0_31_28 FM(IRQ1) FM(QPOLA) F_(0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0_23_20 FM(AVB_AVTP_CAPTURE_A) F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0_31_28 FM(IRQ1) FM(QPOLA) F_(0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SYNC_E) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) FM(A25) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) FM(A24) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_15_12 FM(IRQ5) FM(QSTB_QHE) FM(A23) FM(DU_EXVSYNC_DU_VSYNC) FM(VI4_DATA5_B) FM(FSCLKST2_N_B) F_(0, 0) FM(MSIOF3_TXD_E) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_19_16 FM(PWM0) FM(AVB_AVTP_PPS)FM(A22) F_(0, 0) FM(VI4_DATA6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IECLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_23_20 FM(PWM1_A) F_(0, 0) FM(A21) FM(HRX3_D) FM(VI4_DATA7_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IERX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_27_24 FM(PWM2_A) F_(0, 0) FM(A20) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_15_12 FM(IRQ5) FM(QSTB_QHE) F_(0, 0) FM(DU_EXVSYNC_DU_VSYNC) FM(VI4_DATA5_B) FM(FSCLKST2_N_B) F_(0, 0) FM(MSIOF3_TXD_E) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_19_16 FM(PWM0) FM(AVB_AVTP_PPS)F_(0, 0) F_(0, 0) FM(VI4_DATA6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IECLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_23_20 FM(PWM1_A) F_(0, 0) F_(0, 0) FM(HRX3_D) FM(VI4_DATA7_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IERX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1_31_28 FM(A0) FM(LCDOUT16) FM(MSIOF3_SYNC_B) F_(0, 0) FM(VI4_DATA8) F_(0, 0) FM(DU_DB0) F_(0, 0) F_(0, 0) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -236,7 +237,7 @@
#define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(SDA6_A) FM(AVB_AVTP_MATCH_B) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_TANS_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0) FM(SCL6_A) FM(AVB_AVTP_CAPTURE_B) FM(PWM2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_15_12 FM(A12) FM(LCDOUT12) FM(MSIOF3_SCK_C) F_(0, 0) FM(HRX4_A) FM(VI5_DATA8) FM(DU_DG4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_19_16 FM(A13) FM(LCDOUT13) FM(MSIOF3_SYNC_C) F_(0, 0) FM(HTX4_A) FM(VI5_DATA9) FM(DU_DG5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -247,12 +248,12 @@
#define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP4_19_16 FM(CS1_N_A26) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLK) F_(0, 0) FM(EX_WAIT0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP4_19_16 FM(CS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLK) F_(0, 0) FM(EX_WAIT0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_23_20 FM(BS_N) FM(QSTVA_QVS) FM(MSIOF3_SCK_D) FM(SCK3) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN1_TX) FM(CANFD1_TX) FM(IETX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_TX_A) FM(CANFD0_TX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_31_28 FM(RD_WR_N) F_(0, 0) FM(MSIOF3_RXD_D) FM(TX3_A) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_RX_A) FM(CANFD0_RX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_3_0 FM(WE0_N) F_(0, 0) FM(MSIOF3_TXD_D) FM(CTS3_N) FM(HCTS3_N) F_(0, 0) F_(0, 0) FM(SCL6_B) FM(CAN_CLK) F_(0, 0) FM(IECLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP5_7_4 FM(WE1_N) F_(0, 0) FM(MSIOF3_SS1_D) FM(RTS3_N_TANS) FM(HRTS3_N) F_(0, 0) F_(0, 0) FM(SDA6_B) FM(CAN1_RX) FM(CANFD1_RX) FM(IERX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP5_7_4 FM(WE1_N) F_(0, 0) FM(MSIOF3_SS1_D) FM(RTS3_N) FM(HRTS3_N) F_(0, 0) F_(0, 0) FM(SDA6_B) FM(CAN1_RX) FM(CANFD1_RX) FM(IERX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_11_8 FM(EX_WAIT0_A) FM(QCLK) F_(0, 0) F_(0, 0) FM(VI4_CLK) F_(0, 0) FM(DU_DOTCLKOUT0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_19_16 FM(D1) FM(MSIOF2_SS2_B)FM(MSIOF3_SYNC_A) F_(0, 0) FM(VI4_DATA17) FM(VI5_DATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -265,12 +266,11 @@
#define IP6_15_12 FM(D8) FM(LCDOUT0) FM(MSIOF2_SCK_D) FM(SCK4_C) FM(VI4_DATA0_A) F_(0, 0) FM(DU_DR0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_TANS_C)FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_7_4 FM(D14) FM(LCDOUT6) FM(MSIOF3_SS1_A) FM(HRX3_C) FM(VI4_DATA6_A) F_(0, 0) FM(DU_DR6) FM(SCL6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU_DR7) FM(SDA6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP7_15_12 FM(FSCLKST) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_19_16 FM(SD0_CLK) F_(0, 0) FM(MSIOF1_SCK_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
@@ -285,24 +285,24 @@
#define IP8_23_20 FM(SD1_DAT1) FM(SD2_DAT5) FM(MSIOF1_TXD_G) FM(NFDATA14_B) F_(0, 0) FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP8_27_24 FM(SD1_DAT2) FM(SD2_DAT6) FM(MSIOF1_SS1_G) FM(NFDATA15_B) F_(0, 0) FM(TS_SDAT1_B) FM(STP_ISD_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP8_31_28 FM(SD1_DAT3) FM(SD2_DAT7) FM(MSIOF1_SS2_G) FM(NFRB_N_B) F_(0, 0) FM(TS_SDEN1_B) FM(STP_ISEN_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_3_0 FM(SD2_CLK) F_(0, 0) F_(0, 0) FM(NFDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_7_4 FM(SD2_CMD) F_(0, 0) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_11_8 FM(SD2_DAT0) F_(0, 0) F_(0, 0) FM(NFDATA10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_15_12 FM(SD2_DAT1) F_(0, 0) F_(0, 0) FM(NFDATA11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_19_16 FM(SD2_DAT2) F_(0, 0) F_(0, 0) FM(NFDATA12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_23_20 FM(SD2_DAT3) F_(0, 0) F_(0, 0) FM(NFDATA13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_27_24 FM(SD2_DS) F_(0, 0) F_(0, 0) FM(NFALE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(SATA_DEVSLP_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_31_28 FM(SD3_CLK) F_(0, 0) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_3_0 FM(SD3_CMD) F_(0, 0) F_(0, 0) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_7_4 FM(SD3_DAT0) F_(0, 0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_11_8 FM(SD3_DAT1) F_(0, 0) F_(0, 0) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_15_12 FM(SD3_DAT2) F_(0, 0) F_(0, 0) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_19_16 FM(SD3_DAT3) F_(0, 0) F_(0, 0) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_23_20 FM(SD3_DAT4) FM(SD2_CD_A) F_(0, 0) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) F_(0, 0) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_31_28 FM(SD3_DAT6) FM(SD3_CD) F_(0, 0) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP11_3_0 FM(SD3_DAT7) FM(SD3_WP) F_(0, 0) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP11_7_4 FM(SD3_DS) F_(0, 0) F_(0, 0) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_3_0 FM(SD2_CLK) F_(0, 0) FM(NFDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_7_4 FM(SD2_CMD) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_11_8 FM(SD2_DAT0) F_(0, 0) FM(NFDATA10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_15_12 FM(SD2_DAT1) F_(0, 0) FM(NFDATA11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_19_16 FM(SD2_DAT2) F_(0, 0) FM(NFDATA12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_23_20 FM(SD2_DAT3) F_(0, 0) FM(NFDATA13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_27_24 FM(SD2_DS) F_(0, 0) FM(NFALE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(SATA_DEVSLP_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_3_0 FM(SD3_CMD) F_(0, 0) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_11_8 FM(SD3_DAT1) F_(0, 0) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_15_12 FM(SD3_DAT2) F_(0, 0) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_19_16 FM(SD3_DAT3) F_(0, 0) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_23_20 FM(SD3_DAT4) FM(SD2_CD_A) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_31_28 FM(SD3_DAT6) FM(SD3_CD) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP11_3_0 FM(SD3_DAT7) FM(SD3_WP) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP11_7_4 FM(SD3_DS) F_(0, 0) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP11_11_8 FM(SD0_CD) F_(0, 0) FM(NFDATA14_A) F_(0, 0) FM(SCL2_B) FM(SIM0_RST_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
@@ -313,11 +313,11 @@
#define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_C) FM(RIF0_D0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_3_0 FM(TX0) FM(HTX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C) FM(RIF0_D1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_7_4 FM(CTS0_N) FM(HCTS1_N_B) FM(MSIOF1_SYNC_B) F_(0, 0) F_(0, 0) FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C) FM(RIF1_SYNC_B) FM(AUDIO_CLKOUT_C) FM(ADICS_SAMP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP12_11_8 FM(RTS0_N_TANS) FM(HRTS1_N_B) FM(MSIOF1_SS1_B) FM(AUDIO_CLKA_B) FM(SCL2_A) F_(0, 0) FM(STP_IVCXO27_1_C) FM(RIF0_SYNC_B) F_(0, 0) FM(ADICHS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP12_11_8 FM(RTS0_N) FM(HRTS1_N_B) FM(MSIOF1_SS1_B) FM(AUDIO_CLKA_B) FM(SCL2_A) F_(0, 0) FM(STP_IVCXO27_1_C) FM(RIF0_SYNC_B) F_(0, 0) FM(ADICHS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_C) FM(RIF1_CLK_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_23_20 FM(CTS1_N) FM(HCTS1_N_A) FM(MSIOF1_RXD_B) F_(0, 0) F_(0, 0) FM(TS_SDEN1_C) FM(STP_ISEN_1_C) FM(RIF1_D0_B) F_(0, 0) FM(ADIDATA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP12_27_24 FM(RTS1_N_TANS) FM(HRTS1_N_A) FM(MSIOF1_TXD_B) F_(0, 0) F_(0, 0) FM(TS_SDAT1_C) FM(STP_ISD_1_C) FM(RIF1_D1_B) F_(0, 0) FM(ADICHS0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP12_27_24 FM(RTS1_N) FM(HRTS1_N_A) FM(MSIOF1_TXD_B) F_(0, 0) F_(0, 0) FM(TS_SDAT1_C) FM(STP_ISD_1_C) FM(RIF1_D1_B) F_(0, 0) FM(ADICHS0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_31_28 FM(SCK2) FM(SCIF_CLK_B) FM(MSIOF1_SCK_B) F_(0, 0) F_(0, 0) FM(TS_SCK1_C) FM(STP_ISCLK_1_C) FM(RIF1_CLK_B) F_(0, 0) FM(ADICLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP13_3_0 FM(TX2_A) F_(0, 0) F_(0, 0) FM(SD2_CD_B) FM(SCL1_A) F_(0, 0) FM(FMCLK_A) FM(RIF1_D1_C) F_(0, 0) FM(FSO_CFE_0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP13_7_4 FM(RX2_A) F_(0, 0) F_(0, 0) FM(SD2_WP_B) FM(SDA1_A) F_(0, 0) FM(FMIN_A) FM(RIF1_SYNC_C) F_(0, 0) FM(FSO_CFE_1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -339,8 +339,8 @@
#define IP14_31_28 FM(SSI_SDATA0) F_(0, 0) FM(MSIOF1_SS2_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_3_0 FM(SSI_SDATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_7_4 FM(SSI_SDATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(SSI_SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP15_11_8 FM(SSI_SCK34) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP15_15_12 FM(SSI_WS34) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP15_11_8 FM(SSI_SCK349) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP15_15_12 FM(SSI_WS349) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_19_16 FM(SSI_SDATA3) FM(HRTS2_N_A) FM(MSIOF1_TXD_A) F_(0, 0) F_(0, 0) FM(TS_SCK0_A) FM(STP_ISCLK_0_A) FM(RIF0_D1_A) FM(RIF2_D0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_23_20 FM(SSI_SCK4) FM(HRX2_A) FM(MSIOF1_SCK_A) F_(0, 0) F_(0, 0) FM(TS_SDAT0_A) FM(STP_ISD_0_A) FM(RIF0_CLK_A) FM(RIF2_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_27_24 FM(SSI_WS4) FM(HTX2_A) FM(MSIOF1_SYNC_A) F_(0, 0) F_(0, 0) FM(TS_SDEN0_A) FM(STP_ISEN_0_A) FM(RIF0_SYNC_A) FM(RIF2_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -361,15 +361,15 @@
#define IP17_23_20 FM(USB1_OVC) F_(0, 0) FM(MSIOF1_SS2_C) F_(0, 0) FM(SSI_WS1_A) FM(TS_SDAT0_E) FM(STP_ISD_0_E) FM(FMIN_B) FM(RIF2_SYNC_B) F_(0, 0) FM(REMOCON_B) F_(0, 0) F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0)
#define IP17_27_24 FM(USB30_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_B) FM(SSI_SCK2_B) FM(TS_SDEN1_D) FM(STP_ISEN_1_D) FM(STP_OPWM_0_E)FM(RIF3_D0_B) F_(0, 0) FM(TCLK2_B) FM(TPU0TO0) FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0)
#define IP17_31_28 FM(USB30_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B) FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D) FM(STP_IVCXO27_0_E)FM(RIF3_D1_B) F_(0, 0) FM(FSO_TOE_N) FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP18_3_0 FM(USB3_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0)
-#define IP18_7_4 FM(USB3_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) F_(0, 0) FM(FMIN_C) FM(FMIN_D) F_(0, 0)
+#define IP18_3_0 FM(USB2_CH3_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0)
+#define IP18_7_4 FM(USB2_CH3_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) FM(FMIN_C) FM(FMIN_D) F_(0, 0) F_(0, 0)
#define PINMUX_GPSR \
\
GPSR6_31 \
GPSR6_30 \
GPSR6_29 \
- GPSR6_28 \
+ GPSR1_28 GPSR6_28 \
GPSR1_27 GPSR6_27 \
GPSR1_26 GPSR6_26 \
GPSR1_25 GPSR5_25 GPSR6_25 \
@@ -413,7 +413,7 @@ FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_3
FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
-FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
+FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \
FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \
FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
@@ -469,10 +469,10 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */
#define MOD_SEL1_31_30 FM(SEL_TSIF1_0) FM(SEL_TSIF1_1) FM(SEL_TSIF1_2) FM(SEL_TSIF1_3)
#define MOD_SEL1_29_28_27 FM(SEL_TSIF0_0) FM(SEL_TSIF0_1) FM(SEL_TSIF0_2) FM(SEL_TSIF0_3) FM(SEL_TSIF0_4) F_(0, 0) F_(0, 0) F_(0, 0)
-#define MOD_SEL1_26 FM(SEL_TIMER_TMU_0) FM(SEL_TIMER_TMU_1)
+#define MOD_SEL1_26 FM(SEL_TIMER_TMU1_0) FM(SEL_TIMER_TMU1_1)
#define MOD_SEL1_25_24 FM(SEL_SSP1_1_0) FM(SEL_SSP1_1_1) FM(SEL_SSP1_1_2) FM(SEL_SSP1_1_3)
#define MOD_SEL1_23_22_21 FM(SEL_SSP1_0_0) FM(SEL_SSP1_0_1) FM(SEL_SSP1_0_2) FM(SEL_SSP1_0_3) FM(SEL_SSP1_0_4) F_(0, 0) F_(0, 0) F_(0, 0)
-#define MOD_SEL1_20 FM(SEL_SSI_0) FM(SEL_SSI_1)
+#define MOD_SEL1_20 FM(SEL_SSI1_0) FM(SEL_SSI1_1)
#define MOD_SEL1_19 FM(SEL_SPEED_PULSE_0) FM(SEL_SPEED_PULSE_1)
#define MOD_SEL1_18_17 FM(SEL_SIMCARD_0) FM(SEL_SIMCARD_1) FM(SEL_SIMCARD_2) FM(SEL_SIMCARD_3)
#define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1)
@@ -480,7 +480,7 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL1_13 FM(SEL_SCIF3_0) FM(SEL_SCIF3_1)
#define MOD_SEL1_12 FM(SEL_SCIF2_0) FM(SEL_SCIF2_1)
#define MOD_SEL1_11 FM(SEL_SCIF1_0) FM(SEL_SCIF1_1)
-#define MOD_SEL1_10 FM(SEL_SATA_0) FM(SEL_SATA_1)
+#define MOD_SEL1_10 FM(SEL_SCIF_0) FM(SEL_SCIF_1)
#define MOD_SEL1_9 FM(SEL_REMOCON_0) FM(SEL_REMOCON_1)
#define MOD_SEL1_6 FM(SEL_RCAN0_0) FM(SEL_RCAN0_1)
#define MOD_SEL1_5 FM(SEL_PWM6_0) FM(SEL_PWM6_1)
@@ -497,7 +497,6 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL2_28_27 FM(SEL_FM_0) FM(SEL_FM_1) FM(SEL_FM_2) FM(SEL_FM_3)
#define MOD_SEL2_26 FM(SEL_SCIF5_0) FM(SEL_SCIF5_1)
#define MOD_SEL2_25_24_23 FM(SEL_I2C6_0) FM(SEL_I2C6_1) FM(SEL_I2C6_2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define MOD_SEL2_22 FM(SEL_NDF_0) FM(SEL_NDF_1)
#define MOD_SEL2_21 FM(SEL_SSI2_0) FM(SEL_SSI2_1)
#define MOD_SEL2_20 FM(SEL_SSI9_0) FM(SEL_SSI9_1)
#define MOD_SEL2_19 FM(SEL_TIMER_TMU2_0) FM(SEL_TIMER_TMU2_1)
@@ -514,7 +513,7 @@ MOD_SEL0_28_27 MOD_SEL2_28_27 \
MOD_SEL0_26_25_24 MOD_SEL1_26 MOD_SEL2_26 \
MOD_SEL1_25_24 MOD_SEL2_25_24_23 \
MOD_SEL0_23 MOD_SEL1_23_22_21 \
-MOD_SEL0_22 MOD_SEL2_22 \
+MOD_SEL0_22 \
MOD_SEL0_21 MOD_SEL2_21 \
MOD_SEL0_20 MOD_SEL1_20 MOD_SEL2_20 \
MOD_SEL0_19 MOD_SEL1_19 MOD_SEL2_19 \
@@ -550,7 +549,7 @@ MOD_SEL0_4_3 MOD_SEL1_4 \
FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \
FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \
FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
- FM(CLKOUT) FM(PRESETOUT) \
+ FM(PRESETOUT) \
FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) FM(DU_DOTCLKIN3) \
FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR)
@@ -599,6 +598,7 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS1),
PINMUX_SINGLE(AVS2),
+ PINMUX_SINGLE(CLKOUT),
PINMUX_SINGLE(HDMI0_CEC),
PINMUX_SINGLE(HDMI1_CEC),
PINMUX_SINGLE(MSIOF0_RXD),
@@ -633,7 +633,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL2(IP0_23_20, AVB_AVTP_CAPTURE_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
PINMUX_IPSR_MSEL2(IP0_23_20, MSIOF2_TXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
- PINMUX_IPSR_MSEL2(IP0_23_20, RTS4_N_TANS_A, I2C_SEL_5_0, SEL_SCIF4_0),
+ PINMUX_IPSR_MSEL2(IP0_23_20, RTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
PINMUX_IPSR_PHYS(IP0_23_20, SDA5, I2C_SEL_5_1),
PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
@@ -662,7 +662,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
- PINMUX_IPSR_GPSR(IP1_7_4, A25),
PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
@@ -670,7 +669,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
- PINMUX_IPSR_GPSR(IP1_11_8, A24),
PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
@@ -678,7 +676,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_15_12, IRQ5),
PINMUX_IPSR_GPSR(IP1_15_12, QSTB_QHE),
- PINMUX_IPSR_GPSR(IP1_15_12, A23),
PINMUX_IPSR_GPSR(IP1_15_12, DU_EXVSYNC_DU_VSYNC),
PINMUX_IPSR_MSEL(IP1_15_12, VI4_DATA5_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_15_12, PWM6_B, SEL_PWM6_1),
@@ -687,19 +684,16 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_19_16, PWM0),
PINMUX_IPSR_GPSR(IP1_19_16, AVB_AVTP_PPS),
- PINMUX_IPSR_GPSR(IP1_19_16, A22),
PINMUX_IPSR_MSEL(IP1_19_16, VI4_DATA6_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_19_16, IECLK_B, SEL_IEBUS_1),
PINMUX_IPSR_MSEL2(IP1_23_20, PWM1_A, I2C_SEL_3_0, SEL_PWM1_0),
- PINMUX_IPSR_MSEL(IP1_23_20, A21, I2C_SEL_3_0),
PINMUX_IPSR_MSEL2(IP1_23_20, HRX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
PINMUX_IPSR_MSEL2(IP1_23_20, VI4_DATA7_B, I2C_SEL_3_0, SEL_VIN4_1),
PINMUX_IPSR_MSEL2(IP1_23_20, IERX_B, I2C_SEL_3_0, SEL_IEBUS_1),
PINMUX_IPSR_PHYS(IP0_23_20, SCL3, I2C_SEL_3_1),
PINMUX_IPSR_MSEL2(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
- PINMUX_IPSR_MSEL(IP1_27_24, A20, I2C_SEL_3_0),
PINMUX_IPSR_MSEL2(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
PINMUX_IPSR_MSEL2(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
@@ -780,7 +774,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP3_7_4, A10),
PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
- PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_TANS_B, SEL_SCIF4_1),
+ PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
PINMUX_IPSR_GPSR(IP3_11_8, A11),
@@ -845,7 +839,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
- PINMUX_IPSR_GPSR(IP4_19_16, CS1_N_A26),
+ PINMUX_IPSR_GPSR(IP4_19_16, CS1_N),
PINMUX_IPSR_GPSR(IP4_19_16, VI5_CLK),
PINMUX_IPSR_MSEL(IP4_19_16, EX_WAIT0_B, SEL_LBSC_1),
@@ -883,7 +877,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP5_7_4, WE1_N),
PINMUX_IPSR_MSEL(IP5_7_4, MSIOF3_SS1_D, SEL_MSIOF3_3),
- PINMUX_IPSR_GPSR(IP5_7_4, RTS3_N_TANS),
+ PINMUX_IPSR_GPSR(IP5_7_4, RTS3_N),
PINMUX_IPSR_GPSR(IP5_7_4, HRTS3_N),
PINMUX_IPSR_MSEL(IP5_7_4, SDA6_B, SEL_I2C6_1),
PINMUX_IPSR_GPSR(IP5_7_4, CAN1_RX),
@@ -964,7 +958,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
- PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_TANS_C, SEL_SCIF4_2),
+ PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_C, SEL_SCIF4_2),
PINMUX_IPSR_GPSR(IP6_27_24, DU_DR3),
PINMUX_IPSR_GPSR(IP6_31_28, D12),
@@ -998,8 +992,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP7_11_8, DU_DR7),
PINMUX_IPSR_MSEL(IP7_11_8, SDA6_C, SEL_I2C6_2),
- PINMUX_IPSR_GPSR(IP7_15_12, FSCLKST),
-
PINMUX_IPSR_GPSR(IP7_19_16, SD0_CLK),
PINMUX_IPSR_MSEL(IP7_19_16, MSIOF1_SCK_E, SEL_MSIOF1_4),
PINMUX_IPSR_MSEL(IP7_19_16, STP_OPWM_0_B, SEL_SSP1_0_1),
@@ -1035,35 +1027,35 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP8_15_12, SD1_CMD),
PINMUX_IPSR_MSEL(IP8_15_12, MSIOF1_SYNC_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_15_12, NFCE_N_B, SEL_NDF_1),
+ PINMUX_IPSR_GPSR(IP8_15_12, NFCE_N_B),
PINMUX_IPSR_MSEL(IP8_15_12, SIM0_D_A, SEL_SIMCARD_0),
PINMUX_IPSR_MSEL(IP8_15_12, STP_IVCXO27_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_19_16, SD1_DAT0),
PINMUX_IPSR_GPSR(IP8_19_16, SD2_DAT4),
PINMUX_IPSR_MSEL(IP8_19_16, MSIOF1_RXD_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_19_16, NFWP_N_B, SEL_NDF_1),
+ PINMUX_IPSR_GPSR(IP8_19_16, NFWP_N_B),
PINMUX_IPSR_MSEL(IP8_19_16, TS_SCK1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_19_16, STP_ISCLK_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_23_20, SD1_DAT1),
PINMUX_IPSR_GPSR(IP8_23_20, SD2_DAT5),
PINMUX_IPSR_MSEL(IP8_23_20, MSIOF1_TXD_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_23_20, NFDATA14_B, SEL_NDF_1),
+ PINMUX_IPSR_GPSR(IP8_23_20, NFDATA14_B),
PINMUX_IPSR_MSEL(IP8_23_20, TS_SPSYNC1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_23_20, STP_ISSYNC_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_27_24, SD1_DAT2),
PINMUX_IPSR_GPSR(IP8_27_24, SD2_DAT6),
PINMUX_IPSR_MSEL(IP8_27_24, MSIOF1_SS1_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_27_24, NFDATA15_B, SEL_NDF_1),
+ PINMUX_IPSR_GPSR(IP8_27_24, NFDATA15_B),
PINMUX_IPSR_MSEL(IP8_27_24, TS_SDAT1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_27_24, STP_ISD_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_31_28, SD1_DAT3),
PINMUX_IPSR_GPSR(IP8_31_28, SD2_DAT7),
PINMUX_IPSR_MSEL(IP8_31_28, MSIOF1_SS2_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_31_28, NFRB_N_B, SEL_NDF_1),
+ PINMUX_IPSR_GPSR(IP8_31_28, NFRB_N_B),
PINMUX_IPSR_MSEL(IP8_31_28, TS_SDEN1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_31_28, STP_ISEN_1_B, SEL_SSP1_1_1),
@@ -1177,7 +1169,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP12_7_4, AUDIO_CLKOUT_C),
PINMUX_IPSR_GPSR(IP12_7_4, ADICS_SAMP),
- PINMUX_IPSR_GPSR(IP12_11_8, RTS0_N_TANS),
+ PINMUX_IPSR_GPSR(IP12_11_8, RTS0_N),
PINMUX_IPSR_MSEL(IP12_11_8, HRTS1_N_B, SEL_HSCIF1_1),
PINMUX_IPSR_MSEL(IP12_11_8, MSIOF1_SS1_B, SEL_MSIOF1_1),
PINMUX_IPSR_MSEL(IP12_11_8, AUDIO_CLKA_B, SEL_ADG_A_1),
@@ -1206,7 +1198,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP12_23_20, RIF1_D0_B, SEL_DRIF1_1),
PINMUX_IPSR_GPSR(IP12_23_20, ADIDATA),
- PINMUX_IPSR_GPSR(IP12_27_24, RTS1_N_TANS),
+ PINMUX_IPSR_GPSR(IP12_27_24, RTS1_N),
PINMUX_IPSR_MSEL(IP12_27_24, HRTS1_N_A, SEL_HSCIF1_0),
PINMUX_IPSR_MSEL(IP12_27_24, MSIOF1_TXD_B, SEL_MSIOF1_1),
PINMUX_IPSR_MSEL(IP12_27_24, TS_SDAT1_C, SEL_TSIF1_2),
@@ -1215,7 +1207,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP12_27_24, ADICHS0),
PINMUX_IPSR_GPSR(IP12_31_28, SCK2),
- PINMUX_IPSR_MSEL(IP12_31_28, SCIF_CLK_B, SEL_SCIF1_1),
+ PINMUX_IPSR_MSEL(IP12_31_28, SCIF_CLK_B, SEL_SCIF_1),
PINMUX_IPSR_MSEL(IP12_31_28, MSIOF1_SCK_B, SEL_MSIOF1_1),
PINMUX_IPSR_MSEL(IP12_31_28, TS_SCK1_C, SEL_TSIF1_2),
PINMUX_IPSR_MSEL(IP12_31_28, STP_ISCLK_1_C, SEL_SSP1_1_2),
@@ -1240,7 +1232,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_11_8, HSCK0),
PINMUX_IPSR_MSEL(IP13_11_8, MSIOF1_SCK_D, SEL_MSIOF1_3),
PINMUX_IPSR_MSEL(IP13_11_8, AUDIO_CLKB_A, SEL_ADG_B_0),
- PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA1_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA1_B, SEL_SSI1_1),
PINMUX_IPSR_MSEL(IP13_11_8, TS_SCK0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_11_8, STP_ISCLK_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_11_8, RIF0_CLK_C, SEL_DRIF0_2),
@@ -1248,14 +1240,14 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_15_12, HRX0),
PINMUX_IPSR_MSEL(IP13_15_12, MSIOF1_RXD_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA2_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA2_B, SEL_SSI2_1),
PINMUX_IPSR_MSEL(IP13_15_12, TS_SDEN0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_15_12, STP_ISEN_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_15_12, RIF0_D0_C, SEL_DRIF0_2),
PINMUX_IPSR_GPSR(IP13_19_16, HTX0),
PINMUX_IPSR_MSEL(IP13_19_16, MSIOF1_TXD_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_19_16, SSI_SDATA9_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP13_19_16, SSI_SDATA9_B, SEL_SSI9_1),
PINMUX_IPSR_MSEL(IP13_19_16, TS_SDAT0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_19_16, STP_ISD_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_19_16, RIF0_D1_C, SEL_DRIF0_2),
@@ -1263,7 +1255,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_23_20, HCTS0_N),
PINMUX_IPSR_MSEL(IP13_23_20, RX2_B, SEL_SCIF2_1),
PINMUX_IPSR_MSEL(IP13_23_20, MSIOF1_SYNC_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK9_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK9_A, SEL_SSI9_0),
PINMUX_IPSR_MSEL(IP13_23_20, TS_SPSYNC0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_23_20, STP_ISSYNC_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_23_20, RIF0_SYNC_C, SEL_DRIF0_2),
@@ -1272,7 +1264,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_27_24, HRTS0_N),
PINMUX_IPSR_MSEL(IP13_27_24, TX2_B, SEL_SCIF2_1),
PINMUX_IPSR_MSEL(IP13_27_24, MSIOF1_SS1_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_27_24, SSI_WS9_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP13_27_24, SSI_WS9_A, SEL_SSI9_0),
PINMUX_IPSR_MSEL(IP13_27_24, STP_IVCXO27_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_27_24, BPFCLK_A, SEL_FM_0),
PINMUX_IPSR_GPSR(IP13_27_24, AUDIO_CLKOUT2_A),
@@ -1285,18 +1277,18 @@ static const u16 pinmux_data[] = {
/* IPSR14 */
PINMUX_IPSR_GPSR(IP14_3_0, MSIOF0_SS1),
PINMUX_IPSR_MSEL(IP14_3_0, RX5_A, SEL_SCIF5_0),
- PINMUX_IPSR_MSEL(IP14_3_0, NFWP_N_A, SEL_NDF_0),
+ PINMUX_IPSR_GPSR(IP14_3_0, NFWP_N_A),
PINMUX_IPSR_MSEL(IP14_3_0, AUDIO_CLKA_C, SEL_ADG_A_2),
- PINMUX_IPSR_MSEL(IP14_3_0, SSI_SCK2_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP14_3_0, SSI_SCK2_A, SEL_SSI2_0),
PINMUX_IPSR_MSEL(IP14_3_0, STP_IVCXO27_0_C, SEL_SSP1_0_2),
PINMUX_IPSR_GPSR(IP14_3_0, AUDIO_CLKOUT3_A),
- PINMUX_IPSR_MSEL(IP14_3_0, TCLK1_B, SEL_TIMER_TMU_1),
+ PINMUX_IPSR_MSEL(IP14_3_0, TCLK1_B, SEL_TIMER_TMU1_1),
PINMUX_IPSR_GPSR(IP14_7_4, MSIOF0_SS2),
PINMUX_IPSR_MSEL(IP14_7_4, TX5_A, SEL_SCIF5_0),
PINMUX_IPSR_MSEL(IP14_7_4, MSIOF1_SS2_D, SEL_MSIOF1_3),
PINMUX_IPSR_MSEL(IP14_7_4, AUDIO_CLKC_A, SEL_ADG_C_0),
- PINMUX_IPSR_MSEL(IP14_7_4, SSI_WS2_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP14_7_4, SSI_WS2_A, SEL_SSI2_0),
PINMUX_IPSR_MSEL(IP14_7_4, STP_OPWM_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_GPSR(IP14_7_4, AUDIO_CLKOUT_D),
PINMUX_IPSR_MSEL(IP14_7_4, SPEEDIN_B, SEL_SPEED_PULSE_1),
@@ -1324,16 +1316,16 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP14_31_28, MSIOF1_SS2_F, SEL_MSIOF1_5),
/* IPSR15 */
- PINMUX_IPSR_MSEL(IP15_3_0, SSI_SDATA1_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP15_3_0, SSI_SDATA1_A, SEL_SSI1_0),
- PINMUX_IPSR_MSEL(IP15_7_4, SSI_SDATA2_A, SEL_SSI_0),
- PINMUX_IPSR_MSEL(IP15_7_4, SSI_SCK1_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP15_7_4, SSI_SDATA2_A, SEL_SSI2_0),
+ PINMUX_IPSR_MSEL(IP15_7_4, SSI_SCK1_B, SEL_SSI1_1),
- PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK34),
+ PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK349),
PINMUX_IPSR_MSEL(IP15_11_8, MSIOF1_SS1_A, SEL_MSIOF1_0),
PINMUX_IPSR_MSEL(IP15_11_8, STP_OPWM_0_A, SEL_SSP1_0_0),
- PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS34),
+ PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS349),
PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0),
PINMUX_IPSR_MSEL(IP15_15_12, MSIOF1_SS2_A, SEL_MSIOF1_0),
PINMUX_IPSR_MSEL(IP15_15_12, STP_IVCXO27_0_A, SEL_SSP1_0_0),
@@ -1406,7 +1398,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP16_23_20, STP_ISEN_1_A, SEL_SSP1_1_0),
PINMUX_IPSR_MSEL(IP16_23_20, RIF1_D0_A, SEL_DRIF1_0),
PINMUX_IPSR_MSEL(IP16_23_20, RIF3_D0_A, SEL_DRIF3_0),
- PINMUX_IPSR_MSEL(IP16_23_20, TCLK2_A, SEL_TIMER_TMU_0),
+ PINMUX_IPSR_MSEL(IP16_23_20, TCLK2_A, SEL_TIMER_TMU2_0),
PINMUX_IPSR_GPSR(IP16_27_24, SSI_SDATA8),
PINMUX_IPSR_MSEL(IP16_27_24, HRTS2_N_B, SEL_HSCIF2_1),
@@ -1416,24 +1408,24 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP16_27_24, RIF1_D1_A, SEL_DRIF1_0),
PINMUX_IPSR_MSEL(IP16_27_24, RIF3_D1_A, SEL_DRIF3_0),
- PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA9_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA9_A, SEL_SSI9_0),
PINMUX_IPSR_MSEL(IP16_31_28, HSCK2_B, SEL_HSCIF2_1),
PINMUX_IPSR_MSEL(IP16_31_28, MSIOF1_SS1_C, SEL_MSIOF1_2),
PINMUX_IPSR_MSEL(IP16_31_28, HSCK1_A, SEL_HSCIF1_0),
- PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI1_1),
PINMUX_IPSR_GPSR(IP16_31_28, SCK1),
PINMUX_IPSR_MSEL(IP16_31_28, STP_IVCXO27_1_A, SEL_SSP1_1_0),
- PINMUX_IPSR_GPSR(IP16_31_28, SCK5_A),
+ PINMUX_IPSR_MSEL(IP16_31_28, SCK5_A, SEL_SCIF5_0),
/* IPSR17 */
PINMUX_IPSR_MSEL(IP17_3_0, AUDIO_CLKA_A, SEL_ADG_A_0),
PINMUX_IPSR_GPSR(IP17_3_0, CC5_OSCOUT),
PINMUX_IPSR_MSEL(IP17_7_4, AUDIO_CLKB_B, SEL_ADG_B_1),
- PINMUX_IPSR_MSEL(IP17_7_4, SCIF_CLK_A, SEL_SCIF1_0),
+ PINMUX_IPSR_MSEL(IP17_7_4, SCIF_CLK_A, SEL_SCIF_0),
PINMUX_IPSR_MSEL(IP17_7_4, STP_IVCXO27_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP17_7_4, REMOCON_A, SEL_REMOCON_0),
- PINMUX_IPSR_MSEL(IP17_7_4, TCLK1_A, SEL_TIMER_TMU_0),
+ PINMUX_IPSR_MSEL(IP17_7_4, TCLK1_A, SEL_TIMER_TMU1_0),
PINMUX_IPSR_GPSR(IP17_11_8, USB0_PWEN),
PINMUX_IPSR_MSEL(IP17_11_8, SIM0_RST_C, SEL_SIMCARD_2),
@@ -1452,7 +1444,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_19_16, USB1_PWEN),
PINMUX_IPSR_MSEL(IP17_19_16, SIM0_CLK_C, SEL_SIMCARD_2),
- PINMUX_IPSR_MSEL(IP17_19_16, SSI_SCK1_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP17_19_16, SSI_SCK1_A, SEL_SSI1_0),
PINMUX_IPSR_MSEL(IP17_19_16, TS_SCK0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP17_19_16, STP_ISCLK_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_19_16, FMCLK_B, SEL_FM_1),
@@ -1462,7 +1454,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_23_20, USB1_OVC),
PINMUX_IPSR_MSEL(IP17_23_20, MSIOF1_SS2_C, SEL_MSIOF1_2),
- PINMUX_IPSR_MSEL(IP17_23_20, SSI_WS1_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP17_23_20, SSI_WS1_A, SEL_SSI1_0),
PINMUX_IPSR_MSEL(IP17_23_20, TS_SDAT0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP17_23_20, STP_ISD_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_23_20, FMIN_B, SEL_FM_1),
@@ -1472,19 +1464,19 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_27_24, USB30_PWEN),
PINMUX_IPSR_GPSR(IP17_27_24, AUDIO_CLKOUT_B),
- PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI2_1),
PINMUX_IPSR_MSEL(IP17_27_24, TS_SDEN1_D, SEL_TSIF1_3),
- PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_2),
+ PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP17_27_24, STP_OPWM_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_27_24, RIF3_D0_B, SEL_DRIF3_1),
- PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU_1),
+ PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU2_1),
PINMUX_IPSR_GPSR(IP17_27_24, TPU0TO0),
PINMUX_IPSR_MSEL(IP17_27_24, BPFCLK_C, SEL_FM_2),
PINMUX_IPSR_MSEL(IP17_27_24, HRTS2_N_C, SEL_HSCIF2_2),
PINMUX_IPSR_GPSR(IP17_31_28, USB30_OVC),
PINMUX_IPSR_GPSR(IP17_31_28, AUDIO_CLKOUT1_B),
- PINMUX_IPSR_MSEL(IP17_31_28, SSI_WS2_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP17_31_28, SSI_WS2_B, SEL_SSI2_1),
PINMUX_IPSR_MSEL(IP17_31_28, TS_SPSYNC1_D, SEL_TSIF1_3),
PINMUX_IPSR_MSEL(IP17_31_28, STP_ISSYNC_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP17_31_28, STP_IVCXO27_0_E, SEL_SSP1_0_4),
@@ -1493,9 +1485,9 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_31_28, TPU0TO1),
/* IPSR18 */
- PINMUX_IPSR_GPSR(IP18_3_0, USB3_PWEN),
+ PINMUX_IPSR_GPSR(IP18_3_0, USB2_CH3_PWEN),
PINMUX_IPSR_GPSR(IP18_3_0, AUDIO_CLKOUT2_B),
- PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI9_1),
PINMUX_IPSR_MSEL(IP18_3_0, TS_SDEN0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP18_3_0, STP_ISEN_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP18_3_0, RIF2_D0_B, SEL_DRIF2_1),
@@ -1503,9 +1495,9 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_C, SEL_FM_2),
PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_D, SEL_FM_3),
- PINMUX_IPSR_GPSR(IP18_7_4, USB3_OVC),
+ PINMUX_IPSR_GPSR(IP18_7_4, USB2_CH3_OVC),
PINMUX_IPSR_GPSR(IP18_7_4, AUDIO_CLKOUT3_B),
- PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI9_1),
PINMUX_IPSR_MSEL(IP18_7_4, TS_SPSYNC0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP18_7_4, STP_ISSYNC_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP18_7_4, RIF2_D1_B, SEL_DRIF2_1),
@@ -2266,7 +2258,7 @@ static const unsigned int hscif2_clk_b_pins[] = {
RCAR_GP_PIN(6, 21),
};
static const unsigned int hscif2_clk_b_mux[] = {
- HSCK1_B_MARK,
+ HSCK2_B_MARK,
};
static const unsigned int hscif2_ctrl_b_pins[] = {
/* RTS, CTS */
@@ -2339,7 +2331,7 @@ static const unsigned int hscif4_ctrl_pins[] = {
RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
};
static const unsigned int hscif4_ctrl_mux[] = {
- HRTS4_N_MARK, HCTS3_N_MARK,
+ HRTS4_N_MARK, HCTS4_N_MARK,
};
static const unsigned int hscif4_data_b_pins[] = {
@@ -3300,7 +3292,7 @@ static const unsigned int scif0_ctrl_pins[] = {
RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
};
static const unsigned int scif0_ctrl_mux[] = {
- RTS0_N_TANS_MARK, CTS0_N_MARK,
+ RTS0_N_MARK, CTS0_N_MARK,
};
/* - SCIF1 ------------------------------------------------------------------ */
static const unsigned int scif1_data_a_pins[] = {
@@ -3322,7 +3314,7 @@ static const unsigned int scif1_ctrl_pins[] = {
RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
};
static const unsigned int scif1_ctrl_mux[] = {
- RTS1_N_TANS_MARK, CTS1_N_MARK,
+ RTS1_N_MARK, CTS1_N_MARK,
};
static const unsigned int scif1_data_b_pins[] = {
@@ -3374,7 +3366,7 @@ static const unsigned int scif3_ctrl_pins[] = {
RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
};
static const unsigned int scif3_ctrl_mux[] = {
- RTS3_N_TANS_MARK, CTS3_N_MARK,
+ RTS3_N_MARK, CTS3_N_MARK,
};
static const unsigned int scif3_data_b_pins[] = {
/* RX, TX */
@@ -3403,7 +3395,7 @@ static const unsigned int scif4_ctrl_a_pins[] = {
RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
};
static const unsigned int scif4_ctrl_a_mux[] = {
- RTS4_N_TANS_A_MARK, CTS4_N_A_MARK,
+ RTS4_N_A_MARK, CTS4_N_A_MARK,
};
static const unsigned int scif4_data_b_pins[] = {
/* RX, TX */
@@ -3424,7 +3416,7 @@ static const unsigned int scif4_ctrl_b_pins[] = {
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
};
static const unsigned int scif4_ctrl_b_mux[] = {
- RTS4_N_TANS_B_MARK, CTS4_N_B_MARK,
+ RTS4_N_B_MARK, CTS4_N_B_MARK,
};
static const unsigned int scif4_data_c_pins[] = {
/* RX, TX */
@@ -3445,7 +3437,7 @@ static const unsigned int scif4_ctrl_c_pins[] = {
RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
};
static const unsigned int scif4_ctrl_c_mux[] = {
- RTS4_N_TANS_C_MARK, CTS4_N_C_MARK,
+ RTS4_N_C_MARK, CTS4_N_C_MARK,
};
/* - SCIF5 ------------------------------------------------------------------ */
static const unsigned int scif5_data_a_pins[] = {
@@ -3778,12 +3770,12 @@ static const unsigned int ssi3_data_pins[] = {
static const unsigned int ssi3_data_mux[] = {
SSI_SDATA3_MARK,
};
-static const unsigned int ssi34_ctrl_pins[] = {
+static const unsigned int ssi349_ctrl_pins[] = {
/* SCK, WS */
RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
};
-static const unsigned int ssi34_ctrl_mux[] = {
- SSI_SCK34_MARK, SSI_WS34_MARK,
+static const unsigned int ssi349_ctrl_mux[] = {
+ SSI_SCK349_MARK, SSI_WS349_MARK,
};
static const unsigned int ssi4_data_pins[] = {
/* SDATA */
@@ -3937,7 +3929,7 @@ static const unsigned int usb3_pins[] = {
RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31),
};
static const unsigned int usb3_mux[] = {
- USB3_PWEN_MARK, USB3_OVC_MARK,
+ USB2_CH3_PWEN_MARK, USB2_CH3_OVC_MARK,
};
/* - USB30 ------------------------------------------------------------------ */
@@ -4567,7 +4559,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(ssi2_ctrl_a),
SH_PFC_PIN_GROUP(ssi2_ctrl_b),
SH_PFC_PIN_GROUP(ssi3_data),
- SH_PFC_PIN_GROUP(ssi34_ctrl),
+ SH_PFC_PIN_GROUP(ssi349_ctrl),
SH_PFC_PIN_GROUP(ssi4_data),
SH_PFC_PIN_GROUP(ssi4_ctrl),
SH_PFC_PIN_GROUP(ssi5_data),
@@ -5246,7 +5238,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0, 0,
0, 0,
0, 0,
- 0, 0,
+ GP_1_28_FN, GPSR1_28,
GP_1_27_FN, GPSR1_27,
GP_1_26_FN, GPSR1_26,
GP_1_25_FN, GPSR1_25,
@@ -5560,7 +5552,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
IP7_27_24
IP7_23_20
IP7_19_16
- IP7_15_12
+ /* IP7_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
IP7_11_8
IP7_7_4
IP7_3_0 }
@@ -5741,7 +5733,8 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL2_28_27
MOD_SEL2_26
MOD_SEL2_25_24_23
- MOD_SEL2_22
+ /* RESERVED 22 */
+ 0, 0,
MOD_SEL2_21
MOD_SEL2_20
MOD_SEL2_19
@@ -5847,7 +5840,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(1, 19), 0, 3 }, /* A19 */
} },
{ PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
- { PIN_NUMBER('F', 1), 28, 3 }, /* CLKOUT */
+ { RCAR_GP_PIN(1, 28), 28, 3 }, /* CLKOUT */
{ RCAR_GP_PIN(1, 20), 24, 3 }, /* CS0 */
{ RCAR_GP_PIN(1, 21), 20, 3 }, /* CS1_A26 */
{ RCAR_GP_PIN(1, 22), 16, 3 }, /* BS */
@@ -5977,8 +5970,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 2), 24, 3 }, /* SSI_SDATA0 */
{ RCAR_GP_PIN(6, 3), 20, 3 }, /* SSI_SDATA1 */
{ RCAR_GP_PIN(6, 4), 16, 3 }, /* SSI_SDATA2 */
- { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK34 */
- { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS34 */
+ { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK349 */
+ { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS349 */
{ RCAR_GP_PIN(6, 7), 4, 3 }, /* SSI_SDATA3 */
{ RCAR_GP_PIN(6, 8), 0, 3 }, /* SSI_SCK4 */
} },
@@ -6008,8 +6001,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 27), 20, 3 }, /* USB1_OVC */
{ RCAR_GP_PIN(6, 28), 16, 3 }, /* USB30_PWEN */
{ RCAR_GP_PIN(6, 29), 12, 3 }, /* USB30_OVC */
- { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB3_PWEN */
- { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB3_OVC */
+ { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB2_CH3_PWEN */
+ { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB2_CH3_OVC */
} },
{ },
};
@@ -6136,9 +6129,9 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */
{ RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */
{ RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */
- { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N_A26 */
+ { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N */
{ RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */
- { PIN_NUMBER('F', 1), PU2, 0 }, /* CLKOUT */
+ { RCAR_GP_PIN(1, 28), PU2, 0 }, /* CLKOUT */
{ RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */
{ RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */
@@ -6224,8 +6217,8 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */
{ RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */
{ RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */
- { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS34 */
- { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK34 */
+ { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */
+ { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */
{ RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */
{ RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */
{ RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */
@@ -6239,8 +6232,8 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */
{ RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */
- { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB3_OVC */
- { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB3_PWEN */
+ { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB2_CH3_OVC */
+ { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB2_CH3_PWEN */
{ RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */
{ RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */
{ RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */
@@ -6336,6 +6329,10 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = {
.cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs,
+ .pocctrl_reg = 0xe6060380,
+ .puen_base = PUEN,
+ .pud_base = PUD,
+ .nr_bias_regs = 7,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index 1cef61b..7c9e85a6 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -67,7 +67,7 @@
#define GPSR1_24 F_(RD_WR_N, IP4_31_28)
#define GPSR1_23 F_(RD_N, IP4_27_24)
#define GPSR1_22 F_(BS_N, IP4_23_20)
-#define GPSR1_21 F_(CS1_N_A26, IP4_19_16)
+#define GPSR1_21 F_(CS1_N, IP4_19_16)
#define GPSR1_20 F_(CS0_N, IP4_15_12)
#define GPSR1_19 F_(A19, IP4_11_8)
#define GPSR1_18 F_(A18, IP4_7_4)
@@ -163,11 +163,11 @@
#define GPSR5_11 F_(RX2_A, IP13_7_4)
#define GPSR5_10 F_(TX2_A, IP13_3_0)
#define GPSR5_9 F_(SCK2, IP12_31_28)
-#define GPSR5_8 F_(RTS1_N_TANS, IP12_27_24)
+#define GPSR5_8 F_(RTS1_N, IP12_27_24)
#define GPSR5_7 F_(CTS1_N, IP12_23_20)
#define GPSR5_6 F_(TX1_A, IP12_19_16)
#define GPSR5_5 F_(RX1_A, IP12_15_12)
-#define GPSR5_4 F_(RTS0_N_TANS, IP12_11_8)
+#define GPSR5_4 F_(RTS0_N, IP12_11_8)
#define GPSR5_3 F_(CTS0_N, IP12_7_4)
#define GPSR5_2 F_(TX0, IP12_3_0)
#define GPSR5_1 F_(RX0, IP11_31_28)
@@ -199,13 +199,13 @@
#define GPSR6_9 F_(SSI_WS4, IP15_27_24)
#define GPSR6_8 F_(SSI_SCK4, IP15_23_20)
#define GPSR6_7 F_(SSI_SDATA3, IP15_19_16)
-#define GPSR6_6 F_(SSI_WS34, IP15_15_12)
-#define GPSR6_5 F_(SSI_SCK34, IP15_11_8)
+#define GPSR6_6 F_(SSI_WS349, IP15_15_12)
+#define GPSR6_5 F_(SSI_SCK349, IP15_11_8)
#define GPSR6_4 F_(SSI_SDATA2_A, IP15_7_4)
#define GPSR6_3 F_(SSI_SDATA1_A, IP15_3_0)
#define GPSR6_2 F_(SSI_SDATA0, IP14_31_28)
-#define GPSR6_1 F_(SSI_WS0129, IP14_27_24)
-#define GPSR6_0 F_(SSI_SCK0129, IP14_23_20)
+#define GPSR6_1 F_(SSI_WS01239, IP14_27_24)
+#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20)
/* GPSR7 */
#define GPSR7_3 FM(GP7_03)
@@ -220,16 +220,16 @@
#define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0_23_20 FM(AVB_AVTP_CAPTURE_A) F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_TANS_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0_31_28 FM(IRQ1) FM(QPOLA) F_(0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0_23_20 FM(AVB_AVTP_CAPTURE_A) F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0_31_28 FM(IRQ1) FM(QPOLA) F_(0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SYNC_E) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) FM(A25) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) FM(A24) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_15_12 FM(IRQ5) FM(QSTB_QHE) FM(A23) FM(DU_EXVSYNC_DU_VSYNC) FM(VI4_DATA5_B) F_(0, 0) F_(0, 0) FM(MSIOF3_TXD_E) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_19_16 FM(PWM0) FM(AVB_AVTP_PPS)FM(A22) F_(0, 0) FM(VI4_DATA6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IECLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_23_20 FM(PWM1_A) F_(0, 0) FM(A21) FM(HRX3_D) FM(VI4_DATA7_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IERX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP1_27_24 FM(PWM2_A) F_(0, 0) FM(A20) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_15_12 FM(IRQ5) FM(QSTB_QHE) F_(0, 0) FM(DU_EXVSYNC_DU_VSYNC) FM(VI4_DATA5_B) F_(0, 0) F_(0, 0) FM(MSIOF3_TXD_E) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_19_16 FM(PWM0) FM(AVB_AVTP_PPS)F_(0, 0) F_(0, 0) FM(VI4_DATA6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IECLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_23_20 FM(PWM1_A) F_(0, 0) F_(0, 0) FM(HRX3_D) FM(VI4_DATA7_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IERX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP1_27_24 FM(PWM2_A) F_(0, 0) F_(0, 0) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP1_31_28 FM(A0) FM(LCDOUT16) FM(MSIOF3_SYNC_B) F_(0, 0) FM(VI4_DATA8) F_(0, 0) FM(DU_DB0) F_(0, 0) F_(0, 0) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -240,7 +240,7 @@
#define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(SDA6_A) FM(AVB_AVTP_MATCH_B) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_TANS_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0) FM(SCL6_A) FM(AVB_AVTP_CAPTURE_B) FM(PWM2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
@@ -253,12 +253,12 @@
#define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP4_19_16 FM(CS1_N_A26) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLK) F_(0, 0) FM(EX_WAIT0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP4_19_16 FM(CS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLK) F_(0, 0) FM(EX_WAIT0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_23_20 FM(BS_N) FM(QSTVA_QVS) FM(MSIOF3_SCK_D) FM(SCK3) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN1_TX) FM(CANFD1_TX) FM(IETX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_TX_A) FM(CANFD0_TX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP4_31_28 FM(RD_WR_N) F_(0, 0) FM(MSIOF3_RXD_D) FM(TX3_A) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_RX_A) FM(CANFD0_RX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_3_0 FM(WE0_N) F_(0, 0) FM(MSIOF3_TXD_D) FM(CTS3_N) FM(HCTS3_N) F_(0, 0) F_(0, 0) FM(SCL6_B) FM(CAN_CLK) F_(0, 0) FM(IECLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP5_7_4 FM(WE1_N) F_(0, 0) FM(MSIOF3_SS1_D) FM(RTS3_N_TANS) FM(HRTS3_N) F_(0, 0) F_(0, 0) FM(SDA6_B) FM(CAN1_RX) FM(CANFD1_RX) FM(IERX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP5_7_4 FM(WE1_N) F_(0, 0) FM(MSIOF3_SS1_D) FM(RTS3_N) FM(HRTS3_N) F_(0, 0) F_(0, 0) FM(SDA6_B) FM(CAN1_RX) FM(CANFD1_RX) FM(IERX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_11_8 FM(EX_WAIT0_A) FM(QCLK) F_(0, 0) F_(0, 0) FM(VI4_CLK) F_(0, 0) FM(DU_DOTCLKOUT0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP5_19_16 FM(D1) FM(MSIOF2_SS2_B)FM(MSIOF3_SYNC_A) F_(0, 0) FM(VI4_DATA17) FM(VI5_DATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -271,14 +271,13 @@
#define IP6_15_12 FM(D8) FM(LCDOUT0) FM(MSIOF2_SCK_D) FM(SCK4_C) FM(VI4_DATA0_A) F_(0, 0) FM(DU_DR0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_TANS_C)FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_C) FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_7_4 FM(D14) FM(LCDOUT6) FM(MSIOF3_SS1_A) FM(HRX3_C) FM(VI4_DATA6_A) F_(0, 0) FM(DU_DR6) FM(SCL6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU_DR7) FM(SDA6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP7_15_12 FM(FSCLKST) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_19_16 FM(SD0_CLK) F_(0, 0) FM(MSIOF1_SCK_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_23_20 FM(SD0_CMD) F_(0, 0) FM(MSIOF1_SYNC_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_27_24 FM(SD0_DAT0) F_(0, 0) FM(MSIOF1_RXD_E) F_(0, 0) F_(0, 0) FM(TS_SCK0_B) FM(STP_ISCLK_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -291,24 +290,24 @@
#define IP8_23_20 FM(SD1_DAT1) FM(SD2_DAT5) FM(MSIOF1_TXD_G) FM(NFDATA14_B) F_(0, 0) FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP8_27_24 FM(SD1_DAT2) FM(SD2_DAT6) FM(MSIOF1_SS1_G) FM(NFDATA15_B) F_(0, 0) FM(TS_SDAT1_B) FM(STP_ISD_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP8_31_28 FM(SD1_DAT3) FM(SD2_DAT7) FM(MSIOF1_SS2_G) FM(NFRB_N_B) F_(0, 0) FM(TS_SDEN1_B) FM(STP_ISEN_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_3_0 FM(SD2_CLK) F_(0, 0) F_(0, 0) FM(NFDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_7_4 FM(SD2_CMD) F_(0, 0) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_11_8 FM(SD2_DAT0) F_(0, 0) F_(0, 0) FM(NFDATA10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_15_12 FM(SD2_DAT1) F_(0, 0) F_(0, 0) FM(NFDATA11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_19_16 FM(SD2_DAT2) F_(0, 0) F_(0, 0) FM(NFDATA12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_23_20 FM(SD2_DAT3) F_(0, 0) F_(0, 0) FM(NFDATA13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_27_24 FM(SD2_DS) F_(0, 0) F_(0, 0) FM(NFALE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(SATA_DEVSLP_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP9_31_28 FM(SD3_CLK) F_(0, 0) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_3_0 FM(SD3_CMD) F_(0, 0) F_(0, 0) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_7_4 FM(SD3_DAT0) F_(0, 0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_11_8 FM(SD3_DAT1) F_(0, 0) F_(0, 0) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_15_12 FM(SD3_DAT2) F_(0, 0) F_(0, 0) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_19_16 FM(SD3_DAT3) F_(0, 0) F_(0, 0) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_23_20 FM(SD3_DAT4) FM(SD2_CD_A) F_(0, 0) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) F_(0, 0) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP10_31_28 FM(SD3_DAT6) FM(SD3_CD) F_(0, 0) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP11_3_0 FM(SD3_DAT7) FM(SD3_WP) F_(0, 0) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP11_7_4 FM(SD3_DS) F_(0, 0) F_(0, 0) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_3_0 FM(SD2_CLK) F_(0, 0) FM(NFDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_7_4 FM(SD2_CMD) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_11_8 FM(SD2_DAT0) F_(0, 0) FM(NFDATA10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_15_12 FM(SD2_DAT1) F_(0, 0) FM(NFDATA11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_19_16 FM(SD2_DAT2) F_(0, 0) FM(NFDATA12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_23_20 FM(SD2_DAT3) F_(0, 0) FM(NFDATA13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_27_24 FM(SD2_DS) F_(0, 0) FM(NFALE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_3_0 FM(SD3_CMD) F_(0, 0) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_11_8 FM(SD3_DAT1) F_(0, 0) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_15_12 FM(SD3_DAT2) F_(0, 0) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_19_16 FM(SD3_DAT3) F_(0, 0) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_23_20 FM(SD3_DAT4) FM(SD2_CD_A) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP10_31_28 FM(SD3_DAT6) FM(SD3_CD) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP11_3_0 FM(SD3_DAT7) FM(SD3_WP) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP11_7_4 FM(SD3_DS) F_(0, 0) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP11_11_8 FM(SD0_CD) F_(0, 0) FM(NFDATA14_A) F_(0, 0) FM(SCL2_B) FM(SIM0_RST_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
@@ -319,14 +318,14 @@
#define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_C) FM(RIF0_D0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_3_0 FM(TX0) FM(HTX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C) FM(RIF0_D1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_7_4 FM(CTS0_N) FM(HCTS1_N_B) FM(MSIOF1_SYNC_B) F_(0, 0) F_(0, 0) FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C) FM(RIF1_SYNC_B) FM(AUDIO_CLKOUT_C) FM(ADICS_SAMP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP12_11_8 FM(RTS0_N_TANS) FM(HRTS1_N_B) FM(MSIOF1_SS1_B) FM(AUDIO_CLKA_B) FM(SCL2_A) F_(0, 0) FM(STP_IVCXO27_1_C) FM(RIF0_SYNC_B) FM(FSO_TOE_A) FM(ADICHS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP12_11_8 FM(RTS0_N) FM(HRTS1_N_B) FM(MSIOF1_SS1_B) FM(AUDIO_CLKA_B) FM(SCL2_A) F_(0, 0) FM(STP_IVCXO27_1_C) FM(RIF0_SYNC_B) F_(0, 0) FM(ADICHS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_C) FM(RIF1_CLK_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_23_20 FM(CTS1_N) FM(HCTS1_N_A) FM(MSIOF1_RXD_B) F_(0, 0) F_(0, 0) FM(TS_SDEN1_C) FM(STP_ISEN_1_C) FM(RIF1_D0_B) F_(0, 0) FM(ADIDATA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP12_27_24 FM(RTS1_N_TANS) FM(HRTS1_N_A) FM(MSIOF1_TXD_B) F_(0, 0) F_(0, 0) FM(TS_SDAT1_C) FM(STP_ISD_1_C) FM(RIF1_D1_B) F_(0, 0) FM(ADICHS0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP12_27_24 FM(RTS1_N) FM(HRTS1_N_A) FM(MSIOF1_TXD_B) F_(0, 0) F_(0, 0) FM(TS_SDAT1_C) FM(STP_ISD_1_C) FM(RIF1_D1_B) F_(0, 0) FM(ADICHS0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP12_31_28 FM(SCK2) FM(SCIF_CLK_B) FM(MSIOF1_SCK_B) F_(0, 0) F_(0, 0) FM(TS_SCK1_C) FM(STP_ISCLK_1_C) FM(RIF1_CLK_B) F_(0, 0) FM(ADICLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP13_3_0 FM(TX2_A) F_(0, 0) F_(0, 0) FM(SD2_CD_B) FM(SCL1_A) F_(0, 0) FM(FMCLK_A) FM(RIF1_D1_C) F_(0, 0) FM(FSO_CFE_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP13_7_4 FM(RX2_A) F_(0, 0) F_(0, 0) FM(SD2_WP_B) FM(SDA1_A) F_(0, 0) FM(FMIN_A) FM(RIF1_SYNC_C) F_(0, 0) FM(FSO_CFE_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP13_3_0 FM(TX2_A) F_(0, 0) F_(0, 0) FM(SD2_CD_B) FM(SCL1_A) F_(0, 0) FM(FMCLK_A) FM(RIF1_D1_C) F_(0, 0) FM(FSO_CFE_0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP13_7_4 FM(RX2_A) F_(0, 0) F_(0, 0) FM(SD2_WP_B) FM(SDA1_A) F_(0, 0) FM(FMIN_A) FM(RIF1_SYNC_C) F_(0, 0) FM(FSO_CFE_1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP13_11_8 FM(HSCK0) F_(0, 0) FM(MSIOF1_SCK_D) FM(AUDIO_CLKB_A) FM(SSI_SDATA1_B)FM(TS_SCK0_D) FM(STP_ISCLK_0_D) FM(RIF0_CLK_C) F_(0, 0) F_(0, 0) FM(RX5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP13_15_12 FM(HRX0) F_(0, 0) FM(MSIOF1_RXD_D) F_(0, 0) FM(SSI_SDATA2_B)FM(TS_SDEN0_D) FM(STP_ISEN_0_D) FM(RIF0_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP13_19_16 FM(HTX0) F_(0, 0) FM(MSIOF1_TXD_D) F_(0, 0) FM(SSI_SDATA9_B)FM(TS_SDAT0_D) FM(STP_ISD_0_D) FM(RIF0_D1_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -338,15 +337,15 @@
#define IP14_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_15_12 FM(MLB_SIG) FM(RX1_B) FM(MSIOF1_SYNC_F) F_(0, 0) FM(SDA1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP14_19_16 FM(MLB_DAT) FM(TX1_B) FM(MSIOF1_RXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP14_23_20 FM(SSI_SCK0129) F_(0, 0) FM(MSIOF1_TXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP14_27_24 FM(SSI_WS0129) F_(0, 0) FM(MSIOF1_SS1_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP14_23_20 FM(SSI_SCK01239) F_(0, 0) FM(MSIOF1_TXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP14_27_24 FM(SSI_WS01239) F_(0, 0) FM(MSIOF1_SS1_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */
#define IP14_31_28 FM(SSI_SDATA0) F_(0, 0) FM(MSIOF1_SS2_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_3_0 FM(SSI_SDATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_7_4 FM(SSI_SDATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(SSI_SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP15_11_8 FM(SSI_SCK34) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP15_15_12 FM(SSI_WS34) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP15_11_8 FM(SSI_SCK349) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP15_15_12 FM(SSI_WS349) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_19_16 FM(SSI_SDATA3) FM(HRTS2_N_A) FM(MSIOF1_TXD_A) F_(0, 0) F_(0, 0) FM(TS_SCK0_A) FM(STP_ISCLK_0_A) FM(RIF0_D1_A) FM(RIF2_D0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_23_20 FM(SSI_SCK4) FM(HRX2_A) FM(MSIOF1_SCK_A) F_(0, 0) F_(0, 0) FM(TS_SDAT0_A) FM(STP_ISD_0_A) FM(RIF0_CLK_A) FM(RIF2_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP15_27_24 FM(SSI_WS4) FM(HTX2_A) FM(MSIOF1_SYNC_A) F_(0, 0) F_(0, 0) FM(TS_SDEN0_A) FM(STP_ISEN_0_A) FM(RIF0_SYNC_A) FM(RIF2_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -366,9 +365,9 @@
#define IP17_19_16 FM(USB1_PWEN) F_(0, 0) F_(0, 0) FM(SIM0_CLK_C) FM(SSI_SCK1_A) FM(TS_SCK0_E) FM(STP_ISCLK_0_E) FM(FMCLK_B) FM(RIF2_CLK_B) F_(0, 0) FM(SPEEDIN_A) F_(0, 0) F_(0, 0) FM(HTX2_C) F_(0, 0) F_(0, 0)
#define IP17_23_20 FM(USB1_OVC) F_(0, 0) FM(MSIOF1_SS2_C) F_(0, 0) FM(SSI_WS1_A) FM(TS_SDAT0_E) FM(STP_ISD_0_E) FM(FMIN_B) FM(RIF2_SYNC_B) F_(0, 0) FM(REMOCON_B) F_(0, 0) F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0)
#define IP17_27_24 FM(USB30_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_B) FM(SSI_SCK2_B) FM(TS_SDEN1_D) FM(STP_ISEN_1_D) FM(STP_OPWM_0_E)FM(RIF3_D0_B) F_(0, 0) FM(TCLK2_B) FM(TPU0TO0) FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0)
-#define IP17_31_28 FM(USB30_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B) FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D) FM(STP_IVCXO27_0_E)FM(RIF3_D1_B) F_(0, 0) FM(FSO_TOE_B) FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP18_3_0 FM(GP6_30) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) FM(FSO_CFE_0_A) FM(TPU0TO2) F_(0, 0) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0)
-#define IP18_7_4 FM(GP6_31) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) FM(FSO_CFE_1_A) FM(TPU0TO3) F_(0, 0) FM(FMIN_C) FM(FMIN_D) F_(0, 0)
+#define IP17_31_28 FM(USB30_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B) FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D) FM(STP_IVCXO27_0_E)FM(RIF3_D1_B) F_(0, 0) FM(FSO_TOE_N) FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP18_3_0 FM(GP6_30) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0)
+#define IP18_7_4 FM(GP6_31) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) FM(FMIN_C) FM(FMIN_D) F_(0, 0) F_(0, 0)
#define PINMUX_GPSR \
\
@@ -419,7 +418,7 @@ FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_3
FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
-FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
+FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \
FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \
FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
@@ -463,7 +462,6 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL0_19 FM(SEL_HSCIF4_0) FM(SEL_HSCIF4_1)
#define MOD_SEL0_18_17 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) FM(SEL_HSCIF3_2) FM(SEL_HSCIF3_3)
#define MOD_SEL0_16 FM(SEL_HSCIF1_0) FM(SEL_HSCIF1_1)
-#define MOD_SEL0_15 FM(SEL_FSO_0) FM(SEL_FSO_1)
#define MOD_SEL0_14_13 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) FM(SEL_HSCIF2_2) F_(0, 0)
#define MOD_SEL0_12 FM(SEL_ETHERAVB_0) FM(SEL_ETHERAVB_1)
#define MOD_SEL0_11 FM(SEL_DRIF3_0) FM(SEL_DRIF3_1)
@@ -472,7 +470,6 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL0_7_6 FM(SEL_DRIF0_0) FM(SEL_DRIF0_1) FM(SEL_DRIF0_2) F_(0, 0)
#define MOD_SEL0_5 FM(SEL_CANFD0_0) FM(SEL_CANFD0_1)
#define MOD_SEL0_4_3 FM(SEL_ADG_A_0) FM(SEL_ADG_A_1) FM(SEL_ADG_A_2) FM(SEL_ADG_A_3)
-#define MOD_SEL0_2 FM(SEL_5LINE_0) FM(SEL_5LINE_1)
/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */
#define MOD_SEL1_31_30 FM(SEL_TSIF1_0) FM(SEL_TSIF1_1) FM(SEL_TSIF1_2) FM(SEL_TSIF1_3)
@@ -480,7 +477,7 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL1_26 FM(SEL_TIMER_TMU_0) FM(SEL_TIMER_TMU_1)
#define MOD_SEL1_25_24 FM(SEL_SSP1_1_0) FM(SEL_SSP1_1_1) FM(SEL_SSP1_1_2) FM(SEL_SSP1_1_3)
#define MOD_SEL1_23_22_21 FM(SEL_SSP1_0_0) FM(SEL_SSP1_0_1) FM(SEL_SSP1_0_2) FM(SEL_SSP1_0_3) FM(SEL_SSP1_0_4) F_(0, 0) F_(0, 0) F_(0, 0)
-#define MOD_SEL1_20 FM(SEL_SSI_0) FM(SEL_SSI_1)
+#define MOD_SEL1_20 FM(SEL_SSI1_0) FM(SEL_SSI1_1)
#define MOD_SEL1_19 FM(SEL_SPEED_PULSE_0) FM(SEL_SPEED_PULSE_1)
#define MOD_SEL1_18_17 FM(SEL_SIMCARD_0) FM(SEL_SIMCARD_1) FM(SEL_SIMCARD_2) FM(SEL_SIMCARD_3)
#define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1)
@@ -488,7 +485,7 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL1_13 FM(SEL_SCIF3_0) FM(SEL_SCIF3_1)
#define MOD_SEL1_12 FM(SEL_SCIF2_0) FM(SEL_SCIF2_1)
#define MOD_SEL1_11 FM(SEL_SCIF1_0) FM(SEL_SCIF1_1)
-#define MOD_SEL1_10 FM(SEL_SATA_0) FM(SEL_SATA_1)
+#define MOD_SEL1_10 FM(SEL_SCIF_0) FM(SEL_SCIF_1)
#define MOD_SEL1_9 FM(SEL_REMOCON_0) FM(SEL_REMOCON_1)
#define MOD_SEL1_6 FM(SEL_RCAN0_0) FM(SEL_RCAN0_1)
#define MOD_SEL1_5 FM(SEL_PWM6_0) FM(SEL_PWM6_1)
@@ -505,7 +502,7 @@ FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28
#define MOD_SEL2_28_27 FM(SEL_FM_0) FM(SEL_FM_1) FM(SEL_FM_2) FM(SEL_FM_3)
#define MOD_SEL2_26 FM(SEL_SCIF5_0) FM(SEL_SCIF5_1)
#define MOD_SEL2_25_24_23 FM(SEL_I2C6_0) FM(SEL_I2C6_1) FM(SEL_I2C6_2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define MOD_SEL2_22 FM(SEL_NDF_0) FM(SEL_NDF_1)
+#define MOD_SEL2_22 FM(SEL_NDFC_0) FM(SEL_NDFC_1)
#define MOD_SEL2_21 FM(SEL_SSI2_0) FM(SEL_SSI2_1)
#define MOD_SEL2_20 FM(SEL_SSI9_0) FM(SEL_SSI9_1)
#define MOD_SEL2_19 FM(SEL_TIMER_TMU2_0) FM(SEL_TIMER_TMU2_1)
@@ -529,7 +526,7 @@ MOD_SEL0_19 MOD_SEL1_19 MOD_SEL2_19 \
MOD_SEL0_18_17 MOD_SEL1_18_17 MOD_SEL2_18 \
MOD_SEL2_17 \
MOD_SEL0_16 MOD_SEL1_16 \
-MOD_SEL0_15 MOD_SEL1_15_14 \
+ MOD_SEL1_15_14 \
MOD_SEL0_14_13 \
MOD_SEL1_13 \
MOD_SEL0_12 MOD_SEL1_12 \
@@ -541,7 +538,7 @@ MOD_SEL0_7_6 \
MOD_SEL0_5 MOD_SEL1_5 \
MOD_SEL0_4_3 MOD_SEL1_4 \
MOD_SEL1_3 \
-MOD_SEL0_2 MOD_SEL1_2 \
+ MOD_SEL1_2 \
MOD_SEL1_1 \
MOD_SEL1_0 MOD_SEL2_0
@@ -640,7 +637,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL2(IP0_23_20, AVB_AVTP_CAPTURE_A, I2C_SEL_5_0, SEL_ETHERAVB_0),
PINMUX_IPSR_MSEL2(IP0_23_20, MSIOF2_TXD_C, I2C_SEL_5_0, SEL_MSIOF2_2),
- PINMUX_IPSR_MSEL2(IP0_23_20, RTS4_N_TANS_A, I2C_SEL_5_0, SEL_SCIF4_0),
+ PINMUX_IPSR_MSEL2(IP0_23_20, RTS4_N_A, I2C_SEL_5_0, SEL_SCIF4_0),
PINMUX_IPSR_PHYS(IP0_23_20, SDA5, I2C_SEL_5_1),
PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
@@ -657,7 +654,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP0_31_28, VI4_DATA1_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP0_31_28, CAN0_RX_B, SEL_RCAN0_1),
PINMUX_IPSR_MSEL(IP0_31_28, CANFD0_RX_B, SEL_CANFD0_1),
- PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS1_E, SEL_MSIOF3_4),
+ PINMUX_IPSR_MSEL(IP0_31_28, MSIOF3_SS1_E, SEL_MSIOF3_4),
/* IPSR1 */
PINMUX_IPSR_GPSR(IP1_3_0, IRQ2),
@@ -669,7 +666,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
- PINMUX_IPSR_GPSR(IP1_7_4, A25),
PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
@@ -677,7 +673,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
- PINMUX_IPSR_GPSR(IP1_11_8, A24),
PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
@@ -685,7 +680,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_15_12, IRQ5),
PINMUX_IPSR_GPSR(IP1_15_12, QSTB_QHE),
- PINMUX_IPSR_GPSR(IP1_15_12, A23),
PINMUX_IPSR_GPSR(IP1_15_12, DU_EXVSYNC_DU_VSYNC),
PINMUX_IPSR_MSEL(IP1_15_12, VI4_DATA5_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_15_12, PWM6_B, SEL_PWM6_1),
@@ -693,19 +687,16 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP1_19_16, PWM0),
PINMUX_IPSR_GPSR(IP1_19_16, AVB_AVTP_PPS),
- PINMUX_IPSR_GPSR(IP1_19_16, A22),
PINMUX_IPSR_MSEL(IP1_19_16, VI4_DATA6_B, SEL_VIN4_1),
PINMUX_IPSR_MSEL(IP1_19_16, IECLK_B, SEL_IEBUS_1),
PINMUX_IPSR_MSEL2(IP1_23_20, PWM1_A, I2C_SEL_3_0, SEL_PWM1_0),
- PINMUX_IPSR_MSEL(IP1_23_20, A21, I2C_SEL_3_0),
PINMUX_IPSR_MSEL2(IP1_23_20, HRX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
PINMUX_IPSR_MSEL2(IP1_23_20, VI4_DATA7_B, I2C_SEL_3_0, SEL_VIN4_1),
PINMUX_IPSR_MSEL2(IP1_23_20, IERX_B, I2C_SEL_3_0, SEL_IEBUS_1),
PINMUX_IPSR_PHYS(IP0_23_20, SCL3, I2C_SEL_3_1),
PINMUX_IPSR_MSEL2(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0),
- PINMUX_IPSR_MSEL(IP1_27_24, A20, I2C_SEL_3_0),
PINMUX_IPSR_MSEL2(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3),
PINMUX_IPSR_MSEL2(IP1_27_24, IETX_B, I2C_SEL_3_0, SEL_IEBUS_1),
PINMUX_IPSR_PHYS(IP1_27_24, SDA3, I2C_SEL_3_1),
@@ -786,7 +777,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP3_7_4, A10),
PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
- PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_TANS_B, SEL_SCIF4_1),
+ PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
PINMUX_IPSR_GPSR(IP3_11_8, A11),
@@ -851,7 +842,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
- PINMUX_IPSR_GPSR(IP4_19_16, CS1_N_A26),
+ PINMUX_IPSR_GPSR(IP4_19_16, CS1_N),
PINMUX_IPSR_GPSR(IP4_19_16, VI5_CLK),
PINMUX_IPSR_MSEL(IP4_19_16, EX_WAIT0_B, SEL_LBSC_1),
@@ -889,7 +880,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP5_7_4, WE1_N),
PINMUX_IPSR_MSEL(IP5_7_4, MSIOF3_SS1_D, SEL_MSIOF3_3),
- PINMUX_IPSR_GPSR(IP5_7_4, RTS3_N_TANS),
+ PINMUX_IPSR_GPSR(IP5_7_4, RTS3_N),
PINMUX_IPSR_GPSR(IP5_7_4, HRTS3_N),
PINMUX_IPSR_MSEL(IP5_7_4, SDA6_B, SEL_I2C6_1),
PINMUX_IPSR_GPSR(IP5_7_4, CAN1_RX),
@@ -970,7 +961,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3),
PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1),
PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0),
- PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_TANS_C, SEL_SCIF4_2),
+ PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_C, SEL_SCIF4_2),
PINMUX_IPSR_GPSR(IP6_27_24, DU_DR3),
PINMUX_IPSR_GPSR(IP6_31_28, D12),
@@ -1004,8 +995,6 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP7_11_8, DU_DR7),
PINMUX_IPSR_MSEL(IP7_11_8, SDA6_C, SEL_I2C6_2),
- PINMUX_IPSR_GPSR(IP7_15_12, FSCLKST),
-
PINMUX_IPSR_GPSR(IP7_19_16, SD0_CLK),
PINMUX_IPSR_MSEL(IP7_19_16, MSIOF1_SCK_E, SEL_MSIOF1_4),
PINMUX_IPSR_MSEL(IP7_19_16, STP_OPWM_0_B, SEL_SSP1_0_1),
@@ -1041,35 +1030,35 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP8_15_12, SD1_CMD),
PINMUX_IPSR_MSEL(IP8_15_12, MSIOF1_SYNC_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_15_12, NFCE_N_B, SEL_NDF_1),
+ PINMUX_IPSR_MSEL(IP8_15_12, NFCE_N_B, SEL_NDFC_1),
PINMUX_IPSR_MSEL(IP8_15_12, SIM0_D_A, SEL_SIMCARD_0),
PINMUX_IPSR_MSEL(IP8_15_12, STP_IVCXO27_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_19_16, SD1_DAT0),
PINMUX_IPSR_GPSR(IP8_19_16, SD2_DAT4),
PINMUX_IPSR_MSEL(IP8_19_16, MSIOF1_RXD_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_19_16, NFWP_N_B, SEL_NDF_1),
+ PINMUX_IPSR_MSEL(IP8_19_16, NFWP_N_B, SEL_NDFC_1),
PINMUX_IPSR_MSEL(IP8_19_16, TS_SCK1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_19_16, STP_ISCLK_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_23_20, SD1_DAT1),
PINMUX_IPSR_GPSR(IP8_23_20, SD2_DAT5),
PINMUX_IPSR_MSEL(IP8_23_20, MSIOF1_TXD_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_23_20, NFDATA14_B, SEL_NDF_1),
+ PINMUX_IPSR_MSEL(IP8_23_20, NFDATA14_B, SEL_NDFC_1),
PINMUX_IPSR_MSEL(IP8_23_20, TS_SPSYNC1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_23_20, STP_ISSYNC_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_27_24, SD1_DAT2),
PINMUX_IPSR_GPSR(IP8_27_24, SD2_DAT6),
PINMUX_IPSR_MSEL(IP8_27_24, MSIOF1_SS1_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_27_24, NFDATA15_B, SEL_NDF_1),
+ PINMUX_IPSR_MSEL(IP8_27_24, NFDATA15_B, SEL_NDFC_1),
PINMUX_IPSR_MSEL(IP8_27_24, TS_SDAT1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_27_24, STP_ISD_1_B, SEL_SSP1_1_1),
PINMUX_IPSR_GPSR(IP8_31_28, SD1_DAT3),
PINMUX_IPSR_GPSR(IP8_31_28, SD2_DAT7),
PINMUX_IPSR_MSEL(IP8_31_28, MSIOF1_SS2_G, SEL_MSIOF1_6),
- PINMUX_IPSR_MSEL(IP8_31_28, NFRB_N_B, SEL_NDF_1),
+ PINMUX_IPSR_MSEL(IP8_31_28, NFRB_N_B, SEL_NDFC_1),
PINMUX_IPSR_MSEL(IP8_31_28, TS_SDEN1_B, SEL_TSIF1_1),
PINMUX_IPSR_MSEL(IP8_31_28, STP_ISEN_1_B, SEL_SSP1_1_1),
@@ -1135,17 +1124,21 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP11_7_4, NFCLE),
PINMUX_IPSR_GPSR(IP11_11_8, SD0_CD),
+ PINMUX_IPSR_MSEL(IP11_11_8, NFDATA14_A, SEL_NDFC_0),
PINMUX_IPSR_MSEL(IP11_11_8, SCL2_B, SEL_I2C2_1),
PINMUX_IPSR_MSEL(IP11_11_8, SIM0_RST_A, SEL_SIMCARD_0),
PINMUX_IPSR_GPSR(IP11_15_12, SD0_WP),
+ PINMUX_IPSR_MSEL(IP11_15_12, NFDATA15_A, SEL_NDFC_0),
PINMUX_IPSR_MSEL(IP11_15_12, SDA2_B, SEL_I2C2_1),
PINMUX_IPSR_MSEL(IP11_19_16, SD1_CD, I2C_SEL_0_0),
+ PINMUX_IPSR_MSEL2(IP11_19_16, NFRB_N_A, I2C_SEL_0_0, SEL_NDFC_0),
PINMUX_IPSR_MSEL2(IP11_19_16, SIM0_CLK_B, I2C_SEL_0_0, SEL_SIMCARD_1),
PINMUX_IPSR_PHYS(IP11_19_16, SCL0, I2C_SEL_0_1),
PINMUX_IPSR_MSEL(IP11_23_20, SD1_WP, I2C_SEL_0_0),
+ PINMUX_IPSR_MSEL2(IP11_23_20, NFCE_N_A, I2C_SEL_0_0, SEL_NDFC_0),
PINMUX_IPSR_MSEL2(IP11_23_20, SIM0_D_B, I2C_SEL_0_0, SEL_SIMCARD_1),
PINMUX_IPSR_PHYS(IP11_23_20, SDA0, I2C_SEL_0_1),
@@ -1182,14 +1175,13 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP12_7_4, AUDIO_CLKOUT_C),
PINMUX_IPSR_GPSR(IP12_7_4, ADICS_SAMP),
- PINMUX_IPSR_GPSR(IP12_11_8, RTS0_N_TANS),
+ PINMUX_IPSR_GPSR(IP12_11_8, RTS0_N),
PINMUX_IPSR_MSEL(IP12_11_8, HRTS1_N_B, SEL_HSCIF1_1),
PINMUX_IPSR_MSEL(IP12_11_8, MSIOF1_SS1_B, SEL_MSIOF1_1),
PINMUX_IPSR_MSEL(IP12_11_8, AUDIO_CLKA_B, SEL_ADG_A_1),
PINMUX_IPSR_MSEL(IP12_11_8, SCL2_A, SEL_I2C2_0),
PINMUX_IPSR_MSEL(IP12_11_8, STP_IVCXO27_1_C, SEL_SSP1_1_2),
PINMUX_IPSR_MSEL(IP12_11_8, RIF0_SYNC_B, SEL_DRIF0_1),
- PINMUX_IPSR_MSEL(IP12_11_8, FSO_TOE_A, SEL_FSO_0),
PINMUX_IPSR_GPSR(IP12_11_8, ADICHS1),
PINMUX_IPSR_MSEL(IP12_15_12, RX1_A, SEL_SCIF1_0),
@@ -1212,7 +1204,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP12_23_20, RIF1_D0_B, SEL_DRIF1_1),
PINMUX_IPSR_GPSR(IP12_23_20, ADIDATA),
- PINMUX_IPSR_GPSR(IP12_27_24, RTS1_N_TANS),
+ PINMUX_IPSR_GPSR(IP12_27_24, RTS1_N),
PINMUX_IPSR_MSEL(IP12_27_24, HRTS1_N_A, SEL_HSCIF1_0),
PINMUX_IPSR_MSEL(IP12_27_24, MSIOF1_TXD_B, SEL_MSIOF1_1),
PINMUX_IPSR_MSEL(IP12_27_24, TS_SDAT1_C, SEL_TSIF1_2),
@@ -1221,7 +1213,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP12_27_24, ADICHS0),
PINMUX_IPSR_GPSR(IP12_31_28, SCK2),
- PINMUX_IPSR_MSEL(IP12_31_28, SCIF_CLK_B, SEL_SCIF1_1),
+ PINMUX_IPSR_MSEL(IP12_31_28, SCIF_CLK_B, SEL_SCIF_1),
PINMUX_IPSR_MSEL(IP12_31_28, MSIOF1_SCK_B, SEL_MSIOF1_1),
PINMUX_IPSR_MSEL(IP12_31_28, TS_SCK1_C, SEL_TSIF1_2),
PINMUX_IPSR_MSEL(IP12_31_28, STP_ISCLK_1_C, SEL_SSP1_1_2),
@@ -1234,19 +1226,19 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP13_3_0, SCL1_A, SEL_I2C1_0),
PINMUX_IPSR_MSEL(IP13_3_0, FMCLK_A, SEL_FM_0),
PINMUX_IPSR_MSEL(IP13_3_0, RIF1_D1_C, SEL_DRIF1_2),
- PINMUX_IPSR_MSEL(IP13_3_0, FSO_CFE_0_B, SEL_FSO_1),
+ PINMUX_IPSR_GPSR(IP13_3_0, FSO_CFE_0_N),
PINMUX_IPSR_MSEL(IP13_7_4, RX2_A, SEL_SCIF2_0),
PINMUX_IPSR_MSEL(IP13_7_4, SD2_WP_B, SEL_SDHI2_1),
PINMUX_IPSR_MSEL(IP13_7_4, SDA1_A, SEL_I2C1_0),
PINMUX_IPSR_MSEL(IP13_7_4, FMIN_A, SEL_FM_0),
PINMUX_IPSR_MSEL(IP13_7_4, RIF1_SYNC_C, SEL_DRIF1_2),
- PINMUX_IPSR_MSEL(IP13_7_4, FSO_CFE_1_B, SEL_FSO_1),
+ PINMUX_IPSR_GPSR(IP13_7_4, FSO_CFE_1_N),
PINMUX_IPSR_GPSR(IP13_11_8, HSCK0),
PINMUX_IPSR_MSEL(IP13_11_8, MSIOF1_SCK_D, SEL_MSIOF1_3),
PINMUX_IPSR_MSEL(IP13_11_8, AUDIO_CLKB_A, SEL_ADG_B_0),
- PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA1_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA1_B, SEL_SSI1_1),
PINMUX_IPSR_MSEL(IP13_11_8, TS_SCK0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_11_8, STP_ISCLK_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_11_8, RIF0_CLK_C, SEL_DRIF0_2),
@@ -1254,14 +1246,14 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_15_12, HRX0),
PINMUX_IPSR_MSEL(IP13_15_12, MSIOF1_RXD_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA2_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA2_B, SEL_SSI2_1),
PINMUX_IPSR_MSEL(IP13_15_12, TS_SDEN0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_15_12, STP_ISEN_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_15_12, RIF0_D0_C, SEL_DRIF0_2),
PINMUX_IPSR_GPSR(IP13_19_16, HTX0),
PINMUX_IPSR_MSEL(IP13_19_16, MSIOF1_TXD_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_19_16, SSI_SDATA9_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP13_19_16, SSI_SDATA9_B, SEL_SSI9_1),
PINMUX_IPSR_MSEL(IP13_19_16, TS_SDAT0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_19_16, STP_ISD_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_19_16, RIF0_D1_C, SEL_DRIF0_2),
@@ -1269,7 +1261,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_23_20, HCTS0_N),
PINMUX_IPSR_MSEL(IP13_23_20, RX2_B, SEL_SCIF2_1),
PINMUX_IPSR_MSEL(IP13_23_20, MSIOF1_SYNC_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK9_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK9_A, SEL_SSI9_0),
PINMUX_IPSR_MSEL(IP13_23_20, TS_SPSYNC0_D, SEL_TSIF0_3),
PINMUX_IPSR_MSEL(IP13_23_20, STP_ISSYNC_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_23_20, RIF0_SYNC_C, SEL_DRIF0_2),
@@ -1278,7 +1270,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP13_27_24, HRTS0_N),
PINMUX_IPSR_MSEL(IP13_27_24, TX2_B, SEL_SCIF2_1),
PINMUX_IPSR_MSEL(IP13_27_24, MSIOF1_SS1_D, SEL_MSIOF1_3),
- PINMUX_IPSR_MSEL(IP13_27_24, SSI_WS9_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP13_27_24, SSI_WS9_A, SEL_SSI9_0),
PINMUX_IPSR_MSEL(IP13_27_24, STP_IVCXO27_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_MSEL(IP13_27_24, BPFCLK_A, SEL_FM_0),
PINMUX_IPSR_GPSR(IP13_27_24, AUDIO_CLKOUT2_A),
@@ -1291,9 +1283,9 @@ static const u16 pinmux_data[] = {
/* IPSR14 */
PINMUX_IPSR_GPSR(IP14_3_0, MSIOF0_SS1),
PINMUX_IPSR_MSEL(IP14_3_0, RX5_A, SEL_SCIF5_0),
- PINMUX_IPSR_MSEL(IP14_3_0, NFWP_N_A, SEL_NDF_0),
+ PINMUX_IPSR_MSEL(IP14_3_0, NFWP_N_A, SEL_NDFC_0),
PINMUX_IPSR_MSEL(IP14_3_0, AUDIO_CLKA_C, SEL_ADG_A_2),
- PINMUX_IPSR_MSEL(IP14_3_0, SSI_SCK2_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP14_3_0, SSI_SCK2_A, SEL_SSI2_0),
PINMUX_IPSR_MSEL(IP14_3_0, STP_IVCXO27_0_C, SEL_SSP1_0_2),
PINMUX_IPSR_GPSR(IP14_3_0, AUDIO_CLKOUT3_A),
PINMUX_IPSR_MSEL(IP14_3_0, TCLK1_B, SEL_TIMER_TMU_1),
@@ -1302,7 +1294,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP14_7_4, TX5_A, SEL_SCIF5_0),
PINMUX_IPSR_MSEL(IP14_7_4, MSIOF1_SS2_D, SEL_MSIOF1_3),
PINMUX_IPSR_MSEL(IP14_7_4, AUDIO_CLKC_A, SEL_ADG_C_0),
- PINMUX_IPSR_MSEL(IP14_7_4, SSI_WS2_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP14_7_4, SSI_WS2_A, SEL_SSI2_0),
PINMUX_IPSR_MSEL(IP14_7_4, STP_OPWM_0_D, SEL_SSP1_0_3),
PINMUX_IPSR_GPSR(IP14_7_4, AUDIO_CLKOUT_D),
PINMUX_IPSR_MSEL(IP14_7_4, SPEEDIN_B, SEL_SPEED_PULSE_1),
@@ -1320,26 +1312,26 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP14_19_16, TX1_B, SEL_SCIF1_1),
PINMUX_IPSR_MSEL(IP14_19_16, MSIOF1_RXD_F, SEL_MSIOF1_5),
- PINMUX_IPSR_GPSR(IP14_23_20, SSI_SCK0129),
+ PINMUX_IPSR_GPSR(IP14_23_20, SSI_SCK01239),
PINMUX_IPSR_MSEL(IP14_23_20, MSIOF1_TXD_F, SEL_MSIOF1_5),
- PINMUX_IPSR_GPSR(IP14_27_24, SSI_WS0129),
+ PINMUX_IPSR_GPSR(IP14_27_24, SSI_WS01239),
PINMUX_IPSR_MSEL(IP14_27_24, MSIOF1_SS1_F, SEL_MSIOF1_5),
PINMUX_IPSR_GPSR(IP14_31_28, SSI_SDATA0),
PINMUX_IPSR_MSEL(IP14_31_28, MSIOF1_SS2_F, SEL_MSIOF1_5),
/* IPSR15 */
- PINMUX_IPSR_MSEL(IP15_3_0, SSI_SDATA1_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP15_3_0, SSI_SDATA1_A, SEL_SSI1_0),
- PINMUX_IPSR_MSEL(IP15_7_4, SSI_SDATA2_A, SEL_SSI_0),
- PINMUX_IPSR_MSEL(IP15_7_4, SSI_SCK1_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP15_7_4, SSI_SDATA2_A, SEL_SSI2_0),
+ PINMUX_IPSR_MSEL(IP15_7_4, SSI_SCK1_B, SEL_SSI1_1),
- PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK34),
+ PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK349),
PINMUX_IPSR_MSEL(IP15_11_8, MSIOF1_SS1_A, SEL_MSIOF1_0),
PINMUX_IPSR_MSEL(IP15_11_8, STP_OPWM_0_A, SEL_SSP1_0_0),
- PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS34),
+ PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS349),
PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0),
PINMUX_IPSR_MSEL(IP15_15_12, MSIOF1_SS2_A, SEL_MSIOF1_0),
PINMUX_IPSR_MSEL(IP15_15_12, STP_IVCXO27_0_A, SEL_SSP1_0_0),
@@ -1409,7 +1401,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP16_23_20, STP_ISEN_1_A, SEL_SSP1_1_0),
PINMUX_IPSR_MSEL(IP16_23_20, RIF1_D0_A, SEL_DRIF1_0),
PINMUX_IPSR_MSEL(IP16_23_20, RIF3_D0_A, SEL_DRIF3_0),
- PINMUX_IPSR_MSEL(IP16_23_20, TCLK2_A, SEL_TIMER_TMU_0),
+ PINMUX_IPSR_MSEL(IP16_23_20, TCLK2_A, SEL_TIMER_TMU2_0),
PINMUX_IPSR_GPSR(IP16_27_24, SSI_SDATA8),
PINMUX_IPSR_MSEL(IP16_27_24, HRTS2_N_B, SEL_HSCIF2_1),
@@ -1419,21 +1411,21 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_MSEL(IP16_27_24, RIF1_D1_A, SEL_DRIF1_0),
PINMUX_IPSR_MSEL(IP16_27_24, RIF3_D1_A, SEL_DRIF3_0),
- PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA9_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA9_A, SEL_SSI9_0),
PINMUX_IPSR_MSEL(IP16_31_28, HSCK2_B, SEL_HSCIF2_1),
PINMUX_IPSR_MSEL(IP16_31_28, MSIOF1_SS1_C, SEL_MSIOF1_2),
PINMUX_IPSR_MSEL(IP16_31_28, HSCK1_A, SEL_HSCIF1_0),
- PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI1_1),
PINMUX_IPSR_GPSR(IP16_31_28, SCK1),
PINMUX_IPSR_MSEL(IP16_31_28, STP_IVCXO27_1_A, SEL_SSP1_1_0),
- PINMUX_IPSR_GPSR(IP16_31_28, SCK5_A),
+ PINMUX_IPSR_MSEL(IP16_31_28, SCK5_A, SEL_SCIF5_0),
/* IPSR17 */
PINMUX_IPSR_MSEL(IP17_3_0, AUDIO_CLKA_A, SEL_ADG_A_0),
PINMUX_IPSR_GPSR(IP17_3_0, CC5_OSCOUT),
PINMUX_IPSR_MSEL(IP17_7_4, AUDIO_CLKB_B, SEL_ADG_B_1),
- PINMUX_IPSR_MSEL(IP17_7_4, SCIF_CLK_A, SEL_SCIF1_0),
+ PINMUX_IPSR_MSEL(IP17_7_4, SCIF_CLK_A, SEL_SCIF_0),
PINMUX_IPSR_MSEL(IP17_7_4, STP_IVCXO27_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP17_7_4, REMOCON_A, SEL_REMOCON_0),
PINMUX_IPSR_MSEL(IP17_7_4, TCLK1_A, SEL_TIMER_TMU_0),
@@ -1455,7 +1447,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_19_16, USB1_PWEN),
PINMUX_IPSR_MSEL(IP17_19_16, SIM0_CLK_C, SEL_SIMCARD_2),
- PINMUX_IPSR_MSEL(IP17_19_16, SSI_SCK1_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP17_19_16, SSI_SCK1_A, SEL_SSI1_0),
PINMUX_IPSR_MSEL(IP17_19_16, TS_SCK0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP17_19_16, STP_ISCLK_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_19_16, FMCLK_B, SEL_FM_1),
@@ -1465,7 +1457,7 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_23_20, USB1_OVC),
PINMUX_IPSR_MSEL(IP17_23_20, MSIOF1_SS2_C, SEL_MSIOF1_2),
- PINMUX_IPSR_MSEL(IP17_23_20, SSI_WS1_A, SEL_SSI_0),
+ PINMUX_IPSR_MSEL(IP17_23_20, SSI_WS1_A, SEL_SSI1_0),
PINMUX_IPSR_MSEL(IP17_23_20, TS_SDAT0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP17_23_20, STP_ISD_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_23_20, FMIN_B, SEL_FM_1),
@@ -1475,46 +1467,44 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_GPSR(IP17_27_24, USB30_PWEN),
PINMUX_IPSR_GPSR(IP17_27_24, AUDIO_CLKOUT_B),
- PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI2_1),
PINMUX_IPSR_MSEL(IP17_27_24, TS_SDEN1_D, SEL_TSIF1_3),
- PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_2),
+ PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP17_27_24, STP_OPWM_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_27_24, RIF3_D0_B, SEL_DRIF3_1),
- PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU_1),
+ PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU2_1),
PINMUX_IPSR_GPSR(IP17_27_24, TPU0TO0),
PINMUX_IPSR_MSEL(IP17_27_24, BPFCLK_C, SEL_FM_2),
PINMUX_IPSR_MSEL(IP17_27_24, HRTS2_N_C, SEL_HSCIF2_2),
PINMUX_IPSR_GPSR(IP17_31_28, USB30_OVC),
PINMUX_IPSR_GPSR(IP17_31_28, AUDIO_CLKOUT1_B),
- PINMUX_IPSR_MSEL(IP17_31_28, SSI_WS2_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP17_31_28, SSI_WS2_B, SEL_SSI2_1),
PINMUX_IPSR_MSEL(IP17_31_28, TS_SPSYNC1_D, SEL_TSIF1_3),
PINMUX_IPSR_MSEL(IP17_31_28, STP_ISSYNC_1_D, SEL_SSP1_1_3),
PINMUX_IPSR_MSEL(IP17_31_28, STP_IVCXO27_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP17_31_28, RIF3_D1_B, SEL_DRIF3_1),
- PINMUX_IPSR_MSEL(IP17_31_28, FSO_TOE_B, SEL_FSO_1),
+ PINMUX_IPSR_GPSR(IP17_31_28, FSO_TOE_N),
PINMUX_IPSR_GPSR(IP17_31_28, TPU0TO1),
/* IPSR18 */
PINMUX_IPSR_GPSR(IP18_3_0, GP6_30),
PINMUX_IPSR_GPSR(IP18_3_0, AUDIO_CLKOUT2_B),
- PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI9_1),
PINMUX_IPSR_MSEL(IP18_3_0, TS_SDEN0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP18_3_0, STP_ISEN_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP18_3_0, RIF2_D0_B, SEL_DRIF2_1),
PINMUX_IPSR_GPSR(IP18_3_0, TPU0TO2),
- PINMUX_IPSR_MSEL(IP18_3_0, FSO_CFE_0_A, SEL_FSO_0),
PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_C, SEL_FM_2),
PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_D, SEL_FM_3),
PINMUX_IPSR_GPSR(IP18_7_4, GP6_31),
PINMUX_IPSR_GPSR(IP18_7_4, AUDIO_CLKOUT3_B),
- PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI_1),
+ PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI9_1),
PINMUX_IPSR_MSEL(IP18_7_4, TS_SPSYNC0_E, SEL_TSIF0_4),
PINMUX_IPSR_MSEL(IP18_7_4, STP_ISSYNC_0_E, SEL_SSP1_0_4),
PINMUX_IPSR_MSEL(IP18_7_4, RIF2_D1_B, SEL_DRIF2_1),
PINMUX_IPSR_GPSR(IP18_7_4, TPU0TO3),
- PINMUX_IPSR_MSEL(IP18_7_4, FSO_CFE_1_A, SEL_FSO_0),
PINMUX_IPSR_MSEL(IP18_7_4, FMIN_C, SEL_FM_2),
PINMUX_IPSR_MSEL(IP18_7_4, FMIN_D, SEL_FM_3),
@@ -3286,7 +3276,7 @@ static const unsigned int scif0_ctrl_pins[] = {
RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3),
};
static const unsigned int scif0_ctrl_mux[] = {
- RTS0_N_TANS_MARK, CTS0_N_MARK,
+ RTS0_N_MARK, CTS0_N_MARK,
};
/* - SCIF1 ------------------------------------------------------------------ */
static const unsigned int scif1_data_a_pins[] = {
@@ -3308,7 +3298,7 @@ static const unsigned int scif1_ctrl_pins[] = {
RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7),
};
static const unsigned int scif1_ctrl_mux[] = {
- RTS1_N_TANS_MARK, CTS1_N_MARK,
+ RTS1_N_MARK, CTS1_N_MARK,
};
static const unsigned int scif1_data_b_pins[] = {
@@ -3360,7 +3350,7 @@ static const unsigned int scif3_ctrl_pins[] = {
RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
};
static const unsigned int scif3_ctrl_mux[] = {
- RTS3_N_TANS_MARK, CTS3_N_MARK,
+ RTS3_N_MARK, CTS3_N_MARK,
};
static const unsigned int scif3_data_b_pins[] = {
/* RX, TX */
@@ -3389,7 +3379,7 @@ static const unsigned int scif4_ctrl_a_pins[] = {
RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
};
static const unsigned int scif4_ctrl_a_mux[] = {
- RTS4_N_TANS_A_MARK, CTS4_N_A_MARK,
+ RTS4_N_A_MARK, CTS4_N_A_MARK,
};
static const unsigned int scif4_data_b_pins[] = {
/* RX, TX */
@@ -3410,7 +3400,7 @@ static const unsigned int scif4_ctrl_b_pins[] = {
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
};
static const unsigned int scif4_ctrl_b_mux[] = {
- RTS4_N_TANS_B_MARK, CTS4_N_B_MARK,
+ RTS4_N_B_MARK, CTS4_N_B_MARK,
};
static const unsigned int scif4_data_c_pins[] = {
/* RX, TX */
@@ -3431,7 +3421,7 @@ static const unsigned int scif4_ctrl_c_pins[] = {
RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
};
static const unsigned int scif4_ctrl_c_mux[] = {
- RTS4_N_TANS_C_MARK, CTS4_N_C_MARK,
+ RTS4_N_C_MARK, CTS4_N_C_MARK,
};
/* - SCIF5 ------------------------------------------------------------------ */
static const unsigned int scif5_data_a_pins[] = {
@@ -3695,12 +3685,12 @@ static const unsigned int ssi0_data_pins[] = {
static const unsigned int ssi0_data_mux[] = {
SSI_SDATA0_MARK,
};
-static const unsigned int ssi0129_ctrl_pins[] = {
+static const unsigned int ssi01239_ctrl_pins[] = {
/* SCK, WS */
RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
};
-static const unsigned int ssi0129_ctrl_mux[] = {
- SSI_SCK0129_MARK, SSI_WS0129_MARK,
+static const unsigned int ssi01239_ctrl_mux[] = {
+ SSI_SCK01239_MARK, SSI_WS01239_MARK,
};
static const unsigned int ssi1_data_a_pins[] = {
/* SDATA */
@@ -3765,12 +3755,12 @@ static const unsigned int ssi3_data_pins[] = {
static const unsigned int ssi3_data_mux[] = {
SSI_SDATA3_MARK,
};
-static const unsigned int ssi34_ctrl_pins[] = {
+static const unsigned int ssi349_ctrl_pins[] = {
/* SCK, WS */
RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6),
};
-static const unsigned int ssi34_ctrl_mux[] = {
- SSI_SCK34_MARK, SSI_WS34_MARK,
+static const unsigned int ssi349_ctrl_mux[] = {
+ SSI_SCK349_MARK, SSI_WS349_MARK,
};
static const unsigned int ssi4_data_pins[] = {
/* SDATA */
@@ -4478,7 +4468,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(sdhi3_wp),
SH_PFC_PIN_GROUP(sdhi3_ds),
SH_PFC_PIN_GROUP(ssi0_data),
- SH_PFC_PIN_GROUP(ssi0129_ctrl),
+ SH_PFC_PIN_GROUP(ssi01239_ctrl),
SH_PFC_PIN_GROUP(ssi1_data_a),
SH_PFC_PIN_GROUP(ssi1_data_b),
SH_PFC_PIN_GROUP(ssi1_ctrl_a),
@@ -4488,7 +4478,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(ssi2_ctrl_a),
SH_PFC_PIN_GROUP(ssi2_ctrl_b),
SH_PFC_PIN_GROUP(ssi3_data),
- SH_PFC_PIN_GROUP(ssi34_ctrl),
+ SH_PFC_PIN_GROUP(ssi349_ctrl),
SH_PFC_PIN_GROUP(ssi4_data),
SH_PFC_PIN_GROUP(ssi4_ctrl),
SH_PFC_PIN_GROUP(ssi5_data),
@@ -4957,7 +4947,7 @@ static const char * const sdhi3_groups[] = {
static const char * const ssi_groups[] = {
"ssi0_data",
- "ssi0129_ctrl",
+ "ssi01239_ctrl",
"ssi1_data_a",
"ssi1_data_b",
"ssi1_ctrl_a",
@@ -4967,7 +4957,7 @@ static const char * const ssi_groups[] = {
"ssi2_ctrl_a",
"ssi2_ctrl_b",
"ssi3_data",
- "ssi34_ctrl",
+ "ssi349_ctrl",
"ssi4_data",
"ssi4_ctrl",
"ssi5_data",
@@ -5440,7 +5430,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
IP7_27_24
IP7_23_20
IP7_19_16
- IP7_15_12
+ /* IP7_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
IP7_11_8
IP7_7_4
IP7_3_0 }
@@ -5573,7 +5563,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
MOD_SEL0_19
MOD_SEL0_18_17
MOD_SEL0_16
- MOD_SEL0_15
+ 0, 0, /* RESERVED 15 */
MOD_SEL0_14_13
MOD_SEL0_12
MOD_SEL0_11
@@ -5822,11 +5812,11 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(5, 3), 0, 3 }, /* CTS0 */
} },
{ PINMUX_DRIVE_REG("DRVCTRL18", 0xe6060348) {
- { RCAR_GP_PIN(5, 4), 28, 3 }, /* RTS0_TANS */
+ { RCAR_GP_PIN(5, 4), 28, 3 }, /* RTS0 */
{ RCAR_GP_PIN(5, 5), 24, 3 }, /* RX1 */
{ RCAR_GP_PIN(5, 6), 20, 3 }, /* TX1 */
{ RCAR_GP_PIN(5, 7), 16, 3 }, /* CTS1 */
- { RCAR_GP_PIN(5, 8), 12, 3 }, /* RTS1_TANS */
+ { RCAR_GP_PIN(5, 8), 12, 3 }, /* RTS1 */
{ RCAR_GP_PIN(5, 9), 8, 3 }, /* SCK2 */
{ RCAR_GP_PIN(5, 10), 4, 3 }, /* TX2 */
{ RCAR_GP_PIN(5, 11), 0, 3 }, /* RX2 */
@@ -5856,8 +5846,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(6, 2), 24, 3 }, /* SSI_SDATA0 */
{ RCAR_GP_PIN(6, 3), 20, 3 }, /* SSI_SDATA1 */
{ RCAR_GP_PIN(6, 4), 16, 3 }, /* SSI_SDATA2 */
- { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK34 */
- { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS34 */
+ { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK349 */
+ { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS349 */
{ RCAR_GP_PIN(6, 7), 4, 3 }, /* SSI_SDATA3 */
{ RCAR_GP_PIN(6, 8), 0, 3 }, /* SSI_SCK4 */
} },
@@ -6015,7 +6005,7 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */
{ RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */
{ RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */
- { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N_A26 */
+ { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N */
{ RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */
{ RCAR_GP_PIN(1, 28), PU2, 0 }, /* CLKOUT */
@@ -6063,11 +6053,11 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */
{ RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */
{ RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */
- { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */
+ { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N */
{ RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */
{ RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */
{ RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */
- { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */
+ { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N */
{ RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */
{ RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */
{ RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */
@@ -6103,8 +6093,8 @@ static const struct sh_pfc_bias_info bias_info[] = {
{ RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */
{ RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */
{ RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */
- { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS34 */
- { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK34 */
+ { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */
+ { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */
{ RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */
{ RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */
{ RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */
@@ -6198,6 +6188,10 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
.cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs,
+ .pocctrl_reg = 0xe6060380,
+ .puen_base = PUEN,
+ .pud_base = PUD,
+ .nr_bias_regs = 7,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index c6a1855..93cce90 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -197,6 +197,19 @@ struct sh_pfc_bias_info {
struct sh_pfc_pin_range;
+struct sh_pfc_reg {
+ u32 addr;
+ unsigned int val;
+};
+
+struct sh_pfc_sav_regs {
+ struct sh_pfc_reg cfg_regs[32];
+ struct sh_pfc_reg drv_regs[32];
+ struct sh_pfc_reg puen_regs[8];
+ struct sh_pfc_reg pud_regs[8];
+ struct sh_pfc_reg pocctrl_reg;
+};
+
struct sh_pfc {
struct device *dev;
const struct sh_pfc_soc_info *info;
@@ -213,6 +226,7 @@ struct sh_pfc {
unsigned int nr_gpio_pins;
struct sh_pfc_chip *gpio;
+ struct sh_pfc_sav_regs sav_regs;
};
struct sh_pfc_soc_operations {
@@ -246,6 +260,10 @@ struct sh_pfc_soc_info {
const struct pinmux_cfg_reg *cfg_regs;
const struct pinmux_drive_reg *drive_regs;
const struct pinmux_data_reg *data_regs;
+ u32 pocctrl_reg;
+ u32 puen_base;
+ u32 pud_base;
+ unsigned int nr_bias_regs;
const u16 *pinmux_data;
unsigned int pinmux_data_size;
diff --git a/drivers/soc/renesas/rcar-avs.c b/drivers/soc/renesas/rcar-avs.c
index 69e2563..feef466 100644
--- a/drivers/soc/renesas/rcar-avs.c
+++ b/drivers/soc/renesas/rcar-avs.c
@@ -14,8 +14,6 @@
*/
#include <linux/module.h>
-
-#ifdef CONFIG_POWER_AVS
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -25,7 +23,7 @@
* Set opp_pattern_num is default.
*/
-int change_default_opp_pattern(unsigned int opp_pattern_num)
+static int change_default_opp_pattern(unsigned int opp_pattern_num)
{
struct device_node *cpu_node = NULL;
@@ -44,7 +42,7 @@ int change_default_opp_pattern(unsigned int opp_pattern_num)
list = kzalloc(sizeof(*pp_val), GFP_KERNEL);
if (!list) {
pr_debug("%s(): kzalloc fail, return -ENOMEM\n",
- __func__);
+ __func__);
return -ENOMEM;
}
*list = *(pp_val + opp_pattern_num);
@@ -66,8 +64,6 @@ int change_default_opp_pattern(unsigned int opp_pattern_num)
#define AVS_TABLE_NUM 7
-#endif /* CONFIG_POWER_AVS */
-
static const struct of_device_id rcar_avs_matches[] = {
#if defined(CONFIG_ARCH_R8A7795) || defined(CONFIG_ARCH_R8A7796)
{ .compatible = "renesas,rcar-gen3-avs" },
@@ -75,12 +71,12 @@ static const struct of_device_id rcar_avs_matches[] = {
{ /* sentinel */ }
};
-int __init rcar_avs_init(void)
+static int __init rcar_avs_init(void)
{
-#ifdef CONFIG_POWER_AVS
- int avs_val;
+ u32 avs_val;
struct device_node *np;
void __iomem *ksen_adjcnts;
+ int ret = 0;
/* Map and get KSEN_ADJCNTS register */
np = of_find_matching_node(NULL, rcar_avs_matches);
@@ -97,16 +93,18 @@ int __init rcar_avs_init(void)
avs_val = ioread32(ksen_adjcnts);
avs_val &= VOLCOND_MASK_0_3;
- if (!((avs_val >= 0) && (avs_val < AVS_TABLE_NUM))) {
+ if (avs_val >= AVS_TABLE_NUM) { /* if avs_val is out of range [0-6]*/
avs_val = 0;
pr_debug("rcar-cpufreq: hw get invalid avs value, use avs_tb0\n");
}
pr_info("rcar-cpufreq: use avs value: %d\n", avs_val);
- /* Apply avs value */
- change_default_opp_pattern(avs_val);
-#endif /* CONFIG_POWER_AVS */
- return 0;
+ if (IS_ENABLED(CONFIG_POWER_AVS)) {
+ /* Apply avs value */
+ ret = change_default_opp_pattern(avs_val);
+ }
+
+ return ret;
}
subsys_initcall(rcar_avs_init);
diff --git a/drivers/usb/core/of.c b/drivers/usb/core/of.c
index 3de4f88..d787f19 100644
--- a/drivers/usb/core/of.c
+++ b/drivers/usb/core/of.c
@@ -18,6 +18,7 @@
*/
#include <linux/of.h>
+#include <linux/of_platform.h>
#include <linux/usb/of.h>
/**
@@ -46,3 +47,25 @@ struct device_node *usb_of_get_child_node(struct device_node *parent,
}
EXPORT_SYMBOL_GPL(usb_of_get_child_node);
+/**
+ * usb_of_get_companion_dev - Find the companion device
+ * @dev: the device pointer to find a companion
+ *
+ * Find the companion device from platform bus.
+ *
+ * Return: On success, a pointer to the companion device, %NULL on failure.
+ */
+struct device *usb_of_get_companion_dev(struct device *dev)
+{
+ struct device_node *node;
+ struct platform_device *pdev = NULL;
+
+ node = of_parse_phandle(dev->of_node, "companion", 0);
+ if (node)
+ pdev = of_find_device_by_node(node);
+
+ of_node_put(node);
+
+ return pdev ? &pdev->dev : NULL;
+}
+EXPORT_SYMBOL_GPL(usb_of_get_companion_dev);
diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index 658b8da..ef7cf8d 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -177,6 +177,7 @@
config USB_RENESAS_USB3
tristate 'Renesas USB3.0 Peripheral controller'
depends on ARCH_RENESAS || COMPILE_TEST
+ depends on EXTCON
help
Renesas USB3.0 Peripheral controller is a USB peripheral controller
that supports super, high, and full speed USB 3.0 data transfers.
diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c
index fb8fc34..b6b3e4c 100644
--- a/drivers/usb/gadget/udc/renesas_usb3.c
+++ b/drivers/usb/gadget/udc/renesas_usb3.c
@@ -9,7 +9,9 @@
*/
#include <linux/delay.h>
+#include <linux/dma-mapping.h>
#include <linux/err.h>
+#include <linux/extcon.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
@@ -26,6 +28,8 @@
#define USB3_AXI_INT_ENA 0x00c
#define USB3_DMA_INT_STA 0x010
#define USB3_DMA_INT_ENA 0x014
+#define USB3_DMA_CH0_CON(n) (0x030 + ((n) - 1) * 0x10) /* n = 1 to 4 */
+#define USB3_DMA_CH0_PRD_ADR(n) (0x034 + ((n) - 1) * 0x10) /* n = 1 to 4 */
#define USB3_USB_COM_CON 0x200
#define USB3_USB20_CON 0x204
#define USB3_USB30_CON 0x208
@@ -37,6 +41,9 @@
#define USB3_USB_INT_ENA_2 0x22c
#define USB3_STUP_DAT_0 0x230
#define USB3_STUP_DAT_1 0x234
+#define USB3_USB_OTG_STA 0x268
+#define USB3_USB_OTG_INT_STA 0x26c
+#define USB3_USB_OTG_INT_ENA 0x270
#define USB3_P0_MOD 0x280
#define USB3_P0_CON 0x288
#define USB3_P0_STA 0x28c
@@ -60,6 +67,22 @@
/* AXI_INT_ENA and AXI_INT_STA */
#define AXI_INT_DMAINT BIT(31)
#define AXI_INT_EPCINT BIT(30)
+/* PRD's n = from 1 to 4 */
+#define AXI_INT_PRDEN_CLR_STA_SHIFT(n) (16 + (n) - 1)
+#define AXI_INT_PRDERR_STA_SHIFT(n) (0 + (n) - 1)
+#define AXI_INT_PRDEN_CLR_STA(n) (1 << AXI_INT_PRDEN_CLR_STA_SHIFT(n))
+#define AXI_INT_PRDERR_STA(n) (1 << AXI_INT_PRDERR_STA_SHIFT(n))
+
+/* DMA_INT_ENA and DMA_INT_STA */
+#define DMA_INT(n) BIT(n)
+
+/* DMA_CH0_CONn */
+#define DMA_CON_PIPE_DIR BIT(15) /* 1: In Transfer */
+#define DMA_CON_PIPE_NO_SHIFT 8
+#define DMA_CON_PIPE_NO_MASK GENMASK(12, DMA_CON_PIPE_NO_SHIFT)
+#define DMA_COM_PIPE_NO(n) (((n) << DMA_CON_PIPE_NO_SHIFT) & \
+ DMA_CON_PIPE_NO_MASK)
+#define DMA_CON_PRD_EN BIT(0)
/* LCLKSEL */
#define LCLKSEL_LSEL BIT(18)
@@ -124,6 +147,9 @@
/* USB_INT_ENA_2 and USB_INT_STA_2 */
#define USB_INT_2_PIPE(n) BIT(n)
+/* USB_OTG_STA, USB_OTG_INT_STA and USB_OTG_INT_ENA */
+#define USB_OTG_IDMON BIT(4)
+
/* P0_MOD */
#define P0_MOD_DIR BIT(6)
@@ -224,8 +250,50 @@
#define USB3_EP0_BUF_SIZE 8
#define USB3_MAX_NUM_PIPES 30
#define USB3_WAIT_US 3
+#define USB3_DMA_NUM_SETTING_AREA 4
+/*
+ * To avoid double-meaning of "0" (xferred 65536 bytes or received zlp if
+ * buffer size is 65536), this driver uses the maximum size per a entry is
+ * 32768 bytes.
+ */
+#define USB3_DMA_MAX_XFER_SIZE 32768
+#define USB3_DMA_PRD_SIZE 4096
struct renesas_usb3;
+
+/* Physical Region Descriptor Table */
+struct renesas_usb3_prd {
+ u32 word1;
+#define USB3_PRD1_E BIT(30) /* the end of chain */
+#define USB3_PRD1_U BIT(29) /* completion of transfer */
+#define USB3_PRD1_D BIT(28) /* Error occurred */
+#define USB3_PRD1_INT BIT(27) /* Interrupt occurred */
+#define USB3_PRD1_LST BIT(26) /* Last Packet */
+#define USB3_PRD1_B_INC BIT(24)
+#define USB3_PRD1_MPS_8 0
+#define USB3_PRD1_MPS_16 BIT(21)
+#define USB3_PRD1_MPS_32 BIT(22)
+#define USB3_PRD1_MPS_64 (BIT(22) | BIT(21))
+#define USB3_PRD1_MPS_512 BIT(23)
+#define USB3_PRD1_MPS_1024 (BIT(23) | BIT(21))
+#define USB3_PRD1_MPS_RESERVED (BIT(23) | BIT(22) | BIT(21))
+#define USB3_PRD1_SIZE_MASK GENMASK(15, 0)
+
+ u32 bap;
+};
+#define USB3_DMA_NUM_PRD_ENTRIES (USB3_DMA_PRD_SIZE / \
+ sizeof(struct renesas_usb3_prd))
+#define USB3_DMA_MAX_XFER_SIZE_ALL_PRDS (USB3_DMA_PRD_SIZE / \
+ sizeof(struct renesas_usb3_prd) * \
+ USB3_DMA_MAX_XFER_SIZE)
+
+struct renesas_usb3_dma {
+ struct renesas_usb3_prd *prd;
+ dma_addr_t prd_dma;
+ int num; /* Setting area number (from 1 to 4) */
+ bool used;
+};
+
struct renesas_usb3_request {
struct usb_request req;
struct list_head queue;
@@ -235,6 +303,7 @@ struct renesas_usb3_request {
struct renesas_usb3_ep {
struct usb_ep ep;
struct renesas_usb3 *usb3;
+ struct renesas_usb3_dma *dma;
int num;
char ep_name[USB3_EP_NAME_SIZE];
struct list_head queue;
@@ -257,10 +326,14 @@ struct renesas_usb3 {
struct usb_gadget gadget;
struct usb_gadget_driver *driver;
+ struct extcon_dev *extcon;
+ struct work_struct extcon_work;
struct renesas_usb3_ep *usb3_ep;
int num_usb3_eps;
+ struct renesas_usb3_dma dma[USB3_DMA_NUM_SETTING_AREA];
+
spinlock_t lock;
int disabled_count;
@@ -269,6 +342,8 @@ struct renesas_usb3 {
u8 ep0_buf[USB3_EP0_BUF_SIZE];
bool softconnect;
bool workaround_for_vbus;
+ bool extcon_host; /* check id and set EXTCON_USB_HOST */
+ bool extcon_usb; /* check vbus and set EXTCON_USB */
};
#define gadget_to_renesas_usb3(_gadget) \
@@ -287,8 +362,18 @@ struct renesas_usb3 {
(i) < (usb3)->num_usb3_eps; \
(i)++, usb3_ep = usb3_get_ep(usb3, (i)))
+#define usb3_get_dma(usb3, i) (&(usb3)->dma[i])
+#define usb3_for_each_dma(usb3, dma, i) \
+ for ((i) = 0, dma = usb3_get_dma((usb3), (i)); \
+ (i) < USB3_DMA_NUM_SETTING_AREA; \
+ (i)++, dma = usb3_get_dma((usb3), (i)))
+
static const char udc_name[] = "renesas_usb3";
+static bool use_dma = 1;
+module_param(use_dma, bool, 0644);
+MODULE_PARM_DESC(use_dma, "use dedicated DMAC");
+
static void usb3_write(struct renesas_usb3 *usb3, u32 data, u32 offs)
{
iowrite32(data, usb3->reg + offs);
@@ -332,6 +417,15 @@ static int usb3_wait(struct renesas_usb3 *usb3, u32 reg, u32 mask,
return -EBUSY;
}
+static void renesas_usb3_extcon_work(struct work_struct *work)
+{
+ struct renesas_usb3 *usb3 = container_of(work, struct renesas_usb3,
+ extcon_work);
+
+ extcon_set_state_sync(usb3->extcon, EXTCON_USB_HOST, usb3->extcon_host);
+ extcon_set_state_sync(usb3->extcon, EXTCON_USB, usb3->extcon_usb);
+}
+
static void usb3_enable_irq_1(struct renesas_usb3 *usb3, u32 bits)
{
usb3_set_bit(usb3, bits, USB3_USB_INT_ENA_1);
@@ -352,6 +446,11 @@ static void usb3_disable_pipe_irq(struct renesas_usb3 *usb3, int num)
usb3_clear_bit(usb3, USB_INT_2_PIPE(num), USB3_USB_INT_ENA_2);
}
+static bool usb3_is_host(struct renesas_usb3 *usb3)
+{
+ return !(usb3_read(usb3, USB3_DRD_CON) & DRD_CON_PERI_CON);
+}
+
static void usb3_init_axi_bridge(struct renesas_usb3 *usb3)
{
/* Set AXI_INT */
@@ -362,10 +461,6 @@ static void usb3_init_axi_bridge(struct renesas_usb3 *usb3)
static void usb3_init_epc_registers(struct renesas_usb3 *usb3)
{
- /* FIXME: How to change host / peripheral mode as well? */
- usb3_set_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
- usb3_clear_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
-
usb3_write(usb3, ~0, USB3_USB_INT_STA_1);
usb3_enable_irq_1(usb3, USB_INT_1_VBUS_CNG);
}
@@ -531,18 +626,70 @@ static void usb3_check_vbus(struct renesas_usb3 *usb3)
if (usb3->workaround_for_vbus) {
usb3_connect(usb3);
} else {
- if (usb3_read(usb3, USB3_USB_STA) & USB_STA_VBUS_STA)
+ usb3->extcon_usb = !!(usb3_read(usb3, USB3_USB_STA) &
+ USB_STA_VBUS_STA);
+ if (usb3->extcon_usb)
usb3_connect(usb3);
else
usb3_disconnect(usb3);
+
+ schedule_work(&usb3->extcon_work);
}
}
+static void usb3_set_mode(struct renesas_usb3 *usb3, bool host)
+{
+ if (host)
+ usb3_clear_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
+ else
+ usb3_set_bit(usb3, DRD_CON_PERI_CON, USB3_DRD_CON);
+}
+
+static void usb3_vbus_out(struct renesas_usb3 *usb3, bool enable)
+{
+ if (enable)
+ usb3_set_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
+ else
+ usb3_clear_bit(usb3, DRD_CON_VBOUT, USB3_DRD_CON);
+}
+
+static void usb3_mode_config(struct renesas_usb3 *usb3, bool host, bool a_dev)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&usb3->lock, flags);
+ usb3_set_mode(usb3, host);
+ usb3_vbus_out(usb3, a_dev);
+ if (!host && a_dev) /* for A-Peripheral */
+ usb3_connect(usb3);
+ spin_unlock_irqrestore(&usb3->lock, flags);
+}
+
+static bool usb3_is_a_device(struct renesas_usb3 *usb3)
+{
+ return !(usb3_read(usb3, USB3_USB_OTG_STA) & USB_OTG_IDMON);
+}
+
+static void usb3_check_id(struct renesas_usb3 *usb3)
+{
+ usb3->extcon_host = usb3_is_a_device(usb3);
+
+ if (usb3->extcon_host)
+ usb3_mode_config(usb3, true, true);
+ else
+ usb3_mode_config(usb3, false, false);
+
+ schedule_work(&usb3->extcon_work);
+}
+
static void renesas_usb3_init_controller(struct renesas_usb3 *usb3)
{
usb3_init_axi_bridge(usb3);
usb3_init_epc_registers(usb3);
+ usb3_write(usb3, USB_OTG_IDMON, USB3_USB_OTG_INT_STA);
+ usb3_write(usb3, USB_OTG_IDMON, USB3_USB_OTG_INT_ENA);
+ usb3_check_id(usb3);
usb3_check_vbus(usb3);
}
@@ -550,7 +697,7 @@ static void renesas_usb3_stop_controller(struct renesas_usb3 *usb3)
{
usb3_disconnect(usb3);
usb3_write(usb3, 0, USB3_P0_INT_ENA);
- usb3_write(usb3, 0, USB3_PN_INT_ENA);
+ usb3_write(usb3, 0, USB3_USB_OTG_INT_ENA);
usb3_write(usb3, 0, USB3_USB_INT_ENA_1);
usb3_write(usb3, 0, USB3_USB_INT_ENA_2);
usb3_write(usb3, 0, USB3_AXI_INT_ENA);
@@ -986,6 +1133,273 @@ static void usb3_start_pipe0(struct renesas_usb3_ep *usb3_ep,
usb3_p0_xfer(usb3_ep, usb3_req);
}
+static void usb3_enable_dma_pipen(struct renesas_usb3 *usb3)
+{
+ usb3_set_bit(usb3, PN_CON_DATAIF_EN, USB3_PN_CON);
+}
+
+static void usb3_disable_dma_pipen(struct renesas_usb3 *usb3)
+{
+ usb3_clear_bit(usb3, PN_CON_DATAIF_EN, USB3_PN_CON);
+}
+
+static void usb3_enable_dma_irq(struct renesas_usb3 *usb3, int num)
+{
+ usb3_set_bit(usb3, DMA_INT(num), USB3_DMA_INT_ENA);
+}
+
+static void usb3_disable_dma_irq(struct renesas_usb3 *usb3, int num)
+{
+ usb3_clear_bit(usb3, DMA_INT(num), USB3_DMA_INT_ENA);
+}
+
+static u32 usb3_dma_mps_to_prd_word1(struct renesas_usb3_ep *usb3_ep)
+{
+ switch (usb3_ep->ep.maxpacket) {
+ case 8:
+ return USB3_PRD1_MPS_8;
+ case 16:
+ return USB3_PRD1_MPS_16;
+ case 32:
+ return USB3_PRD1_MPS_32;
+ case 64:
+ return USB3_PRD1_MPS_64;
+ case 512:
+ return USB3_PRD1_MPS_512;
+ case 1024:
+ return USB3_PRD1_MPS_1024;
+ default:
+ return USB3_PRD1_MPS_RESERVED;
+ }
+}
+
+static bool usb3_dma_get_setting_area(struct renesas_usb3_ep *usb3_ep,
+ struct renesas_usb3_request *usb3_req)
+{
+ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+ struct renesas_usb3_dma *dma;
+ int i;
+ bool ret = false;
+
+ if (usb3_req->req.length > USB3_DMA_MAX_XFER_SIZE_ALL_PRDS) {
+ dev_dbg(usb3_to_dev(usb3), "%s: the length is too big (%d)\n",
+ __func__, usb3_req->req.length);
+ return false;
+ }
+
+ /* The driver doesn't handle zero-length packet via dmac */
+ if (!usb3_req->req.length)
+ return false;
+
+ if (usb3_dma_mps_to_prd_word1(usb3_ep) == USB3_PRD1_MPS_RESERVED)
+ return false;
+
+ usb3_for_each_dma(usb3, dma, i) {
+ if (dma->used)
+ continue;
+
+ if (usb_gadget_map_request(&usb3->gadget, &usb3_req->req,
+ usb3_ep->dir_in) < 0)
+ break;
+
+ dma->used = true;
+ usb3_ep->dma = dma;
+ ret = true;
+ break;
+ }
+
+ return ret;
+}
+
+static void usb3_dma_put_setting_area(struct renesas_usb3_ep *usb3_ep,
+ struct renesas_usb3_request *usb3_req)
+{
+ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+ int i;
+ struct renesas_usb3_dma *dma;
+
+ usb3_for_each_dma(usb3, dma, i) {
+ if (usb3_ep->dma == dma) {
+ usb_gadget_unmap_request(&usb3->gadget, &usb3_req->req,
+ usb3_ep->dir_in);
+ dma->used = false;
+ usb3_ep->dma = NULL;
+ break;
+ }
+ }
+}
+
+static void usb3_dma_fill_prd(struct renesas_usb3_ep *usb3_ep,
+ struct renesas_usb3_request *usb3_req)
+{
+ struct renesas_usb3_prd *cur_prd = usb3_ep->dma->prd;
+ u32 remain = usb3_req->req.length;
+ u32 dma = usb3_req->req.dma;
+ u32 len;
+ int i = 0;
+
+ do {
+ len = min_t(u32, remain, USB3_DMA_MAX_XFER_SIZE) &
+ USB3_PRD1_SIZE_MASK;
+ cur_prd->word1 = usb3_dma_mps_to_prd_word1(usb3_ep) |
+ USB3_PRD1_B_INC | len;
+ cur_prd->bap = dma;
+ remain -= len;
+ dma += len;
+ if (!remain || (i + 1) < USB3_DMA_NUM_PRD_ENTRIES)
+ break;
+
+ cur_prd++;
+ i++;
+ } while (1);
+
+ cur_prd->word1 |= USB3_PRD1_E | USB3_PRD1_INT;
+ if (usb3_ep->dir_in)
+ cur_prd->word1 |= USB3_PRD1_LST;
+}
+
+static void usb3_dma_kick_prd(struct renesas_usb3_ep *usb3_ep)
+{
+ struct renesas_usb3_dma *dma = usb3_ep->dma;
+ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+ u32 dma_con = DMA_COM_PIPE_NO(usb3_ep->num) | DMA_CON_PRD_EN;
+
+ if (usb3_ep->dir_in)
+ dma_con |= DMA_CON_PIPE_DIR;
+
+ wmb(); /* prd entries should be in system memory here */
+
+ usb3_write(usb3, 1 << usb3_ep->num, USB3_DMA_INT_STA);
+ usb3_write(usb3, AXI_INT_PRDEN_CLR_STA(dma->num) |
+ AXI_INT_PRDERR_STA(dma->num), USB3_AXI_INT_STA);
+
+ usb3_write(usb3, dma->prd_dma, USB3_DMA_CH0_PRD_ADR(dma->num));
+ usb3_write(usb3, dma_con, USB3_DMA_CH0_CON(dma->num));
+ usb3_enable_dma_irq(usb3, usb3_ep->num);
+}
+
+static void usb3_dma_stop_prd(struct renesas_usb3_ep *usb3_ep)
+{
+ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+ struct renesas_usb3_dma *dma = usb3_ep->dma;
+
+ usb3_disable_dma_irq(usb3, usb3_ep->num);
+ usb3_write(usb3, 0, USB3_DMA_CH0_CON(dma->num));
+}
+
+static int usb3_dma_update_status(struct renesas_usb3_ep *usb3_ep,
+ struct renesas_usb3_request *usb3_req)
+{
+ struct renesas_usb3_prd *cur_prd = usb3_ep->dma->prd;
+ struct usb_request *req = &usb3_req->req;
+ u32 remain, len;
+ int i = 0;
+ int status = 0;
+
+ rmb(); /* The controller updated prd entries */
+
+ do {
+ if (cur_prd->word1 & USB3_PRD1_D)
+ status = -EIO;
+ if (cur_prd->word1 & USB3_PRD1_E)
+ len = req->length % USB3_DMA_MAX_XFER_SIZE;
+ else
+ len = USB3_DMA_MAX_XFER_SIZE;
+ remain = cur_prd->word1 & USB3_PRD1_SIZE_MASK;
+ req->actual += len - remain;
+
+ if (cur_prd->word1 & USB3_PRD1_E ||
+ (i + 1) < USB3_DMA_NUM_PRD_ENTRIES)
+ break;
+
+ cur_prd++;
+ i++;
+ } while (1);
+
+ return status;
+}
+
+static bool usb3_dma_try_start(struct renesas_usb3_ep *usb3_ep,
+ struct renesas_usb3_request *usb3_req)
+{
+ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+
+ if (!use_dma)
+ return false;
+
+ if (usb3_dma_get_setting_area(usb3_ep, usb3_req)) {
+ usb3_pn_stop(usb3);
+ usb3_enable_dma_pipen(usb3);
+ usb3_dma_fill_prd(usb3_ep, usb3_req);
+ usb3_dma_kick_prd(usb3_ep);
+ usb3_pn_start(usb3);
+ return true;
+ }
+
+ return false;
+}
+
+static int usb3_dma_try_stop(struct renesas_usb3_ep *usb3_ep,
+ struct renesas_usb3_request *usb3_req)
+{
+ struct renesas_usb3 *usb3 = usb3_ep_to_usb3(usb3_ep);
+ unsigned long flags;
+ int status = 0;
+
+ spin_lock_irqsave(&usb3->lock, flags);
+ if (!usb3_ep->dma)
+ goto out;
+
+ if (!usb3_pn_change(usb3, usb3_ep->num))
+ usb3_disable_dma_pipen(usb3);
+ usb3_dma_stop_prd(usb3_ep);
+ status = usb3_dma_update_status(usb3_ep, usb3_req);
+ usb3_dma_put_setting_area(usb3_ep, usb3_req);
+
+out:
+ spin_unlock_irqrestore(&usb3->lock, flags);
+ return status;
+}
+
+static int renesas_usb3_dma_free_prd(struct renesas_usb3 *usb3,
+ struct device *dev)
+{
+ int i;
+ struct renesas_usb3_dma *dma;
+
+ usb3_for_each_dma(usb3, dma, i) {
+ if (dma->prd) {
+ dma_free_coherent(dev, USB3_DMA_MAX_XFER_SIZE,
+ dma->prd, dma->prd_dma);
+ dma->prd = NULL;
+ }
+ }
+
+ return 0;
+}
+
+static int renesas_usb3_dma_alloc_prd(struct renesas_usb3 *usb3,
+ struct device *dev)
+{
+ int i;
+ struct renesas_usb3_dma *dma;
+
+ if (!use_dma)
+ return 0;
+
+ usb3_for_each_dma(usb3, dma, i) {
+ dma->prd = dma_alloc_coherent(dev, USB3_DMA_PRD_SIZE,
+ &dma->prd_dma, GFP_KERNEL);
+ if (!dma->prd) {
+ renesas_usb3_dma_free_prd(usb3, dev);
+ return -ENOMEM;
+ }
+ dma->num = i + 1;
+ }
+
+ return 0;
+}
+
static void usb3_start_pipen(struct renesas_usb3_ep *usb3_ep,
struct renesas_usb3_request *usb3_req)
{
@@ -1005,6 +1419,10 @@ static void usb3_start_pipen(struct renesas_usb3_ep *usb3_ep,
goto out;
usb3_ep->started = true;
+
+ if (usb3_dma_try_start(usb3_ep, usb3_req))
+ goto out;
+
usb3_pn_start(usb3);
if (usb3_ep->dir_in) {
@@ -1401,7 +1819,13 @@ static void usb3_request_done_pipen(struct renesas_usb3 *usb3,
struct renesas_usb3_request *usb3_req,
int status)
{
- usb3_pn_stop(usb3);
+ unsigned long flags;
+
+ spin_lock_irqsave(&usb3->lock, flags);
+ if (usb3_pn_change(usb3, usb3_ep->num))
+ usb3_pn_stop(usb3);
+ spin_unlock_irqrestore(&usb3->lock, flags);
+
usb3_disable_pipe_irq(usb3, usb3_ep->num);
usb3_request_done(usb3_ep, usb3_req, status);
@@ -1430,30 +1854,47 @@ static void usb3_irq_epc_pipen_bfrdy(struct renesas_usb3 *usb3, int num)
{
struct renesas_usb3_ep *usb3_ep = usb3_get_ep(usb3, num);
struct renesas_usb3_request *usb3_req = usb3_get_request(usb3_ep);
+ bool done = false;
if (!usb3_req)
return;
+ spin_lock(&usb3->lock);
+ if (usb3_pn_change(usb3, num))
+ goto out;
+
if (usb3_ep->dir_in) {
/* Do not stop the IN pipe here to detect LSTTR interrupt */
if (!usb3_write_pipe(usb3_ep, usb3_req, USB3_PN_WRITE))
usb3_clear_bit(usb3, PN_INT_BFRDY, USB3_PN_INT_ENA);
} else {
if (!usb3_read_pipe(usb3_ep, usb3_req, USB3_PN_READ))
- usb3_request_done_pipen(usb3, usb3_ep, usb3_req, 0);
+ done = true;
}
+
+out:
+ /* need to unlock because usb3_request_done_pipen() locks it */
+ spin_unlock(&usb3->lock);
+
+ if (done)
+ usb3_request_done_pipen(usb3, usb3_ep, usb3_req, 0);
}
static void usb3_irq_epc_pipen(struct renesas_usb3 *usb3, int num)
{
u32 pn_int_sta;
- if (usb3_pn_change(usb3, num) < 0)
+ spin_lock(&usb3->lock);
+ if (usb3_pn_change(usb3, num) < 0) {
+ spin_unlock(&usb3->lock);
return;
+ }
pn_int_sta = usb3_read(usb3, USB3_PN_INT_STA);
pn_int_sta &= usb3_read(usb3, USB3_PN_INT_ENA);
usb3_write(usb3, pn_int_sta, USB3_PN_INT_STA);
+ spin_unlock(&usb3->lock);
+
if (pn_int_sta & PN_INT_LSTTR)
usb3_irq_epc_pipen_lsttr(usb3, num);
if (pn_int_sta & PN_INT_BFRDY)
@@ -1474,10 +1915,22 @@ static void usb3_irq_epc_int_2(struct renesas_usb3 *usb3, u32 int_sta_2)
}
}
+static void usb3_irq_idmon_change(struct renesas_usb3 *usb3)
+{
+ usb3_check_id(usb3);
+}
+
+static void usb3_irq_otg_int(struct renesas_usb3 *usb3, u32 otg_int_sta)
+{
+ if (otg_int_sta & USB_OTG_IDMON)
+ usb3_irq_idmon_change(usb3);
+}
+
static void usb3_irq_epc(struct renesas_usb3 *usb3)
{
u32 int_sta_1 = usb3_read(usb3, USB3_USB_INT_STA_1);
u32 int_sta_2 = usb3_read(usb3, USB3_USB_INT_STA_2);
+ u32 otg_int_sta = usb3_read(usb3, USB3_USB_OTG_INT_STA);
int_sta_1 &= usb3_read(usb3, USB3_USB_INT_ENA_1);
if (int_sta_1) {
@@ -1488,6 +1941,44 @@ static void usb3_irq_epc(struct renesas_usb3 *usb3)
int_sta_2 &= usb3_read(usb3, USB3_USB_INT_ENA_2);
if (int_sta_2)
usb3_irq_epc_int_2(usb3, int_sta_2);
+
+ otg_int_sta &= usb3_read(usb3, USB3_USB_OTG_INT_ENA);
+ if (otg_int_sta) {
+ usb3_write(usb3, otg_int_sta, USB3_USB_OTG_INT_STA);
+ usb3_irq_otg_int(usb3, otg_int_sta);
+ }
+}
+
+static void usb3_irq_dma_int(struct renesas_usb3 *usb3, u32 dma_sta)
+{
+ struct renesas_usb3_ep *usb3_ep;
+ struct renesas_usb3_request *usb3_req;
+ int i, status;
+
+ for (i = 0; i < usb3->num_usb3_eps; i++) {
+ if (!(dma_sta & DMA_INT(i)))
+ continue;
+
+ usb3_ep = usb3_get_ep(usb3, i);
+ if (!(usb3_read(usb3, USB3_AXI_INT_STA) &
+ AXI_INT_PRDEN_CLR_STA(usb3_ep->dma->num)))
+ continue;
+
+ usb3_req = usb3_get_request(usb3_ep);
+ status = usb3_dma_try_stop(usb3_ep, usb3_req);
+ usb3_request_done_pipen(usb3, usb3_ep, usb3_req, status);
+ }
+}
+
+static void usb3_irq_dma(struct renesas_usb3 *usb3)
+{
+ u32 dma_sta = usb3_read(usb3, USB3_DMA_INT_STA);
+
+ dma_sta &= usb3_read(usb3, USB3_DMA_INT_ENA);
+ if (dma_sta) {
+ usb3_write(usb3, dma_sta, USB3_DMA_INT_STA);
+ usb3_irq_dma_int(usb3, dma_sta);
+ }
}
static irqreturn_t renesas_usb3_irq(int irq, void *_usb3)
@@ -1496,6 +1987,11 @@ static irqreturn_t renesas_usb3_irq(int irq, void *_usb3)
irqreturn_t ret = IRQ_NONE;
u32 axi_int_sta = usb3_read(usb3, USB3_AXI_INT_STA);
+ if (axi_int_sta & AXI_INT_DMAINT) {
+ usb3_irq_dma(usb3);
+ ret = IRQ_HANDLED;
+ }
+
if (axi_int_sta & AXI_INT_EPCINT) {
usb3_irq_epc(usb3);
ret = IRQ_HANDLED;
@@ -1568,6 +2064,7 @@ static int usb3_disable_pipe_n(struct renesas_usb3_ep *usb3_ep)
spin_lock_irqsave(&usb3->lock, flags);
if (!usb3_pn_change(usb3, usb3_ep->num)) {
+ usb3_write(usb3, 0, USB3_PN_INT_ENA);
usb3_write(usb3, 0, USB3_PN_RAMMAP);
usb3_clear_bit(usb3, PN_CON_EN, USB3_PN_CON);
}
@@ -1594,6 +2091,7 @@ static int renesas_usb3_ep_disable(struct usb_ep *_ep)
usb3_req = usb3_get_request(usb3_ep);
if (!usb3_req)
break;
+ usb3_dma_try_stop(usb3_ep, usb3_req);
usb3_request_done(usb3_ep, usb3_req, -ESHUTDOWN);
} while (1);
@@ -1641,6 +2139,7 @@ static int renesas_usb3_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
dev_dbg(usb3_to_dev(usb3), "ep_dequeue: ep%2d, %u\n", usb3_ep->num,
_req->length);
+ usb3_dma_try_stop(usb3_ep, usb3_req);
usb3_request_done_pipen(usb3, usb3_ep, usb3_req, -ECONNRESET);
return 0;
@@ -1707,6 +2206,9 @@ static int renesas_usb3_start(struct usb_gadget *gadget,
/* hook up the driver */
usb3->driver = driver;
+ pm_runtime_enable(usb3_to_dev(usb3));
+ pm_runtime_get_sync(usb3_to_dev(usb3));
+
renesas_usb3_init_controller(usb3);
return 0;
@@ -1715,14 +2217,14 @@ static int renesas_usb3_start(struct usb_gadget *gadget,
static int renesas_usb3_stop(struct usb_gadget *gadget)
{
struct renesas_usb3 *usb3 = gadget_to_renesas_usb3(gadget);
- unsigned long flags;
- spin_lock_irqsave(&usb3->lock, flags);
usb3->softconnect = false;
usb3->gadget.speed = USB_SPEED_UNKNOWN;
usb3->driver = NULL;
renesas_usb3_stop_controller(usb3);
- spin_unlock_irqrestore(&usb3->lock, flags);
+
+ pm_runtime_put(usb3_to_dev(usb3));
+ pm_runtime_disable(usb3_to_dev(usb3));
return 0;
}
@@ -1756,15 +2258,51 @@ static const struct usb_gadget_ops renesas_usb3_gadget_ops = {
.set_selfpowered = renesas_usb3_set_selfpowered,
};
+static ssize_t role_store(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct renesas_usb3 *usb3 = dev_get_drvdata(dev);
+ bool new_mode_is_host;
+
+ if (!usb3->driver)
+ return -ENODEV;
+
+ if (!strncmp(buf, "host", strlen("host")))
+ new_mode_is_host = true;
+ else if (!strncmp(buf, "peripheral", strlen("peripheral")))
+ new_mode_is_host = false;
+ else
+ return -EINVAL;
+
+ if (new_mode_is_host == usb3_is_host(usb3))
+ return -EINVAL;
+
+ usb3_mode_config(usb3, new_mode_is_host, usb3_is_a_device(usb3));
+
+ return count;
+}
+
+static ssize_t role_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct renesas_usb3 *usb3 = dev_get_drvdata(dev);
+
+ if (!usb3->driver)
+ return -ENODEV;
+
+ return sprintf(buf, "%s\n", usb3_is_host(usb3) ? "host" : "peripheral");
+}
+static DEVICE_ATTR_RW(role);
+
/*------- platform_driver ------------------------------------------------*/
static int renesas_usb3_remove(struct platform_device *pdev)
{
struct renesas_usb3 *usb3 = platform_get_drvdata(pdev);
- pm_runtime_put(&pdev->dev);
- pm_runtime_disable(&pdev->dev);
+ device_remove_file(&pdev->dev, &dev_attr_role);
usb_del_gadget_udc(&usb3->gadget);
+ renesas_usb3_dma_free_prd(usb3, &pdev->dev);
__renesas_usb3_ep_free_request(usb3->ep0_req);
@@ -1885,15 +2423,32 @@ static const struct renesas_usb3_priv renesas_usb3_priv_r8a7795 = {
.workaround_for_vbus = true,
};
+static const struct renesas_usb3_priv renesas_usb3_priv_r8a7796 = {
+ .ramsize_per_ramif = SZ_16K,
+ .num_ramif = 4,
+ .ramsize_per_pipe = SZ_4K,
+ .workaround_for_vbus = true,
+};
+
static const struct of_device_id usb3_of_match[] = {
{
.compatible = "renesas,r8a7795-usb3-peri",
.data = &renesas_usb3_priv_r8a7795,
},
+ {
+ .compatible = "renesas,r8a7796-usb3-peri",
+ .data = &renesas_usb3_priv_r8a7796,
+ },
{ },
};
MODULE_DEVICE_TABLE(of, usb3_of_match);
+static const unsigned int renesas_usb3_cable[] = {
+ EXTCON_USB,
+ EXTCON_USB_HOST,
+ EXTCON_NONE,
+};
+
static int renesas_usb3_probe(struct platform_device *pdev)
{
struct renesas_usb3 *usb3;
@@ -1937,25 +2492,47 @@ static int renesas_usb3_probe(struct platform_device *pdev)
if (ret < 0)
return ret;
+ INIT_WORK(&usb3->extcon_work, renesas_usb3_extcon_work);
+ usb3->extcon = devm_extcon_dev_allocate(&pdev->dev, renesas_usb3_cable);
+ if (IS_ERR(usb3->extcon))
+ return PTR_ERR(usb3->extcon);
+
+ ret = devm_extcon_dev_register(&pdev->dev, usb3->extcon);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Failed to register extcon\n");
+ return ret;
+ }
+
/* for ep0 handling */
usb3->ep0_req = __renesas_usb3_ep_alloc_request(GFP_KERNEL);
if (!usb3->ep0_req)
return -ENOMEM;
+ ret = renesas_usb3_dma_alloc_prd(usb3, &pdev->dev);
+ if (ret < 0)
+ goto err_alloc_prd;
+
ret = usb_add_gadget_udc(&pdev->dev, &usb3->gadget);
if (ret < 0)
goto err_add_udc;
- usb3->workaround_for_vbus = priv->workaround_for_vbus;
+ ret = device_create_file(&pdev->dev, &dev_attr_role);
+ if (ret < 0)
+ goto err_dev_create;
- pm_runtime_enable(&pdev->dev);
- pm_runtime_get_sync(&pdev->dev);
+ usb3->workaround_for_vbus = priv->workaround_for_vbus;
dev_info(&pdev->dev, "probed\n");
return 0;
+err_dev_create:
+ usb_del_gadget_udc(&usb3->gadget);
+
err_add_udc:
+ renesas_usb3_dma_free_prd(usb3, &pdev->dev);
+
+err_alloc_prd:
__renesas_usb3_ep_free_request(usb3->ep0_req);
return ret;
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index a268d9e..bc7b9be 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -34,6 +34,7 @@
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/usb/ehci_pdriver.h>
+#include <linux/usb/of.h>
#include "ehci.h"
@@ -220,6 +221,9 @@ static int ehci_platform_probe(struct platform_device *dev)
if (IS_ERR(priv->phys[phy_num])) {
err = PTR_ERR(priv->phys[phy_num]);
goto err_put_hcd;
+ } else if (!hcd->phy) {
+ /* Avoiding phy_get() in usb_add_hcd() */
+ hcd->phy = priv->phys[phy_num];
}
}
@@ -297,6 +301,7 @@ static int ehci_platform_probe(struct platform_device *dev)
goto err_power;
device_wakeup_enable(hcd->self.controller);
+ device_enable_async_suspend(hcd->self.controller);
platform_set_drvdata(dev, hcd);
return err;
@@ -370,6 +375,7 @@ static int ehci_platform_resume(struct device *dev)
struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
struct platform_device *pdev = to_platform_device(dev);
struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
+ struct device *companion_dev;
if (pdata->power_on) {
int err = pdata->power_on(pdev);
@@ -377,6 +383,10 @@ static int ehci_platform_resume(struct device *dev)
return err;
}
+ companion_dev = usb_of_get_companion_dev(hcd->self.controller);
+ if (companion_dev)
+ device_pm_wait_for_dev(hcd->self.controller, companion_dev);
+
ehci_resume(hcd, priv->reset_on_resume);
return 0;
}
diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c
index 898b740..6368fce 100644
--- a/drivers/usb/host/ohci-platform.c
+++ b/drivers/usb/host/ohci-platform.c
@@ -183,6 +183,9 @@ static int ohci_platform_probe(struct platform_device *dev)
if (IS_ERR(priv->phys[phy_num])) {
err = PTR_ERR(priv->phys[phy_num]);
goto err_put_hcd;
+ } else if (!hcd->phy) {
+ /* Avoiding phy_get() in usb_add_hcd() */
+ hcd->phy = priv->phys[phy_num];
}
}
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index a620cab..f2b88cf 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -75,4 +75,6 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
+void dw_hdmi_s2r_ctrl(struct drm_bridge *bridge, int flag);
+
#endif /* __IMX_HDMI_H__ */
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 803aef6..a901f21 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -107,7 +107,7 @@
/*
* Some controllers don't have CBSY bit
*/
-#define TMIO_MMC_USE_SCLKDIVEN (1 << 11)
+#define TMIO_MMC_USE_SCLKDIVEN BIT(11)
int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
diff --git a/include/linux/usb/of.h b/include/linux/usb/of.h
index 5ff9032..4031f47 100644
--- a/include/linux/usb/of.h
+++ b/include/linux/usb/of.h
@@ -18,6 +18,7 @@ int of_usb_update_otg_caps(struct device_node *np,
struct usb_otg_caps *otg_caps);
struct device_node *usb_of_get_child_node(struct device_node *parent,
int portnum);
+struct device *usb_of_get_companion_dev(struct device *dev);
#else
static inline enum usb_dr_mode
of_usb_get_dr_mode_by_phy(struct device_node *np, int arg0)
@@ -38,6 +39,10 @@ static inline struct device_node *usb_of_get_child_node
{
return NULL;
}
+static inline struct device *usb_of_get_companion_dev(struct device *dev)
+{
+ return NULL;
+}
#endif
#if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_USB_SUPPORT)
diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h
index fd641255..64e90ca 100644
--- a/include/sound/simple_card_utils.h
+++ b/include/sound/simple_card_utils.h
@@ -1,5 +1,5 @@
/*
- * simple_card_core.h
+ * simple_card_utils.h
*
* Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
@@ -7,8 +7,8 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __SIMPLE_CARD_CORE_H
-#define __SIMPLE_CARD_CORE_H
+#ifndef __SIMPLE_CARD_UTILS_H
+#define __SIMPLE_CARD_UTILS_H
#include <sound/soc.h>
@@ -68,4 +68,4 @@ void asoc_simple_card_canonicalize_cpu(struct snd_soc_dai_link *dai_link,
int asoc_simple_card_clean_reference(struct snd_soc_card *card);
-#endif /* __SIMPLE_CARD_CORE_H */
+#endif /* __SIMPLE_CARD_UTILS_H */
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index 964b7de..1c8b579 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -231,6 +231,9 @@ struct snd_soc_dai_driver {
int (*resume)(struct snd_soc_dai *dai);
/* compress dai */
int (*compress_new)(struct snd_soc_pcm_runtime *rtd, int num);
+ /* Optional Callback used at pcm creation*/
+ int (*pcm_new)(struct snd_soc_pcm_runtime *rtd,
+ struct snd_soc_dai *dai);
/* DAI is also used for the control bus */
bool bus_control;
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index f60d755..d5f4677 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -615,6 +615,10 @@ struct snd_soc_dapm_update {
int reg;
int mask;
int val;
+ int reg2;
+ int mask2;
+ int val2;
+ bool has_second_set;
};
struct snd_soc_dapm_wcache {
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 4f1c784..ba40a51 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -497,6 +497,8 @@ void snd_soc_runtime_deactivate(struct snd_soc_pcm_runtime *rtd, int stream);
int snd_soc_runtime_set_dai_fmt(struct snd_soc_pcm_runtime *rtd,
unsigned int dai_fmt);
+int snd_soc_set_dmi_name(struct snd_soc_card *card, const char *flavour);
+
/* Utility functions to get clock rates from various things */
int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
@@ -507,9 +509,6 @@ int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
const struct snd_pcm_hardware *hw);
-int snd_soc_platform_trigger(struct snd_pcm_substream *substream,
- int cmd, struct snd_soc_platform *platform);
-
int soc_dai_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai);
@@ -782,6 +781,12 @@ struct snd_soc_component_driver {
int (*probe)(struct snd_soc_component *);
void (*remove)(struct snd_soc_component *);
+ int (*suspend)(struct snd_soc_component *);
+ int (*resume)(struct snd_soc_component *);
+
+ /* pcm creation and destruction */
+ int (*pcm_new)(struct snd_soc_pcm_runtime *);
+ void (*pcm_free)(struct snd_pcm *);
/* DT */
int (*of_xlate_dai_name)(struct snd_soc_component *component,
@@ -807,9 +812,11 @@ struct snd_soc_component {
unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
unsigned int registered_as_component:1;
+ unsigned int suspended:1; /* is in suspend PM state */
struct list_head list;
- struct list_head list_aux; /* for auxiliary component of the card */
+ struct list_head card_aux_list; /* for auxiliary bound components */
+ struct list_head card_list;
struct snd_soc_dai_driver *dai_drv;
int num_dai;
@@ -852,6 +859,10 @@ struct snd_soc_component {
int (*probe)(struct snd_soc_component *);
void (*remove)(struct snd_soc_component *);
+ int (*suspend)(struct snd_soc_component *);
+ int (*resume)(struct snd_soc_component *);
+ int (*pcm_new)(struct snd_soc_pcm_runtime *);
+ void (*pcm_free)(struct snd_pcm *);
/* machine specific init */
int (*init)(struct snd_soc_component *component);
@@ -868,11 +879,9 @@ struct snd_soc_codec {
const struct snd_soc_codec_driver *driver;
struct list_head list;
- struct list_head card_list;
/* runtime */
unsigned int cache_bypass:1; /* Suppress access to the cache */
- unsigned int suspended:1; /* Codec is in suspend PM state */
unsigned int cache_init:1; /* codec cache has been initialized */
/* codec IO */
@@ -936,20 +945,11 @@ struct snd_soc_platform_driver {
int (*pcm_new)(struct snd_soc_pcm_runtime *);
void (*pcm_free)(struct snd_pcm *);
- /*
- * For platform caused delay reporting.
- * Optional.
- */
- snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
- struct snd_soc_dai *);
-
/* platform stream pcm ops */
const struct snd_pcm_ops *ops;
/* platform stream compress ops */
const struct snd_compr_ops *compr_ops;
-
- int (*bespoke_trigger)(struct snd_pcm_substream *, int);
};
struct snd_soc_dai_link_component {
@@ -1094,6 +1094,8 @@ struct snd_soc_card {
const char *name;
const char *long_name;
const char *driver_name;
+ char dmi_longname[80];
+
struct device *dev;
struct snd_card *snd_card;
struct module *owner;
@@ -1170,7 +1172,7 @@ struct snd_soc_card {
struct work_struct deferred_resume_work;
/* lists of probed devices belonging to this card */
- struct list_head codec_dev_list;
+ struct list_head component_dev_list;
struct list_head widgets;
struct list_head paths;
@@ -1541,11 +1543,11 @@ static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platfo
static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
{
- INIT_LIST_HEAD(&card->codec_dev_list);
INIT_LIST_HEAD(&card->widgets);
INIT_LIST_HEAD(&card->paths);
INIT_LIST_HEAD(&card->dapm_list);
INIT_LIST_HEAD(&card->aux_comp_list);
+ INIT_LIST_HEAD(&card->component_dev_list);
}
static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc)
@@ -1661,6 +1663,8 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
const char *prefix,
struct device_node **bitclkmaster,
struct device_node **framemaster);
+int snd_soc_get_dai_name(struct of_phandle_args *args,
+ const char **dai_name);
int snd_soc_of_get_dai_name(struct device_node *of_node,
const char **dai_name);
int snd_soc_of_get_dai_link_codecs(struct device *dev,
@@ -1671,6 +1675,9 @@ int snd_soc_add_dai_link(struct snd_soc_card *card,
struct snd_soc_dai_link *dai_link);
void snd_soc_remove_dai_link(struct snd_soc_card *card,
struct snd_soc_dai_link *dai_link);
+struct snd_soc_dai_link *snd_soc_find_dai_link(struct snd_soc_card *card,
+ int id, const char *name,
+ const char *stream_name);
int snd_soc_register_dai(struct snd_soc_component *component,
struct snd_soc_dai_driver *dai_drv);
@@ -1697,4 +1704,24 @@ static inline void snd_soc_dapm_mutex_unlock(struct snd_soc_dapm_context *dapm)
mutex_unlock(&dapm->card->dapm_mutex);
}
+int snd_soc_component_enable_pin(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_enable_pin_unlocked(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_disable_pin(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_disable_pin_unlocked(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_nc_pin(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_nc_pin_unlocked(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_get_pin_status(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_force_enable_pin(struct snd_soc_component *component,
+ const char *pin);
+int snd_soc_component_force_enable_pin_unlocked(
+ struct snd_soc_component *component,
+ const char *pin);
+
#endif
diff --git a/sound/core/timer.c b/sound/core/timer.c
index fc144f4..ad15314 100644
--- a/sound/core/timer.c
+++ b/sound/core/timer.c
@@ -1702,9 +1702,21 @@ static int snd_timer_user_params(struct file *file,
return -EBADFD;
if (copy_from_user(¶ms, _params, sizeof(params)))
return -EFAULT;
- if (!(t->hw.flags & SNDRV_TIMER_HW_SLAVE) && params.ticks < 1) {
- err = -EINVAL;
- goto _end;
+ if (!(t->hw.flags & SNDRV_TIMER_HW_SLAVE)) {
+ u64 resolution;
+
+ if (params.ticks < 1) {
+ err = -EINVAL;
+ goto _end;
+ }
+
+ /* Don't allow resolution less than 1ms */
+ resolution = snd_timer_resolution(tu->timeri);
+ resolution *= params.ticks;
+ if (resolution < 1000000) {
+ err = -EINVAL;
+ goto _end;
+ }
}
if (params.queue_size > 0 &&
(params.queue_size < 32 || params.queue_size > 1024)) {
diff --git a/sound/soc/codecs/adau17x1.c b/sound/soc/codecs/adau17x1.c
index 439aa3f..b36511d 100644
--- a/sound/soc/codecs/adau17x1.c
+++ b/sound/soc/codecs/adau17x1.c
@@ -160,7 +160,7 @@ static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
struct adau *adau = snd_soc_codec_get_drvdata(codec);
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
- struct snd_soc_dapm_update update;
+ struct snd_soc_dapm_update update = { 0 };
unsigned int stream = e->shift_l;
unsigned int val, change;
int reg;
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
index 2609f95..23ab964 100644
--- a/sound/soc/codecs/ak4642.c
+++ b/sound/soc/codecs/ak4642.c
@@ -189,7 +189,7 @@ static int ak4642_lout_event(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMU:
case SND_SOC_DAPM_POST_PMD:
/* Power save mode OFF */
- mdelay(300);
+ msleep(300);
snd_soc_update_bits(codec, SG_SL2, LOPS, 0);
break;
}
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index 5a8d96e..8877b74 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -157,7 +157,7 @@ static int snd_soc_dapm_put_volsw_aic3x(struct snd_kcontrol *kcontrol,
unsigned int mask = (1 << fls(max)) - 1;
unsigned int invert = mc->invert;
unsigned short val;
- struct snd_soc_dapm_update update;
+ struct snd_soc_dapm_update update = { 0 };
int connect, change;
val = (ucontrol->value.integer.value[0] & mask);
diff --git a/sound/soc/codecs/wm9712.c b/sound/soc/codecs/wm9712.c
index 557709e..85f7c5b 100644
--- a/sound/soc/codecs/wm9712.c
+++ b/sound/soc/codecs/wm9712.c
@@ -187,7 +187,7 @@ static int wm9712_hp_mixer_put(struct snd_kcontrol *kcontrol,
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
unsigned int mixer, mask, shift, old;
- struct snd_soc_dapm_update update;
+ struct snd_soc_dapm_update update = { 0 };
bool change;
mixer = mc->shift >> 8;
diff --git a/sound/soc/codecs/wm9713.c b/sound/soc/codecs/wm9713.c
index e4301dd..7e48221 100644
--- a/sound/soc/codecs/wm9713.c
+++ b/sound/soc/codecs/wm9713.c
@@ -231,7 +231,7 @@ static int wm9713_hp_mixer_put(struct snd_kcontrol *kcontrol,
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
unsigned int mixer, mask, shift, old;
- struct snd_soc_dapm_update update;
+ struct snd_soc_dapm_update update = { 0 };
bool change;
mixer = mc->shift >> 8;
diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c
index e5b80f5..cf02625 100644
--- a/sound/soc/generic/simple-card-utils.c
+++ b/sound/soc/generic/simple-card-utils.c
@@ -1,5 +1,5 @@
/*
- * simple-card-core.c
+ * simple-card-utils.c
*
* Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index f608f8d2..ffa846c 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -40,9 +40,10 @@ struct simple_card_data {
struct snd_soc_dai_link *dai_link;
};
-#define simple_priv_to_dev(priv) ((priv)->snd_card.dev)
-#define simple_priv_to_link(priv, i) ((priv)->snd_card.dai_link + (i))
+#define simple_priv_to_card(priv) (&(priv)->snd_card)
#define simple_priv_to_props(priv, i) ((priv)->dai_props + (i))
+#define simple_priv_to_dev(priv) (simple_priv_to_card(priv)->dev)
+#define simple_priv_to_link(priv, i) (simple_priv_to_card(priv)->dai_link + (i))
#define DAI "sound-dai"
#define CELL "#sound-dai-cells"
@@ -323,6 +324,7 @@ static int asoc_simple_card_parse_aux_devs(struct device_node *node,
{
struct device *dev = simple_priv_to_dev(priv);
struct device_node *aux_node;
+ struct snd_soc_card *card = simple_priv_to_card(priv);
int i, n, len;
if (!of_find_property(node, PREFIX "aux-devs", &len))
@@ -332,19 +334,19 @@ static int asoc_simple_card_parse_aux_devs(struct device_node *node,
if (n <= 0)
return -EINVAL;
- priv->snd_card.aux_dev = devm_kzalloc(dev,
- n * sizeof(*priv->snd_card.aux_dev), GFP_KERNEL);
- if (!priv->snd_card.aux_dev)
+ card->aux_dev = devm_kzalloc(dev,
+ n * sizeof(*card->aux_dev), GFP_KERNEL);
+ if (!card->aux_dev)
return -ENOMEM;
for (i = 0; i < n; i++) {
aux_node = of_parse_phandle(node, PREFIX "aux-devs", i);
if (!aux_node)
return -EINVAL;
- priv->snd_card.aux_dev[i].codec_of_node = aux_node;
+ card->aux_dev[i].codec_of_node = aux_node;
}
- priv->snd_card.num_aux_devs = n;
+ card->num_aux_devs = n;
return 0;
}
@@ -352,6 +354,7 @@ static int asoc_simple_card_parse_of(struct device_node *node,
struct simple_card_data *priv)
{
struct device *dev = simple_priv_to_dev(priv);
+ struct snd_soc_card *card = simple_priv_to_card(priv);
struct device_node *dai_link;
int ret;
@@ -362,7 +365,7 @@ static int asoc_simple_card_parse_of(struct device_node *node,
/* The off-codec widgets */
if (of_property_read_bool(node, PREFIX "widgets")) {
- ret = snd_soc_of_parse_audio_simple_widgets(&priv->snd_card,
+ ret = snd_soc_of_parse_audio_simple_widgets(card,
PREFIX "widgets");
if (ret)
goto card_parse_end;
@@ -370,7 +373,7 @@ static int asoc_simple_card_parse_of(struct device_node *node,
/* DAPM routes */
if (of_property_read_bool(node, PREFIX "routing")) {
- ret = snd_soc_of_parse_audio_routing(&priv->snd_card,
+ ret = snd_soc_of_parse_audio_routing(card,
PREFIX "routing");
if (ret)
goto card_parse_end;
@@ -401,7 +404,7 @@ static int asoc_simple_card_parse_of(struct device_node *node,
goto card_parse_end;
}
- ret = asoc_simple_card_parse_card_name(&priv->snd_card, PREFIX);
+ ret = asoc_simple_card_parse_card_name(card, PREFIX);
if (ret < 0)
goto card_parse_end;
@@ -418,8 +421,9 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
struct simple_card_data *priv;
struct snd_soc_dai_link *dai_link;
struct simple_dai_props *dai_props;
- struct device_node *np = pdev->dev.of_node;
struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct snd_soc_card *card;
int num, ret;
/* Get the number of DAI links */
@@ -442,10 +446,11 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
priv->dai_link = dai_link;
/* Init snd_soc_card */
- priv->snd_card.owner = THIS_MODULE;
- priv->snd_card.dev = dev;
- priv->snd_card.dai_link = priv->dai_link;
- priv->snd_card.num_links = num;
+ card = simple_priv_to_card(priv);
+ card->owner = THIS_MODULE;
+ card->dev = dev;
+ card->dai_link = priv->dai_link;
+ card->num_links = num;
if (np && of_device_is_available(np)) {
@@ -474,7 +479,7 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
return -EINVAL;
}
- priv->snd_card.name = (cinfo->card) ? cinfo->card : cinfo->name;
+ card->name = (cinfo->card) ? cinfo->card : cinfo->name;
dai_link->name = cinfo->name;
dai_link->stream_name = cinfo->name;
dai_link->platform_name = cinfo->platform;
@@ -489,13 +494,13 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
sizeof(priv->dai_props->codec_dai));
}
- snd_soc_card_set_drvdata(&priv->snd_card, priv);
+ snd_soc_card_set_drvdata(card, priv);
- ret = devm_snd_soc_register_card(&pdev->dev, &priv->snd_card);
+ ret = devm_snd_soc_register_card(dev, card);
if (ret >= 0)
return ret;
err:
- asoc_simple_card_clean_reference(&priv->snd_card);
+ asoc_simple_card_clean_reference(card);
return ret;
}
diff --git a/sound/soc/generic/simple-scu-card.c b/sound/soc/generic/simple-scu-card.c
index b9973a5..24031fb 100644
--- a/sound/soc/generic/simple-scu-card.c
+++ b/sound/soc/generic/simple-scu-card.c
@@ -22,7 +22,7 @@
#include <sound/soc-dai.h>
#include <sound/simple_card_utils.h>
-struct asoc_simple_card_priv {
+struct simple_card_data {
struct snd_soc_card snd_card;
struct snd_soc_codec_conf codec_conf;
struct asoc_simple_dai *dai_props;
@@ -31,9 +31,10 @@ struct asoc_simple_card_priv {
u32 convert_channels;
};
-#define simple_priv_to_dev(priv) ((priv)->snd_card.dev)
-#define simple_priv_to_link(priv, i) ((priv)->snd_card.dai_link + (i))
+#define simple_priv_to_card(priv) (&(priv)->snd_card)
#define simple_priv_to_props(priv, i) ((priv)->dai_props + (i))
+#define simple_priv_to_dev(priv) (simple_priv_to_card(priv)->dev)
+#define simple_priv_to_link(priv, i) (simple_priv_to_card(priv)->dai_link + (i))
#define DAI "sound-dai"
#define CELL "#sound-dai-cells"
@@ -42,7 +43,7 @@ struct asoc_simple_card_priv {
static int asoc_simple_card_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
struct asoc_simple_dai *dai_props =
simple_priv_to_props(priv, rtd->num);
@@ -52,7 +53,7 @@ static int asoc_simple_card_startup(struct snd_pcm_substream *substream)
static void asoc_simple_card_shutdown(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
struct asoc_simple_dai *dai_props =
simple_priv_to_props(priv, rtd->num);
@@ -66,7 +67,7 @@ static struct snd_soc_ops asoc_simple_card_ops = {
static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
{
- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
struct snd_soc_dai *dai;
struct snd_soc_dai_link *dai_link;
struct asoc_simple_dai *dai_props;
@@ -84,7 +85,7 @@ static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
static int asoc_simple_card_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
struct snd_interval *rate = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_RATE);
struct snd_interval *channels = hw_param_interval(params,
@@ -101,14 +102,15 @@ static int asoc_simple_card_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
return 0;
}
-static int asoc_simple_card_parse_links(struct device_node *np,
- struct asoc_simple_card_priv *priv,
+static int asoc_simple_card_dai_link_of(struct device_node *np,
+ struct simple_card_data *priv,
unsigned int daifmt,
int idx, bool is_fe)
{
struct device *dev = simple_priv_to_dev(priv);
struct snd_soc_dai_link *dai_link = simple_priv_to_link(priv, idx);
struct asoc_simple_dai *dai_props = simple_priv_to_props(priv, idx);
+ struct snd_soc_card *card = simple_priv_to_card(priv);
int ret;
if (is_fe) {
@@ -163,7 +165,7 @@ static int asoc_simple_card_parse_links(struct device_node *np,
if (ret < 0)
return ret;
- snd_soc_of_parse_audio_prefix(&priv->snd_card,
+ snd_soc_of_parse_audio_prefix(card,
&priv->codec_conf,
dai_link->codec_of_node,
PREFIX "prefix");
@@ -195,70 +197,21 @@ static int asoc_simple_card_parse_links(struct device_node *np,
return 0;
}
-static int asoc_simple_card_dai_link_of(struct device_node *node,
- struct asoc_simple_card_priv *priv)
+static int asoc_simple_card_parse_of(struct device_node *node,
+ struct simple_card_data *priv)
+
{
struct device *dev = simple_priv_to_dev(priv);
struct device_node *np;
+ struct snd_soc_card *card = simple_priv_to_card(priv);
unsigned int daifmt = 0;
- int ret, i;
bool is_fe;
-
- /* find 1st codec */
- np = of_get_child_by_name(node, PREFIX "codec");
- if (!np)
- return -ENODEV;
-
- ret = asoc_simple_card_parse_daifmt(dev, node, np,
- PREFIX, &daifmt);
- if (ret < 0)
- return ret;
-
- i = 0;
- for_each_child_of_node(node, np) {
- is_fe = false;
- if (strcmp(np->name, PREFIX "cpu") == 0)
- is_fe = true;
-
- ret = asoc_simple_card_parse_links(np, priv, daifmt, i, is_fe);
- if (ret < 0)
- return ret;
- i++;
- }
-
- return 0;
-}
-
-static int asoc_simple_card_parse_of(struct device_node *node,
- struct asoc_simple_card_priv *priv,
- struct device *dev)
-{
- struct asoc_simple_dai *props;
- struct snd_soc_dai_link *links;
- int ret;
- int num;
+ int ret, i;
if (!node)
return -EINVAL;
- num = of_get_child_count(node);
- props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
- links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
- if (!props || !links)
- return -ENOMEM;
-
- priv->dai_props = props;
- priv->dai_link = links;
-
- /* Init snd_soc_card */
- priv->snd_card.owner = THIS_MODULE;
- priv->snd_card.dev = dev;
- priv->snd_card.dai_link = priv->dai_link;
- priv->snd_card.num_links = num;
- priv->snd_card.codec_conf = &priv->codec_conf;
- priv->snd_card.num_configs = 1;
-
- ret = snd_soc_of_parse_audio_routing(&priv->snd_card, PREFIX "routing");
+ ret = snd_soc_of_parse_audio_routing(card, PREFIX "routing");
if (ret < 0)
return ret;
@@ -268,16 +221,33 @@ static int asoc_simple_card_parse_of(struct device_node *node,
/* channels transfer */
of_property_read_u32(node, PREFIX "convert-channels", &priv->convert_channels);
- ret = asoc_simple_card_dai_link_of(node, priv);
+ /* find 1st codec */
+ np = of_get_child_by_name(node, PREFIX "codec");
+ if (!np)
+ return -ENODEV;
+
+ ret = asoc_simple_card_parse_daifmt(dev, node, np, PREFIX, &daifmt);
if (ret < 0)
return ret;
- ret = asoc_simple_card_parse_card_name(&priv->snd_card, PREFIX);
+ i = 0;
+ for_each_child_of_node(node, np) {
+ is_fe = false;
+ if (strcmp(np->name, PREFIX "cpu") == 0)
+ is_fe = true;
+
+ ret = asoc_simple_card_dai_link_of(np, priv, daifmt, i, is_fe);
+ if (ret < 0)
+ return ret;
+ i++;
+ }
+
+ ret = asoc_simple_card_parse_card_name(card, PREFIX);
if (ret < 0)
return ret;
dev_dbg(dev, "New card: %s\n",
- priv->snd_card.name ? priv->snd_card.name : "");
+ card->name ? card->name : "");
dev_dbg(dev, "convert_rate %d\n", priv->convert_rate);
dev_dbg(dev, "convert_channels %d\n", priv->convert_channels);
@@ -286,30 +256,52 @@ static int asoc_simple_card_parse_of(struct device_node *node,
static int asoc_simple_card_probe(struct platform_device *pdev)
{
- struct asoc_simple_card_priv *priv;
- struct device_node *np = pdev->dev.of_node;
+ struct simple_card_data *priv;
+ struct snd_soc_dai_link *dai_link;
+ struct asoc_simple_dai *dai_props;
+ struct snd_soc_card *card;
struct device *dev = &pdev->dev;
- int ret;
+ struct device_node *np = dev->of_node;
+ int num, ret;
/* Allocate the private data */
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
- ret = asoc_simple_card_parse_of(np, priv, dev);
+ num = of_get_child_count(np);
+
+ dai_props = devm_kzalloc(dev, sizeof(*dai_props) * num, GFP_KERNEL);
+ dai_link = devm_kzalloc(dev, sizeof(*dai_link) * num, GFP_KERNEL);
+ if (!dai_props || !dai_link)
+ return -ENOMEM;
+
+ priv->dai_props = dai_props;
+ priv->dai_link = dai_link;
+
+ /* Init snd_soc_card */
+ card = simple_priv_to_card(priv);
+ card->owner = THIS_MODULE;
+ card->dev = dev;
+ card->dai_link = priv->dai_link;
+ card->num_links = num;
+ card->codec_conf = &priv->codec_conf;
+ card->num_configs = 1;
+
+ ret = asoc_simple_card_parse_of(np, priv);
if (ret < 0) {
if (ret != -EPROBE_DEFER)
dev_err(dev, "parse error %d\n", ret);
goto err;
}
- snd_soc_card_set_drvdata(&priv->snd_card, priv);
+ snd_soc_card_set_drvdata(card, priv);
- ret = devm_snd_soc_register_card(&pdev->dev, &priv->snd_card);
+ ret = devm_snd_soc_register_card(dev, card);
if (ret >= 0)
return ret;
err:
- asoc_simple_card_clean_reference(&priv->snd_card);
+ asoc_simple_card_clean_reference(card);
return ret;
}
diff --git a/sound/soc/intel/boards/broadwell.c b/sound/soc/intel/boards/broadwell.c
index 7486a00..80f3a2d 100644
--- a/sound/soc/intel/boards/broadwell.c
+++ b/sound/soc/intel/boards/broadwell.c
@@ -220,10 +220,12 @@ static struct snd_soc_dai_link broadwell_rt286_dais[] = {
};
static int broadwell_suspend(struct snd_soc_card *card){
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
- list_for_each_entry(codec, &card->codec_dev_list, card_list) {
- if (!strcmp(codec->component.name, "i2c-INT343A:00")) {
+ list_for_each_entry(component, &card->component_dev_list, card_list) {
+ if (!strcmp(component->name, "i2c-INT343A:00")) {
+ struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
+
dev_dbg(codec->dev, "disabling jack detect before going to suspend.\n");
rt286_mic_detect(codec, NULL);
break;
@@ -233,10 +235,12 @@ static int broadwell_suspend(struct snd_soc_card *card){
}
static int broadwell_resume(struct snd_soc_card *card){
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
- list_for_each_entry(codec, &card->codec_dev_list, card_list) {
- if (!strcmp(codec->component.name, "i2c-INT343A:00")) {
+ list_for_each_entry(component, &card->component_dev_list, card_list) {
+ if (!strcmp(component->name, "i2c-INT343A:00")) {
+ struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
+
dev_dbg(codec->dev, "enabling jack detect for resume.\n");
rt286_mic_detect(codec, &broadwell_headset);
break;
diff --git a/sound/soc/intel/boards/cht_bsw_rt5672.c b/sound/soc/intel/boards/cht_bsw_rt5672.c
index df9d254..dfae9cf 100644
--- a/sound/soc/intel/boards/cht_bsw_rt5672.c
+++ b/sound/soc/intel/boards/cht_bsw_rt5672.c
@@ -292,10 +292,12 @@ static struct snd_soc_dai_link cht_dailink[] = {
static int cht_suspend_pre(struct snd_soc_card *card)
{
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
- list_for_each_entry(codec, &card->codec_dev_list, card_list) {
- if (!strcmp(codec->component.name, "i2c-10EC5670:00")) {
+ list_for_each_entry(component, &card->component_dev_list, card_list) {
+ if (!strcmp(component->name, "i2c-10EC5670:00")) {
+ struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
+
dev_dbg(codec->dev, "disabling jack detect before going to suspend.\n");
rt5670_jack_suspend(codec);
break;
@@ -306,10 +308,12 @@ static int cht_suspend_pre(struct snd_soc_card *card)
static int cht_resume_post(struct snd_soc_card *card)
{
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
- list_for_each_entry(codec, &card->codec_dev_list, card_list) {
- if (!strcmp(codec->component.name, "i2c-10EC5670:00")) {
+ list_for_each_entry(component, &card->component_dev_list, card_list) {
+ if (!strcmp(component->name, "i2c-10EC5670:00")) {
+ struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
+
dev_dbg(codec->dev, "enabling jack detect for resume.\n");
rt5670_jack_resume(codec);
break;
diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
index 6db6405..147ebec 100644
--- a/sound/soc/sh/Kconfig
+++ b/sound/soc/sh/Kconfig
@@ -1,5 +1,5 @@
menu "SoC Audio support for SuperH"
- depends on SUPERH || ARCH_SHMOBILE
+ depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
config SND_SOC_PCM_SH7760
tristate "SoC Audio support for Renesas SH7760"
@@ -37,6 +37,7 @@
config SND_SOC_RCAR
tristate "R-Car series SRU/SCU/SSIU/SSI support"
depends on COMMON_CLK
+ depends on OF || COMPILE_TEST
select SND_SIMPLE_CARD
select REGMAP_MMIO
help
diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
index 85a33ac..66203d1 100644
--- a/sound/soc/sh/rcar/adg.c
+++ b/sound/soc/sh/rcar/adg.c
@@ -43,6 +43,7 @@ struct rsnd_adg {
};
#define LRCLK_ASYNC (1 << 0)
+#define AUDIO_OUT_48 (1 << 1)
#define adg_mode_flags(adg) (adg->flags)
#define for_each_rsnd_clk(pos, adg, i) \
@@ -364,7 +365,10 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *ssi_mod, unsigned int rate)
rsnd_adg_set_ssi_clk(ssi_mod, data);
- if (!(adg_mode_flags(adg) & LRCLK_ASYNC)) {
+ if (adg_mode_flags(adg) & LRCLK_ASYNC) {
+ if (adg_mode_flags(adg) & AUDIO_OUT_48)
+ ckr = 0x80000000;
+ } else {
if (0 == (rate % 8000))
ckr = 0x80000000;
}
@@ -427,11 +431,14 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
struct clk *clk;
struct device *dev = rsnd_priv_to_dev(priv);
struct device_node *np = dev->of_node;
+ struct property *prop;
u32 ckr, rbgx, rbga, rbgb;
- u32 rate, req_rate = 0, div;
+ u32 rate, div;
+#define REQ_SIZE 2
+ u32 req_rate[REQ_SIZE] = {};
uint32_t count = 0;
unsigned long req_48kHz_rate, req_441kHz_rate;
- int i;
+ int i, req_size;
const char *parent_clk_name = NULL;
static const char * const clkout_name[] = {
[CLKOUT] = "audio_clkout",
@@ -446,19 +453,32 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
[CLKI] = 0x2,
};
- of_property_read_u32(np, "#clock-cells", &count);
+ ckr = 0;
+ rbga = 2; /* default 1/6 */
+ rbgb = 2; /* default 1/6 */
/*
* ADG supports BRRA/BRRB output only
* this means all clkout0/1/2/3 will be same rate
*/
- of_property_read_u32(np, "clock-frequency", &req_rate);
+ prop = of_find_property(np, "clock-frequency", NULL);
+ if (!prop)
+ goto rsnd_adg_get_clkout_end;
+
+ req_size = prop->length / sizeof(u32);
+
+ of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
req_48kHz_rate = 0;
req_441kHz_rate = 0;
- if (0 == (req_rate % 44100))
- req_441kHz_rate = req_rate;
- if (0 == (req_rate % 48000))
- req_48kHz_rate = req_rate;
+ for (i = 0; i < req_size; i++) {
+ if (0 == (req_rate[i] % 44100))
+ req_441kHz_rate = req_rate[i];
+ if (0 == (req_rate[i] % 48000))
+ req_48kHz_rate = req_rate[i];
+ }
+
+ if (req_rate[0] % 48000 == 0)
+ adg->flags = AUDIO_OUT_48;
/*
* This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
@@ -469,9 +489,6 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
* rsnd_adg_ssi_clk_try_start()
* rsnd_ssi_master_clk_start()
*/
- ckr = 0;
- rbga = 2; /* default 1/6 */
- rbgb = 2; /* default 1/6 */
adg->rbga_rate_for_441khz = 0;
adg->rbgb_rate_for_48khz = 0;
for_each_rsnd_clk(clk, adg, i) {
@@ -505,10 +522,8 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
rbgb = rbgx;
adg->rbgb_rate_for_48khz = rate / div;
ckr |= brg_table[i] << 16;
- if (req_48kHz_rate) {
+ if (req_48kHz_rate)
parent_clk_name = __clk_get_name(clk);
- ckr |= 0x80000000;
- }
}
}
}
@@ -518,12 +533,13 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
* this means all clkout0/1/2/3 will be * same rate
*/
+ of_property_read_u32(np, "#clock-cells", &count);
/*
* for clkout
*/
if (!count) {
clk = clk_register_fixed_rate(dev, clkout_name[CLKOUT],
- parent_clk_name, 0, req_rate);
+ parent_clk_name, 0, req_rate[0]);
if (!IS_ERR(clk)) {
adg->clkout[CLKOUT] = clk;
of_clk_add_provider(np, of_clk_src_simple_get, clk);
@@ -536,19 +552,18 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
for (i = 0; i < CLKOUTMAX; i++) {
clk = clk_register_fixed_rate(dev, clkout_name[i],
parent_clk_name, 0,
- req_rate);
- if (!IS_ERR(clk)) {
- adg->onecell.clks = adg->clkout;
- adg->onecell.clk_num = CLKOUTMAX;
-
+ req_rate[0]);
+ adg->clkout[i] = ERR_PTR(-ENOENT);
+ if (!IS_ERR(clk))
adg->clkout[i] = clk;
-
- of_clk_add_provider(np, of_clk_src_onecell_get,
- &adg->onecell);
- }
}
+ adg->onecell.clks = adg->clkout;
+ adg->onecell.clk_num = CLKOUTMAX;
+ of_clk_add_provider(np, of_clk_src_onecell_get,
+ &adg->onecell);
}
+rsnd_adg_get_clkout_end:
adg->ckr = ckr;
adg->rbga = rbga;
adg->rbgb = rbgb;
@@ -564,6 +579,7 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
struct rsnd_adg *adg;
struct device *dev = rsnd_priv_to_dev(priv);
struct device_node *np = dev->of_node;
+ int ret;
adg = devm_kzalloc(dev, sizeof(*adg), GFP_KERNEL);
if (!adg) {
@@ -571,8 +587,10 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
return -ENOMEM;
}
- rsnd_mod_init(priv, &adg->mod, &adg_ops,
+ ret = rsnd_mod_init(priv, &adg->mod, &adg_ops,
NULL, NULL, 0, 0);
+ if (ret)
+ return ret;
rsnd_adg_get_clkin(priv, adg);
rsnd_adg_get_clkout(priv, adg);
@@ -589,5 +607,10 @@ int rsnd_adg_probe(struct rsnd_priv *priv)
void rsnd_adg_remove(struct rsnd_priv *priv)
{
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct device_node *np = dev->of_node;
+
+ of_clk_del_provider(np);
+
rsnd_adg_clk_disable(priv);
}
diff --git a/sound/soc/sh/rcar/cmd.c b/sound/soc/sh/rcar/cmd.c
index f3a09bf..8de725b 100644
--- a/sound/soc/sh/rcar/cmd.c
+++ b/sound/soc/sh/rcar/cmd.c
@@ -93,6 +93,7 @@ static int rsnd_cmd_init(struct rsnd_mod *mod,
dev_dbg(dev, "ctu/mix path = 0x%08x", data);
rsnd_mod_write(mod, CMD_ROUTE_SLCT, data);
+ rsnd_mod_write(mod, CMD_BUSIF_MODE, rsnd_get_busif_shift(io, mod) | 1);
rsnd_mod_write(mod, CMD_BUSIF_DALIGN, rsnd_get_dalign(mod, io));
rsnd_adg_set_cmd_timsel_gen2(mod, io);
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
index 448072c..a3ae337 100644
--- a/sound/soc/sh/rcar/core.c
+++ b/sound/soc/sh/rcar/core.c
@@ -110,7 +110,6 @@ MODULE_DEVICE_TABLE(of, rsnd_of_match);
/*
* rsnd_mod functions
*/
-#ifdef DEBUG
void rsnd_mod_make_sure(struct rsnd_mod *mod, enum rsnd_mod_type type)
{
if (mod->type != type) {
@@ -121,7 +120,6 @@ void rsnd_mod_make_sure(struct rsnd_mod *mod, enum rsnd_mod_type type)
rsnd_mod_name(mod), rsnd_mod_id(mod));
}
}
-#endif
char *rsnd_mod_name(struct rsnd_mod *mod)
{
@@ -345,35 +343,80 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
return 0x76543210;
}
+u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod)
+{
+ enum rsnd_mod_type playback_mods[] = {
+ RSND_MOD_SRC,
+ RSND_MOD_CMD,
+ RSND_MOD_SSIU,
+ };
+ enum rsnd_mod_type capture_mods[] = {
+ RSND_MOD_CMD,
+ RSND_MOD_SRC,
+ RSND_MOD_SSIU,
+ };
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ struct rsnd_mod *tmod = NULL;
+ enum rsnd_mod_type *mods =
+ rsnd_io_is_play(io) ?
+ playback_mods : capture_mods;
+ int i;
+
+ /*
+ * This is needed for 24bit data
+ * We need to shift 8bit
+ *
+ * Linux 24bit data is located as 0x00******
+ * HW 24bit data is located as 0x******00
+ *
+ */
+ switch (runtime->sample_bits) {
+ case 16:
+ return 0;
+ case 32:
+ break;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(playback_mods); i++) {
+ tmod = rsnd_io_to_mod(io, mods[i]);
+ if (tmod)
+ break;
+ }
+
+ if (tmod != mod)
+ return 0;
+
+ if (rsnd_io_is_play(io))
+ return (0 << 20) | /* shift to Left */
+ (8 << 16); /* 8bit */
+ else
+ return (1 << 20) | /* shift to Right */
+ (8 << 16); /* 8bit */
+}
+
/*
* rsnd_dai functions
*/
-#define rsnd_mod_call(idx, io, func, param...) \
-({ \
- struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
- struct rsnd_mod *mod = (io)->mod[idx]; \
- struct device *dev = rsnd_priv_to_dev(priv); \
- u32 *status = mod->get_status(io, mod, idx); \
- u32 mask = 0xF << __rsnd_mod_shift_##func; \
- u8 val = (*status >> __rsnd_mod_shift_##func) & 0xF; \
- u8 add = ((val + __rsnd_mod_add_##func) & 0xF); \
- int ret = 0; \
- int call = (val == __rsnd_mod_call_##func) && (mod)->ops->func; \
- if (add == 0xF) \
- call = 0; \
- else \
- *status = (*status & ~mask) + \
- (add << __rsnd_mod_shift_##func); \
- dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \
- rsnd_mod_name(mod), rsnd_mod_id(mod), \
- *status, call ? #func : ""); \
- if (call) \
- ret = (mod)->ops->func(mod, io, param); \
- if (ret) \
- dev_dbg(dev, "%s[%d] : rsnd_mod_call error %d\n", \
- rsnd_mod_name(mod), rsnd_mod_id(mod), ret); \
- ret; \
-})
+struct rsnd_mod *rsnd_mod_next(int *iterator,
+ struct rsnd_dai_stream *io,
+ enum rsnd_mod_type *array,
+ int array_size)
+{
+ struct rsnd_mod *mod;
+ enum rsnd_mod_type type;
+ int max = array ? array_size : RSND_MOD_MAX;
+
+ for (; *iterator < max; (*iterator)++) {
+ type = (array) ? array[*iterator] : *iterator;
+ mod = io->mod[type];
+ if (!mod)
+ continue;
+
+ return mod;
+ }
+
+ return NULL;
+}
static enum rsnd_mod_type rsnd_mod_sequence[][RSND_MOD_MAX] = {
{
@@ -409,19 +452,49 @@ static enum rsnd_mod_type rsnd_mod_sequence[][RSND_MOD_MAX] = {
},
};
-#define rsnd_dai_call(fn, io, param...) \
-({ \
- struct rsnd_mod *mod; \
- int type, is_play = rsnd_io_is_play(io); \
- int ret = 0, i; \
- for (i = 0; i < RSND_MOD_MAX; i++) { \
- type = rsnd_mod_sequence[is_play][i]; \
- mod = (io)->mod[type]; \
- if (!mod) \
- continue; \
- ret |= rsnd_mod_call(type, io, fn, param); \
- } \
- ret; \
+static int rsnd_status_update(u32 *status,
+ int shift, int add, int timing)
+{
+ u32 mask = 0xF << shift;
+ u8 val = (*status >> shift) & 0xF;
+ u8 next_val = (val + add) & 0xF;
+ int func_call = (val == timing);
+
+ if (next_val == 0xF) /* underflow case */
+ func_call = 0;
+ else
+ *status = (*status & ~mask) + (next_val << shift);
+
+ return func_call;
+}
+
+#define rsnd_dai_call(fn, io, param...) \
+({ \
+ struct rsnd_priv *priv = rsnd_io_to_priv(io); \
+ struct device *dev = rsnd_priv_to_dev(priv); \
+ struct rsnd_mod *mod; \
+ int is_play = rsnd_io_is_play(io); \
+ int ret = 0, i; \
+ enum rsnd_mod_type *types = rsnd_mod_sequence[is_play]; \
+ for_each_rsnd_mod_arrays(i, mod, io, types, RSND_MOD_MAX) { \
+ int tmp = 0; \
+ u32 *status = mod->get_status(io, mod, types[i]); \
+ int func_call = rsnd_status_update(status, \
+ __rsnd_mod_shift_##fn, \
+ __rsnd_mod_add_##fn, \
+ __rsnd_mod_call_##fn); \
+ dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \
+ rsnd_mod_name(mod), rsnd_mod_id(mod), *status, \
+ (func_call && (mod)->ops->fn) ? #fn : ""); \
+ if (func_call && (mod)->ops->fn) \
+ tmp = (mod)->ops->fn(mod, io, param); \
+ if (tmp) \
+ dev_err(dev, "%s[%d] : %s error %d\n", \
+ rsnd_mod_name(mod), rsnd_mod_id(mod), \
+ #fn, tmp); \
+ ret |= tmp; \
+ } \
+ ret; \
})
int rsnd_dai_connect(struct rsnd_mod *mod,
@@ -650,12 +723,10 @@ static int rsnd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
/* set clock inversion */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_IF:
- rdai->bit_clk_inv = rdai->bit_clk_inv;
rdai->frm_clk_inv = !rdai->frm_clk_inv;
break;
case SND_SOC_DAIFMT_IB_NF:
rdai->bit_clk_inv = !rdai->bit_clk_inv;
- rdai->frm_clk_inv = rdai->frm_clk_inv;
break;
case SND_SOC_DAIFMT_IB_IF:
rdai->bit_clk_inv = !rdai->bit_clk_inv;
@@ -690,7 +761,38 @@ static int rsnd_soc_set_dai_tdm_slot(struct snd_soc_dai *dai,
return 0;
}
+static int rsnd_soc_dai_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
+ struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
+ int ret;
+
+ /*
+ * call rsnd_dai_call without spinlock
+ */
+ ret = rsnd_dai_call(nolock_start, io, priv);
+ if (ret < 0)
+ rsnd_dai_call(nolock_stop, io, priv);
+
+ return ret;
+}
+
+static void rsnd_soc_dai_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
+ struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
+
+ /*
+ * call rsnd_dai_call without spinlock
+ */
+ rsnd_dai_call(nolock_stop, io, priv);
+}
+
static const struct snd_soc_dai_ops rsnd_soc_dai_ops = {
+ .startup = rsnd_soc_dai_startup,
+ .shutdown = rsnd_soc_dai_shutdown,
.trigger = rsnd_soc_dai_trigger,
.set_fmt = rsnd_soc_dai_set_fmt,
.set_tdm_slot = rsnd_soc_set_dai_tdm_slot,
@@ -952,13 +1054,30 @@ static int rsnd_kctrl_put(struct snd_kcontrol *kctrl,
return change;
}
-static int __rsnd_kctrl_new(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- struct rsnd_kctrl_cfg *cfg,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod))
+struct rsnd_kctrl_cfg *rsnd_kctrl_init_m(struct rsnd_kctrl_cfg_m *cfg)
+{
+ cfg->cfg.val = cfg->val;
+
+ return &cfg->cfg;
+}
+
+struct rsnd_kctrl_cfg *rsnd_kctrl_init_s(struct rsnd_kctrl_cfg_s *cfg)
+{
+ cfg->cfg.val = &cfg->val;
+
+ return &cfg->cfg;
+}
+
+int rsnd_kctrl_new(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct snd_soc_pcm_runtime *rtd,
+ const unsigned char *name,
+ void (*update)(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod),
+ struct rsnd_kctrl_cfg *cfg,
+ const char * const *texts,
+ int size,
+ u32 max)
{
struct snd_card *card = rtd->card->snd_card;
struct snd_kcontrol *kctrl;
@@ -973,84 +1092,28 @@ static int __rsnd_kctrl_new(struct rsnd_mod *mod,
};
int ret;
+ if (size > RSND_MAX_CHANNELS)
+ return -EINVAL;
+
kctrl = snd_ctl_new1(&knew, mod);
if (!kctrl)
return -ENOMEM;
ret = snd_ctl_add(card, kctrl);
- if (ret < 0) {
- snd_ctl_free_one(kctrl);
+ if (ret < 0)
return ret;
- }
- cfg->update = update;
- cfg->card = card;
- cfg->kctrl = kctrl;
- cfg->io = io;
+ cfg->texts = texts;
+ cfg->max = max;
+ cfg->size = size;
+ cfg->update = update;
+ cfg->card = card;
+ cfg->kctrl = kctrl;
+ cfg->io = io;
return 0;
}
-void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg)
-{
- if (cfg->card && cfg->kctrl)
- snd_ctl_remove(cfg->card, cfg->kctrl);
-
- cfg->card = NULL;
- cfg->kctrl = NULL;
-}
-
-int rsnd_kctrl_new_m(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod),
- struct rsnd_kctrl_cfg_m *_cfg,
- int ch_size,
- u32 max)
-{
- if (ch_size > RSND_MAX_CHANNELS)
- return -EINVAL;
-
- _cfg->cfg.max = max;
- _cfg->cfg.size = ch_size;
- _cfg->cfg.val = _cfg->val;
- return __rsnd_kctrl_new(mod, io, rtd, name, &_cfg->cfg, update);
-}
-
-int rsnd_kctrl_new_s(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod),
- struct rsnd_kctrl_cfg_s *_cfg,
- u32 max)
-{
- _cfg->cfg.max = max;
- _cfg->cfg.size = 1;
- _cfg->cfg.val = &_cfg->val;
- return __rsnd_kctrl_new(mod, io, rtd, name, &_cfg->cfg, update);
-}
-
-int rsnd_kctrl_new_e(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- struct rsnd_kctrl_cfg_s *_cfg,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod),
- const char * const *texts,
- u32 max)
-{
- _cfg->cfg.max = max;
- _cfg->cfg.size = 1;
- _cfg->cfg.val = &_cfg->val;
- _cfg->cfg.texts = texts;
- return __rsnd_kctrl_new(mod, io, rtd, name, &_cfg->cfg, update);
-}
-
/*
* snd_soc_platform
*/
@@ -1074,8 +1137,8 @@ static int rsnd_pcm_new(struct snd_soc_pcm_runtime *rtd)
return snd_pcm_lib_preallocate_pages_for_all(
rtd->pcm,
- SNDRV_DMA_TYPE_DEV,
- rtd->card->snd_card->dev,
+ SNDRV_DMA_TYPE_CONTINUOUS,
+ snd_dma_continuous_data(GFP_KERNEL),
PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
}
@@ -1096,6 +1159,7 @@ static int rsnd_rdai_continuance_probe(struct rsnd_priv *priv,
ret = rsnd_dai_call(probe, io, priv);
if (ret == -EAGAIN) {
struct rsnd_mod *ssi_mod = rsnd_io_to_mod_ssi(io);
+ struct rsnd_mod *mod;
int i;
/*
@@ -1115,8 +1179,8 @@ static int rsnd_rdai_continuance_probe(struct rsnd_priv *priv,
* remove all mod from io
* and, re connect ssi
*/
- for (i = 0; i < RSND_MOD_MAX; i++)
- rsnd_dai_disconnect((io)->mod[i], io, i);
+ for_each_rsnd_mod(i, mod, io)
+ rsnd_dai_disconnect(mod, io, i);
rsnd_dai_connect(ssi_mod, io, RSND_MOD_SSI);
/*
diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c
index b2078cc..241cb3b 100644
--- a/sound/soc/sh/rcar/dma.c
+++ b/sound/soc/sh/rcar/dma.c
@@ -25,6 +25,10 @@
struct rsnd_dmaen {
struct dma_chan *chan;
+ dma_addr_t dma_buf;
+ unsigned int dma_len;
+ unsigned int dma_period;
+ unsigned int dma_cnt;
};
struct rsnd_dmapp {
@@ -34,6 +38,8 @@ struct rsnd_dmapp {
struct rsnd_dma {
struct rsnd_mod mod;
+ struct rsnd_mod *mod_from;
+ struct rsnd_mod *mod_to;
dma_addr_t src_addr;
dma_addr_t dst_addr;
union {
@@ -56,10 +62,38 @@ struct rsnd_dma_ctrl {
/*
* Audio DMAC
*/
+#define rsnd_dmaen_sync(dmaen, io, i) __rsnd_dmaen_sync(dmaen, io, i, 1)
+#define rsnd_dmaen_unsync(dmaen, io, i) __rsnd_dmaen_sync(dmaen, io, i, 0)
+static void __rsnd_dmaen_sync(struct rsnd_dmaen *dmaen, struct rsnd_dai_stream *io,
+ int i, int sync)
+{
+ struct device *dev = dmaen->chan->device->dev;
+ enum dma_data_direction dir;
+ int is_play = rsnd_io_is_play(io);
+ dma_addr_t buf;
+ int len, max;
+ size_t period;
+
+ len = dmaen->dma_len;
+ period = dmaen->dma_period;
+ max = len / period;
+ i = i % max;
+ buf = dmaen->dma_buf + (period * i);
+
+ dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
+
+ if (sync)
+ dma_sync_single_for_device(dev, buf, period, dir);
+ else
+ dma_sync_single_for_cpu(dev, buf, period, dir);
+}
+
static void __rsnd_dmaen_complete(struct rsnd_mod *mod,
struct rsnd_dai_stream *io)
{
struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
bool elapsed = false;
unsigned long flags;
@@ -76,9 +110,22 @@ static void __rsnd_dmaen_complete(struct rsnd_mod *mod,
*/
spin_lock_irqsave(&priv->lock, flags);
- if (rsnd_io_is_working(io))
+ if (rsnd_io_is_working(io)) {
+ rsnd_dmaen_unsync(dmaen, io, dmaen->dma_cnt);
+
+ /*
+ * Next period is already started.
+ * Let's sync Next Next period
+ * see
+ * rsnd_dmaen_start()
+ */
+ rsnd_dmaen_sync(dmaen, io, dmaen->dma_cnt + 2);
+
elapsed = rsnd_dai_pointer_update(io, io->byte_per_period);
+ dmaen->dma_cnt++;
+ }
+
spin_unlock_irqrestore(&priv->lock, flags);
if (elapsed)
@@ -92,75 +139,6 @@ static void rsnd_dmaen_complete(void *data)
rsnd_mod_interrupt(mod, __rsnd_dmaen_complete);
}
-static int rsnd_dmaen_stop(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct rsnd_priv *priv)
-{
- struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
- struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
-
- dmaengine_terminate_all(dmaen->chan);
-
- return 0;
-}
-
-static int rsnd_dmaen_start(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct rsnd_priv *priv)
-{
- struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
- struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
- struct snd_pcm_substream *substream = io->substream;
- struct device *dev = rsnd_priv_to_dev(priv);
- struct dma_async_tx_descriptor *desc;
- int is_play = rsnd_io_is_play(io);
-
- desc = dmaengine_prep_dma_cyclic(dmaen->chan,
- substream->runtime->dma_addr,
- snd_pcm_lib_buffer_bytes(substream),
- snd_pcm_lib_period_bytes(substream),
- is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
-
- if (!desc) {
- dev_err(dev, "dmaengine_prep_slave_sg() fail\n");
- return -EIO;
- }
-
- desc->callback = rsnd_dmaen_complete;
- desc->callback_param = rsnd_mod_get(dma);
-
- if (dmaengine_submit(desc) < 0) {
- dev_err(dev, "dmaengine_submit() fail\n");
- return -EIO;
- }
-
- dma_async_issue_pending(dmaen->chan);
-
- return 0;
-}
-
-struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
- struct rsnd_mod *mod, char *name)
-{
- struct dma_chan *chan;
- struct device_node *np;
- int i = 0;
-
- for_each_child_of_node(of_node, np) {
- if (i == rsnd_mod_id(mod))
- break;
- i++;
- }
-
- chan = of_dma_request_slave_channel(np, name);
-
- of_node_put(np);
- of_node_put(of_node);
-
- return chan;
-}
-
static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io,
struct rsnd_mod *mod_from,
struct rsnd_mod *mod_to)
@@ -175,13 +153,37 @@ static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io,
return rsnd_mod_dma_req(io, mod_to);
}
-static int rsnd_dmaen_remove(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct rsnd_priv *priv)
+static int rsnd_dmaen_stop(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv)
{
struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+ if (dmaen->chan) {
+ int is_play = rsnd_io_is_play(io);
+
+ dmaengine_terminate_all(dmaen->chan);
+ dma_unmap_single(dmaen->chan->device->dev,
+ dmaen->dma_buf, dmaen->dma_len,
+ is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+ }
+
+ return 0;
+}
+
+static int rsnd_dmaen_nolock_stop(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv)
+{
+ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+
+ /*
+ * DMAEngine release uses mutex lock.
+ * Thus, it shouldn't be called under spinlock.
+ * Let's call it under nolock_start
+ */
if (dmaen->chan)
dma_release_channel(dmaen->chan);
@@ -190,41 +192,55 @@ static int rsnd_dmaen_remove(struct rsnd_mod *mod,
return 0;
}
-static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
- struct rsnd_dma *dma, int id,
- struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
+static int rsnd_dmaen_nolock_start(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv)
{
- struct rsnd_mod *mod = rsnd_mod_get(dma);
+ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
- struct rsnd_priv *priv = rsnd_io_to_priv(io);
- struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
struct device *dev = rsnd_priv_to_dev(priv);
- struct dma_slave_config cfg = {};
- int is_play = rsnd_io_is_play(io);
- int ret;
if (dmaen->chan) {
dev_err(dev, "it already has dma channel\n");
return -EIO;
}
- if (dev->of_node) {
- dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
- } else {
- dma_cap_mask_t mask;
-
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
-
- dmaen->chan = dma_request_channel(mask, shdma_chan_filter,
- (void *)(uintptr_t)id);
- }
+ /*
+ * DMAEngine request uses mutex lock.
+ * Thus, it shouldn't be called under spinlock.
+ * Let's call it under nolock_start
+ */
+ dmaen->chan = rsnd_dmaen_request_channel(io,
+ dma->mod_from,
+ dma->mod_to);
if (IS_ERR_OR_NULL(dmaen->chan)) {
+ int ret = PTR_ERR(dmaen->chan);
+
dmaen->chan = NULL;
dev_err(dev, "can't get dma channel\n");
- goto rsnd_dma_channel_err;
+ return ret;
}
+ return 0;
+}
+
+static int rsnd_dmaen_start(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv)
+{
+ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+ struct snd_pcm_substream *substream = io->substream;
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct dma_async_tx_descriptor *desc;
+ struct dma_slave_config cfg = {};
+ dma_addr_t buf;
+ size_t len;
+ size_t period;
+ int is_play = rsnd_io_is_play(io);
+ int i;
+ int ret;
+
cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
cfg.src_addr = dma->src_addr;
cfg.dst_addr = dma->dst_addr;
@@ -237,30 +253,107 @@ static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
ret = dmaengine_slave_config(dmaen->chan, &cfg);
if (ret < 0)
- goto rsnd_dma_attach_err;
+ return ret;
+
+ len = snd_pcm_lib_buffer_bytes(substream);
+ period = snd_pcm_lib_period_bytes(substream);
+ buf = dma_map_single(dmaen->chan->device->dev,
+ substream->runtime->dma_area,
+ len,
+ is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+ if (dma_mapping_error(dmaen->chan->device->dev, buf)) {
+ dev_err(dev, "dma map failed\n");
+ return -EIO;
+ }
+
+ desc = dmaengine_prep_dma_cyclic(dmaen->chan,
+ buf, len, period,
+ is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+
+ if (!desc) {
+ dev_err(dev, "dmaengine_prep_slave_sg() fail\n");
+ return -EIO;
+ }
+
+ desc->callback = rsnd_dmaen_complete;
+ desc->callback_param = rsnd_mod_get(dma);
+
+ dmaen->dma_buf = buf;
+ dmaen->dma_len = len;
+ dmaen->dma_period = period;
+ dmaen->dma_cnt = 0;
+
+ /*
+ * synchronize this and next period
+ * see
+ * __rsnd_dmaen_complete()
+ */
+ for (i = 0; i < 2; i++)
+ rsnd_dmaen_sync(dmaen, io, i);
+
+ if (dmaengine_submit(desc) < 0) {
+ dev_err(dev, "dmaengine_submit() fail\n");
+ return -EIO;
+ }
+
+ dma_async_issue_pending(dmaen->chan);
+
+ return 0;
+}
+
+struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
+ struct rsnd_mod *mod, char *name)
+{
+ struct dma_chan *chan = NULL;
+ struct device_node *np;
+ int i = 0;
+
+ for_each_child_of_node(of_node, np) {
+ if (i == rsnd_mod_id(mod) && (!chan))
+ chan = of_dma_request_slave_channel(np, name);
+ i++;
+ }
+
+ /* It should call of_node_put(), since, it is rsnd_xxx_of_node() */
+ of_node_put(of_node);
+
+ return chan;
+}
+
+static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
+ struct rsnd_dma *dma,
+ struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
+{
+ struct rsnd_priv *priv = rsnd_io_to_priv(io);
+ struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
+ struct dma_chan *chan;
+
+ /* try to get DMAEngine channel */
+ chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
+ if (IS_ERR_OR_NULL(chan)) {
+ /*
+ * DMA failed. try to PIO mode
+ * see
+ * rsnd_ssi_fallback()
+ * rsnd_rdai_continuance_probe()
+ */
+ return -EAGAIN;
+ }
+
+ dma_release_channel(chan);
dmac->dmaen_num++;
return 0;
-
-rsnd_dma_attach_err:
- rsnd_dmaen_remove(mod, io, priv);
-rsnd_dma_channel_err:
-
- /*
- * DMA failed. try to PIO mode
- * see
- * rsnd_ssi_fallback()
- * rsnd_rdai_continuance_probe()
- */
- return -EAGAIN;
}
static struct rsnd_mod_ops rsnd_dmaen_ops = {
.name = "audmac",
+ .nolock_start = rsnd_dmaen_nolock_start,
+ .nolock_stop = rsnd_dmaen_nolock_stop,
.start = rsnd_dmaen_start,
.stop = rsnd_dmaen_stop,
- .remove = rsnd_dmaen_remove,
};
/*
@@ -408,7 +501,7 @@ static int rsnd_dmapp_start(struct rsnd_mod *mod,
}
static int rsnd_dmapp_attach(struct rsnd_dai_stream *io,
- struct rsnd_dma *dma, int id,
+ struct rsnd_dma *dma,
struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
{
struct rsnd_dmapp *dmapp = rsnd_dma_to_dmapp(dma);
@@ -641,7 +734,7 @@ static void rsnd_dma_of_path(struct rsnd_mod *this,
}
int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
- struct rsnd_mod **dma_mod, int id)
+ struct rsnd_mod **dma_mod)
{
struct rsnd_mod *mod_from = NULL;
struct rsnd_mod *mod_to = NULL;
@@ -650,7 +743,7 @@ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
struct device *dev = rsnd_priv_to_dev(priv);
struct rsnd_mod_ops *ops;
enum rsnd_mod_type type;
- int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma, int id,
+ int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma,
struct rsnd_mod *mod_from, struct rsnd_mod *mod_to);
int is_play = rsnd_io_is_play(io);
int ret, dma_id;
@@ -696,9 +789,6 @@ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
*dma_mod = rsnd_mod_get(dma);
- dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
- dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
-
ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
rsnd_mod_get_status, type, dma_id);
if (ret < 0)
@@ -709,9 +799,14 @@ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
- ret = attach(io, dma, id, mod_from, mod_to);
+ ret = attach(io, dma, mod_from, mod_to);
if (ret < 0)
return ret;
+
+ dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
+ dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
+ dma->mod_from = mod_from;
+ dma->mod_to = mod_to;
}
ret = rsnd_dai_connect(*dma_mod, io, type);
@@ -721,17 +816,6 @@ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
return 0;
}
-void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod)
-{
- if (*dma_mod) {
- struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
- struct device *dev = rsnd_priv_to_dev(priv);
-
- devm_kfree(dev, *dma_mod);
- *dma_mod = NULL;
- }
-}
-
int rsnd_dma_probe(struct rsnd_priv *priv)
{
struct platform_device *pdev = rsnd_priv_to_pdev(priv);
diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
index 02d971f..463de83 100644
--- a/sound/soc/sh/rcar/dvc.c
+++ b/sound/soc/sh/rcar/dvc.c
@@ -48,8 +48,6 @@ struct rsnd_dvc {
#define rsnd_dvc_get(priv, id) ((struct rsnd_dvc *)(priv->dvc) + id)
#define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
-#define rsnd_dvc_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dvc")
#define rsnd_mod_to_dvc(_mod) \
container_of((_mod), struct rsnd_dvc, mod)
@@ -220,21 +218,6 @@ static int rsnd_dvc_probe_(struct rsnd_mod *mod,
return rsnd_cmd_attach(io, rsnd_mod_id(mod));
}
-static int rsnd_dvc_remove_(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct rsnd_priv *priv)
-{
- struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
-
- rsnd_kctrl_remove(dvc->volume);
- rsnd_kctrl_remove(dvc->mute);
- rsnd_kctrl_remove(dvc->ren);
- rsnd_kctrl_remove(dvc->rup);
- rsnd_kctrl_remove(dvc->rdown);
-
- return 0;
-}
-
static int rsnd_dvc_init(struct rsnd_mod *mod,
struct rsnd_dai_stream *io,
struct rsnd_priv *priv)
@@ -302,18 +285,18 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
ret = rsnd_kctrl_new_e(mod, io, rtd,
is_play ?
"DVC Out Ramp Up Rate" : "DVC In Ramp Up Rate",
- &dvc->rup,
rsnd_dvc_volume_update,
- dvc_ramp_rate, ARRAY_SIZE(dvc_ramp_rate));
+ &dvc->rup,
+ dvc_ramp_rate);
if (ret < 0)
return ret;
ret = rsnd_kctrl_new_e(mod, io, rtd,
is_play ?
"DVC Out Ramp Down Rate" : "DVC In Ramp Down Rate",
- &dvc->rdown,
rsnd_dvc_volume_update,
- dvc_ramp_rate, ARRAY_SIZE(dvc_ramp_rate));
+ &dvc->rdown,
+ dvc_ramp_rate);
if (ret < 0)
return ret;
@@ -334,7 +317,6 @@ static struct rsnd_mod_ops rsnd_dvc_ops = {
.name = DVC_NAME,
.dma_req = rsnd_dvc_dma_req,
.probe = rsnd_dvc_probe_,
- .remove = rsnd_dvc_remove_,
.init = rsnd_dvc_init,
.quit = rsnd_dvc_quit,
.pcm_new = rsnd_dvc_pcm_new,
diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
index e785fe94..4b09807 100644
--- a/sound/soc/sh/rcar/gen.c
+++ b/sound/soc/sh/rcar/gen.c
@@ -211,6 +211,14 @@ static int rsnd_gen2_probe(struct rsnd_priv *priv)
RSND_GEN_S_REG(SSI_MODE1, 0x804),
RSND_GEN_S_REG(SSI_MODE2, 0x808),
RSND_GEN_S_REG(SSI_CONTROL, 0x810),
+ RSND_GEN_S_REG(SSI_SYS_STATUS0, 0x840),
+ RSND_GEN_S_REG(SSI_SYS_STATUS1, 0x844),
+ RSND_GEN_S_REG(SSI_SYS_STATUS2, 0x848),
+ RSND_GEN_S_REG(SSI_SYS_STATUS3, 0x84c),
+ RSND_GEN_S_REG(SSI_SYS_STATUS4, 0x880),
+ RSND_GEN_S_REG(SSI_SYS_STATUS5, 0x884),
+ RSND_GEN_S_REG(SSI_SYS_STATUS6, 0x888),
+ RSND_GEN_S_REG(SSI_SYS_STATUS7, 0x88c),
/* FIXME: it needs SSI_MODE2/3 in the future */
RSND_GEN_M_REG(SSI_BUSIF_MODE, 0x0, 0x80),
@@ -228,6 +236,7 @@ static int rsnd_gen2_probe(struct rsnd_priv *priv)
RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0xc, 0x20),
RSND_GEN_M_REG(SRC_CTRL, 0x10, 0x20),
RSND_GEN_M_REG(SRC_INT_ENABLE0, 0x18, 0x20),
+ RSND_GEN_M_REG(CMD_BUSIF_MODE, 0x184, 0x20),
RSND_GEN_M_REG(CMD_BUSIF_DALIGN,0x188, 0x20),
RSND_GEN_M_REG(CMD_ROUTE_SLCT, 0x18c, 0x20),
RSND_GEN_M_REG(CMD_CTRL, 0x190, 0x20),
diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
index bf9596b..323af41 100644
--- a/sound/soc/sh/rcar/rsnd.h
+++ b/sound/soc/sh/rcar/rsnd.h
@@ -43,17 +43,7 @@
* see gen1/gen2 for detail
*/
enum rsnd_reg {
- /* SCU (SRC/SSIU/MIX/CTU/DVC) */
- RSND_REG_SSI_MODE, /* Gen2 only */
- RSND_REG_SSI_MODE0,
- RSND_REG_SSI_MODE1,
- RSND_REG_SSI_MODE2,
- RSND_REG_SSI_CONTROL,
- RSND_REG_SSI_CTRL, /* Gen2 only */
- RSND_REG_SSI_BUSIF_MODE, /* Gen2 only */
- RSND_REG_SSI_BUSIF_ADINR, /* Gen2 only */
- RSND_REG_SSI_BUSIF_DALIGN, /* Gen2 only */
- RSND_REG_SSI_INT_ENABLE, /* Gen2 only */
+ /* SCU (MIX/CTU/DVC) */
RSND_REG_SRC_I_BUSIF_MODE,
RSND_REG_SRC_O_BUSIF_MODE,
RSND_REG_SRC_ROUTE_MODE0,
@@ -63,29 +53,30 @@ enum rsnd_reg {
RSND_REG_SRC_IFSCR,
RSND_REG_SRC_IFSVR,
RSND_REG_SRC_SRCCR,
- RSND_REG_SRC_CTRL, /* Gen2 only */
- RSND_REG_SRC_BSDSR, /* Gen2 only */
- RSND_REG_SRC_BSISR, /* Gen2 only */
- RSND_REG_SRC_INT_ENABLE0, /* Gen2 only */
- RSND_REG_SRC_BUSIF_DALIGN, /* Gen2 only */
- RSND_REG_SRCIN_TIMSEL0, /* Gen2 only */
- RSND_REG_SRCIN_TIMSEL1, /* Gen2 only */
- RSND_REG_SRCIN_TIMSEL2, /* Gen2 only */
- RSND_REG_SRCIN_TIMSEL3, /* Gen2 only */
- RSND_REG_SRCIN_TIMSEL4, /* Gen2 only */
- RSND_REG_SRCOUT_TIMSEL0, /* Gen2 only */
- RSND_REG_SRCOUT_TIMSEL1, /* Gen2 only */
- RSND_REG_SRCOUT_TIMSEL2, /* Gen2 only */
- RSND_REG_SRCOUT_TIMSEL3, /* Gen2 only */
- RSND_REG_SRCOUT_TIMSEL4, /* Gen2 only */
+ RSND_REG_SRC_CTRL,
+ RSND_REG_SRC_BSDSR,
+ RSND_REG_SRC_BSISR,
+ RSND_REG_SRC_INT_ENABLE0,
+ RSND_REG_SRC_BUSIF_DALIGN,
+ RSND_REG_SRCIN_TIMSEL0,
+ RSND_REG_SRCIN_TIMSEL1,
+ RSND_REG_SRCIN_TIMSEL2,
+ RSND_REG_SRCIN_TIMSEL3,
+ RSND_REG_SRCIN_TIMSEL4,
+ RSND_REG_SRCOUT_TIMSEL0,
+ RSND_REG_SRCOUT_TIMSEL1,
+ RSND_REG_SRCOUT_TIMSEL2,
+ RSND_REG_SRCOUT_TIMSEL3,
+ RSND_REG_SRCOUT_TIMSEL4,
RSND_REG_SCU_SYS_STATUS0,
- RSND_REG_SCU_SYS_STATUS1, /* Gen2 only */
+ RSND_REG_SCU_SYS_STATUS1,
RSND_REG_SCU_SYS_INT_EN0,
- RSND_REG_SCU_SYS_INT_EN1, /* Gen2 only */
- RSND_REG_CMD_CTRL, /* Gen2 only */
- RSND_REG_CMD_BUSIF_DALIGN, /* Gen2 only */
+ RSND_REG_SCU_SYS_INT_EN1,
+ RSND_REG_CMD_CTRL,
+ RSND_REG_CMD_BUSIF_MODE,
+ RSND_REG_CMD_BUSIF_DALIGN,
RSND_REG_CMD_ROUTE_SLCT,
- RSND_REG_CMDOUT_TIMSEL, /* Gen2 only */
+ RSND_REG_CMDOUT_TIMSEL,
RSND_REG_CTU_SWRSR,
RSND_REG_CTU_CTUIR,
RSND_REG_CTU_ADINR,
@@ -147,18 +138,38 @@ enum rsnd_reg {
RSND_REG_DVC_VOL6R,
RSND_REG_DVC_VOL7R,
RSND_REG_DVC_DVUER,
- RSND_REG_DVC_VRCTR, /* Gen2 only */
- RSND_REG_DVC_VRPDR, /* Gen2 only */
- RSND_REG_DVC_VRDBR, /* Gen2 only */
+ RSND_REG_DVC_VRCTR,
+ RSND_REG_DVC_VRPDR,
+ RSND_REG_DVC_VRDBR,
/* ADG */
RSND_REG_BRRA,
RSND_REG_BRRB,
RSND_REG_BRGCKR,
- RSND_REG_DIV_EN, /* Gen2 only */
+ RSND_REG_DIV_EN,
RSND_REG_AUDIO_CLK_SEL0,
RSND_REG_AUDIO_CLK_SEL1,
- RSND_REG_AUDIO_CLK_SEL2, /* Gen2 only */
+ RSND_REG_AUDIO_CLK_SEL2,
+
+ /* SSIU */
+ RSND_REG_SSI_MODE,
+ RSND_REG_SSI_MODE0,
+ RSND_REG_SSI_MODE1,
+ RSND_REG_SSI_MODE2,
+ RSND_REG_SSI_CONTROL,
+ RSND_REG_SSI_CTRL,
+ RSND_REG_SSI_BUSIF_MODE,
+ RSND_REG_SSI_BUSIF_ADINR,
+ RSND_REG_SSI_BUSIF_DALIGN,
+ RSND_REG_SSI_INT_ENABLE,
+ RSND_REG_SSI_SYS_STATUS0,
+ RSND_REG_SSI_SYS_STATUS1,
+ RSND_REG_SSI_SYS_STATUS2,
+ RSND_REG_SSI_SYS_STATUS3,
+ RSND_REG_SSI_SYS_STATUS4,
+ RSND_REG_SSI_SYS_STATUS5,
+ RSND_REG_SSI_SYS_STATUS6,
+ RSND_REG_SSI_SYS_STATUS7,
/* SSI */
RSND_REG_SSICR,
@@ -194,13 +205,13 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,
u32 mask, u32 data);
u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
+u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod);
/*
* R-Car DMA
*/
int rsnd_dma_attach(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod, struct rsnd_mod **dma_mod, int id);
-void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
+ struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
int rsnd_dma_probe(struct rsnd_priv *priv);
struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
struct rsnd_mod *mod, char *name);
@@ -260,6 +271,12 @@ struct rsnd_mod_ops {
int (*fallback)(struct rsnd_mod *mod,
struct rsnd_dai_stream *io,
struct rsnd_priv *priv);
+ int (*nolock_start)(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv);
+ int (*nolock_stop)(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv);
};
struct rsnd_dai_stream;
@@ -277,8 +294,9 @@ struct rsnd_mod {
/*
* status
*
- * 0xH0000CB0
+ * 0xH0000CBA
*
+ * A 0: nolock_start 1: nolock_stop
* B 0: init 1: quit
* C 0: start 1: stop
*
@@ -288,6 +306,8 @@ struct rsnd_mod {
* H 0: fallback
* H 0: hw_params
*/
+#define __rsnd_mod_shift_nolock_start 0
+#define __rsnd_mod_shift_nolock_stop 0
#define __rsnd_mod_shift_init 4
#define __rsnd_mod_shift_quit 4
#define __rsnd_mod_shift_start 8
@@ -301,6 +321,8 @@ struct rsnd_mod {
#define __rsnd_mod_add_probe 0
#define __rsnd_mod_add_remove 0
+#define __rsnd_mod_add_nolock_start 1
+#define __rsnd_mod_add_nolock_stop -1
#define __rsnd_mod_add_init 1
#define __rsnd_mod_add_quit -1
#define __rsnd_mod_add_start 1
@@ -320,6 +342,8 @@ struct rsnd_mod {
#define __rsnd_mod_call_pcm_new 0
#define __rsnd_mod_call_fallback 0
#define __rsnd_mod_call_hw_params 0
+#define __rsnd_mod_call_nolock_start 0
+#define __rsnd_mod_call_nolock_stop 1
#define rsnd_mod_to_priv(mod) ((mod)->priv)
#define rsnd_mod_id(mod) ((mod) ? (mod)->id : -1)
@@ -346,6 +370,18 @@ void rsnd_mod_interrupt(struct rsnd_mod *mod,
u32 *rsnd_mod_get_status(struct rsnd_dai_stream *io,
struct rsnd_mod *mod,
enum rsnd_mod_type type);
+struct rsnd_mod *rsnd_mod_next(int *iterator,
+ struct rsnd_dai_stream *io,
+ enum rsnd_mod_type *array,
+ int array_size);
+#define for_each_rsnd_mod(iterator, pos, io) \
+ for (iterator = 0; \
+ (pos = rsnd_mod_next(&iterator, io, NULL, 0)); iterator++)
+#define for_each_rsnd_mod_arrays(iterator, pos, io, array, size) \
+ for (iterator = 0; \
+ (pos = rsnd_mod_next(&iterator, io, array, size)); iterator++)
+#define for_each_rsnd_mod_array(iterator, pos, io, array) \
+ for_each_rsnd_mod_arrays(iterator, pos, io, array, ARRAY_SIZE(array))
void rsnd_parse_connect_common(struct rsnd_dai *rdai,
struct rsnd_mod* (*mod_get)(struct rsnd_priv *priv, int id),
@@ -365,6 +401,18 @@ int rsnd_runtime_is_ssi_multi(struct rsnd_dai_stream *io);
int rsnd_runtime_is_ssi_tdm(struct rsnd_dai_stream *io);
/*
+ * DT
+ */
+#define rsnd_parse_of_node(priv, node) \
+ of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, node)
+#define RSND_NODE_DAI "rcar_sound,dai"
+#define RSND_NODE_SSI "rcar_sound,ssi"
+#define RSND_NODE_SRC "rcar_sound,src"
+#define RSND_NODE_CTU "rcar_sound,ctu"
+#define RSND_NODE_MIX "rcar_sound,mix"
+#define RSND_NODE_DVC "rcar_sound,dvc"
+
+/*
* R-Car sound DAI
*/
#define RSND_DAI_NAME_SIZE 16
@@ -429,8 +477,7 @@ int rsnd_dai_pointer_offset(struct rsnd_dai_stream *io, int additional);
int rsnd_dai_connect(struct rsnd_mod *mod,
struct rsnd_dai_stream *io,
enum rsnd_mod_type type);
-#define rsnd_dai_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dai")
+#define rsnd_dai_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_DAI)
/*
* R-Car Gen1/Gen2
@@ -566,35 +613,30 @@ struct rsnd_kctrl_cfg_s {
u32 val;
};
-void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg);
-#define rsnd_kctrl_remove(_cfg) _rsnd_kctrl_remove(&((_cfg).cfg))
+struct rsnd_kctrl_cfg *rsnd_kctrl_init_m(struct rsnd_kctrl_cfg_m *cfg);
+struct rsnd_kctrl_cfg *rsnd_kctrl_init_s(struct rsnd_kctrl_cfg_s *cfg);
+int rsnd_kctrl_new(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct snd_soc_pcm_runtime *rtd,
+ const unsigned char *name,
+ void (*update)(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod),
+ struct rsnd_kctrl_cfg *cfg,
+ const char * const *texts,
+ int size,
+ u32 max);
-int rsnd_kctrl_new_m(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod),
- struct rsnd_kctrl_cfg_m *_cfg,
- int ch_size,
- u32 max);
-int rsnd_kctrl_new_s(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod),
- struct rsnd_kctrl_cfg_s *_cfg,
- u32 max);
-int rsnd_kctrl_new_e(struct rsnd_mod *mod,
- struct rsnd_dai_stream *io,
- struct snd_soc_pcm_runtime *rtd,
- const unsigned char *name,
- struct rsnd_kctrl_cfg_s *_cfg,
- void (*update)(struct rsnd_dai_stream *io,
- struct rsnd_mod *mod),
- const char * const *texts,
- u32 max);
+#define rsnd_kctrl_new_m(mod, io, rtd, name, update, cfg, size, max) \
+ rsnd_kctrl_new(mod, io, rtd, name, update, rsnd_kctrl_init_m(cfg), \
+ NULL, size, max)
+
+#define rsnd_kctrl_new_s(mod, io, rtd, name, update, cfg, max) \
+ rsnd_kctrl_new(mod, io, rtd, name, update, rsnd_kctrl_init_s(cfg), \
+ NULL, 1, max)
+
+#define rsnd_kctrl_new_e(mod, io, rtd, name, update, cfg, texts) \
+ rsnd_kctrl_new(mod, io, rtd, name, update, rsnd_kctrl_init_s(cfg), \
+ texts, 1, ARRAY_SIZE(texts))
/*
* R-Car SSI
@@ -610,8 +652,7 @@ u32 rsnd_ssi_multi_slaves_runtime(struct rsnd_dai_stream *io);
__rsnd_ssi_is_pin_sharing(rsnd_io_to_mod_ssi(io))
int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
-#define rsnd_ssi_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ssi")
+#define rsnd_ssi_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_SSI)
void rsnd_parse_connect_ssi(struct rsnd_dai *rdai,
struct device_node *playback,
struct device_node *capture);
@@ -637,8 +678,7 @@ unsigned int rsnd_src_get_rate(struct rsnd_priv *priv,
struct rsnd_dai_stream *io,
int is_in);
-#define rsnd_src_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,src")
+#define rsnd_src_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_SRC)
#define rsnd_parse_connect_src(rdai, playback, capture) \
rsnd_parse_connect_common(rdai, rsnd_src_mod_get, \
rsnd_src_of_node(rsnd_rdai_to_priv(rdai)), \
@@ -651,8 +691,7 @@ int rsnd_ctu_probe(struct rsnd_priv *priv);
void rsnd_ctu_remove(struct rsnd_priv *priv);
int rsnd_ctu_converted_channel(struct rsnd_mod *mod);
struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id);
-#define rsnd_ctu_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ctu")
+#define rsnd_ctu_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_CTU)
#define rsnd_parse_connect_ctu(rdai, playback, capture) \
rsnd_parse_connect_common(rdai, rsnd_ctu_mod_get, \
rsnd_ctu_of_node(rsnd_rdai_to_priv(rdai)), \
@@ -664,8 +703,7 @@ struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id);
int rsnd_mix_probe(struct rsnd_priv *priv);
void rsnd_mix_remove(struct rsnd_priv *priv);
struct rsnd_mod *rsnd_mix_mod_get(struct rsnd_priv *priv, int id);
-#define rsnd_mix_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,mix")
+#define rsnd_mix_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_MIX)
#define rsnd_parse_connect_mix(rdai, playback, capture) \
rsnd_parse_connect_common(rdai, rsnd_mix_mod_get, \
rsnd_mix_of_node(rsnd_rdai_to_priv(rdai)), \
@@ -677,8 +715,7 @@ struct rsnd_mod *rsnd_mix_mod_get(struct rsnd_priv *priv, int id);
int rsnd_dvc_probe(struct rsnd_priv *priv);
void rsnd_dvc_remove(struct rsnd_priv *priv);
struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id);
-#define rsnd_dvc_of_node(priv) \
- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dvc")
+#define rsnd_dvc_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_DVC)
#define rsnd_parse_connect_dvc(rdai, playback, capture) \
rsnd_parse_connect_common(rdai, rsnd_dvc_mod_get, \
rsnd_dvc_of_node(rsnd_rdai_to_priv(rdai)), \
@@ -692,8 +729,8 @@ void rsnd_cmd_remove(struct rsnd_priv *priv);
int rsnd_cmd_attach(struct rsnd_dai_stream *io, int id);
struct rsnd_mod *rsnd_cmd_mod_get(struct rsnd_priv *priv, int id);
-#ifdef DEBUG
void rsnd_mod_make_sure(struct rsnd_mod *mod, enum rsnd_mod_type type);
+#ifdef DEBUG
#define rsnd_mod_confirm_ssi(mssi) rsnd_mod_make_sure(mssi, RSND_MOD_SSI)
#define rsnd_mod_confirm_src(msrc) rsnd_mod_make_sure(msrc, RSND_MOD_SRC)
#define rsnd_mod_confirm_dvc(mdvc) rsnd_mod_make_sure(mdvc, RSND_MOD_DVC)
diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
index 8923bdf..2edce71 100644
--- a/sound/soc/sh/rcar/src.c
+++ b/sound/soc/sh/rcar/src.c
@@ -190,11 +190,13 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io,
struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
struct device *dev = rsnd_priv_to_dev(priv);
struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ int is_play = rsnd_io_is_play(io);
int use_src = 0;
u32 fin, fout;
u32 ifscr, fsrate, adinr;
u32 cr, route;
u32 bsdsr, bsisr;
+ u32 i_busif, o_busif, tmp;
uint ratio;
if (!runtime)
@@ -270,6 +272,11 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io,
break;
}
+ /* BUSIF_MODE */
+ tmp = rsnd_get_busif_shift(io, mod);
+ i_busif = (is_play ? tmp : 0) | 1;
+ o_busif = (!is_play ? tmp : 0) | 1;
+
rsnd_mod_write(mod, SRC_ROUTE_MODE0, route);
rsnd_mod_write(mod, SRC_SRCIR, 1); /* initialize */
@@ -281,8 +288,9 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io,
rsnd_mod_write(mod, SRC_BSISR, bsisr);
rsnd_mod_write(mod, SRC_SRCIR, 0); /* cancel initialize */
- rsnd_mod_write(mod, SRC_I_BUSIF_MODE, 1);
- rsnd_mod_write(mod, SRC_O_BUSIF_MODE, 1);
+ rsnd_mod_write(mod, SRC_I_BUSIF_MODE, i_busif);
+ rsnd_mod_write(mod, SRC_O_BUSIF_MODE, o_busif);
+
rsnd_mod_write(mod, SRC_BUSIF_DALIGN, rsnd_get_dalign(mod, io));
rsnd_adg_set_src_timesel_gen2(mod, io, fin, fout);
@@ -331,8 +339,8 @@ static void rsnd_src_status_clear(struct rsnd_mod *mod)
{
u32 val = OUF_SRC(rsnd_mod_id(mod));
- rsnd_mod_bset(mod, SCU_SYS_STATUS0, val, val);
- rsnd_mod_bset(mod, SCU_SYS_STATUS1, val, val);
+ rsnd_mod_write(mod, SCU_SYS_STATUS0, val);
+ rsnd_mod_write(mod, SCU_SYS_STATUS1, val);
}
static bool rsnd_src_error_occurred(struct rsnd_mod *mod)
@@ -477,7 +485,7 @@ static int rsnd_src_probe_(struct rsnd_mod *mod,
return ret;
}
- ret = rsnd_dma_attach(io, mod, &src->dma, 0);
+ ret = rsnd_dma_attach(io, mod, &src->dma);
return ret;
}
diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
index 630cb6b..c224695 100644
--- a/sound/soc/sh/rcar/ssi.c
+++ b/sound/soc/sh/rcar/ssi.c
@@ -302,7 +302,7 @@ static void rsnd_ssi_config_init(struct rsnd_mod *mod,
* always use 32bit system word.
* see also rsnd_ssi_master_clk_enable()
*/
- cr_own = FORCE | SWL_32 | PDTA;
+ cr_own = FORCE | SWL_32;
if (rdai->bit_clk_inv)
cr_own |= SCKP;
@@ -656,10 +656,14 @@ static int rsnd_ssi_common_probe(struct rsnd_mod *mod,
if (ret < 0)
return ret;
- ret = devm_request_irq(dev, ssi->irq,
- rsnd_ssi_interrupt,
- IRQF_SHARED,
- dev_name(dev), mod);
+ /*
+ * SSI might be called again as PIO fallback
+ * It is easy to manual handling for IRQ request/free
+ */
+ ret = request_irq(ssi->irq,
+ rsnd_ssi_interrupt,
+ IRQF_SHARED,
+ dev_name(dev), mod);
return ret;
}
@@ -681,7 +685,6 @@ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
struct rsnd_priv *priv)
{
struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
- int dma_id = 0; /* not needed */
int ret;
/*
@@ -696,7 +699,7 @@ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
return ret;
/* SSI probe might be called many times in MUX multi path */
- ret = rsnd_dma_attach(io, mod, &ssi->dma, dma_id);
+ ret = rsnd_dma_attach(io, mod, &ssi->dma);
return ret;
}
@@ -706,14 +709,14 @@ static int rsnd_ssi_dma_remove(struct rsnd_mod *mod,
struct rsnd_priv *priv)
{
struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
- struct device *dev = rsnd_priv_to_dev(priv);
- int irq = ssi->irq;
+ struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io);
+
+ /* Do nothing for SSI parent mod */
+ if (ssi_parent_mod == mod)
+ return 0;
/* PIO will request IRQ again */
- if (ssi->dma)
- devm_free_irq(dev, irq, mod);
-
- rsnd_dma_detach(mod, &ssi->dma);
+ free_irq(ssi->irq, mod);
return 0;
}
diff --git a/sound/soc/sh/rcar/ssiu.c b/sound/soc/sh/rcar/ssiu.c
index 3f95d6b..512d238 100644
--- a/sound/soc/sh/rcar/ssiu.c
+++ b/sound/soc/sh/rcar/ssiu.c
@@ -33,6 +33,26 @@ static int rsnd_ssiu_init(struct rsnd_mod *mod,
u32 mask1, val1;
u32 mask2, val2;
+ /* clear status */
+ switch (id) {
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ rsnd_mod_write(mod, SSI_SYS_STATUS0, 0xf << (id * 4));
+ rsnd_mod_write(mod, SSI_SYS_STATUS2, 0xf << (id * 4));
+ rsnd_mod_write(mod, SSI_SYS_STATUS4, 0xf << (id * 4));
+ rsnd_mod_write(mod, SSI_SYS_STATUS6, 0xf << (id * 4));
+ break;
+ case 9:
+ rsnd_mod_write(mod, SSI_SYS_STATUS1, 0xf << 4);
+ rsnd_mod_write(mod, SSI_SYS_STATUS3, 0xf << 4);
+ rsnd_mod_write(mod, SSI_SYS_STATUS5, 0xf << 4);
+ rsnd_mod_write(mod, SSI_SYS_STATUS7, 0xf << 4);
+ break;
+ }
+
/*
* SSI_MODE0
*/
@@ -124,7 +144,8 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod,
(rsnd_io_is_play(io) ?
rsnd_runtime_channel_after_ctu(io) :
rsnd_runtime_channel_original(io)));
- rsnd_mod_write(mod, SSI_BUSIF_MODE, 1);
+ rsnd_mod_write(mod, SSI_BUSIF_MODE,
+ rsnd_get_busif_shift(io, mod) | 1);
rsnd_mod_write(mod, SSI_BUSIF_DALIGN,
rsnd_get_dalign(mod, io));
}
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index c0bbcd9..7af56f3 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -34,6 +34,7 @@
#include <linux/ctype.h>
#include <linux/slab.h>
#include <linux/of.h>
+#include <linux/dmi.h>
#include <sound/core.h>
#include <sound/jack.h>
#include <sound/pcm.h>
@@ -626,7 +627,7 @@ static void codec2codec_close_delayed_work(struct work_struct *work)
int snd_soc_suspend(struct device *dev)
{
struct snd_soc_card *card = dev_get_drvdata(dev);
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
struct snd_soc_pcm_runtime *rtd;
int i;
@@ -702,39 +703,39 @@ int snd_soc_suspend(struct device *dev)
dapm_mark_endpoints_dirty(card);
snd_soc_dapm_sync(&card->dapm);
- /* suspend all CODECs */
- list_for_each_entry(codec, &card->codec_dev_list, card_list) {
- struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
+ /* suspend all COMPONENTs */
+ list_for_each_entry(component, &card->component_dev_list, card_list) {
+ struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
- /* If there are paths active then the CODEC will be held with
+ /* If there are paths active then the COMPONENT will be held with
* bias _ON and should not be suspended. */
- if (!codec->suspended) {
+ if (!component->suspended) {
switch (snd_soc_dapm_get_bias_level(dapm)) {
case SND_SOC_BIAS_STANDBY:
/*
- * If the CODEC is capable of idle
+ * If the COMPONENT is capable of idle
* bias off then being in STANDBY
* means it's doing something,
* otherwise fall through.
*/
if (dapm->idle_bias_off) {
- dev_dbg(codec->dev,
+ dev_dbg(component->dev,
"ASoC: idle_bias_off CODEC on over suspend\n");
break;
}
case SND_SOC_BIAS_OFF:
- if (codec->driver->suspend)
- codec->driver->suspend(codec);
- codec->suspended = 1;
- if (codec->component.regmap)
- regcache_mark_dirty(codec->component.regmap);
+ if (component->suspend)
+ component->suspend(component);
+ component->suspended = 1;
+ if (component->regmap)
+ regcache_mark_dirty(component->regmap);
/* deactivate pins to sleep state */
- pinctrl_pm_select_sleep_state(codec->dev);
+ pinctrl_pm_select_sleep_state(component->dev);
break;
default:
- dev_dbg(codec->dev,
- "ASoC: CODEC is on over suspend\n");
+ dev_dbg(component->dev,
+ "ASoC: COMPONENT is on over suspend\n");
break;
}
}
@@ -768,7 +769,7 @@ static void soc_resume_deferred(struct work_struct *work)
struct snd_soc_card *card =
container_of(work, struct snd_soc_card, deferred_resume_work);
struct snd_soc_pcm_runtime *rtd;
- struct snd_soc_codec *codec;
+ struct snd_soc_component *component;
int i;
/* our power state is still SNDRV_CTL_POWER_D3hot from suspend time,
@@ -794,11 +795,11 @@ static void soc_resume_deferred(struct work_struct *work)
cpu_dai->driver->resume(cpu_dai);
}
- list_for_each_entry(codec, &card->codec_dev_list, card_list) {
- if (codec->suspended) {
- if (codec->driver->resume)
- codec->driver->resume(codec);
- codec->suspended = 0;
+ list_for_each_entry(component, &card->component_dev_list, card_list) {
+ if (component->suspended) {
+ if (component->resume)
+ component->resume(component);
+ component->suspended = 0;
}
}
@@ -972,6 +973,48 @@ struct snd_soc_dai *snd_soc_find_dai(
}
EXPORT_SYMBOL_GPL(snd_soc_find_dai);
+
+/**
+ * snd_soc_find_dai_link - Find a DAI link
+ *
+ * @card: soc card
+ * @id: DAI link ID to match
+ * @name: DAI link name to match, optional
+ * @stream name: DAI link stream name to match, optional
+ *
+ * This function will search all existing DAI links of the soc card to
+ * find the link of the same ID. Since DAI links may not have their
+ * unique ID, so name and stream name should also match if being
+ * specified.
+ *
+ * Return: pointer of DAI link, or NULL if not found.
+ */
+struct snd_soc_dai_link *snd_soc_find_dai_link(struct snd_soc_card *card,
+ int id, const char *name,
+ const char *stream_name)
+{
+ struct snd_soc_dai_link *link, *_link;
+
+ lockdep_assert_held(&client_mutex);
+
+ list_for_each_entry_safe(link, _link, &card->dai_link_list, list) {
+ if (link->id != id)
+ continue;
+
+ if (name && (!link->name || strcmp(name, link->name)))
+ continue;
+
+ if (stream_name && (!link->stream_name
+ || strcmp(stream_name, link->stream_name)))
+ continue;
+
+ return link;
+ }
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(snd_soc_find_dai_link);
+
static bool soc_is_dai_link_bound(struct snd_soc_card *card,
struct snd_soc_dai_link *dai_link)
{
@@ -993,6 +1036,7 @@ static int soc_bind_dai_link(struct snd_soc_card *card,
struct snd_soc_dai_link_component cpu_dai_component;
struct snd_soc_dai **codec_dais;
struct snd_soc_platform *platform;
+ struct device_node *platform_of_node;
const char *platform_name;
int i;
@@ -1042,9 +1086,12 @@ static int soc_bind_dai_link(struct snd_soc_card *card,
/* find one from the set of registered platforms */
list_for_each_entry(platform, &platform_list, list) {
+ platform_of_node = platform->dev->of_node;
+ if (!platform_of_node && platform->dev->parent->of_node)
+ platform_of_node = platform->dev->parent->of_node;
+
if (dai_link->platform_of_node) {
- if (platform->dev->of_node !=
- dai_link->platform_of_node)
+ if (platform_of_node != dai_link->platform_of_node)
continue;
} else {
if (strcmp(platform->component.name, platform_name))
@@ -1072,9 +1119,7 @@ static void soc_remove_component(struct snd_soc_component *component)
if (!component->card)
return;
- /* This is a HACK and will be removed soon */
- if (component->codec)
- list_del(&component->codec->card_list);
+ list_del(&component->card_list);
if (component->remove)
component->remove(component);
@@ -1443,10 +1488,7 @@ static int soc_probe_component(struct snd_soc_card *card,
component->num_dapm_routes);
list_add(&dapm->list, &card->dapm_list);
-
- /* This is a HACK and will be removed soon */
- if (component->codec)
- list_add(&component->codec->card_list, &card->codec_dev_list);
+ list_add(&component->card_list, &card->component_dev_list);
return 0;
@@ -1552,6 +1594,27 @@ static int soc_probe_dai(struct snd_soc_dai *dai, int order)
return 0;
}
+static int soc_link_dai_pcm_new(struct snd_soc_dai **dais, int num_dais,
+ struct snd_soc_pcm_runtime *rtd)
+{
+ int i, ret = 0;
+
+ for (i = 0; i < num_dais; ++i) {
+ struct snd_soc_dai_driver *drv = dais[i]->driver;
+
+ if (!rtd->dai_link->no_pcm && drv->pcm_new)
+ ret = drv->pcm_new(rtd, dais[i]);
+ if (ret < 0) {
+ dev_err(dais[i]->dev,
+ "ASoC: Failed to bind %s with pcm device\n",
+ dais[i]->name);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static int soc_link_dai_widgets(struct snd_soc_card *card,
struct snd_soc_dai_link *dai_link,
struct snd_soc_pcm_runtime *rtd)
@@ -1663,6 +1726,13 @@ static int soc_probe_link_dais(struct snd_soc_card *card,
dai_link->stream_name, ret);
return ret;
}
+ ret = soc_link_dai_pcm_new(&cpu_dai, 1, rtd);
+ if (ret < 0)
+ return ret;
+ ret = soc_link_dai_pcm_new(rtd->codec_dais,
+ rtd->num_codecs, rtd);
+ if (ret < 0)
+ return ret;
} else {
INIT_DELAYED_WORK(&rtd->delayed_work,
codec2codec_close_delayed_work);
@@ -1706,7 +1776,8 @@ static int soc_bind_aux_dev(struct snd_soc_card *card, int num)
}
component->init = aux_dev->init;
- list_add(&component->list_aux, &card->aux_comp_list);
+ list_add(&component->card_aux_list, &card->aux_comp_list);
+
return 0;
err_defer:
@@ -1722,7 +1793,7 @@ static int soc_probe_aux_devices(struct snd_soc_card *card)
for (order = SND_SOC_COMP_ORDER_FIRST; order <= SND_SOC_COMP_ORDER_LAST;
order++) {
- list_for_each_entry(comp, &card->aux_comp_list, list_aux) {
+ list_for_each_entry(comp, &card->aux_comp_list, card_aux_list) {
if (comp->driver->probe_order == order) {
ret = soc_probe_component(card, comp);
if (ret < 0) {
@@ -1746,11 +1817,12 @@ static void soc_remove_aux_devices(struct snd_soc_card *card)
for (order = SND_SOC_COMP_ORDER_FIRST; order <= SND_SOC_COMP_ORDER_LAST;
order++) {
list_for_each_entry_safe(comp, _comp,
- &card->aux_comp_list, list_aux) {
+ &card->aux_comp_list, card_aux_list) {
+
if (comp->driver->remove_order == order) {
soc_remove_component(comp);
/* remove it from the card's aux_comp_list */
- list_del(&comp->list_aux);
+ list_del(&comp->card_aux_list);
}
}
}
@@ -1840,6 +1912,139 @@ int snd_soc_runtime_set_dai_fmt(struct snd_soc_pcm_runtime *rtd,
}
EXPORT_SYMBOL_GPL(snd_soc_runtime_set_dai_fmt);
+
+/* Trim special characters, and replace '-' with '_' since '-' is used to
+ * separate different DMI fields in the card long name. Only number and
+ * alphabet characters and a few separator characters are kept.
+ */
+static void cleanup_dmi_name(char *name)
+{
+ int i, j = 0;
+
+ for (i = 0; name[i]; i++) {
+ if (isalnum(name[i]) || (name[i] == '.')
+ || (name[i] == '_'))
+ name[j++] = name[i];
+ else if (name[i] == '-')
+ name[j++] = '_';
+ }
+
+ name[j] = '\0';
+}
+
+/**
+ * snd_soc_set_dmi_name() - Register DMI names to card
+ * @card: The card to register DMI names
+ * @flavour: The flavour "differentiator" for the card amongst its peers.
+ *
+ * An Intel machine driver may be used by many different devices but are
+ * difficult for userspace to differentiate, since machine drivers ususally
+ * use their own name as the card short name and leave the card long name
+ * blank. To differentiate such devices and fix bugs due to lack of
+ * device-specific configurations, this function allows DMI info to be used
+ * as the sound card long name, in the format of
+ * "vendor-product-version-board"
+ * (Character '-' is used to separate different DMI fields here).
+ * This will help the user space to load the device-specific Use Case Manager
+ * (UCM) configurations for the card.
+ *
+ * Possible card long names may be:
+ * DellInc.-XPS139343-01-0310JH
+ * ASUSTeKCOMPUTERINC.-T100TA-1.0-T100TA
+ * Circuitco-MinnowboardMaxD0PLATFORM-D0-MinnowBoardMAX
+ *
+ * This function also supports flavoring the card longname to provide
+ * the extra differentiation, like "vendor-product-version-board-flavor".
+ *
+ * We only keep number and alphabet characters and a few separator characters
+ * in the card long name since UCM in the user space uses the card long names
+ * as card configuration directory names and AudoConf cannot support special
+ * charactors like SPACE.
+ *
+ * Returns 0 on success, otherwise a negative error code.
+ */
+int snd_soc_set_dmi_name(struct snd_soc_card *card, const char *flavour)
+{
+ const char *vendor, *product, *product_version, *board;
+ size_t longname_buf_size = sizeof(card->snd_card->longname);
+ size_t len;
+
+ if (card->long_name)
+ return 0; /* long name already set by driver or from DMI */
+
+ /* make up dmi long name as: vendor.product.version.board */
+ vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
+ if (!vendor) {
+ dev_warn(card->dev, "ASoC: no DMI vendor name!\n");
+ return 0;
+ }
+
+ snprintf(card->dmi_longname, sizeof(card->snd_card->longname),
+ "%s", vendor);
+ cleanup_dmi_name(card->dmi_longname);
+
+ product = dmi_get_system_info(DMI_PRODUCT_NAME);
+ if (product) {
+ len = strlen(card->dmi_longname);
+ snprintf(card->dmi_longname + len,
+ longname_buf_size - len,
+ "-%s", product);
+
+ len++; /* skip the separator "-" */
+ if (len < longname_buf_size)
+ cleanup_dmi_name(card->dmi_longname + len);
+
+ /* some vendors like Lenovo may only put a self-explanatory
+ * name in the product version field
+ */
+ product_version = dmi_get_system_info(DMI_PRODUCT_VERSION);
+ if (product_version) {
+ len = strlen(card->dmi_longname);
+ snprintf(card->dmi_longname + len,
+ longname_buf_size - len,
+ "-%s", product_version);
+
+ len++;
+ if (len < longname_buf_size)
+ cleanup_dmi_name(card->dmi_longname + len);
+ }
+ }
+
+ board = dmi_get_system_info(DMI_BOARD_NAME);
+ if (board) {
+ len = strlen(card->dmi_longname);
+ snprintf(card->dmi_longname + len,
+ longname_buf_size - len,
+ "-%s", board);
+
+ len++;
+ if (len < longname_buf_size)
+ cleanup_dmi_name(card->dmi_longname + len);
+ } else if (!product) {
+ /* fall back to using legacy name */
+ dev_warn(card->dev, "ASoC: no DMI board/product name!\n");
+ return 0;
+ }
+
+ /* Add flavour to dmi long name */
+ if (flavour) {
+ len = strlen(card->dmi_longname);
+ snprintf(card->dmi_longname + len,
+ longname_buf_size - len,
+ "-%s", flavour);
+
+ len++;
+ if (len < longname_buf_size)
+ cleanup_dmi_name(card->dmi_longname + len);
+ }
+
+ /* set the card long name */
+ card->long_name = card->dmi_longname;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_set_dmi_name);
+
static int snd_soc_instantiate_card(struct snd_soc_card *card)
{
struct snd_soc_codec *codec;
@@ -2926,6 +3131,10 @@ static int snd_soc_component_initialize(struct snd_soc_component *component,
component->driver = driver;
component->probe = component->driver->probe;
component->remove = component->driver->remove;
+ component->suspend = component->driver->suspend;
+ component->resume = component->driver->resume;
+ component->pcm_new = component->driver->pcm_new;
+ component->pcm_free = component->driver->pcm_free;
dapm = &component->dapm;
dapm->dev = dev;
@@ -3026,6 +3235,11 @@ static void snd_soc_component_cleanup(struct snd_soc_component *component)
static void snd_soc_component_del_unlocked(struct snd_soc_component *component)
{
+ struct snd_soc_card *card = component->card;
+
+ if (card)
+ snd_soc_unregister_card(card);
+
list_del(&component->list);
}
@@ -3108,6 +3322,25 @@ static void snd_soc_platform_drv_remove(struct snd_soc_component *component)
platform->driver->remove(platform);
}
+static int snd_soc_platform_drv_pcm_new(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_soc_platform *platform = rtd->platform;
+
+ if (platform->driver->pcm_new)
+ return platform->driver->pcm_new(rtd);
+ else
+ return 0;
+}
+
+static void snd_soc_platform_drv_pcm_free(struct snd_pcm *pcm)
+{
+ struct snd_soc_pcm_runtime *rtd = pcm->private_data;
+ struct snd_soc_platform *platform = rtd->platform;
+
+ if (platform->driver->pcm_free)
+ platform->driver->pcm_free(pcm);
+}
+
/**
* snd_soc_add_platform - Add a platform to the ASoC core
* @dev: The parent device for the platform
@@ -3131,6 +3364,10 @@ int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
platform->component.probe = snd_soc_platform_drv_probe;
if (platform_drv->remove)
platform->component.remove = snd_soc_platform_drv_remove;
+ if (platform_drv->pcm_new)
+ platform->component.pcm_new = snd_soc_platform_drv_pcm_new;
+ if (platform_drv->pcm_free)
+ platform->component.pcm_free = snd_soc_platform_drv_pcm_free;
#ifdef CONFIG_DEBUG_FS
platform->component.debugfs_prefix = "platform";
@@ -3275,6 +3512,20 @@ static void snd_soc_codec_drv_remove(struct snd_soc_component *component)
codec->driver->remove(codec);
}
+static int snd_soc_codec_drv_suspend(struct snd_soc_component *component)
+{
+ struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
+
+ return codec->driver->suspend(codec);
+}
+
+static int snd_soc_codec_drv_resume(struct snd_soc_component *component)
+{
+ struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
+
+ return codec->driver->resume(codec);
+}
+
static int snd_soc_codec_drv_write(struct snd_soc_component *component,
unsigned int reg, unsigned int val)
{
@@ -3336,6 +3587,10 @@ int snd_soc_register_codec(struct device *dev,
codec->component.probe = snd_soc_codec_drv_probe;
if (codec_drv->remove)
codec->component.remove = snd_soc_codec_drv_remove;
+ if (codec_drv->suspend)
+ codec->component.suspend = snd_soc_codec_drv_suspend;
+ if (codec_drv->resume)
+ codec->component.resume = snd_soc_codec_drv_resume;
if (codec_drv->write)
codec->component.write = snd_soc_codec_drv_write;
if (codec_drv->read)
@@ -3784,7 +4039,7 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
}
EXPORT_SYMBOL_GPL(snd_soc_of_parse_daifmt);
-static int snd_soc_get_dai_name(struct of_phandle_args *args,
+int snd_soc_get_dai_name(struct of_phandle_args *args,
const char **dai_name)
{
struct snd_soc_component *pos;
@@ -3836,6 +4091,7 @@ static int snd_soc_get_dai_name(struct of_phandle_args *args,
mutex_unlock(&client_mutex);
return ret;
}
+EXPORT_SYMBOL_GPL(snd_soc_get_dai_name);
int snd_soc_of_get_dai_name(struct device_node *of_node,
const char **dai_name)
@@ -3941,8 +4197,6 @@ static void __exit snd_soc_exit(void)
snd_soc_util_exit();
snd_soc_debugfs_exit();
-#ifdef CONFIG_DEBUG_FS
-#endif
platform_driver_unregister(&soc_driver);
}
module_exit(snd_soc_exit);
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index 3bbe32e..dcef67a 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -330,6 +330,11 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
case snd_soc_dapm_mixer_named_ctl:
mc = (struct soc_mixer_control *)kcontrol->private_value;
+ if (mc->autodisable && snd_soc_volsw_is_stereo(mc))
+ dev_warn(widget->dapm->dev,
+ "ASoC: Unsupported stereo autodisable control '%s'\n",
+ ctrl_name);
+
if (mc->autodisable) {
struct snd_soc_dapm_widget template;
@@ -358,6 +363,10 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
snd_soc_dapm_new_control_unlocked(widget->dapm,
&template);
kfree(name);
+ if (IS_ERR(data->widget)) {
+ ret = PTR_ERR(data->widget);
+ goto err_data;
+ }
if (!data->widget) {
ret = -ENOMEM;
goto err_data;
@@ -392,6 +401,10 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget,
data->widget = snd_soc_dapm_new_control_unlocked(
widget->dapm, &template);
kfree(name);
+ if (IS_ERR(data->widget)) {
+ ret = PTR_ERR(data->widget);
+ goto err_data;
+ }
if (!data->widget) {
ret = -ENOMEM;
goto err_data;
@@ -723,7 +736,8 @@ static int dapm_connect_mux(struct snd_soc_dapm_context *dapm,
}
/* set up initial codec paths */
-static void dapm_set_mixer_path_status(struct snd_soc_dapm_path *p, int i)
+static void dapm_set_mixer_path_status(struct snd_soc_dapm_path *p, int i,
+ int nth_path)
{
struct soc_mixer_control *mc = (struct soc_mixer_control *)
p->sink->kcontrol_news[i].private_value;
@@ -736,7 +750,25 @@ static void dapm_set_mixer_path_status(struct snd_soc_dapm_path *p, int i)
if (reg != SND_SOC_NOPM) {
soc_dapm_read(p->sink->dapm, reg, &val);
- val = (val >> shift) & mask;
+ /*
+ * The nth_path argument allows this function to know
+ * which path of a kcontrol it is setting the initial
+ * status for. Ideally this would support any number
+ * of paths and channels. But since kcontrols only come
+ * in mono and stereo variants, we are limited to 2
+ * channels.
+ *
+ * The following code assumes for stereo controls the
+ * first path is the left channel, and all remaining
+ * paths are the right channel.
+ */
+ if (snd_soc_volsw_is_stereo(mc) && nth_path > 0) {
+ if (reg != mc->rreg)
+ soc_dapm_read(p->sink->dapm, mc->rreg, &val);
+ val = (val >> mc->rshift) & mask;
+ } else {
+ val = (val >> shift) & mask;
+ }
if (invert)
val = max - val;
p->connect = !!val;
@@ -749,13 +781,13 @@ static void dapm_set_mixer_path_status(struct snd_soc_dapm_path *p, int i)
static int dapm_connect_mixer(struct snd_soc_dapm_context *dapm,
struct snd_soc_dapm_path *path, const char *control_name)
{
- int i;
+ int i, nth_path = 0;
/* search for mixer kcontrol */
for (i = 0; i < path->sink->num_kcontrols; i++) {
if (!strcmp(control_name, path->sink->kcontrol_news[i].name)) {
path->name = path->sink->kcontrol_news[i].name;
- dapm_set_mixer_path_status(path, i);
+ dapm_set_mixer_path_status(path, i, nth_path++);
return 0;
}
}
@@ -1626,6 +1658,15 @@ static void dapm_widget_update(struct snd_soc_card *card)
dev_err(w->dapm->dev, "ASoC: %s DAPM update failed: %d\n",
w->name, ret);
+ if (update->has_second_set) {
+ ret = soc_dapm_update_bits(w->dapm, update->reg2,
+ update->mask2, update->val2);
+ if (ret < 0)
+ dev_err(w->dapm->dev,
+ "ASoC: %s DAPM update failed: %d\n",
+ w->name, ret);
+ }
+
for (wi = 0; wi < wlist->num_widgets; wi++) {
w = wlist->widgets[wi];
@@ -2177,7 +2218,8 @@ EXPORT_SYMBOL_GPL(snd_soc_dapm_mux_update_power);
/* test and update the power status of a mixer or switch widget */
static int soc_dapm_mixer_update_power(struct snd_soc_card *card,
- struct snd_kcontrol *kcontrol, int connect)
+ struct snd_kcontrol *kcontrol,
+ int connect, int rconnect)
{
struct snd_soc_dapm_path *path;
int found = 0;
@@ -2186,8 +2228,33 @@ static int soc_dapm_mixer_update_power(struct snd_soc_card *card,
/* find dapm widget path assoc with kcontrol */
dapm_kcontrol_for_each_path(path, kcontrol) {
+ /*
+ * Ideally this function should support any number of
+ * paths and channels. But since kcontrols only come
+ * in mono and stereo variants, we are limited to 2
+ * channels.
+ *
+ * The following code assumes for stereo controls the
+ * first path (when 'found == 0') is the left channel,
+ * and all remaining paths (when 'found == 1') are the
+ * right channel.
+ *
+ * A stereo control is signified by a valid 'rconnect'
+ * value, either 0 for unconnected, or >= 0 for connected.
+ * This is chosen instead of using snd_soc_volsw_is_stereo,
+ * so that the behavior of snd_soc_dapm_mixer_update_power
+ * doesn't change even when the kcontrol passed in is
+ * stereo.
+ *
+ * It passes 'connect' as the path connect status for
+ * the left channel, and 'rconnect' for the right
+ * channel.
+ */
+ if (found && rconnect >= 0)
+ soc_dapm_connect_path(path, rconnect, "mixer update");
+ else
+ soc_dapm_connect_path(path, connect, "mixer update");
found = 1;
- soc_dapm_connect_path(path, connect, "mixer update");
}
if (found)
@@ -2205,7 +2272,7 @@ int snd_soc_dapm_mixer_update_power(struct snd_soc_dapm_context *dapm,
mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
card->update = update;
- ret = soc_dapm_mixer_update_power(card, kcontrol, connect);
+ ret = soc_dapm_mixer_update_power(card, kcontrol, connect, -1);
card->update = NULL;
mutex_unlock(&card->dapm_mutex);
if (ret > 0)
@@ -3030,22 +3097,28 @@ int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol,
int reg = mc->reg;
unsigned int shift = mc->shift;
int max = mc->max;
+ unsigned int width = fls(max);
unsigned int mask = (1 << fls(max)) - 1;
unsigned int invert = mc->invert;
- unsigned int val;
+ unsigned int reg_val, val, rval = 0;
int ret = 0;
- if (snd_soc_volsw_is_stereo(mc))
- dev_warn(dapm->dev,
- "ASoC: Control '%s' is stereo, which is not supported\n",
- kcontrol->id.name);
-
mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
if (dapm_kcontrol_is_powered(kcontrol) && reg != SND_SOC_NOPM) {
- ret = soc_dapm_read(dapm, reg, &val);
- val = (val >> shift) & mask;
+ ret = soc_dapm_read(dapm, reg, ®_val);
+ val = (reg_val >> shift) & mask;
+
+ if (ret == 0 && reg != mc->rreg)
+ ret = soc_dapm_read(dapm, mc->rreg, ®_val);
+
+ if (snd_soc_volsw_is_stereo(mc))
+ rval = (reg_val >> mc->rshift) & mask;
} else {
- val = dapm_kcontrol_get_value(kcontrol);
+ reg_val = dapm_kcontrol_get_value(kcontrol);
+ val = reg_val & mask;
+
+ if (snd_soc_volsw_is_stereo(mc))
+ rval = (reg_val >> width) & mask;
}
mutex_unlock(&card->dapm_mutex);
@@ -3057,6 +3130,13 @@ int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol,
else
ucontrol->value.integer.value[0] = val;
+ if (snd_soc_volsw_is_stereo(mc)) {
+ if (invert)
+ ucontrol->value.integer.value[1] = max - rval;
+ else
+ ucontrol->value.integer.value[1] = rval;
+ }
+
return ret;
}
EXPORT_SYMBOL_GPL(snd_soc_dapm_get_volsw);
@@ -3080,46 +3160,66 @@ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol,
int reg = mc->reg;
unsigned int shift = mc->shift;
int max = mc->max;
- unsigned int mask = (1 << fls(max)) - 1;
+ unsigned int width = fls(max);
+ unsigned int mask = (1 << width) - 1;
unsigned int invert = mc->invert;
- unsigned int val;
- int connect, change, reg_change = 0;
- struct snd_soc_dapm_update update;
+ unsigned int val, rval = 0;
+ int connect, rconnect = -1, change, reg_change = 0;
+ struct snd_soc_dapm_update update = { NULL };
int ret = 0;
- if (snd_soc_volsw_is_stereo(mc))
- dev_warn(dapm->dev,
- "ASoC: Control '%s' is stereo, which is not supported\n",
- kcontrol->id.name);
-
val = (ucontrol->value.integer.value[0] & mask);
connect = !!val;
if (invert)
val = max - val;
+ if (snd_soc_volsw_is_stereo(mc)) {
+ rval = (ucontrol->value.integer.value[1] & mask);
+ rconnect = !!rval;
+ if (invert)
+ rval = max - rval;
+ }
+
mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
- change = dapm_kcontrol_set_value(kcontrol, val);
+ /* This assumes field width < (bits in unsigned int / 2) */
+ if (width > sizeof(unsigned int) * 8 / 2)
+ dev_warn(dapm->dev,
+ "ASoC: control %s field width limit exceeded\n",
+ kcontrol->id.name);
+ change = dapm_kcontrol_set_value(kcontrol, val | (rval << width));
if (reg != SND_SOC_NOPM) {
- mask = mask << shift;
val = val << shift;
+ rval = rval << mc->rshift;
- reg_change = soc_dapm_test_bits(dapm, reg, mask, val);
+ reg_change = soc_dapm_test_bits(dapm, reg, mask << shift, val);
+
+ if (snd_soc_volsw_is_stereo(mc))
+ reg_change |= soc_dapm_test_bits(dapm, mc->rreg,
+ mask << mc->rshift,
+ rval);
}
if (change || reg_change) {
if (reg_change) {
+ if (snd_soc_volsw_is_stereo(mc)) {
+ update.has_second_set = true;
+ update.reg2 = mc->rreg;
+ update.mask2 = mask << mc->rshift;
+ update.val2 = rval;
+ }
update.kcontrol = kcontrol;
update.reg = reg;
- update.mask = mask;
+ update.mask = mask << shift;
update.val = val;
card->update = &update;
}
change |= reg_change;
- ret = soc_dapm_mixer_update_power(card, kcontrol, connect);
+ ret = soc_dapm_mixer_update_power(card, kcontrol, connect,
+ rconnect);
card->update = NULL;
}
@@ -3192,7 +3292,7 @@ int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol,
unsigned int *item = ucontrol->value.enumerated.item;
unsigned int val, change, reg_change = 0;
unsigned int mask;
- struct snd_soc_dapm_update update;
+ struct snd_soc_dapm_update update = { NULL };
int ret = 0;
if (item[0] >= e->items)
@@ -3311,11 +3411,22 @@ snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm,
mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME);
w = snd_soc_dapm_new_control_unlocked(dapm, widget);
+ /* Do not nag about probe deferrals */
+ if (IS_ERR(w)) {
+ int ret = PTR_ERR(w);
+
+ if (ret != -EPROBE_DEFER)
+ dev_err(dapm->dev,
+ "ASoC: Failed to create DAPM control %s (%d)\n",
+ widget->name, ret);
+ goto out_unlock;
+ }
if (!w)
dev_err(dapm->dev,
"ASoC: Failed to create DAPM control %s\n",
widget->name);
+out_unlock:
mutex_unlock(&dapm->card->dapm_mutex);
return w;
}
@@ -3338,6 +3449,8 @@ snd_soc_dapm_new_control_unlocked(struct snd_soc_dapm_context *dapm,
w->regulator = devm_regulator_get(dapm->dev, w->name);
if (IS_ERR(w->regulator)) {
ret = PTR_ERR(w->regulator);
+ if (ret == -EPROBE_DEFER)
+ return ERR_PTR(ret);
dev_err(dapm->dev, "ASoC: Failed to request %s: %d\n",
w->name, ret);
return NULL;
@@ -3356,6 +3469,8 @@ snd_soc_dapm_new_control_unlocked(struct snd_soc_dapm_context *dapm,
w->clk = devm_clk_get(dapm->dev, w->name);
if (IS_ERR(w->clk)) {
ret = PTR_ERR(w->clk);
+ if (ret == -EPROBE_DEFER)
+ return ERR_PTR(ret);
dev_err(dapm->dev, "ASoC: Failed to request %s: %d\n",
w->name, ret);
return NULL;
@@ -3474,6 +3589,16 @@ int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm,
mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT);
for (i = 0; i < num; i++) {
w = snd_soc_dapm_new_control_unlocked(dapm, widget);
+ if (IS_ERR(w)) {
+ ret = PTR_ERR(w);
+ /* Do not nag about probe deferrals */
+ if (ret == -EPROBE_DEFER)
+ break;
+ dev_err(dapm->dev,
+ "ASoC: Failed to create DAPM control %s (%d)\n",
+ widget->name, ret);
+ break;
+ }
if (!w) {
dev_err(dapm->dev,
"ASoC: Failed to create DAPM control %s\n",
@@ -3750,6 +3875,15 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
dev_dbg(card->dev, "ASoC: adding %s widget\n", link_name);
w = snd_soc_dapm_new_control_unlocked(&card->dapm, &template);
+ if (IS_ERR(w)) {
+ ret = PTR_ERR(w);
+ /* Do not nag about probe deferrals */
+ if (ret != -EPROBE_DEFER)
+ dev_err(card->dev,
+ "ASoC: Failed to create %s widget (%d)\n",
+ link_name, ret);
+ goto outfree_kcontrol_news;
+ }
if (!w) {
dev_err(card->dev, "ASoC: Failed to create %s widget\n",
link_name);
@@ -3801,6 +3935,16 @@ int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
template.name);
w = snd_soc_dapm_new_control_unlocked(dapm, &template);
+ if (IS_ERR(w)) {
+ int ret = PTR_ERR(w);
+
+ /* Do not nag about probe deferrals */
+ if (ret != -EPROBE_DEFER)
+ dev_err(dapm->dev,
+ "ASoC: Failed to create %s widget (%d)\n",
+ dai->driver->playback.stream_name, ret);
+ return ret;
+ }
if (!w) {
dev_err(dapm->dev, "ASoC: Failed to create %s widget\n",
dai->driver->playback.stream_name);
@@ -3820,6 +3964,16 @@ int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
template.name);
w = snd_soc_dapm_new_control_unlocked(dapm, &template);
+ if (IS_ERR(w)) {
+ int ret = PTR_ERR(w);
+
+ /* Do not nag about probe deferrals */
+ if (ret != -EPROBE_DEFER)
+ dev_err(dapm->dev,
+ "ASoC: Failed to create %s widget (%d)\n",
+ dai->driver->playback.stream_name, ret);
+ return ret;
+ }
if (!w) {
dev_err(dapm->dev, "ASoC: Failed to create %s widget\n",
dai->driver->capture.stream_name);
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index d56a16a..f6667e4 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -1055,7 +1055,6 @@ static int soc_pcm_bespoke_trigger(struct snd_pcm_substream *substream,
int cmd)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_platform *platform = rtd->platform;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_soc_dai *codec_dai;
int i, ret;
@@ -1071,12 +1070,6 @@ static int soc_pcm_bespoke_trigger(struct snd_pcm_substream *substream,
}
}
- if (platform->driver->bespoke_trigger) {
- ret = platform->driver->bespoke_trigger(substream, cmd);
- if (ret < 0)
- return ret;
- }
-
if (cpu_dai->driver->ops && cpu_dai->driver->ops->bespoke_trigger) {
ret = cpu_dai->driver->ops->bespoke_trigger(substream, cmd, cpu_dai);
if (ret < 0)
@@ -1116,13 +1109,6 @@ static snd_pcm_uframes_t soc_pcm_pointer(struct snd_pcm_substream *substream)
}
delay += codec_delay;
- /*
- * None of the existing platform drivers implement delay(), so
- * for now the codec_dai of first multicodec entry is used
- */
- if (platform->driver->delay)
- delay += platform->driver->delay(substream, rtd->codec_dais[0]);
-
runtime->delay = delay;
return offset;
@@ -2184,9 +2170,11 @@ static int dpcm_fe_dai_do_trigger(struct snd_pcm_substream *substream, int cmd)
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
- case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
fe->dpcm[stream].state = SND_SOC_DPCM_STATE_STOP;
break;
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_PAUSED;
+ break;
}
out:
@@ -2640,12 +2628,25 @@ static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream)
return ret;
}
+static void soc_pcm_free(struct snd_pcm *pcm)
+{
+ struct snd_soc_pcm_runtime *rtd = pcm->private_data;
+ struct snd_soc_component *component;
+
+ list_for_each_entry(component, &rtd->card->component_dev_list,
+ card_list) {
+ if (component->pcm_free)
+ component->pcm_free(pcm);
+ }
+}
+
/* create a new pcm */
int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num)
{
struct snd_soc_platform *platform = rtd->platform;
struct snd_soc_dai *codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+ struct snd_soc_component *component;
struct snd_pcm *pcm;
char new_name[64];
int ret = 0, playback = 0, capture = 0;
@@ -2754,17 +2755,18 @@ int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num)
if (capture)
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &rtd->ops);
- if (platform->driver->pcm_new) {
- ret = platform->driver->pcm_new(rtd);
- if (ret < 0) {
- dev_err(platform->dev,
- "ASoC: pcm constructor failed: %d\n",
- ret);
- return ret;
+ list_for_each_entry(component, &rtd->card->component_dev_list, card_list) {
+ if (component->pcm_new) {
+ ret = component->pcm_new(rtd);
+ if (ret < 0) {
+ dev_err(component->dev,
+ "ASoC: pcm constructor failed: %d\n",
+ ret);
+ return ret;
+ }
}
}
-
- pcm->private_free = platform->driver->pcm_free;
+ pcm->private_free = soc_pcm_free;
out:
dev_info(rtd->card->dev, "%s <-> %s mapping ok\n",
(rtd->num_codecs > 1) ? "multicodec" : rtd->codec_dai->name,
@@ -2872,15 +2874,6 @@ int snd_soc_dpcm_can_be_params(struct snd_soc_pcm_runtime *fe,
}
EXPORT_SYMBOL_GPL(snd_soc_dpcm_can_be_params);
-int snd_soc_platform_trigger(struct snd_pcm_substream *substream,
- int cmd, struct snd_soc_platform *platform)
-{
- if (platform->driver->ops && platform->driver->ops->trigger)
- return platform->driver->ops->trigger(substream, cmd);
- return 0;
-}
-EXPORT_SYMBOL_GPL(snd_soc_platform_trigger);
-
#ifdef CONFIG_DEBUG_FS
static char *dpcm_state_string(enum snd_soc_dpcm_state state)
{
diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c
index 6b05047..8a758c9 100644
--- a/sound/soc/soc-topology.c
+++ b/sound/soc/soc-topology.c
@@ -1473,6 +1473,15 @@ static int soc_tplg_dapm_widget_create(struct soc_tplg *tplg,
widget = snd_soc_dapm_new_control(dapm, &template);
else
widget = snd_soc_dapm_new_control_unlocked(dapm, &template);
+ if (IS_ERR(widget)) {
+ ret = PTR_ERR(widget);
+ /* Do not nag about probe deferrals */
+ if (ret != -EPROBE_DEFER)
+ dev_err(tplg->dev,
+ "ASoC: failed to create widget %s controls (%d)\n",
+ w->name, ret);
+ goto hdr_err;
+ }
if (widget == NULL) {
dev_err(tplg->dev, "ASoC: failed to create widget %s controls\n",
w->name);
diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c
index 393e8f0..644d9a9 100644
--- a/sound/soc/soc-utils.c
+++ b/sound/soc/soc-utils.c
@@ -58,6 +58,205 @@ int snd_soc_params_to_bclk(struct snd_pcm_hw_params *params)
}
EXPORT_SYMBOL_GPL(snd_soc_params_to_bclk);
+int snd_soc_component_enable_pin(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_enable_pin(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_enable_pin(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_enable_pin);
+
+int snd_soc_component_enable_pin_unlocked(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_enable_pin_unlocked(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_enable_pin_unlocked(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_enable_pin_unlocked);
+
+int snd_soc_component_disable_pin(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_disable_pin(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_disable_pin(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_disable_pin);
+
+int snd_soc_component_disable_pin_unlocked(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_disable_pin_unlocked(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_disable_pin_unlocked(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_disable_pin_unlocked);
+
+int snd_soc_component_nc_pin(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_nc_pin(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_nc_pin(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_nc_pin);
+
+int snd_soc_component_nc_pin_unlocked(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_nc_pin_unlocked(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_nc_pin_unlocked(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_nc_pin_unlocked);
+
+int snd_soc_component_get_pin_status(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_get_pin_status(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_get_pin_status(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_get_pin_status);
+
+int snd_soc_component_force_enable_pin(struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_force_enable_pin(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_force_enable_pin(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_force_enable_pin);
+
+int snd_soc_component_force_enable_pin_unlocked(
+ struct snd_soc_component *component,
+ const char *pin)
+{
+ struct snd_soc_dapm_context *dapm =
+ snd_soc_component_get_dapm(component);
+ char *full_name;
+ int ret;
+
+ if (!component->name_prefix)
+ return snd_soc_dapm_force_enable_pin_unlocked(dapm, pin);
+
+ full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin);
+ if (!full_name)
+ return -ENOMEM;
+
+ ret = snd_soc_dapm_force_enable_pin_unlocked(dapm, full_name);
+ kfree(full_name);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_component_force_enable_pin_unlocked);
+
static const struct snd_pcm_hardware dummy_dma_hardware = {
/* Random values to keep userspace happy when checking constraints */
.info = SNDRV_PCM_INFO_INTERLEAVED |
