| commit | 5b062010675b3d74c9a6c6896e2becf932a4ca74 | [log] [tgz] |
|---|---|---|
| author | Biju Das <biju.das@bp.renesas.com> | Thu Dec 21 14:52:25 2017 +0000 |
| committer | Simon Horman <horms+renesas@verge.net.au> | Fri Dec 22 09:24:00 2017 +0100 |
| tree | 67f871a3e790ecf77c590b6d239fc05681b7e375 | |
| parent | 6f41d5e0872e4b55a5352ff79ab2452bff306753 [diff] |
ARM: dts: r8a7745: Add missing clock for secondary CA7 CPU core Add the missing clock to CA7 CPU1 node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>