Renesas ARM64 Based SoC DT Updates for v4.21

* H3 (r8a7795) SoC:
  - Remove unneeded sound #address/size-cells

* M3-W (r8a7796) SoC:
  - Describe CMT (Compare Match Timer) devices in DT
  - Describe I2C-DVFS device node in DT

* M3-N (r8a77965) SoC:
  - Describe CAN, CANFD and LVDS in DT

* R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs:
  - Describe CPU topology, capacity and cooling maps in DT
  - Add SSIU support to R-Car audio

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs:
  - Extend register range of HSUSB device to match documentation

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) based
  Salvator-X, Salvator-XS and ULCB boards:
  - Switch eMMC bus to 1V8

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) based
  Salvator-X and Salvator-XS boards:
  - Describe USB3.0 xHCI host and prerepheral devices as companions

* R-Car E3 (r8a77990) SoC:
  - Add thermal support
  - Add support for interupt controller for external devices (INTC-EX)
  - Describe all SCIF devices and SYS-DMA for I2C and MSIOF devices

* R-Car E3 (r8a77990) based Ebisu board:
  - Enable SDHI, CAN, CANFD, audio and USB3.0
  - Describe serial console pins

* R-Car E3 (r8a77990) based Ebisu and
  R-Car D3 (r8a77995) based Draak board:
  - Enable USB2.0 peripheral device

* R-Car M3-N (r8a77965), E3 (r8a77990) and V3H (r8a77980) SoCs:
  - Connect EtherAVB to IPMMU

* R-Car V3M (r8a77970) and V3H (r8a77980) SoCs:
  - Describe TMU (timer unit), PWM timer controller and MSIOF devides in DT
  - Add thermal support

* RZ/G2M (r8a774a1) SoC:
  - Use clock and power index macros
  - Describe VIN, CSI-2 and CAN devices in DT
arm64: dts: renesas: Add all CPUs in cooling maps

Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.

Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.

Update cooling maps to include all devices affected by individual trip
points.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2 files changed