tag 5fc2b2250e98ae7ba08f76d074ac6f7e95014a81
tagger Simon Horman <horms@verge.net.au> Thu Mar 06 14:03:33 2014 +0900
object 9ced1d47719b5f32e4231338dd362c136518ed08

Second Round of Renesas ARM Based SoC Clock Updates for v3.15

r8a7790 (R-Car H2) SoC
- Add sound SCU clock support

r8a7791 (R-Car M2) SoC
- Remove legacy clock aliases for DT devices

commit 9ced1d47719b5f32e4231338dd362c136518ed08
author Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tue Feb 18 19:28:11 2014 -0800
committer Simon Horman <horms+renesas@verge.net.au> Mon Feb 24 10:03:02 2014 +0900
tree 318d559920c97ea219558e3cd3432d0be06bb7e5
parent a8a8266229787241e1dfdb075a416e31da2fa1d7

ARM: shmobile: r8a7790: add sound SCU clock support

This is needed to use SRC (= Sampling Rate Converter).
MSTP1017 is defined top of MSTPxxx list to avoid runtime error,
since it is parent clock of MSTP1031 - MSTP1022

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>