ARM: dts: rockchip: Remove @0 from the veyron memory node

The Coreboot version on veyron ChromeOS devices seems to ignore
memory@0 nodes when updating the available memory and instead
inserts another memory node without the address.

This leads to 4GB systems only ever be using 2GB as the memory@0
node takes precedence. So remove the @0 for veyron devices.

Fixes: 0b639b815f15 ("ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards")
Reported-by: Heikki Lindholm <>
Signed-off-by: Heiko Stuebner <>
1 file changed