| commit | cfda8617e22a8bf217a613d0b3ba3a38778443ba | [log] [tgz] |
|---|---|---|
| author | Yash Shah <yash.shah@sifive.com> | Fri Jan 03 09:43:20 2020 +0530 |
| committer | Paul Walmsley <paul.walmsley@sifive.com> | Fri Jan 03 00:56:23 2020 -0800 |
| tree | 85fbdb2001a712861d788616d17dc654e28740dd | |
| parent | 0da310e82d3a9bff6ef6b0f2fbf45d1a05cc64fe [diff] |
riscv: dts: Add DT support for SiFive L2 cache controller Add the L2 cache controller DT node in SiFive FU540 soc-specific DT file Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>