blob: 481ea6d01ca50656cd9bb584a1951e1013463603 [file] [log] [blame]
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2016 Realtek Corporation.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __INC_HALMAC_BIT_8822B_H
#define __INC_HALMAC_BIT_8822B_H
#define CPU_OPT_WIDTH 0x1F
/* 2 REG_NOT_VALID_8822B */
/* 2 REG_SYS_ISO_CTRL_8822B */
#define BIT_PWC_EV12V_8822B BIT(15)
#define BIT_PWC_EV25V_8822B BIT(14)
#define BIT_PA33V_EN_8822B BIT(13)
#define BIT_PA12V_EN_8822B BIT(12)
#define BIT_UA33V_EN_8822B BIT(11)
#define BIT_UA12V_EN_8822B BIT(10)
#define BIT_ISO_RFDIO_8822B BIT(9)
#define BIT_ISO_EB2CORE_8822B BIT(8)
#define BIT_ISO_DIOE_8822B BIT(7)
#define BIT_ISO_WLPON2PP_8822B BIT(6)
#define BIT_ISO_IP2MAC_WA2PP_8822B BIT(5)
#define BIT_ISO_PD2CORE_8822B BIT(4)
#define BIT_ISO_PA2PCIE_8822B BIT(3)
#define BIT_ISO_UD2CORE_8822B BIT(2)
#define BIT_ISO_UA2USB_8822B BIT(1)
#define BIT_ISO_WD2PP_8822B BIT(0)
/* 2 REG_SYS_FUNC_EN_8822B */
#define BIT_FEN_MREGEN_8822B BIT(15)
#define BIT_FEN_HWPDN_8822B BIT(14)
#define BIT_EN_25_1_8822B BIT(13)
#define BIT_FEN_ELDR_8822B BIT(12)
#define BIT_FEN_DCORE_8822B BIT(11)
#define BIT_FEN_CPUEN_8822B BIT(10)
#define BIT_FEN_DIOE_8822B BIT(9)
#define BIT_FEN_PCIED_8822B BIT(8)
#define BIT_FEN_PPLL_8822B BIT(7)
#define BIT_FEN_PCIEA_8822B BIT(6)
#define BIT_FEN_DIO_PCIE_8822B BIT(5)
#define BIT_FEN_USBD_8822B BIT(4)
#define BIT_FEN_UPLL_8822B BIT(3)
#define BIT_FEN_USBA_8822B BIT(2)
#define BIT_FEN_BB_GLB_RSTN_8822B BIT(1)
#define BIT_FEN_BBRSTB_8822B BIT(0)
/* 2 REG_SYS_PW_CTRL_8822B */
#define BIT_SOP_EABM_8822B BIT(31)
#define BIT_SOP_ACKF_8822B BIT(30)
#define BIT_SOP_ERCK_8822B BIT(29)
#define BIT_SOP_ESWR_8822B BIT(28)
#define BIT_SOP_PWMM_8822B BIT(27)
#define BIT_SOP_EECK_8822B BIT(26)
#define BIT_SOP_EXTL_8822B BIT(24)
#define BIT_SYM_OP_RING_12M_8822B BIT(22)
#define BIT_ROP_SWPR_8822B BIT(21)
#define BIT_DIS_HW_LPLDM_8822B BIT(20)
#define BIT_OPT_SWRST_WLMCU_8822B BIT(19)
#define BIT_RDY_SYSPWR_8822B BIT(17)
#define BIT_EN_WLON_8822B BIT(16)
#define BIT_APDM_HPDN_8822B BIT(15)
#define BIT_AFSM_PCIE_SUS_EN_8822B BIT(12)
#define BIT_AFSM_WLSUS_EN_8822B BIT(11)
#define BIT_APFM_SWLPS_8822B BIT(10)
#define BIT_APFM_OFFMAC_8822B BIT(9)
#define BIT_APFN_ONMAC_8822B BIT(8)
#define BIT_CHIP_PDN_EN_8822B BIT(7)
#define BIT_RDY_MACDIS_8822B BIT(6)
#define BIT_RING_CLK_12M_EN_8822B BIT(4)
#define BIT_PFM_WOWL_8822B BIT(3)
#define BIT_PFM_LDKP_8822B BIT(2)
#define BIT_WL_HCI_ALD_8822B BIT(1)
#define BIT_PFM_LDALL_8822B BIT(0)
/* 2 REG_SYS_CLK_CTRL_8822B */
#define BIT_LDO_DUMMY_8822B BIT(15)
#define BIT_CPU_CLK_EN_8822B BIT(14)
#define BIT_SYMREG_CLK_EN_8822B BIT(13)
#define BIT_HCI_CLK_EN_8822B BIT(12)
#define BIT_MAC_CLK_EN_8822B BIT(11)
#define BIT_SEC_CLK_EN_8822B BIT(10)
#define BIT_PHY_SSC_RSTB_8822B BIT(9)
#define BIT_EXT_32K_EN_8822B BIT(8)
#define BIT_WL_CLK_TEST_8822B BIT(7)
#define BIT_OP_SPS_PWM_EN_8822B BIT(6)
#define BIT_LOADER_CLK_EN_8822B BIT(5)
#define BIT_MACSLP_8822B BIT(4)
#define BIT_WAKEPAD_EN_8822B BIT(3)
#define BIT_ROMD16V_EN_8822B BIT(2)
#define BIT_CKANA12M_EN_8822B BIT(1)
#define BIT_CNTD16V_EN_8822B BIT(0)
/* 2 REG_SYS_EEPROM_CTRL_8822B */
#define BIT_SHIFT_VPDIDX_8822B 8
#define BIT_MASK_VPDIDX_8822B 0xff
#define BIT_VPDIDX_8822B(x) \
(((x) & BIT_MASK_VPDIDX_8822B) << BIT_SHIFT_VPDIDX_8822B)
#define BIT_GET_VPDIDX_8822B(x) \
(((x) >> BIT_SHIFT_VPDIDX_8822B) & BIT_MASK_VPDIDX_8822B)
#define BIT_SHIFT_EEM1_0_8822B 6
#define BIT_MASK_EEM1_0_8822B 0x3
#define BIT_EEM1_0_8822B(x) \
(((x) & BIT_MASK_EEM1_0_8822B) << BIT_SHIFT_EEM1_0_8822B)
#define BIT_GET_EEM1_0_8822B(x) \
(((x) >> BIT_SHIFT_EEM1_0_8822B) & BIT_MASK_EEM1_0_8822B)
#define BIT_AUTOLOAD_SUS_8822B BIT(5)
#define BIT_EERPOMSEL_8822B BIT(4)
#define BIT_EECS_V1_8822B BIT(3)
#define BIT_EESK_V1_8822B BIT(2)
#define BIT_EEDI_V1_8822B BIT(1)
#define BIT_EEDO_V1_8822B BIT(0)
/* 2 REG_EE_VPD_8822B */
#define BIT_SHIFT_VPD_DATA_8822B 0
#define BIT_MASK_VPD_DATA_8822B 0xffffffffL
#define BIT_VPD_DATA_8822B(x) \
(((x) & BIT_MASK_VPD_DATA_8822B) << BIT_SHIFT_VPD_DATA_8822B)
#define BIT_GET_VPD_DATA_8822B(x) \
(((x) >> BIT_SHIFT_VPD_DATA_8822B) & BIT_MASK_VPD_DATA_8822B)
/* 2 REG_SYS_SWR_CTRL1_8822B */
#define BIT_C2_L_BIT0_8822B BIT(31)
#define BIT_SHIFT_C1_L_8822B 29
#define BIT_MASK_C1_L_8822B 0x3
#define BIT_C1_L_8822B(x) (((x) & BIT_MASK_C1_L_8822B) << BIT_SHIFT_C1_L_8822B)
#define BIT_GET_C1_L_8822B(x) \
(((x) >> BIT_SHIFT_C1_L_8822B) & BIT_MASK_C1_L_8822B)
#define BIT_SHIFT_REG_FREQ_L_8822B 25
#define BIT_MASK_REG_FREQ_L_8822B 0x7
#define BIT_REG_FREQ_L_8822B(x) \
(((x) & BIT_MASK_REG_FREQ_L_8822B) << BIT_SHIFT_REG_FREQ_L_8822B)
#define BIT_GET_REG_FREQ_L_8822B(x) \
(((x) >> BIT_SHIFT_REG_FREQ_L_8822B) & BIT_MASK_REG_FREQ_L_8822B)
#define BIT_REG_EN_DUTY_8822B BIT(24)
#define BIT_SHIFT_REG_MODE_8822B 22
#define BIT_MASK_REG_MODE_8822B 0x3
#define BIT_REG_MODE_8822B(x) \
(((x) & BIT_MASK_REG_MODE_8822B) << BIT_SHIFT_REG_MODE_8822B)
#define BIT_GET_REG_MODE_8822B(x) \
(((x) >> BIT_SHIFT_REG_MODE_8822B) & BIT_MASK_REG_MODE_8822B)
#define BIT_REG_EN_SP_8822B BIT(21)
#define BIT_REG_AUTO_L_8822B BIT(20)
#define BIT_SW18_SELD_BIT0_8822B BIT(19)
#define BIT_SW18_POWOCP_8822B BIT(18)
#define BIT_SHIFT_OCP_L1_8822B 15
#define BIT_MASK_OCP_L1_8822B 0x7
#define BIT_OCP_L1_8822B(x) \
(((x) & BIT_MASK_OCP_L1_8822B) << BIT_SHIFT_OCP_L1_8822B)
#define BIT_GET_OCP_L1_8822B(x) \
(((x) >> BIT_SHIFT_OCP_L1_8822B) & BIT_MASK_OCP_L1_8822B)
#define BIT_SHIFT_CF_L_8822B 13
#define BIT_MASK_CF_L_8822B 0x3
#define BIT_CF_L_8822B(x) (((x) & BIT_MASK_CF_L_8822B) << BIT_SHIFT_CF_L_8822B)
#define BIT_GET_CF_L_8822B(x) \
(((x) >> BIT_SHIFT_CF_L_8822B) & BIT_MASK_CF_L_8822B)
#define BIT_SW18_FPWM_8822B BIT(11)
#define BIT_SW18_SWEN_8822B BIT(9)
#define BIT_SW18_LDEN_8822B BIT(8)
#define BIT_MAC_ID_EN_8822B BIT(7)
#define BIT_AFE_BGEN_8822B BIT(0)
/* 2 REG_SYS_SWR_CTRL2_8822B */
#define BIT_POW_ZCD_L_8822B BIT(31)
#define BIT_AUTOZCD_L_8822B BIT(30)
#define BIT_SHIFT_REG_DELAY_8822B 28
#define BIT_MASK_REG_DELAY_8822B 0x3
#define BIT_REG_DELAY_8822B(x) \
(((x) & BIT_MASK_REG_DELAY_8822B) << BIT_SHIFT_REG_DELAY_8822B)
#define BIT_GET_REG_DELAY_8822B(x) \
(((x) >> BIT_SHIFT_REG_DELAY_8822B) & BIT_MASK_REG_DELAY_8822B)
#define BIT_SHIFT_V15ADJ_L1_V1_8822B 24
#define BIT_MASK_V15ADJ_L1_V1_8822B 0x7
#define BIT_V15ADJ_L1_V1_8822B(x) \
(((x) & BIT_MASK_V15ADJ_L1_V1_8822B) << BIT_SHIFT_V15ADJ_L1_V1_8822B)
#define BIT_GET_V15ADJ_L1_V1_8822B(x) \
(((x) >> BIT_SHIFT_V15ADJ_L1_V1_8822B) & BIT_MASK_V15ADJ_L1_V1_8822B)
#define BIT_SHIFT_VOL_L1_V1_8822B 20
#define BIT_MASK_VOL_L1_V1_8822B 0xf
#define BIT_VOL_L1_V1_8822B(x) \
(((x) & BIT_MASK_VOL_L1_V1_8822B) << BIT_SHIFT_VOL_L1_V1_8822B)
#define BIT_GET_VOL_L1_V1_8822B(x) \
(((x) >> BIT_SHIFT_VOL_L1_V1_8822B) & BIT_MASK_VOL_L1_V1_8822B)
#define BIT_SHIFT_IN_L1_V1_8822B 17
#define BIT_MASK_IN_L1_V1_8822B 0x7
#define BIT_IN_L1_V1_8822B(x) \
(((x) & BIT_MASK_IN_L1_V1_8822B) << BIT_SHIFT_IN_L1_V1_8822B)
#define BIT_GET_IN_L1_V1_8822B(x) \
(((x) >> BIT_SHIFT_IN_L1_V1_8822B) & BIT_MASK_IN_L1_V1_8822B)
#define BIT_SHIFT_TBOX_L1_8822B 15
#define BIT_MASK_TBOX_L1_8822B 0x3
#define BIT_TBOX_L1_8822B(x) \
(((x) & BIT_MASK_TBOX_L1_8822B) << BIT_SHIFT_TBOX_L1_8822B)
#define BIT_GET_TBOX_L1_8822B(x) \
(((x) >> BIT_SHIFT_TBOX_L1_8822B) & BIT_MASK_TBOX_L1_8822B)
#define BIT_SW18_SEL_8822B BIT(13)
/* 2 REG_NOT_VALID_8822B */
#define BIT_SW18_SD_8822B BIT(10)
#define BIT_SHIFT_R3_L_8822B 7
#define BIT_MASK_R3_L_8822B 0x3
#define BIT_R3_L_8822B(x) (((x) & BIT_MASK_R3_L_8822B) << BIT_SHIFT_R3_L_8822B)
#define BIT_GET_R3_L_8822B(x) \
(((x) >> BIT_SHIFT_R3_L_8822B) & BIT_MASK_R3_L_8822B)
#define BIT_SHIFT_SW18_R2_8822B 5
#define BIT_MASK_SW18_R2_8822B 0x3
#define BIT_SW18_R2_8822B(x) \
(((x) & BIT_MASK_SW18_R2_8822B) << BIT_SHIFT_SW18_R2_8822B)
#define BIT_GET_SW18_R2_8822B(x) \
(((x) >> BIT_SHIFT_SW18_R2_8822B) & BIT_MASK_SW18_R2_8822B)
#define BIT_SHIFT_SW18_R1_8822B 3
#define BIT_MASK_SW18_R1_8822B 0x3
#define BIT_SW18_R1_8822B(x) \
(((x) & BIT_MASK_SW18_R1_8822B) << BIT_SHIFT_SW18_R1_8822B)
#define BIT_GET_SW18_R1_8822B(x) \
(((x) >> BIT_SHIFT_SW18_R1_8822B) & BIT_MASK_SW18_R1_8822B)
#define BIT_SHIFT_C3_L_C3_8822B 1
#define BIT_MASK_C3_L_C3_8822B 0x3
#define BIT_C3_L_C3_8822B(x) \
(((x) & BIT_MASK_C3_L_C3_8822B) << BIT_SHIFT_C3_L_C3_8822B)
#define BIT_GET_C3_L_C3_8822B(x) \
(((x) >> BIT_SHIFT_C3_L_C3_8822B) & BIT_MASK_C3_L_C3_8822B)
#define BIT_C2_L_BIT1_8822B BIT(0)
/* 2 REG_SYS_SWR_CTRL3_8822B */
#define BIT_SPS18_OCP_DIS_8822B BIT(31)
#define BIT_SHIFT_SPS18_OCP_TH_8822B 16
#define BIT_MASK_SPS18_OCP_TH_8822B 0x7fff
#define BIT_SPS18_OCP_TH_8822B(x) \
(((x) & BIT_MASK_SPS18_OCP_TH_8822B) << BIT_SHIFT_SPS18_OCP_TH_8822B)
#define BIT_GET_SPS18_OCP_TH_8822B(x) \
(((x) >> BIT_SHIFT_SPS18_OCP_TH_8822B) & BIT_MASK_SPS18_OCP_TH_8822B)
#define BIT_SHIFT_OCP_WINDOW_8822B 0
#define BIT_MASK_OCP_WINDOW_8822B 0xffff
#define BIT_OCP_WINDOW_8822B(x) \
(((x) & BIT_MASK_OCP_WINDOW_8822B) << BIT_SHIFT_OCP_WINDOW_8822B)
#define BIT_GET_OCP_WINDOW_8822B(x) \
(((x) >> BIT_SHIFT_OCP_WINDOW_8822B) & BIT_MASK_OCP_WINDOW_8822B)
/* 2 REG_RSV_CTRL_8822B */
#define BIT_HREG_DBG_8822B BIT(23)
#define BIT_WLMCUIOIF_8822B BIT(8)
#define BIT_LOCK_ALL_EN_8822B BIT(7)
#define BIT_R_DIS_PRST_8822B BIT(6)
#define BIT_WLOCK_1C_B6_8822B BIT(5)
#define BIT_WLOCK_40_8822B BIT(4)
#define BIT_WLOCK_08_8822B BIT(3)
#define BIT_WLOCK_04_8822B BIT(2)
#define BIT_WLOCK_00_8822B BIT(1)
#define BIT_WLOCK_ALL_8822B BIT(0)
/* 2 REG_RF_CTRL_8822B */
#define BIT_RF_SDMRSTB_8822B BIT(2)
#define BIT_RF_RSTB_8822B BIT(1)
#define BIT_RF_EN_8822B BIT(0)
/* 2 REG_AFE_LDO_CTRL_8822B */
#define BIT_SHIFT_LPLDH12_RSV_8822B 29
#define BIT_MASK_LPLDH12_RSV_8822B 0x7
#define BIT_LPLDH12_RSV_8822B(x) \
(((x) & BIT_MASK_LPLDH12_RSV_8822B) << BIT_SHIFT_LPLDH12_RSV_8822B)
#define BIT_GET_LPLDH12_RSV_8822B(x) \
(((x) >> BIT_SHIFT_LPLDH12_RSV_8822B) & BIT_MASK_LPLDH12_RSV_8822B)
#define BIT_LPLDH12_SLP_8822B BIT(28)
#define BIT_SHIFT_LPLDH12_VADJ_8822B 24
#define BIT_MASK_LPLDH12_VADJ_8822B 0xf
#define BIT_LPLDH12_VADJ_8822B(x) \
(((x) & BIT_MASK_LPLDH12_VADJ_8822B) << BIT_SHIFT_LPLDH12_VADJ_8822B)
#define BIT_GET_LPLDH12_VADJ_8822B(x) \
(((x) >> BIT_SHIFT_LPLDH12_VADJ_8822B) & BIT_MASK_LPLDH12_VADJ_8822B)
#define BIT_LDH12_EN_8822B BIT(16)
#define BIT_WLBBOFF_BIG_PWC_EN_8822B BIT(14)
#define BIT_WLBBOFF_SMALL_PWC_EN_8822B BIT(13)
#define BIT_WLMACOFF_BIG_PWC_EN_8822B BIT(12)
#define BIT_WLPON_PWC_EN_8822B BIT(11)
#define BIT_POW_REGU_P1_8822B BIT(10)
#define BIT_LDOV12W_EN_8822B BIT(8)
#define BIT_EX_XTAL_DRV_DIGI_8822B BIT(7)
#define BIT_EX_XTAL_DRV_USB_8822B BIT(6)
#define BIT_EX_XTAL_DRV_AFE_8822B BIT(5)
#define BIT_EX_XTAL_DRV_RF2_8822B BIT(4)
#define BIT_EX_XTAL_DRV_RF1_8822B BIT(3)
#define BIT_POW_REGU_P0_8822B BIT(2)
/* 2 REG_NOT_VALID_8822B */
#define BIT_POW_PLL_LDO_8822B BIT(0)
/* 2 REG_AFE_CTRL1_8822B */
#define BIT_AGPIO_GPE_8822B BIT(31)
#define BIT_SHIFT_XTAL_CAP_XI_8822B 25
#define BIT_MASK_XTAL_CAP_XI_8822B 0x3f
#define BIT_XTAL_CAP_XI_8822B(x) \
(((x) & BIT_MASK_XTAL_CAP_XI_8822B) << BIT_SHIFT_XTAL_CAP_XI_8822B)
#define BIT_GET_XTAL_CAP_XI_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_CAP_XI_8822B) & BIT_MASK_XTAL_CAP_XI_8822B)
#define BIT_SHIFT_XTAL_DRV_DIGI_8822B 23
#define BIT_MASK_XTAL_DRV_DIGI_8822B 0x3
#define BIT_XTAL_DRV_DIGI_8822B(x) \
(((x) & BIT_MASK_XTAL_DRV_DIGI_8822B) << BIT_SHIFT_XTAL_DRV_DIGI_8822B)
#define BIT_GET_XTAL_DRV_DIGI_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8822B) & BIT_MASK_XTAL_DRV_DIGI_8822B)
#define BIT_XTAL_DRV_USB_BIT1_8822B BIT(22)
#define BIT_SHIFT_MAC_CLK_SEL_8822B 20
#define BIT_MASK_MAC_CLK_SEL_8822B 0x3
#define BIT_MAC_CLK_SEL_8822B(x) \
(((x) & BIT_MASK_MAC_CLK_SEL_8822B) << BIT_SHIFT_MAC_CLK_SEL_8822B)
#define BIT_GET_MAC_CLK_SEL_8822B(x) \
(((x) >> BIT_SHIFT_MAC_CLK_SEL_8822B) & BIT_MASK_MAC_CLK_SEL_8822B)
#define BIT_XTAL_DRV_USB_BIT0_8822B BIT(19)
#define BIT_SHIFT_XTAL_DRV_AFE_8822B 17
#define BIT_MASK_XTAL_DRV_AFE_8822B 0x3
#define BIT_XTAL_DRV_AFE_8822B(x) \
(((x) & BIT_MASK_XTAL_DRV_AFE_8822B) << BIT_SHIFT_XTAL_DRV_AFE_8822B)
#define BIT_GET_XTAL_DRV_AFE_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_DRV_AFE_8822B) & BIT_MASK_XTAL_DRV_AFE_8822B)
#define BIT_SHIFT_XTAL_DRV_RF2_8822B 15
#define BIT_MASK_XTAL_DRV_RF2_8822B 0x3
#define BIT_XTAL_DRV_RF2_8822B(x) \
(((x) & BIT_MASK_XTAL_DRV_RF2_8822B) << BIT_SHIFT_XTAL_DRV_RF2_8822B)
#define BIT_GET_XTAL_DRV_RF2_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_DRV_RF2_8822B) & BIT_MASK_XTAL_DRV_RF2_8822B)
#define BIT_SHIFT_XTAL_DRV_RF1_8822B 13
#define BIT_MASK_XTAL_DRV_RF1_8822B 0x3
#define BIT_XTAL_DRV_RF1_8822B(x) \
(((x) & BIT_MASK_XTAL_DRV_RF1_8822B) << BIT_SHIFT_XTAL_DRV_RF1_8822B)
#define BIT_GET_XTAL_DRV_RF1_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_DRV_RF1_8822B) & BIT_MASK_XTAL_DRV_RF1_8822B)
#define BIT_XTAL_DELAY_DIGI_8822B BIT(12)
#define BIT_XTAL_DELAY_USB_8822B BIT(11)
#define BIT_XTAL_DELAY_AFE_8822B BIT(10)
#define BIT_SHIFT_XTAL_LDO_VREF_8822B 7
#define BIT_MASK_XTAL_LDO_VREF_8822B 0x7
#define BIT_XTAL_LDO_VREF_8822B(x) \
(((x) & BIT_MASK_XTAL_LDO_VREF_8822B) << BIT_SHIFT_XTAL_LDO_VREF_8822B)
#define BIT_GET_XTAL_LDO_VREF_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_LDO_VREF_8822B) & BIT_MASK_XTAL_LDO_VREF_8822B)
#define BIT_XTAL_XQSEL_RF_8822B BIT(6)
#define BIT_XTAL_XQSEL_8822B BIT(5)
#define BIT_SHIFT_XTAL_GMN_V2_8822B 3
#define BIT_MASK_XTAL_GMN_V2_8822B 0x3
#define BIT_XTAL_GMN_V2_8822B(x) \
(((x) & BIT_MASK_XTAL_GMN_V2_8822B) << BIT_SHIFT_XTAL_GMN_V2_8822B)
#define BIT_GET_XTAL_GMN_V2_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_GMN_V2_8822B) & BIT_MASK_XTAL_GMN_V2_8822B)
#define BIT_SHIFT_XTAL_GMP_V2_8822B 1
#define BIT_MASK_XTAL_GMP_V2_8822B 0x3
#define BIT_XTAL_GMP_V2_8822B(x) \
(((x) & BIT_MASK_XTAL_GMP_V2_8822B) << BIT_SHIFT_XTAL_GMP_V2_8822B)
#define BIT_GET_XTAL_GMP_V2_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_GMP_V2_8822B) & BIT_MASK_XTAL_GMP_V2_8822B)
#define BIT_XTAL_EN_8822B BIT(0)
/* 2 REG_AFE_CTRL2_8822B */
#define BIT_SHIFT_REG_C3_V4_8822B 30
#define BIT_MASK_REG_C3_V4_8822B 0x3
#define BIT_REG_C3_V4_8822B(x) \
(((x) & BIT_MASK_REG_C3_V4_8822B) << BIT_SHIFT_REG_C3_V4_8822B)
#define BIT_GET_REG_C3_V4_8822B(x) \
(((x) >> BIT_SHIFT_REG_C3_V4_8822B) & BIT_MASK_REG_C3_V4_8822B)
#define BIT_REG_CP_BIT1_8822B BIT(29)
#define BIT_SHIFT_REG_RS_V4_8822B 26
#define BIT_MASK_REG_RS_V4_8822B 0x7
#define BIT_REG_RS_V4_8822B(x) \
(((x) & BIT_MASK_REG_RS_V4_8822B) << BIT_SHIFT_REG_RS_V4_8822B)
#define BIT_GET_REG_RS_V4_8822B(x) \
(((x) >> BIT_SHIFT_REG_RS_V4_8822B) & BIT_MASK_REG_RS_V4_8822B)
#define BIT_SHIFT_REG__CS_8822B 24
#define BIT_MASK_REG__CS_8822B 0x3
#define BIT_REG__CS_8822B(x) \
(((x) & BIT_MASK_REG__CS_8822B) << BIT_SHIFT_REG__CS_8822B)
#define BIT_GET_REG__CS_8822B(x) \
(((x) >> BIT_SHIFT_REG__CS_8822B) & BIT_MASK_REG__CS_8822B)
#define BIT_SHIFT_REG_CP_OFFSET_8822B 21
#define BIT_MASK_REG_CP_OFFSET_8822B 0x7
#define BIT_REG_CP_OFFSET_8822B(x) \
(((x) & BIT_MASK_REG_CP_OFFSET_8822B) << BIT_SHIFT_REG_CP_OFFSET_8822B)
#define BIT_GET_REG_CP_OFFSET_8822B(x) \
(((x) >> BIT_SHIFT_REG_CP_OFFSET_8822B) & BIT_MASK_REG_CP_OFFSET_8822B)
#define BIT_SHIFT_CP_BIAS_8822B 18
#define BIT_MASK_CP_BIAS_8822B 0x7
#define BIT_CP_BIAS_8822B(x) \
(((x) & BIT_MASK_CP_BIAS_8822B) << BIT_SHIFT_CP_BIAS_8822B)
#define BIT_GET_CP_BIAS_8822B(x) \
(((x) >> BIT_SHIFT_CP_BIAS_8822B) & BIT_MASK_CP_BIAS_8822B)
#define BIT_REG_IDOUBLE_V2_8822B BIT(17)
#define BIT_EN_SYN_8822B BIT(16)
#define BIT_SHIFT_MCCO_8822B 14
#define BIT_MASK_MCCO_8822B 0x3
#define BIT_MCCO_8822B(x) (((x) & BIT_MASK_MCCO_8822B) << BIT_SHIFT_MCCO_8822B)
#define BIT_GET_MCCO_8822B(x) \
(((x) >> BIT_SHIFT_MCCO_8822B) & BIT_MASK_MCCO_8822B)
#define BIT_SHIFT_REG_LDO_SEL_8822B 12
#define BIT_MASK_REG_LDO_SEL_8822B 0x3
#define BIT_REG_LDO_SEL_8822B(x) \
(((x) & BIT_MASK_REG_LDO_SEL_8822B) << BIT_SHIFT_REG_LDO_SEL_8822B)
#define BIT_GET_REG_LDO_SEL_8822B(x) \
(((x) >> BIT_SHIFT_REG_LDO_SEL_8822B) & BIT_MASK_REG_LDO_SEL_8822B)
#define BIT_REG_KVCO_V2_8822B BIT(10)
#define BIT_AGPIO_GPO_8822B BIT(9)
#define BIT_SHIFT_AGPIO_DRV_8822B 7
#define BIT_MASK_AGPIO_DRV_8822B 0x3
#define BIT_AGPIO_DRV_8822B(x) \
(((x) & BIT_MASK_AGPIO_DRV_8822B) << BIT_SHIFT_AGPIO_DRV_8822B)
#define BIT_GET_AGPIO_DRV_8822B(x) \
(((x) >> BIT_SHIFT_AGPIO_DRV_8822B) & BIT_MASK_AGPIO_DRV_8822B)
#define BIT_SHIFT_XTAL_CAP_XO_8822B 1
#define BIT_MASK_XTAL_CAP_XO_8822B 0x3f
#define BIT_XTAL_CAP_XO_8822B(x) \
(((x) & BIT_MASK_XTAL_CAP_XO_8822B) << BIT_SHIFT_XTAL_CAP_XO_8822B)
#define BIT_GET_XTAL_CAP_XO_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_CAP_XO_8822B) & BIT_MASK_XTAL_CAP_XO_8822B)
#define BIT_POW_PLL_8822B BIT(0)
/* 2 REG_AFE_CTRL3_8822B */
#define BIT_SHIFT_PS_8822B 7
#define BIT_MASK_PS_8822B 0x7
#define BIT_PS_8822B(x) (((x) & BIT_MASK_PS_8822B) << BIT_SHIFT_PS_8822B)
#define BIT_GET_PS_8822B(x) (((x) >> BIT_SHIFT_PS_8822B) & BIT_MASK_PS_8822B)
#define BIT_PSEN_8822B BIT(6)
#define BIT_DOGENB_8822B BIT(5)
#define BIT_REG_MBIAS_8822B BIT(4)
#define BIT_SHIFT_REG_R3_V4_8822B 1
#define BIT_MASK_REG_R3_V4_8822B 0x7
#define BIT_REG_R3_V4_8822B(x) \
(((x) & BIT_MASK_REG_R3_V4_8822B) << BIT_SHIFT_REG_R3_V4_8822B)
#define BIT_GET_REG_R3_V4_8822B(x) \
(((x) >> BIT_SHIFT_REG_R3_V4_8822B) & BIT_MASK_REG_R3_V4_8822B)
#define BIT_REG_CP_BIT0_8822B BIT(0)
/* 2 REG_EFUSE_CTRL_8822B */
#define BIT_EF_FLAG_8822B BIT(31)
#define BIT_SHIFT_EF_PGPD_8822B 28
#define BIT_MASK_EF_PGPD_8822B 0x7
#define BIT_EF_PGPD_8822B(x) \
(((x) & BIT_MASK_EF_PGPD_8822B) << BIT_SHIFT_EF_PGPD_8822B)
#define BIT_GET_EF_PGPD_8822B(x) \
(((x) >> BIT_SHIFT_EF_PGPD_8822B) & BIT_MASK_EF_PGPD_8822B)
#define BIT_SHIFT_EF_RDT_8822B 24
#define BIT_MASK_EF_RDT_8822B 0xf
#define BIT_EF_RDT_8822B(x) \
(((x) & BIT_MASK_EF_RDT_8822B) << BIT_SHIFT_EF_RDT_8822B)
#define BIT_GET_EF_RDT_8822B(x) \
(((x) >> BIT_SHIFT_EF_RDT_8822B) & BIT_MASK_EF_RDT_8822B)
#define BIT_SHIFT_EF_PGTS_8822B 20
#define BIT_MASK_EF_PGTS_8822B 0xf
#define BIT_EF_PGTS_8822B(x) \
(((x) & BIT_MASK_EF_PGTS_8822B) << BIT_SHIFT_EF_PGTS_8822B)
#define BIT_GET_EF_PGTS_8822B(x) \
(((x) >> BIT_SHIFT_EF_PGTS_8822B) & BIT_MASK_EF_PGTS_8822B)
#define BIT_EF_PDWN_8822B BIT(19)
#define BIT_EF_ALDEN_8822B BIT(18)
#define BIT_SHIFT_EF_ADDR_8822B 8
#define BIT_MASK_EF_ADDR_8822B 0x3ff
#define BIT_EF_ADDR_8822B(x) \
(((x) & BIT_MASK_EF_ADDR_8822B) << BIT_SHIFT_EF_ADDR_8822B)
#define BIT_GET_EF_ADDR_8822B(x) \
(((x) >> BIT_SHIFT_EF_ADDR_8822B) & BIT_MASK_EF_ADDR_8822B)
#define BIT_SHIFT_EF_DATA_8822B 0
#define BIT_MASK_EF_DATA_8822B 0xff
#define BIT_EF_DATA_8822B(x) \
(((x) & BIT_MASK_EF_DATA_8822B) << BIT_SHIFT_EF_DATA_8822B)
#define BIT_GET_EF_DATA_8822B(x) \
(((x) >> BIT_SHIFT_EF_DATA_8822B) & BIT_MASK_EF_DATA_8822B)
/* 2 REG_LDO_EFUSE_CTRL_8822B */
#define BIT_LDOE25_EN_8822B BIT(31)
#define BIT_SHIFT_LDOE25_V12ADJ_L_8822B 27
#define BIT_MASK_LDOE25_V12ADJ_L_8822B 0xf
#define BIT_LDOE25_V12ADJ_L_8822B(x) \
(((x) & BIT_MASK_LDOE25_V12ADJ_L_8822B) \
<< BIT_SHIFT_LDOE25_V12ADJ_L_8822B)
#define BIT_GET_LDOE25_V12ADJ_L_8822B(x) \
(((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8822B) & \
BIT_MASK_LDOE25_V12ADJ_L_8822B)
#define BIT_EF_CRES_SEL_8822B BIT(26)
#define BIT_SHIFT_EF_SCAN_START_V1_8822B 16
#define BIT_MASK_EF_SCAN_START_V1_8822B 0x3ff
#define BIT_EF_SCAN_START_V1_8822B(x) \
(((x) & BIT_MASK_EF_SCAN_START_V1_8822B) \
<< BIT_SHIFT_EF_SCAN_START_V1_8822B)
#define BIT_GET_EF_SCAN_START_V1_8822B(x) \
(((x) >> BIT_SHIFT_EF_SCAN_START_V1_8822B) & \
BIT_MASK_EF_SCAN_START_V1_8822B)
#define BIT_SHIFT_EF_SCAN_END_8822B 12
#define BIT_MASK_EF_SCAN_END_8822B 0xf
#define BIT_EF_SCAN_END_8822B(x) \
(((x) & BIT_MASK_EF_SCAN_END_8822B) << BIT_SHIFT_EF_SCAN_END_8822B)
#define BIT_GET_EF_SCAN_END_8822B(x) \
(((x) >> BIT_SHIFT_EF_SCAN_END_8822B) & BIT_MASK_EF_SCAN_END_8822B)
#define BIT_EF_PD_DIS_8822B BIT(11)
#define BIT_SHIFT_EF_CELL_SEL_8822B 8
#define BIT_MASK_EF_CELL_SEL_8822B 0x3
#define BIT_EF_CELL_SEL_8822B(x) \
(((x) & BIT_MASK_EF_CELL_SEL_8822B) << BIT_SHIFT_EF_CELL_SEL_8822B)
#define BIT_GET_EF_CELL_SEL_8822B(x) \
(((x) >> BIT_SHIFT_EF_CELL_SEL_8822B) & BIT_MASK_EF_CELL_SEL_8822B)
#define BIT_EF_TRPT_8822B BIT(7)
#define BIT_SHIFT_EF_TTHD_8822B 0
#define BIT_MASK_EF_TTHD_8822B 0x7f
#define BIT_EF_TTHD_8822B(x) \
(((x) & BIT_MASK_EF_TTHD_8822B) << BIT_SHIFT_EF_TTHD_8822B)
#define BIT_GET_EF_TTHD_8822B(x) \
(((x) >> BIT_SHIFT_EF_TTHD_8822B) & BIT_MASK_EF_TTHD_8822B)
/* 2 REG_PWR_OPTION_CTRL_8822B */
#define BIT_SHIFT_DBG_SEL_V1_8822B 16
#define BIT_MASK_DBG_SEL_V1_8822B 0xff
#define BIT_DBG_SEL_V1_8822B(x) \
(((x) & BIT_MASK_DBG_SEL_V1_8822B) << BIT_SHIFT_DBG_SEL_V1_8822B)
#define BIT_GET_DBG_SEL_V1_8822B(x) \
(((x) >> BIT_SHIFT_DBG_SEL_V1_8822B) & BIT_MASK_DBG_SEL_V1_8822B)
#define BIT_SHIFT_DBG_SEL_BYTE_8822B 14
#define BIT_MASK_DBG_SEL_BYTE_8822B 0x3
#define BIT_DBG_SEL_BYTE_8822B(x) \
(((x) & BIT_MASK_DBG_SEL_BYTE_8822B) << BIT_SHIFT_DBG_SEL_BYTE_8822B)
#define BIT_GET_DBG_SEL_BYTE_8822B(x) \
(((x) >> BIT_SHIFT_DBG_SEL_BYTE_8822B) & BIT_MASK_DBG_SEL_BYTE_8822B)
#define BIT_SHIFT_STD_L1_V1_8822B 12
#define BIT_MASK_STD_L1_V1_8822B 0x3
#define BIT_STD_L1_V1_8822B(x) \
(((x) & BIT_MASK_STD_L1_V1_8822B) << BIT_SHIFT_STD_L1_V1_8822B)
#define BIT_GET_STD_L1_V1_8822B(x) \
(((x) >> BIT_SHIFT_STD_L1_V1_8822B) & BIT_MASK_STD_L1_V1_8822B)
#define BIT_SYSON_DBG_PAD_E2_8822B BIT(11)
#define BIT_SYSON_LED_PAD_E2_8822B BIT(10)
#define BIT_SYSON_GPEE_PAD_E2_8822B BIT(9)
#define BIT_SYSON_PCI_PAD_E2_8822B BIT(8)
#define BIT_AUTO_SW_LDO_VOL_EN_8822B BIT(7)
#define BIT_SHIFT_SYSON_SPS0WWV_WT_8822B 4
#define BIT_MASK_SYSON_SPS0WWV_WT_8822B 0x3
#define BIT_SYSON_SPS0WWV_WT_8822B(x) \
(((x) & BIT_MASK_SYSON_SPS0WWV_WT_8822B) \
<< BIT_SHIFT_SYSON_SPS0WWV_WT_8822B)
#define BIT_GET_SYSON_SPS0WWV_WT_8822B(x) \
(((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8822B) & \
BIT_MASK_SYSON_SPS0WWV_WT_8822B)
#define BIT_SHIFT_SYSON_SPS0LDO_WT_8822B 2
#define BIT_MASK_SYSON_SPS0LDO_WT_8822B 0x3
#define BIT_SYSON_SPS0LDO_WT_8822B(x) \
(((x) & BIT_MASK_SYSON_SPS0LDO_WT_8822B) \
<< BIT_SHIFT_SYSON_SPS0LDO_WT_8822B)
#define BIT_GET_SYSON_SPS0LDO_WT_8822B(x) \
(((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8822B) & \
BIT_MASK_SYSON_SPS0LDO_WT_8822B)
#define BIT_SHIFT_SYSON_RCLK_SCALE_8822B 0
#define BIT_MASK_SYSON_RCLK_SCALE_8822B 0x3
#define BIT_SYSON_RCLK_SCALE_8822B(x) \
(((x) & BIT_MASK_SYSON_RCLK_SCALE_8822B) \
<< BIT_SHIFT_SYSON_RCLK_SCALE_8822B)
#define BIT_GET_SYSON_RCLK_SCALE_8822B(x) \
(((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8822B) & \
BIT_MASK_SYSON_RCLK_SCALE_8822B)
/* 2 REG_CAL_TIMER_8822B */
#define BIT_SHIFT_MATCH_CNT_8822B 8
#define BIT_MASK_MATCH_CNT_8822B 0xff
#define BIT_MATCH_CNT_8822B(x) \
(((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
#define BIT_GET_MATCH_CNT_8822B(x) \
(((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
#define BIT_SHIFT_CAL_SCAL_8822B 0
#define BIT_MASK_CAL_SCAL_8822B 0xff
#define BIT_CAL_SCAL_8822B(x) \
(((x) & BIT_MASK_CAL_SCAL_8822B) << BIT_SHIFT_CAL_SCAL_8822B)
#define BIT_GET_CAL_SCAL_8822B(x) \
(((x) >> BIT_SHIFT_CAL_SCAL_8822B) & BIT_MASK_CAL_SCAL_8822B)
/* 2 REG_ACLK_MON_8822B */
#define BIT_SHIFT_RCLK_MON_8822B 5
#define BIT_MASK_RCLK_MON_8822B 0x7ff
#define BIT_RCLK_MON_8822B(x) \
(((x) & BIT_MASK_RCLK_MON_8822B) << BIT_SHIFT_RCLK_MON_8822B)
#define BIT_GET_RCLK_MON_8822B(x) \
(((x) >> BIT_SHIFT_RCLK_MON_8822B) & BIT_MASK_RCLK_MON_8822B)
#define BIT_CAL_EN_8822B BIT(4)
#define BIT_SHIFT_DPSTU_8822B 2
#define BIT_MASK_DPSTU_8822B 0x3
#define BIT_DPSTU_8822B(x) \
(((x) & BIT_MASK_DPSTU_8822B) << BIT_SHIFT_DPSTU_8822B)
#define BIT_GET_DPSTU_8822B(x) \
(((x) >> BIT_SHIFT_DPSTU_8822B) & BIT_MASK_DPSTU_8822B)
#define BIT_SUS_16X_8822B BIT(1)
/* 2 REG_GPIO_MUXCFG_8822B */
#define BIT_FSPI_EN_8822B BIT(19)
#define BIT_WL_RTS_EXT_32K_SEL_8822B BIT(18)
#define BIT_WLGP_SPI_EN_8822B BIT(16)
#define BIT_SIC_LBK_8822B BIT(15)
#define BIT_ENHTP_8822B BIT(14)
#define BIT_ENSIC_8822B BIT(12)
#define BIT_SIC_SWRST_8822B BIT(11)
#define BIT_PO_WIFI_PTA_PINS_8822B BIT(10)
#define BIT_PO_BT_PTA_PINS_8822B BIT(9)
#define BIT_ENUART_8822B BIT(8)
#define BIT_SHIFT_BTMODE_8822B 6
#define BIT_MASK_BTMODE_8822B 0x3
#define BIT_BTMODE_8822B(x) \
(((x) & BIT_MASK_BTMODE_8822B) << BIT_SHIFT_BTMODE_8822B)
#define BIT_GET_BTMODE_8822B(x) \
(((x) >> BIT_SHIFT_BTMODE_8822B) & BIT_MASK_BTMODE_8822B)
#define BIT_ENBT_8822B BIT(5)
#define BIT_EROM_EN_8822B BIT(4)
#define BIT_WLRFE_6_7_EN_8822B BIT(3)
#define BIT_WLRFE_4_5_EN_8822B BIT(2)
#define BIT_SHIFT_GPIOSEL_8822B 0
#define BIT_MASK_GPIOSEL_8822B 0x3
#define BIT_GPIOSEL_8822B(x) \
(((x) & BIT_MASK_GPIOSEL_8822B) << BIT_SHIFT_GPIOSEL_8822B)
#define BIT_GET_GPIOSEL_8822B(x) \
(((x) >> BIT_SHIFT_GPIOSEL_8822B) & BIT_MASK_GPIOSEL_8822B)
/* 2 REG_GPIO_PIN_CTRL_8822B */
#define BIT_SHIFT_GPIO_MOD_7_TO_0_8822B 24
#define BIT_MASK_GPIO_MOD_7_TO_0_8822B 0xff
#define BIT_GPIO_MOD_7_TO_0_8822B(x) \
(((x) & BIT_MASK_GPIO_MOD_7_TO_0_8822B) \
<< BIT_SHIFT_GPIO_MOD_7_TO_0_8822B)
#define BIT_GET_GPIO_MOD_7_TO_0_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8822B) & \
BIT_MASK_GPIO_MOD_7_TO_0_8822B)
#define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B 16
#define BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B 0xff
#define BIT_GPIO_IO_SEL_7_TO_0_8822B(x) \
(((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B) \
<< BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B)
#define BIT_GET_GPIO_IO_SEL_7_TO_0_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B) & \
BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B)
#define BIT_SHIFT_GPIO_OUT_7_TO_0_8822B 8
#define BIT_MASK_GPIO_OUT_7_TO_0_8822B 0xff
#define BIT_GPIO_OUT_7_TO_0_8822B(x) \
(((x) & BIT_MASK_GPIO_OUT_7_TO_0_8822B) \
<< BIT_SHIFT_GPIO_OUT_7_TO_0_8822B)
#define BIT_GET_GPIO_OUT_7_TO_0_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8822B) & \
BIT_MASK_GPIO_OUT_7_TO_0_8822B)
#define BIT_SHIFT_GPIO_IN_7_TO_0_8822B 0
#define BIT_MASK_GPIO_IN_7_TO_0_8822B 0xff
#define BIT_GPIO_IN_7_TO_0_8822B(x) \
(((x) & BIT_MASK_GPIO_IN_7_TO_0_8822B) \
<< BIT_SHIFT_GPIO_IN_7_TO_0_8822B)
#define BIT_GET_GPIO_IN_7_TO_0_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8822B) & \
BIT_MASK_GPIO_IN_7_TO_0_8822B)
/* 2 REG_GPIO_INTM_8822B */
#define BIT_SHIFT_MUXDBG_SEL_8822B 30
#define BIT_MASK_MUXDBG_SEL_8822B 0x3
#define BIT_MUXDBG_SEL_8822B(x) \
(((x) & BIT_MASK_MUXDBG_SEL_8822B) << BIT_SHIFT_MUXDBG_SEL_8822B)
#define BIT_GET_MUXDBG_SEL_8822B(x) \
(((x) >> BIT_SHIFT_MUXDBG_SEL_8822B) & BIT_MASK_MUXDBG_SEL_8822B)
#define BIT_EXTWOL_SEL_8822B BIT(17)
#define BIT_EXTWOL_EN_8822B BIT(16)
#define BIT_GPIOF_INT_MD_8822B BIT(15)
#define BIT_GPIOE_INT_MD_8822B BIT(14)
#define BIT_GPIOD_INT_MD_8822B BIT(13)
#define BIT_GPIOF_INT_MD_8822B BIT(15)
#define BIT_GPIOE_INT_MD_8822B BIT(14)
#define BIT_GPIOD_INT_MD_8822B BIT(13)
#define BIT_GPIOC_INT_MD_8822B BIT(12)
#define BIT_GPIOB_INT_MD_8822B BIT(11)
#define BIT_GPIOA_INT_MD_8822B BIT(10)
#define BIT_GPIO9_INT_MD_8822B BIT(9)
#define BIT_GPIO8_INT_MD_8822B BIT(8)
#define BIT_GPIO7_INT_MD_8822B BIT(7)
#define BIT_GPIO6_INT_MD_8822B BIT(6)
#define BIT_GPIO5_INT_MD_8822B BIT(5)
#define BIT_GPIO4_INT_MD_8822B BIT(4)
#define BIT_GPIO3_INT_MD_8822B BIT(3)
#define BIT_GPIO2_INT_MD_8822B BIT(2)
#define BIT_GPIO1_INT_MD_8822B BIT(1)
#define BIT_GPIO0_INT_MD_8822B BIT(0)
/* 2 REG_LED_CFG_8822B */
#define BIT_GPIO3_WL_CTRL_EN_8822B BIT(27)
#define BIT_LNAON_SEL_EN_8822B BIT(26)
#define BIT_PAPE_SEL_EN_8822B BIT(25)
#define BIT_DPDT_WLBT_SEL_8822B BIT(24)
#define BIT_DPDT_SEL_EN_8822B BIT(23)
#define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
#define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
#define BIT_LED2DIS_8822B BIT(21)
#define BIT_LED2PL_8822B BIT(20)
#define BIT_LED2SV_8822B BIT(19)
#define BIT_SHIFT_LED2CM_8822B 16
#define BIT_MASK_LED2CM_8822B 0x7
#define BIT_LED2CM_8822B(x) \
(((x) & BIT_MASK_LED2CM_8822B) << BIT_SHIFT_LED2CM_8822B)
#define BIT_GET_LED2CM_8822B(x) \
(((x) >> BIT_SHIFT_LED2CM_8822B) & BIT_MASK_LED2CM_8822B)
#define BIT_LED1DIS_8822B BIT(15)
#define BIT_LED1PL_8822B BIT(12)
#define BIT_LED1SV_8822B BIT(11)
#define BIT_SHIFT_LED1CM_8822B 8
#define BIT_MASK_LED1CM_8822B 0x7
#define BIT_LED1CM_8822B(x) \
(((x) & BIT_MASK_LED1CM_8822B) << BIT_SHIFT_LED1CM_8822B)
#define BIT_GET_LED1CM_8822B(x) \
(((x) >> BIT_SHIFT_LED1CM_8822B) & BIT_MASK_LED1CM_8822B)
#define BIT_LED0DIS_8822B BIT(7)
#define BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B 5
#define BIT_MASK_AFE_LDO_SWR_CHECK_8822B 0x3
#define BIT_AFE_LDO_SWR_CHECK_8822B(x) \
(((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B) \
<< BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B)
#define BIT_GET_AFE_LDO_SWR_CHECK_8822B(x) \
(((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B) & \
BIT_MASK_AFE_LDO_SWR_CHECK_8822B)
#define BIT_LED0PL_8822B BIT(4)
#define BIT_LED0SV_8822B BIT(3)
#define BIT_SHIFT_LED0CM_8822B 0
#define BIT_MASK_LED0CM_8822B 0x7
#define BIT_LED0CM_8822B(x) \
(((x) & BIT_MASK_LED0CM_8822B) << BIT_SHIFT_LED0CM_8822B)
#define BIT_GET_LED0CM_8822B(x) \
(((x) >> BIT_SHIFT_LED0CM_8822B) & BIT_MASK_LED0CM_8822B)
/* 2 REG_FSIMR_8822B */
#define BIT_FS_PDNINT_EN_8822B BIT(31)
#define BIT_NFC_INT_PAD_EN_8822B BIT(30)
#define BIT_FS_SPS_OCP_INT_EN_8822B BIT(29)
#define BIT_FS_PWMERR_INT_EN_8822B BIT(28)
#define BIT_FS_GPIOF_INT_EN_8822B BIT(27)
#define BIT_FS_GPIOE_INT_EN_8822B BIT(26)
#define BIT_FS_GPIOD_INT_EN_8822B BIT(25)
#define BIT_FS_GPIOC_INT_EN_8822B BIT(24)
#define BIT_FS_GPIOB_INT_EN_8822B BIT(23)
#define BIT_FS_GPIOA_INT_EN_8822B BIT(22)
#define BIT_FS_GPIO9_INT_EN_8822B BIT(21)
#define BIT_FS_GPIO8_INT_EN_8822B BIT(20)
#define BIT_FS_GPIO7_INT_EN_8822B BIT(19)
#define BIT_FS_GPIO6_INT_EN_8822B BIT(18)
#define BIT_FS_GPIO5_INT_EN_8822B BIT(17)
#define BIT_FS_GPIO4_INT_EN_8822B BIT(16)
#define BIT_FS_GPIO3_INT_EN_8822B BIT(15)
#define BIT_FS_GPIO2_INT_EN_8822B BIT(14)
#define BIT_FS_GPIO1_INT_EN_8822B BIT(13)
#define BIT_FS_GPIO0_INT_EN_8822B BIT(12)
#define BIT_FS_HCI_SUS_EN_8822B BIT(11)
#define BIT_FS_HCI_RES_EN_8822B BIT(10)
#define BIT_FS_HCI_RESET_EN_8822B BIT(9)
#define BIT_FS_BTON_STS_UPDATE_MSK_EN_8822B BIT(7)
#define BIT_ACT2RECOVERY_INT_EN_V1_8822B BIT(6)
#define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
#define BIT_HCI_TXDMA_REQ_HIMR_8822B BIT(4)
#define BIT_FS_32K_LEAVE_SETTING_MAK_8822B BIT(3)
#define BIT_FS_32K_ENTER_SETTING_MAK_8822B BIT(2)
#define BIT_FS_USB_LPMRSM_MSK_8822B BIT(1)
#define BIT_FS_USB_LPMINT_MSK_8822B BIT(0)
/* 2 REG_FSISR_8822B */
#define BIT_FS_PDNINT_8822B BIT(31)
#define BIT_FS_SPS_OCP_INT_8822B BIT(29)
#define BIT_FS_PWMERR_INT_8822B BIT(28)
#define BIT_FS_GPIOF_INT_8822B BIT(27)
#define BIT_FS_GPIOE_INT_8822B BIT(26)
#define BIT_FS_GPIOD_INT_8822B BIT(25)
#define BIT_FS_GPIOC_INT_8822B BIT(24)
#define BIT_FS_GPIOB_INT_8822B BIT(23)
#define BIT_FS_GPIOA_INT_8822B BIT(22)
#define BIT_FS_GPIO9_INT_8822B BIT(21)
#define BIT_FS_GPIO8_INT_8822B BIT(20)
#define BIT_FS_GPIO7_INT_8822B BIT(19)
#define BIT_FS_GPIO6_INT_8822B BIT(18)
#define BIT_FS_GPIO5_INT_8822B BIT(17)
#define BIT_FS_GPIO4_INT_8822B BIT(16)
#define BIT_FS_GPIO3_INT_8822B BIT(15)
#define BIT_FS_GPIO2_INT_8822B BIT(14)
#define BIT_FS_GPIO1_INT_8822B BIT(13)
#define BIT_FS_GPIO0_INT_8822B BIT(12)
#define BIT_FS_HCI_SUS_INT_8822B BIT(11)
#define BIT_FS_HCI_RES_INT_8822B BIT(10)
#define BIT_FS_HCI_RESET_INT_8822B BIT(9)
#define BIT_ACT2RECOVERY_8822B BIT(6)
#define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
#define BIT_HCI_TXDMA_REQ_HISR_8822B BIT(4)
#define BIT_FS_32K_LEAVE_SETTING_INT_8822B BIT(3)
#define BIT_FS_32K_ENTER_SETTING_INT_8822B BIT(2)
#define BIT_FS_USB_LPMRSM_INT_8822B BIT(1)
#define BIT_FS_USB_LPMINT_INT_8822B BIT(0)
/* 2 REG_HSIMR_8822B */
#define BIT_GPIOF_INT_EN_8822B BIT(31)
#define BIT_GPIOE_INT_EN_8822B BIT(30)
#define BIT_GPIOD_INT_EN_8822B BIT(29)
#define BIT_GPIOC_INT_EN_8822B BIT(28)
#define BIT_GPIOB_INT_EN_8822B BIT(27)
#define BIT_GPIOA_INT_EN_8822B BIT(26)
#define BIT_GPIO9_INT_EN_8822B BIT(25)
#define BIT_GPIO8_INT_EN_8822B BIT(24)
#define BIT_GPIO7_INT_EN_8822B BIT(23)
#define BIT_GPIO6_INT_EN_8822B BIT(22)
#define BIT_GPIO5_INT_EN_8822B BIT(21)
#define BIT_GPIO4_INT_EN_8822B BIT(20)
#define BIT_GPIO3_INT_EN_8822B BIT(19)
#define BIT_GPIO2_INT_EN_V1_8822B BIT(16)
#define BIT_GPIO1_INT_EN_8822B BIT(17)
#define BIT_GPIO0_INT_EN_8822B BIT(16)
#define BIT_PDNINT_EN_8822B BIT(7)
#define BIT_RON_INT_EN_8822B BIT(6)
#define BIT_SPS_OCP_INT_EN_8822B BIT(5)
#define BIT_GPIO15_0_INT_EN_8822B BIT(0)
/* 2 REG_HSISR_8822B */
#define BIT_GPIOF_INT_8822B BIT(31)
#define BIT_GPIOE_INT_8822B BIT(30)
#define BIT_GPIOD_INT_8822B BIT(29)
#define BIT_GPIOC_INT_8822B BIT(28)
#define BIT_GPIOB_INT_8822B BIT(27)
#define BIT_GPIOA_INT_8822B BIT(26)
#define BIT_GPIO9_INT_8822B BIT(25)
#define BIT_GPIO8_INT_8822B BIT(24)
#define BIT_GPIO7_INT_8822B BIT(23)
#define BIT_GPIO6_INT_8822B BIT(22)
#define BIT_GPIO5_INT_8822B BIT(21)
#define BIT_GPIO4_INT_8822B BIT(20)
#define BIT_GPIO3_INT_8822B BIT(19)
#define BIT_GPIO2_INT_V1_8822B BIT(16)
#define BIT_GPIO1_INT_8822B BIT(17)
#define BIT_GPIO0_INT_8822B BIT(16)
#define BIT_PDNINT_8822B BIT(7)
#define BIT_RON_INT_8822B BIT(6)
#define BIT_SPS_OCP_INT_8822B BIT(5)
#define BIT_GPIO15_0_INT_8822B BIT(0)
/* 2 REG_GPIO_EXT_CTRL_8822B */
#define BIT_SHIFT_GPIO_MOD_15_TO_8_8822B 24
#define BIT_MASK_GPIO_MOD_15_TO_8_8822B 0xff
#define BIT_GPIO_MOD_15_TO_8_8822B(x) \
(((x) & BIT_MASK_GPIO_MOD_15_TO_8_8822B) \
<< BIT_SHIFT_GPIO_MOD_15_TO_8_8822B)
#define BIT_GET_GPIO_MOD_15_TO_8_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8822B) & \
BIT_MASK_GPIO_MOD_15_TO_8_8822B)
#define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B 16
#define BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B 0xff
#define BIT_GPIO_IO_SEL_15_TO_8_8822B(x) \
(((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B) \
<< BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B)
#define BIT_GET_GPIO_IO_SEL_15_TO_8_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B) & \
BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B)
#define BIT_SHIFT_GPIO_OUT_15_TO_8_8822B 8
#define BIT_MASK_GPIO_OUT_15_TO_8_8822B 0xff
#define BIT_GPIO_OUT_15_TO_8_8822B(x) \
(((x) & BIT_MASK_GPIO_OUT_15_TO_8_8822B) \
<< BIT_SHIFT_GPIO_OUT_15_TO_8_8822B)
#define BIT_GET_GPIO_OUT_15_TO_8_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8822B) & \
BIT_MASK_GPIO_OUT_15_TO_8_8822B)
#define BIT_SHIFT_GPIO_IN_15_TO_8_8822B 0
#define BIT_MASK_GPIO_IN_15_TO_8_8822B 0xff
#define BIT_GPIO_IN_15_TO_8_8822B(x) \
(((x) & BIT_MASK_GPIO_IN_15_TO_8_8822B) \
<< BIT_SHIFT_GPIO_IN_15_TO_8_8822B)
#define BIT_GET_GPIO_IN_15_TO_8_8822B(x) \
(((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8822B) & \
BIT_MASK_GPIO_IN_15_TO_8_8822B)
/* 2 REG_PAD_CTRL1_8822B */
#define BIT_PAPE_WLBT_SEL_8822B BIT(29)
#define BIT_LNAON_WLBT_SEL_8822B BIT(28)
#define BIT_BTGP_GPG3_FEN_8822B BIT(26)
#define BIT_BTGP_GPG2_FEN_8822B BIT(25)
#define BIT_BTGP_JTAG_EN_8822B BIT(24)
#define BIT_XTAL_CLK_EXTARNAL_EN_8822B BIT(23)
#define BIT_BTGP_UART0_EN_8822B BIT(22)
#define BIT_BTGP_UART1_EN_8822B BIT(21)
#define BIT_BTGP_SPI_EN_8822B BIT(20)
#define BIT_BTGP_GPIO_E2_8822B BIT(19)
#define BIT_BTGP_GPIO_EN_8822B BIT(18)
#define BIT_SHIFT_BTGP_GPIO_SL_8822B 16
#define BIT_MASK_BTGP_GPIO_SL_8822B 0x3
#define BIT_BTGP_GPIO_SL_8822B(x) \
(((x) & BIT_MASK_BTGP_GPIO_SL_8822B) << BIT_SHIFT_BTGP_GPIO_SL_8822B)
#define BIT_GET_BTGP_GPIO_SL_8822B(x) \
(((x) >> BIT_SHIFT_BTGP_GPIO_SL_8822B) & BIT_MASK_BTGP_GPIO_SL_8822B)
#define BIT_PAD_SDIO_SR_8822B BIT(14)
#define BIT_GPIO14_OUTPUT_PL_8822B BIT(13)
#define BIT_HOST_WAKE_PAD_PULL_EN_8822B BIT(12)
#define BIT_HOST_WAKE_PAD_SL_8822B BIT(11)
#define BIT_PAD_LNAON_SR_8822B BIT(10)
#define BIT_PAD_LNAON_E2_8822B BIT(9)
#define BIT_SW_LNAON_G_SEL_DATA_8822B BIT(8)
#define BIT_SW_LNAON_A_SEL_DATA_8822B BIT(7)
#define BIT_PAD_PAPE_SR_8822B BIT(6)
#define BIT_PAD_PAPE_E2_8822B BIT(5)
#define BIT_SW_PAPE_G_SEL_DATA_8822B BIT(4)
#define BIT_SW_PAPE_A_SEL_DATA_8822B BIT(3)
#define BIT_PAD_DPDT_SR_8822B BIT(2)
#define BIT_PAD_DPDT_PAD_E2_8822B BIT(1)
#define BIT_SW_DPDT_SEL_DATA_8822B BIT(0)
/* 2 REG_WL_BT_PWR_CTRL_8822B */
#define BIT_ISO_BD2PP_8822B BIT(31)
#define BIT_LDOV12B_EN_8822B BIT(30)
#define BIT_CKEN_BTGPS_8822B BIT(29)
#define BIT_FEN_BTGPS_8822B BIT(28)
#define BIT_BTCPU_BOOTSEL_8822B BIT(27)
#define BIT_SPI_SPEEDUP_8822B BIT(26)
#define BIT_DEVWAKE_PAD_TYPE_SEL_8822B BIT(24)
#define BIT_CLKREQ_PAD_TYPE_SEL_8822B BIT(23)
#define BIT_ISO_BTPON2PP_8822B BIT(22)
#define BIT_BT_HWROF_EN_8822B BIT(19)
#define BIT_BT_FUNC_EN_8822B BIT(18)
#define BIT_BT_HWPDN_SL_8822B BIT(17)
#define BIT_BT_DISN_EN_8822B BIT(16)
#define BIT_BT_PDN_PULL_EN_8822B BIT(15)
#define BIT_WL_PDN_PULL_EN_8822B BIT(14)
#define BIT_EXTERNAL_REQUEST_PL_8822B BIT(13)
#define BIT_GPIO0_2_3_PULL_LOW_EN_8822B BIT(12)
#define BIT_ISO_BA2PP_8822B BIT(11)
#define BIT_BT_AFE_LDO_EN_8822B BIT(10)
#define BIT_BT_AFE_PLL_EN_8822B BIT(9)
#define BIT_BT_DIG_CLK_EN_8822B BIT(8)
#define BIT_WL_DRV_EXIST_IDX_8822B BIT(5)
#define BIT_DOP_EHPAD_8822B BIT(4)
#define BIT_WL_HWROF_EN_8822B BIT(3)
#define BIT_WL_FUNC_EN_8822B BIT(2)
#define BIT_WL_HWPDN_SL_8822B BIT(1)
#define BIT_WL_HWPDN_EN_8822B BIT(0)
/* 2 REG_SDM_DEBUG_8822B */
#define BIT_SHIFT_WLCLK_PHASE_8822B 0
#define BIT_MASK_WLCLK_PHASE_8822B 0x1f
#define BIT_WLCLK_PHASE_8822B(x) \
(((x) & BIT_MASK_WLCLK_PHASE_8822B) << BIT_SHIFT_WLCLK_PHASE_8822B)
#define BIT_GET_WLCLK_PHASE_8822B(x) \
(((x) >> BIT_SHIFT_WLCLK_PHASE_8822B) & BIT_MASK_WLCLK_PHASE_8822B)
/* 2 REG_SYS_SDIO_CTRL_8822B */
#define BIT_DBG_GNT_WL_BT_8822B BIT(27)
#define BIT_LTE_MUX_CTRL_PATH_8822B BIT(26)
#define BIT_LTE_COEX_UART_8822B BIT(25)
#define BIT_3W_LTE_WL_GPIO_8822B BIT(24)
#define BIT_SDIO_INT_POLARITY_8822B BIT(19)
#define BIT_SDIO_INT_8822B BIT(18)
#define BIT_SDIO_OFF_EN_8822B BIT(17)
#define BIT_SDIO_ON_EN_8822B BIT(16)
#define BIT_PCIE_WAIT_TIMEOUT_EVENT_8822B BIT(10)
#define BIT_PCIE_WAIT_TIME_8822B BIT(9)
#define BIT_MPCIE_REFCLK_XTAL_SEL_8822B BIT(8)
/* 2 REG_HCI_OPT_CTRL_8822B */
#define BIT_SHIFT_TSFT_SEL_8822B 29
#define BIT_MASK_TSFT_SEL_8822B 0x7
#define BIT_TSFT_SEL_8822B(x) \
(((x) & BIT_MASK_TSFT_SEL_8822B) << BIT_SHIFT_TSFT_SEL_8822B)
#define BIT_GET_TSFT_SEL_8822B(x) \
(((x) >> BIT_SHIFT_TSFT_SEL_8822B) & BIT_MASK_TSFT_SEL_8822B)
#define BIT_USB_HOST_PWR_OFF_EN_8822B BIT(12)
#define BIT_SYM_LPS_BLOCK_EN_8822B BIT(11)
#define BIT_USB_LPM_ACT_EN_8822B BIT(10)
#define BIT_USB_LPM_NY_8822B BIT(9)
#define BIT_USB_SUS_DIS_8822B BIT(8)
#define BIT_SHIFT_SDIO_PAD_E_8822B 5
#define BIT_MASK_SDIO_PAD_E_8822B 0x7
#define BIT_SDIO_PAD_E_8822B(x) \
(((x) & BIT_MASK_SDIO_PAD_E_8822B) << BIT_SHIFT_SDIO_PAD_E_8822B)
#define BIT_GET_SDIO_PAD_E_8822B(x) \
(((x) >> BIT_SHIFT_SDIO_PAD_E_8822B) & BIT_MASK_SDIO_PAD_E_8822B)
#define BIT_USB_LPPLL_EN_8822B BIT(4)
#define BIT_ROP_SW15_8822B BIT(2)
#define BIT_PCI_CKRDY_OPT_8822B BIT(1)
#define BIT_PCI_VAUX_EN_8822B BIT(0)
/* 2 REG_AFE_CTRL4_8822B */
/* 2 REG_LDO_SWR_CTRL_8822B */
#define BIT_ZCD_HW_AUTO_EN_8822B BIT(27)
#define BIT_ZCD_REGSEL_8822B BIT(26)
#define BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B 21
#define BIT_MASK_AUTO_ZCD_IN_CODE_8822B 0x1f
#define BIT_AUTO_ZCD_IN_CODE_8822B(x) \
(((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B) \
<< BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B)
#define BIT_GET_AUTO_ZCD_IN_CODE_8822B(x) \
(((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B) & \
BIT_MASK_AUTO_ZCD_IN_CODE_8822B)
#define BIT_SHIFT_ZCD_CODE_IN_L_8822B 16
#define BIT_MASK_ZCD_CODE_IN_L_8822B 0x1f
#define BIT_ZCD_CODE_IN_L_8822B(x) \
(((x) & BIT_MASK_ZCD_CODE_IN_L_8822B) << BIT_SHIFT_ZCD_CODE_IN_L_8822B)
#define BIT_GET_ZCD_CODE_IN_L_8822B(x) \
(((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8822B) & BIT_MASK_ZCD_CODE_IN_L_8822B)
#define BIT_SHIFT_LDO_HV5_DUMMY_8822B 14
#define BIT_MASK_LDO_HV5_DUMMY_8822B 0x3
#define BIT_LDO_HV5_DUMMY_8822B(x) \
(((x) & BIT_MASK_LDO_HV5_DUMMY_8822B) << BIT_SHIFT_LDO_HV5_DUMMY_8822B)
#define BIT_GET_LDO_HV5_DUMMY_8822B(x) \
(((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8822B) & BIT_MASK_LDO_HV5_DUMMY_8822B)
#define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B 12
#define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B 0x3
#define BIT_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) \
(((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B) \
<< BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B)
#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) \
(((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B) & \
BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B)
#define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B 10
#define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B 0x3
#define BIT_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) \
(((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B) \
<< BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B)
#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) \
(((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B) & \
BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B)
#define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B 8
#define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B 0x3
#define BIT_REG_LOAD33_BIT0_TO_BIT1_8822B(x) \
(((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B) \
<< BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B)
#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8822B(x) \
(((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B) & \
BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B)
#define BIT_REG_BYPASS_L_8822B BIT(7)
#define BIT_REG_LDOF_L_8822B BIT(6)
#define BIT_REG_TYPE_L_V1_8822B BIT(5)
#define BIT_ARENB_L_8822B BIT(3)
#define BIT_SHIFT_CFC_L_8822B 1
#define BIT_MASK_CFC_L_8822B 0x3
#define BIT_CFC_L_8822B(x) \
(((x) & BIT_MASK_CFC_L_8822B) << BIT_SHIFT_CFC_L_8822B)
#define BIT_GET_CFC_L_8822B(x) \
(((x) >> BIT_SHIFT_CFC_L_8822B) & BIT_MASK_CFC_L_8822B)
#define BIT_REG_OCPS_L_V1_8822B BIT(0)
/* 2 REG_MCUFW_CTRL_8822B */
#define BIT_SHIFT_RPWM_8822B 24
#define BIT_MASK_RPWM_8822B 0xff
#define BIT_RPWM_8822B(x) (((x) & BIT_MASK_RPWM_8822B) << BIT_SHIFT_RPWM_8822B)
#define BIT_GET_RPWM_8822B(x) \
(((x) >> BIT_SHIFT_RPWM_8822B) & BIT_MASK_RPWM_8822B)
#define BIT_ANA_PORT_EN_8822B BIT(22)
#define BIT_MAC_PORT_EN_8822B BIT(21)
#define BIT_BOOT_FSPI_EN_8822B BIT(20)
#define BIT_ROM_DLEN_8822B BIT(19)
#define BIT_SHIFT_ROM_PGE_8822B 16
#define BIT_MASK_ROM_PGE_8822B 0x7
#define BIT_ROM_PGE_8822B(x) \
(((x) & BIT_MASK_ROM_PGE_8822B) << BIT_SHIFT_ROM_PGE_8822B)
#define BIT_GET_ROM_PGE_8822B(x) \
(((x) >> BIT_SHIFT_ROM_PGE_8822B) & BIT_MASK_ROM_PGE_8822B)
#define BIT_FW_INIT_RDY_8822B BIT(15)
#define BIT_FW_DW_RDY_8822B BIT(14)
#define BIT_SHIFT_CPU_CLK_SEL_8822B 12
#define BIT_MASK_CPU_CLK_SEL_8822B 0x3
#define BIT_CPU_CLK_SEL_8822B(x) \
(((x) & BIT_MASK_CPU_CLK_SEL_8822B) << BIT_SHIFT_CPU_CLK_SEL_8822B)
#define BIT_GET_CPU_CLK_SEL_8822B(x) \
(((x) >> BIT_SHIFT_CPU_CLK_SEL_8822B) & BIT_MASK_CPU_CLK_SEL_8822B)
#define BIT_CCLK_CHG_MASK_8822B BIT(11)
#define BIT_EMEM__TXBUF_CHKSUM_OK_8822B BIT(10)
#define BIT_EMEM_TXBUF_DW_RDY_8822B BIT(9)
#define BIT_EMEM_CHKSUM_OK_8822B BIT(8)
#define BIT_EMEM_DW_OK_8822B BIT(7)
#define BIT_DMEM_CHKSUM_OK_8822B BIT(6)
#define BIT_DMEM_DW_OK_8822B BIT(5)
#define BIT_IMEM_CHKSUM_OK_8822B BIT(4)
#define BIT_IMEM_DW_OK_8822B BIT(3)
#define BIT_IMEM_BOOT_LOAD_CHKSUM_OK_8822B BIT(2)
#define BIT_IMEM_BOOT_LOAD_DW_OK_8822B BIT(1)
#define BIT_MCUFWDL_EN_8822B BIT(0)
/* 2 REG_MCU_TST_CFG_8822B */
#define BIT_SHIFT_LBKTST_8822B 0
#define BIT_MASK_LBKTST_8822B 0xffff
#define BIT_LBKTST_8822B(x) \
(((x) & BIT_MASK_LBKTST_8822B) << BIT_SHIFT_LBKTST_8822B)
#define BIT_GET_LBKTST_8822B(x) \
(((x) >> BIT_SHIFT_LBKTST_8822B) & BIT_MASK_LBKTST_8822B)
/* 2 REG_HMEBOX_E0_E1_8822B */
#define BIT_SHIFT_HOST_MSG_E1_8822B 16
#define BIT_MASK_HOST_MSG_E1_8822B 0xffff
#define BIT_HOST_MSG_E1_8822B(x) \
(((x) & BIT_MASK_HOST_MSG_E1_8822B) << BIT_SHIFT_HOST_MSG_E1_8822B)
#define BIT_GET_HOST_MSG_E1_8822B(x) \
(((x) >> BIT_SHIFT_HOST_MSG_E1_8822B) & BIT_MASK_HOST_MSG_E1_8822B)
#define BIT_SHIFT_HOST_MSG_E0_8822B 0
#define BIT_MASK_HOST_MSG_E0_8822B 0xffff
#define BIT_HOST_MSG_E0_8822B(x) \
(((x) & BIT_MASK_HOST_MSG_E0_8822B) << BIT_SHIFT_HOST_MSG_E0_8822B)
#define BIT_GET_HOST_MSG_E0_8822B(x) \
(((x) >> BIT_SHIFT_HOST_MSG_E0_8822B) & BIT_MASK_HOST_MSG_E0_8822B)
/* 2 REG_HMEBOX_E2_E3_8822B */
#define BIT_SHIFT_HOST_MSG_E3_8822B 16
#define BIT_MASK_HOST_MSG_E3_8822B 0xffff
#define BIT_HOST_MSG_E3_8822B(x) \
(((x) & BIT_MASK_HOST_MSG_E3_8822B) << BIT_SHIFT_HOST_MSG_E3_8822B)
#define BIT_GET_HOST_MSG_E3_8822B(x) \
(((x) >> BIT_SHIFT_HOST_MSG_E3_8822B) & BIT_MASK_HOST_MSG_E3_8822B)
#define BIT_SHIFT_HOST_MSG_E2_8822B 0
#define BIT_MASK_HOST_MSG_E2_8822B 0xffff
#define BIT_HOST_MSG_E2_8822B(x) \
(((x) & BIT_MASK_HOST_MSG_E2_8822B) << BIT_SHIFT_HOST_MSG_E2_8822B)
#define BIT_GET_HOST_MSG_E2_8822B(x) \
(((x) >> BIT_SHIFT_HOST_MSG_E2_8822B) & BIT_MASK_HOST_MSG_E2_8822B)
/* 2 REG_WLLPS_CTRL_8822B */
#define BIT_WLLPSOP_EABM_8822B BIT(31)
#define BIT_WLLPSOP_ACKF_8822B BIT(30)
#define BIT_WLLPSOP_DLDM_8822B BIT(29)
#define BIT_WLLPSOP_ESWR_8822B BIT(28)
#define BIT_WLLPSOP_PWMM_8822B BIT(27)
#define BIT_WLLPSOP_EECK_8822B BIT(26)
#define BIT_WLLPSOP_WLMACOFF_8822B BIT(25)
#define BIT_WLLPSOP_EXTAL_8822B BIT(24)
#define BIT_WL_SYNPON_VOLTSPDN_8822B BIT(23)
#define BIT_WLLPSOP_WLBBOFF_8822B BIT(22)
#define BIT_WLLPSOP_WLMEM_DS_8822B BIT(21)
#define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B 12
#define BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B 0xf
#define BIT_LPLDH12_VADJ_STEP_DN_8822B(x) \
(((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B) \
<< BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B)
#define BIT_GET_LPLDH12_VADJ_STEP_DN_8822B(x) \
(((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B) & \
BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B)
#define BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B 8
#define BIT_MASK_V15ADJ_L1_STEP_DN_8822B 0x7
#define BIT_V15ADJ_L1_STEP_DN_8822B(x) \
(((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B) \
<< BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B)
#define BIT_GET_V15ADJ_L1_STEP_DN_8822B(x) \
(((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B) & \
BIT_MASK_V15ADJ_L1_STEP_DN_8822B)
#define BIT_REGU_32K_CLK_EN_8822B BIT(1)
#define BIT_WL_LPS_EN_8822B BIT(0)
/* 2 REG_AFE_CTRL5_8822B */
#define BIT_BB_DBG_SEL_AFE_SDM_BIT0_8822B BIT(31)
#define BIT_ORDER_SDM_8822B BIT(30)
#define BIT_RFE_SEL_SDM_8822B BIT(29)
#define BIT_SHIFT_REF_SEL_8822B 25
#define BIT_MASK_REF_SEL_8822B 0xf
#define BIT_REF_SEL_8822B(x) \
(((x) & BIT_MASK_REF_SEL_8822B) << BIT_SHIFT_REF_SEL_8822B)
#define BIT_GET_REF_SEL_8822B(x) \
(((x) >> BIT_SHIFT_REF_SEL_8822B) & BIT_MASK_REF_SEL_8822B)
#define BIT_SHIFT_F0F_SDM_8822B 12
#define BIT_MASK_F0F_SDM_8822B 0x1fff
#define BIT_F0F_SDM_8822B(x) \
(((x) & BIT_MASK_F0F_SDM_8822B) << BIT_SHIFT_F0F_SDM_8822B)
#define BIT_GET_F0F_SDM_8822B(x) \
(((x) >> BIT_SHIFT_F0F_SDM_8822B) & BIT_MASK_F0F_SDM_8822B)
#define BIT_SHIFT_F0N_SDM_8822B 9
#define BIT_MASK_F0N_SDM_8822B 0x7
#define BIT_F0N_SDM_8822B(x) \
(((x) & BIT_MASK_F0N_SDM_8822B) << BIT_SHIFT_F0N_SDM_8822B)
#define BIT_GET_F0N_SDM_8822B(x) \
(((x) >> BIT_SHIFT_F0N_SDM_8822B) & BIT_MASK_F0N_SDM_8822B)
#define BIT_SHIFT_DIVN_SDM_8822B 3
#define BIT_MASK_DIVN_SDM_8822B 0x3f
#define BIT_DIVN_SDM_8822B(x) \
(((x) & BIT_MASK_DIVN_SDM_8822B) << BIT_SHIFT_DIVN_SDM_8822B)
#define BIT_GET_DIVN_SDM_8822B(x) \
(((x) >> BIT_SHIFT_DIVN_SDM_8822B) & BIT_MASK_DIVN_SDM_8822B)
/* 2 REG_GPIO_DEBOUNCE_CTRL_8822B */
#define BIT_WLGP_DBC1EN_8822B BIT(15)
#define BIT_SHIFT_WLGP_DBC1_8822B 8
#define BIT_MASK_WLGP_DBC1_8822B 0xf
#define BIT_WLGP_DBC1_8822B(x) \
(((x) & BIT_MASK_WLGP_DBC1_8822B) << BIT_SHIFT_WLGP_DBC1_8822B)
#define BIT_GET_WLGP_DBC1_8822B(x) \
(((x) >> BIT_SHIFT_WLGP_DBC1_8822B) & BIT_MASK_WLGP_DBC1_8822B)
#define BIT_WLGP_DBC0EN_8822B BIT(7)
#define BIT_SHIFT_WLGP_DBC0_8822B 0
#define BIT_MASK_WLGP_DBC0_8822B 0xf
#define BIT_WLGP_DBC0_8822B(x) \
(((x) & BIT_MASK_WLGP_DBC0_8822B) << BIT_SHIFT_WLGP_DBC0_8822B)
#define BIT_GET_WLGP_DBC0_8822B(x) \
(((x) >> BIT_SHIFT_WLGP_DBC0_8822B) & BIT_MASK_WLGP_DBC0_8822B)
/* 2 REG_RPWM2_8822B */
#define BIT_SHIFT_RPWM2_8822B 16
#define BIT_MASK_RPWM2_8822B 0xffff
#define BIT_RPWM2_8822B(x) \
(((x) & BIT_MASK_RPWM2_8822B) << BIT_SHIFT_RPWM2_8822B)
#define BIT_GET_RPWM2_8822B(x) \
(((x) >> BIT_SHIFT_RPWM2_8822B) & BIT_MASK_RPWM2_8822B)
/* 2 REG_SYSON_FSM_MON_8822B */
#define BIT_SHIFT_FSM_MON_SEL_8822B 24
#define BIT_MASK_FSM_MON_SEL_8822B 0x7
#define BIT_FSM_MON_SEL_8822B(x) \
(((x) & BIT_MASK_FSM_MON_SEL_8822B) << BIT_SHIFT_FSM_MON_SEL_8822B)
#define BIT_GET_FSM_MON_SEL_8822B(x) \
(((x) >> BIT_SHIFT_FSM_MON_SEL_8822B) & BIT_MASK_FSM_MON_SEL_8822B)
#define BIT_DOP_ELDO_8822B BIT(23)
#define BIT_FSM_MON_UPD_8822B BIT(15)
#define BIT_SHIFT_FSM_PAR_8822B 0
#define BIT_MASK_FSM_PAR_8822B 0x7fff
#define BIT_FSM_PAR_8822B(x) \
(((x) & BIT_MASK_FSM_PAR_8822B) << BIT_SHIFT_FSM_PAR_8822B)
#define BIT_GET_FSM_PAR_8822B(x) \
(((x) >> BIT_SHIFT_FSM_PAR_8822B) & BIT_MASK_FSM_PAR_8822B)
/* 2 REG_AFE_CTRL6_8822B */
#define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0
#define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0x7
#define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) \
(((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) \
<< BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) \
(((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) & \
BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
/* 2 REG_PMC_DBG_CTRL1_8822B */
#define BIT_BT_INT_EN_8822B BIT(31)
#define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B 16
#define BIT_MASK_RD_WR_WIFI_BT_INFO_8822B 0x7fff
#define BIT_RD_WR_WIFI_BT_INFO_8822B(x) \
(((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B) \
<< BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B)
#define BIT_GET_RD_WR_WIFI_BT_INFO_8822B(x) \
(((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B) & \
BIT_MASK_RD_WR_WIFI_BT_INFO_8822B)
#define BIT_PMC_WR_OVF_8822B BIT(8)
#define BIT_SHIFT_WLPMC_ERRINT_8822B 0
#define BIT_MASK_WLPMC_ERRINT_8822B 0xff
#define BIT_WLPMC_ERRINT_8822B(x) \
(((x) & BIT_MASK_WLPMC_ERRINT_8822B) << BIT_SHIFT_WLPMC_ERRINT_8822B)
#define BIT_GET_WLPMC_ERRINT_8822B(x) \
(((x) >> BIT_SHIFT_WLPMC_ERRINT_8822B) & BIT_MASK_WLPMC_ERRINT_8822B)
/* 2 REG_AFE_CTRL7_8822B */
#define BIT_SHIFT_SEL_V_8822B 30
#define BIT_MASK_SEL_V_8822B 0x3
#define BIT_SEL_V_8822B(x) \
(((x) & BIT_MASK_SEL_V_8822B) << BIT_SHIFT_SEL_V_8822B)
#define BIT_GET_SEL_V_8822B(x) \
(((x) >> BIT_SHIFT_SEL_V_8822B) & BIT_MASK_SEL_V_8822B)
#define BIT_SEL_LDO_PC_8822B BIT(29)
#define BIT_SHIFT_CK_MON_SEL_8822B 26
#define BIT_MASK_CK_MON_SEL_8822B 0x7
#define BIT_CK_MON_SEL_8822B(x) \
(((x) & BIT_MASK_CK_MON_SEL_8822B) << BIT_SHIFT_CK_MON_SEL_8822B)
#define BIT_GET_CK_MON_SEL_8822B(x) \
(((x) >> BIT_SHIFT_CK_MON_SEL_8822B) & BIT_MASK_CK_MON_SEL_8822B)
#define BIT_CK_MON_EN_8822B BIT(25)
#define BIT_FREF_EDGE_8822B BIT(24)
#define BIT_CK320M_EN_8822B BIT(23)
#define BIT_CK_5M_EN_8822B BIT(22)
#define BIT_TESTEN_8822B BIT(21)
/* 2 REG_HIMR0_8822B */
#define BIT_TIMEOUT_INTERRUPT2_MASK_8822B BIT(31)
#define BIT_TIMEOUT_INTERRUTP1_MASK_8822B BIT(30)
#define BIT_PSTIMEOUT_MSK_8822B BIT(29)
#define BIT_GTINT4_MSK_8822B BIT(28)
#define BIT_GTINT3_MSK_8822B BIT(27)
#define BIT_TXBCN0ERR_MSK_8822B BIT(26)
#define BIT_TXBCN0OK_MSK_8822B BIT(25)
#define BIT_TSF_BIT32_TOGGLE_MSK_8822B BIT(24)
#define BIT_BCNDMAINT0_MSK_8822B BIT(20)
#define BIT_BCNDERR0_MSK_8822B BIT(16)
#define BIT_HSISR_IND_ON_INT_MSK_8822B BIT(15)
#define BIT_BCNDMAINT_E_MSK_8822B BIT(14)
#define BIT_CTWEND_MSK_8822B BIT(12)
#define BIT_HISR1_IND_MSK_8822B BIT(11)
#define BIT_C2HCMD_MSK_8822B BIT(10)
#define BIT_CPWM2_MSK_8822B BIT(9)
#define BIT_CPWM_MSK_8822B BIT(8)
#define BIT_HIGHDOK_MSK_8822B BIT(7)
#define BIT_MGTDOK_MSK_8822B BIT(6)
#define BIT_BKDOK_MSK_8822B BIT(5)
#define BIT_BEDOK_MSK_8822B BIT(4)
#define BIT_VIDOK_MSK_8822B BIT(3)
#define BIT_VODOK_MSK_8822B BIT(2)
#define BIT_RDU_MSK_8822B BIT(1)
#define BIT_RXOK_MSK_8822B BIT(0)
/* 2 REG_HISR0_8822B */
#define BIT_TIMEOUT_INTERRUPT2_8822B BIT(31)
#define BIT_TIMEOUT_INTERRUTP1_8822B BIT(30)
#define BIT_PSTIMEOUT_8822B BIT(29)
#define BIT_GTINT4_8822B BIT(28)
#define BIT_GTINT3_8822B BIT(27)
#define BIT_TXBCN0ERR_8822B BIT(26)
#define BIT_TXBCN0OK_8822B BIT(25)
#define BIT_TSF_BIT32_TOGGLE_8822B BIT(24)
#define BIT_BCNDMAINT0_8822B BIT(20)
#define BIT_BCNDERR0_8822B BIT(16)
#define BIT_HSISR_IND_ON_INT_8822B BIT(15)
#define BIT_BCNDMAINT_E_8822B BIT(14)
#define BIT_CTWEND_8822B BIT(12)
#define BIT_HISR1_IND_INT_8822B BIT(11)
#define BIT_C2HCMD_8822B BIT(10)
#define BIT_CPWM2_8822B BIT(9)
#define BIT_CPWM_8822B BIT(8)
#define BIT_HIGHDOK_8822B BIT(7)
#define BIT_MGTDOK_8822B BIT(6)
#define BIT_BKDOK_8822B BIT(5)
#define BIT_BEDOK_8822B BIT(4)
#define BIT_VIDOK_8822B BIT(3)
#define BIT_VODOK_8822B BIT(2)
#define BIT_RDU_8822B BIT(1)
#define BIT_RXOK_8822B BIT(0)
/* 2 REG_HIMR1_8822B */
#define BIT_TXFIFO_TH_INT_8822B BIT(30)
#define BIT_BTON_STS_UPDATE_MASK_8822B BIT(29)
#define BIT_MCU_ERR_MASK_8822B BIT(28)
#define BIT_BCNDMAINT7__MSK_8822B BIT(27)
#define BIT_BCNDMAINT6__MSK_8822B BIT(26)
#define BIT_BCNDMAINT5__MSK_8822B BIT(25)
#define BIT_BCNDMAINT4__MSK_8822B BIT(24)
#define BIT_BCNDMAINT3_MSK_8822B BIT(23)
#define BIT_BCNDMAINT2_MSK_8822B BIT(22)
#define BIT_BCNDMAINT1_MSK_8822B BIT(21)
#define BIT_BCNDERR7_MSK_8822B BIT(20)
#define BIT_BCNDERR6_MSK_8822B BIT(19)
#define BIT_BCNDERR5_MSK_8822B BIT(18)
#define BIT_BCNDERR4_MSK_8822B BIT(17)
#define BIT_BCNDERR3_MSK_8822B BIT(16)
#define BIT_BCNDERR2_MSK_8822B BIT(15)
#define BIT_BCNDERR1_MSK_8822B BIT(14)
#define BIT_ATIMEND_E_MSK_8822B BIT(13)
#define BIT_ATIMEND__MSK_8822B BIT(12)
#define BIT_TXERR_MSK_8822B BIT(11)
#define BIT_RXERR_MSK_8822B BIT(10)
#define BIT_TXFOVW_MSK_8822B BIT(9)
#define BIT_FOVW_MSK_8822B BIT(8)
#define BIT_CPU_MGQ_TXDONE_MSK_8822B BIT(5)
#define BIT_PS_TIMER_C_MSK_8822B BIT(4)
#define BIT_PS_TIMER_B_MSK_8822B BIT(3)
#define BIT_PS_TIMER_A_MSK_8822B BIT(2)
#define BIT_CPUMGQ_TX_TIMER_MSK_8822B BIT(1)
/* 2 REG_HISR1_8822B */
#define BIT_TXFIFO_TH_INT_8822B BIT(30)
#define BIT_BTON_STS_UPDATE_INT_8822B BIT(29)
#define BIT_MCU_ERR_8822B BIT(28)
#define BIT_BCNDMAINT7_8822B BIT(27)
#define BIT_BCNDMAINT6_8822B BIT(26)
#define BIT_BCNDMAINT5_8822B BIT(25)
#define BIT_BCNDMAINT4_8822B BIT(24)
#define BIT_BCNDMAINT3_8822B BIT(23)
#define BIT_BCNDMAINT2_8822B BIT(22)
#define BIT_BCNDMAINT1_8822B BIT(21)
#define BIT_BCNDERR7_8822B BIT(20)
#define BIT_BCNDERR6_8822B BIT(19)
#define BIT_BCNDERR5_8822B BIT(18)
#define BIT_BCNDERR4_8822B BIT(17)
#define BIT_BCNDERR3_8822B BIT(16)
#define BIT_BCNDERR2_8822B BIT(15)
#define BIT_BCNDERR1_8822B BIT(14)
#define BIT_ATIMEND_E_8822B BIT(13)
#define BIT_ATIMEND_8822B BIT(12)
#define BIT_TXERR_INT_8822B BIT(11)
#define BIT_RXERR_INT_8822B BIT(10)
#define BIT_TXFOVW_8822B BIT(9)
#define BIT_FOVW_8822B BIT(8)
#define BIT_CPU_MGQ_TXDONE_8822B BIT(5)
#define BIT_PS_TIMER_C_8822B BIT(4)
#define BIT_PS_TIMER_B_8822B BIT(3)
#define BIT_PS_TIMER_A_8822B BIT(2)
#define BIT_CPUMGQ_TX_TIMER_8822B BIT(1)
/* 2 REG_DBG_PORT_SEL_8822B */
#define BIT_SHIFT_DEBUG_ST_8822B 0
#define BIT_MASK_DEBUG_ST_8822B 0xffffffffL
#define BIT_DEBUG_ST_8822B(x) \
(((x) & BIT_MASK_DEBUG_ST_8822B) << BIT_SHIFT_DEBUG_ST_8822B)
#define BIT_GET_DEBUG_ST_8822B(x) \
(((x) >> BIT_SHIFT_DEBUG_ST_8822B) & BIT_MASK_DEBUG_ST_8822B)
/* 2 REG_PAD_CTRL2_8822B */
#define BIT_USB3_USB2_TRANSITION_8822B BIT(20)
#define BIT_SHIFT_USB23_SW_MODE_V1_8822B 18
#define BIT_MASK_USB23_SW_MODE_V1_8822B 0x3
#define BIT_USB23_SW_MODE_V1_8822B(x) \
(((x) & BIT_MASK_USB23_SW_MODE_V1_8822B) \
<< BIT_SHIFT_USB23_SW_MODE_V1_8822B)
#define BIT_GET_USB23_SW_MODE_V1_8822B(x) \
(((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8822B) & \
BIT_MASK_USB23_SW_MODE_V1_8822B)
#define BIT_NO_PDN_CHIPOFF_V1_8822B BIT(17)
#define BIT_RSM_EN_V1_8822B BIT(16)
#define BIT_SHIFT_MATCH_CNT_8822B 8
#define BIT_MASK_MATCH_CNT_8822B 0xff
#define BIT_MATCH_CNT_8822B(x) \
(((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
#define BIT_GET_MATCH_CNT_8822B(x) \
(((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
#define BIT_LD_B12V_EN_8822B BIT(7)
#define BIT_EECS_IOSEL_V1_8822B BIT(6)
#define BIT_EECS_DATA_O_V1_8822B BIT(5)
#define BIT_EECS_DATA_I_V1_8822B BIT(4)
#define BIT_EESK_IOSEL_V1_8822B BIT(2)
#define BIT_EESK_DATA_O_V1_8822B BIT(1)
#define BIT_EESK_DATA_I_V1_8822B BIT(0)
/* 2 REG_NOT_VALID_8822B */
/* 2 REG_PMC_DBG_CTRL2_8822B */
#define BIT_SHIFT_EFUSE_BURN_GNT_8822B 24
#define BIT_MASK_EFUSE_BURN_GNT_8822B 0xff
#define BIT_EFUSE_BURN_GNT_8822B(x) \
(((x) & BIT_MASK_EFUSE_BURN_GNT_8822B) \
<< BIT_SHIFT_EFUSE_BURN_GNT_8822B)
#define BIT_GET_EFUSE_BURN_GNT_8822B(x) \
(((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8822B) & \
BIT_MASK_EFUSE_BURN_GNT_8822B)
#define BIT_STOP_WL_PMC_8822B BIT(9)
#define BIT_STOP_SYM_PMC_8822B BIT(8)
#define BIT_REG_RST_WLPMC_8822B BIT(5)
#define BIT_REG_RST_PD12N_8822B BIT(4)
#define BIT_SYSON_DIS_WLREG_WRMSK_8822B BIT(3)
#define BIT_SYSON_DIS_PMCREG_WRMSK_8822B BIT(2)
#define BIT_SHIFT_SYSON_REG_ARB_8822B 0
#define BIT_MASK_SYSON_REG_ARB_8822B 0x3
#define BIT_SYSON_REG_ARB_8822B(x) \
(((x) & BIT_MASK_SYSON_REG_ARB_8822B) << BIT_SHIFT_SYSON_REG_ARB_8822B)
#define BIT_GET_SYSON_REG_ARB_8822B(x) \
(((x) >> BIT_SHIFT_SYSON_REG_ARB_8822B) & BIT_MASK_SYSON_REG_ARB_8822B)
/* 2 REG_BIST_CTRL_8822B */
#define BIT_BIST_USB_DIS_8822B BIT(27)
#define BIT_BIST_PCI_DIS_8822B BIT(26)
#define BIT_BIST_BT_DIS_8822B BIT(25)
#define BIT_BIST_WL_DIS_8822B BIT(24)
#define BIT_SHIFT_BIST_RPT_SEL_8822B 16
#define BIT_MASK_BIST_RPT_SEL_8822B 0xf
#define BIT_BIST_RPT_SEL_8822B(x) \
(((x) & BIT_MASK_BIST_RPT_SEL_8822B) << BIT_SHIFT_BIST_RPT_SEL_8822B)
#define BIT_GET_BIST_RPT_SEL_8822B(x) \
(((x) >> BIT_SHIFT_BIST_RPT_SEL_8822B) & BIT_MASK_BIST_RPT_SEL_8822B)
#define BIT_BIST_RESUME_PS_8822B BIT(4)
#define BIT_BIST_RESUME_8822B BIT(3)
#define BIT_BIST_NORMAL_8822B BIT(2)
#define BIT_BIST_RSTN_8822B BIT(1)
#define BIT_BIST_CLK_EN_8822B BIT(0)
/* 2 REG_BIST_RPT_8822B */
#define BIT_SHIFT_MBIST_REPORT_8822B 0
#define BIT_MASK_MBIST_REPORT_8822B 0xffffffffL
#define BIT_MBIST_REPORT_8822B(x) \
(((x) & BIT_MASK_MBIST_REPORT_8822B) << BIT_SHIFT_MBIST_REPORT_8822B)
#define BIT_GET_MBIST_REPORT_8822B(x) \
(((x) >> BIT_SHIFT_MBIST_REPORT_8822B) & BIT_MASK_MBIST_REPORT_8822B)
/* 2 REG_MEM_CTRL_8822B */
#define BIT_UMEM_RME_8822B BIT(31)
#define BIT_SHIFT_BT_SPRAM_8822B 28
#define BIT_MASK_BT_SPRAM_8822B 0x3
#define BIT_BT_SPRAM_8822B(x) \
(((x) & BIT_MASK_BT_SPRAM_8822B) << BIT_SHIFT_BT_SPRAM_8822B)
#define BIT_GET_BT_SPRAM_8822B(x) \
(((x) >> BIT_SHIFT_BT_SPRAM_8822B) & BIT_MASK_BT_SPRAM_8822B)
#define BIT_SHIFT_BT_ROM_8822B 24
#define BIT_MASK_BT_ROM_8822B 0xf
#define BIT_BT_ROM_8822B(x) \
(((x) & BIT_MASK_BT_ROM_8822B) << BIT_SHIFT_BT_ROM_8822B)
#define BIT_GET_BT_ROM_8822B(x) \
(((x) >> BIT_SHIFT_BT_ROM_8822B) & BIT_MASK_BT_ROM_8822B)
#define BIT_SHIFT_PCI_DPRAM_8822B 10
#define BIT_MASK_PCI_DPRAM_8822B 0x3
#define BIT_PCI_DPRAM_8822B(x) \
(((x) & BIT_MASK_PCI_DPRAM_8822B) << BIT_SHIFT_PCI_DPRAM_8822B)
#define BIT_GET_PCI_DPRAM_8822B(x) \
(((x) >> BIT_SHIFT_PCI_DPRAM_8822B) & BIT_MASK_PCI_DPRAM_8822B)
#define BIT_SHIFT_PCI_SPRAM_8822B 8
#define BIT_MASK_PCI_SPRAM_8822B 0x3
#define BIT_PCI_SPRAM_8822B(x) \
(((x) & BIT_MASK_PCI_SPRAM_8822B) << BIT_SHIFT_PCI_SPRAM_8822B)
#define BIT_GET_PCI_SPRAM_8822B(x) \
(((x) >> BIT_SHIFT_PCI_SPRAM_8822B) & BIT_MASK_PCI_SPRAM_8822B)
#define BIT_SHIFT_USB_SPRAM_8822B 6
#define BIT_MASK_USB_SPRAM_8822B 0x3
#define BIT_USB_SPRAM_8822B(x) \
(((x) & BIT_MASK_USB_SPRAM_8822B) << BIT_SHIFT_USB_SPRAM_8822B)
#define BIT_GET_USB_SPRAM_8822B(x) \
(((x) >> BIT_SHIFT_USB_SPRAM_8822B) & BIT_MASK_USB_SPRAM_8822B)
#define BIT_SHIFT_USB_SPRF_8822B 4
#define BIT_MASK_USB_SPRF_8822B 0x3
#define BIT_USB_SPRF_8822B(x) \
(((x) & BIT_MASK_USB_SPRF_8822B) << BIT_SHIFT_USB_SPRF_8822B)
#define BIT_GET_USB_SPRF_8822B(x) \
(((x) >> BIT_SHIFT_USB_SPRF_8822B) & BIT_MASK_USB_SPRF_8822B)
#define BIT_SHIFT_MCU_ROM_8822B 0
#define BIT_MASK_MCU_ROM_8822B 0xf
#define BIT_MCU_ROM_8822B(x) \
(((x) & BIT_MASK_MCU_ROM_8822B) << BIT_SHIFT_MCU_ROM_8822B)
#define BIT_GET_MCU_ROM_8822B(x) \
(((x) >> BIT_SHIFT_MCU_ROM_8822B) & BIT_MASK_MCU_ROM_8822B)
/* 2 REG_AFE_CTRL8_8822B */
#define BIT_SYN_AGPIO_8822B BIT(20)
#define BIT_XTAL_LP_8822B BIT(4)
#define BIT_XTAL_GM_SEP_8822B BIT(3)
#define BIT_SHIFT_XTAL_SEL_TOK_8822B 0
#define BIT_MASK_XTAL_SEL_TOK_8822B 0x7
#define BIT_XTAL_SEL_TOK_8822B(x) \
(((x) & BIT_MASK_XTAL_SEL_TOK_8822B) << BIT_SHIFT_XTAL_SEL_TOK_8822B)
#define BIT_GET_XTAL_SEL_TOK_8822B(x) \
(((x) >> BIT_SHIFT_XTAL_SEL_TOK_8822B) & BIT_MASK_XTAL_SEL_TOK_8822B)
/* 2 REG_USB_SIE_INTF_8822B */
#define BIT_RD_SEL_8822B BIT(31)
#define BIT_USB_SIE_INTF_WE_V1_8822B BIT(30)
#define BIT_USB_SIE_INTF_BYIOREG_V1_8822B BIT(29)
#define BIT_USB_SIE_SELECT_8822B BIT(28)
#define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B 16
#define BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B 0x1ff
#define BIT_USB_SIE_INTF_ADDR_V1_8822B(x) \
(((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B) \
<< BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B)
#define BIT_GET_USB_SIE_INTF_ADDR_V1_8822B(x) \
(((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B) & \
BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B)
#define BIT_SHIFT_USB_SIE_INTF_RD_8822B 8
#define BIT_MASK_USB_SIE_INTF_RD_8822B 0xff
#define BIT_USB_SIE_INTF_RD_8822B(x) \
(((x) & BIT_MASK_USB_SIE_INTF_RD_8822B) \
<< BIT_SHIFT_USB_SIE_INTF_RD_8822B)
#define BIT_GET_USB_SIE_INTF_RD_8822B(x) \
(((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8822B) & \
BIT_MASK_USB_SIE_INTF_RD_8822B)
#define BIT_SHIFT_USB_SIE_INTF_WD_8822B 0
#define BIT_MASK_USB_SIE_INTF_WD_8822B 0xff
#define BIT_USB_SIE_INTF_WD_8822B(x) \
(((x) & BIT_MASK_USB_SIE_INTF_WD_8822B) \
<< BIT_SHIFT_USB_SIE_INTF_WD_8822B)
#define BIT_GET_USB_SIE_INTF_WD_8822B(x) \
(((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8822B) & \
BIT_MASK_USB_SIE_INTF_WD_8822B)
/* 2 REG_PCIE_MIO_INTF_8822B */
#define BIT_PCIE_MIO_BYIOREG_8822B BIT(13)
#define BIT_PCIE_MIO_RE_8822B BIT(12)
#define BIT_SHIFT_PCIE_MIO_WE_8822B 8
#define BIT_MASK_PCIE_MIO_WE_8822B 0xf
#define BIT_PCIE_MIO_WE_8822B(x) \
(((x) & BIT_MASK_PCIE_MIO_WE_8822B) << BIT_SHIFT_PCIE_MIO_WE_8822B)
#define BIT_GET_PCIE_MIO_WE_8822B(x) \
(((x) >> BIT_SHIFT_PCIE_MIO_WE_8822B) & BIT_MASK_PCIE_MIO_WE_8822B)
#define BIT_SHIFT_PCIE_MIO_ADDR_8822B 0
#define BIT_MASK_PCIE_MIO_ADDR_8822B 0xff
#define BIT_PCIE_MIO_ADDR_8822B(x) \
(((x) & BIT_MASK_PCIE_MIO_ADDR_8822B) << BIT_SHIFT_PCIE_MIO_ADDR_8822B)
#define BIT_GET_PCIE_MIO_ADDR_8822B(x) \
(((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8822B) & BIT_MASK_PCIE_MIO_ADDR_8822B)
/* 2 REG_PCIE_MIO_INTD_8822B */
#define BIT_SHIFT_PCIE_MIO_DATA_8822B 0
#define BIT_MASK_PCIE_MIO_DATA_8822B 0xffffffffL
#define BIT_PCIE_MIO_DATA_8822B(x) \
(((x) & BIT_MASK_PCIE_MIO_DATA_8822B) << BIT_SHIFT_PCIE_MIO_DATA_8822B)
#define BIT_GET_PCIE_MIO_DATA_8822B(x) \
(((x) >> BIT_SHIFT_PCIE_MIO_DATA_8822B) & BIT_MASK_PCIE_MIO_DATA_8822B)
/* 2 REG_WLRF1_8822B */
#define BIT_SHIFT_WLRF1_CTRL_8822B 24
#define BIT_MASK_WLRF1_CTRL_8822B 0xff
#define BIT_WLRF1_CTRL_8822B(x) \
(((x) & BIT_MASK_WLRF1_CTRL_8822B) << BIT_SHIFT_WLRF1_CTRL_8822B)
#define BIT_GET_WLRF1_CTRL_8822B(x) \
(((x) >> BIT_SHIFT_WLRF1_CTRL_8822B) & BIT_MASK_WLRF1_CTRL_8822B)
/* 2 REG_SYS_CFG1_8822B */
#define BIT_SHIFT_TRP_ICFG_8822B 28
#define BIT_MASK_TRP_ICFG_8822B 0xf
#define BIT_TRP_ICFG_8822B(x) \
(((x) & BIT_MASK_TRP_ICFG_8822B) << BIT_SHIFT_TRP_ICFG_8822B)
#define BIT_GET_TRP_ICFG_8822B(x) \
(((x) >> BIT_SHIFT_TRP_ICFG_8822B) & BIT_MASK_TRP_ICFG_8822B)
#define BIT_RF_TYPE_ID_8822B BIT(27)
#define BIT_BD_HCI_SEL_8822B BIT(26)
#define BIT_BD_PKG_SEL_8822B BIT(25)
#define BIT_SPSLDO_SEL_8822B BIT(24)
#define BIT_RTL_ID_8822B BIT(23)
#define BIT_PAD_HWPD_IDN_8822B BIT(22)
#define BIT_TESTMODE_8822B BIT(20)
#define BIT_SHIFT_VENDOR_ID_8822B 16
#define BIT_MASK_VENDOR_ID_8822B 0xf
#define BIT_VENDOR_ID_8822B(x) \
(((x) & BIT_MASK_VENDOR_ID_8822B) << BIT_SHIFT_VENDOR_ID_8822B)
#define BIT_GET_VENDOR_ID_8822B(x) \
(((x) >> BIT_SHIFT_VENDOR_ID_8822B) & BIT_MASK_VENDOR_ID_8822B)
#define BIT_SHIFT_CHIP_VER_8822B 12
#define BIT_MASK_CHIP_VER_8822B 0xf
#define BIT_CHIP_VER_8822B(x) \
(((x) & BIT_MASK_CHIP_VER_8822B) << BIT_SHIFT_CHIP_VER_8822B)
#define BIT_GET_CHIP_VER_8822B(x) \
(((x) >> BIT_SHIFT_CHIP_VER_8822B) & BIT_MASK_CHIP_VER_8822B)
#define BIT_BD_MAC3_8822B BIT(11)
#define BIT_BD_MAC1_8822B BIT(10)
#define BIT_BD_MAC2_8822B BIT(9)
#define BIT_SIC_IDLE_8822B BIT(8)
#define BIT_SW_OFFLOAD_EN_8822B BIT(7)
#define BIT_OCP_SHUTDN_8822B BIT(6)
#define BIT_V15_VLD_8822B BIT(5)
#define BIT_PCIRSTB_8822B BIT(4)
#define BIT_PCLK_VLD_8822B BIT(3)
#define BIT_UCLK_VLD_8822B BIT(2)
#define BIT_ACLK_VLD_8822B BIT(1)
#define BIT_XCLK_VLD_8822B BIT(0)
/* 2 REG_SYS_STATUS1_8822B */
#define BIT_SHIFT_RF_RL_ID_8822B 28
#define BIT_MASK_RF_RL_ID_8822B 0xf
#define BIT_RF_RL_ID_8822B(x) \
(((x) & BIT_MASK_RF_RL_ID_8822B) << BIT_SHIFT_RF_RL_ID_8822B)
#define BIT_GET_RF_RL_ID_8822B(x) \
(((x) >> BIT_SHIFT_RF_RL_ID_8822B) & BIT_MASK_RF_RL_ID_8822B)
#define BIT_HPHY_ICFG_8822B BIT(19)
#define BIT_SHIFT_SEL_0XC0_8822B 16
#define BIT_MASK_SEL_0XC0_8822B 0x3
#define BIT_SEL_0XC0_8822B(x) \
(((x) & BIT_MASK_SEL_0XC0_8822B) << BIT_SHIFT_SEL_0XC0_8822B)
#define BIT_GET_SEL_0XC0_8822B(x) \
(((x) >> BIT_SHIFT_SEL_0XC0_8822B) & BIT_MASK_SEL_0XC0_8822B)
#define BIT_SHIFT_HCI_SEL_V3_8822B 12
#define BIT_MASK_HCI_SEL_V3_8822B 0x7
#define BIT_HCI_SEL_V3_8822B(x) \
(((x) & BIT_MASK_HCI_SEL_V3_8822B) << BIT_SHIFT_HCI_SEL_V3_8822B)
#define BIT_GET_HCI_SEL_V3_8822B(x) \
(((x) >> BIT_SHIFT_HCI_SEL_V3_8822B) & BIT_MASK_HCI_SEL_V3_8822B)
#define BIT_USB_OPERATION_MODE_8822B BIT(10)
#define BIT_BT_PDN_8822B BIT(9)
#define BIT_AUTO_WLPON_8822B BIT(8)
#define BIT_WL_MODE_8822B BIT(7)
#define BIT_PKG_SEL_HCI_8822B BIT(6)
#define BIT_SHIFT_PAD_HCI_SEL_V1_8822B 3
#define BIT_MASK_PAD_HCI_SEL_V1_8822B 0x7
#define BIT_PAD_HCI_SEL_V1_8822B(x) \
(((x) & BIT_MASK_PAD_HCI_SEL_V1_8822B) \
<< BIT_SHIFT_PAD_HCI_SEL_V1_8822B)
#define BIT_GET_PAD_HCI_SEL_V1_8822B(x) \
(((x) >> BIT_SHIFT_PAD_HCI_SEL_V1_8822B) & \
BIT_MASK_PAD_HCI_SEL_V1_8822B)
#define BIT_SHIFT_EFS_HCI_SEL_V1_8822B 0
#define BIT_MASK_EFS_HCI_SEL_V1_8822B 0x7
#define BIT_EFS_HCI_SEL_V1_8822B(x) \
(((x) & BIT_MASK_EFS_HCI_SEL_V1_8822B) \
<< BIT_SHIFT_EFS_HCI_SEL_V1_8822B)
#define BIT_GET_EFS_HCI_SEL_V1_8822B(x) \
(((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8822B) & \
BIT_MASK_EFS_HCI_SEL_V1_8822B)
/* 2 REG_SYS_STATUS2_8822B */
#define BIT_SIO_ALDN_8822B BIT(19)
#define BIT_USB_ALDN_8822B BIT(18)
#define BIT_PCI_ALDN_8822B BIT(17)
#define BIT_SYS_ALDN_8822B BIT(16)
#define BIT_SHIFT_EPVID1_8822B 8
#define BIT_MASK_EPVID1_8822B 0xff
#define BIT_EPVID1_8822B(x) \
(((x) & BIT_MASK_EPVID1_8822B) << BIT_SHIFT_EPVID1_8822B)
#define BIT_GET_EPVID1_8822B(x) \
(((x) >> BIT_SHIFT_EPVID1_8822B) & BIT_MASK_EPVID1_8822B)
#define BIT_SHIFT_EPVID0_8822B 0
#define BIT_MASK_EPVID0_8822B 0xff
#define BIT_EPVID0_8822B(x) \
(((x) & BIT_MASK_EPVID0_8822B) << BIT_SHIFT_EPVID0_8822B)
#define BIT_GET_EPVID0_8822B(x) \
(((x) >> BIT_SHIFT_EPVID0_8822B) & BIT_MASK_EPVID0_8822B)
/* 2 REG_SYS_CFG2_8822B */
#define BIT_HCI_SEL_EMBEDDED_8822B BIT(8)
#define BIT_SHIFT_HW_ID_8822B 0
#define BIT_MASK_HW_ID_8822B 0xff
#define BIT_HW_ID_8822B(x) \
(((x) & BIT_MASK_HW_ID_8822B) << BIT_SHIFT_HW_ID_8822B)
#define BIT_GET_HW_ID_8822B(x) \
(((x) >> BIT_SHIFT_HW_ID_8822B) & BIT_MASK_HW_ID_8822B)
/* 2 REG_SYS_CFG3_8822B */
#define BIT_PWC_MA33V_8822B BIT(15)
#define BIT_PWC_MA12V_8822B BIT(14)
#define BIT_PWC_MD12V_8822B BIT(13)
#define BIT_PWC_PD12V_8822B BIT(12)
#define BIT_PWC_UD12V_8822B BIT(11)
#define BIT_ISO_MA2MD_8822B BIT(1)
#define BIT_ISO_MD2PP_8822B BIT(0)
/* 2 REG_SYS_CFG4_8822B */
/* 2 REG_SYS_CFG5_8822B */
#define BIT_LPS_STATUS_8822B BIT(3)
#define BIT_HCI_TXDMA_BUSY_8822B BIT(2)
#define BIT_HCI_TXDMA_ALLOW_8822B BIT(1)
#define BIT_FW_CTRL_HCI_TXDMA_EN_8822B BIT(0)
/* 2 REG_CPU_DMEM_CON_8822B */
#define BIT_WDT_OPT_IOWRAPPER_8822B BIT(19)
#define BIT_ANA_PORT_IDLE_8822B BIT(18)
#define BIT_MAC_PORT_IDLE_8822B BIT(17)
#define BIT_WL_PLATFORM_RST_8822B BIT(16)
#define BIT_WL_SECURITY_CLK_8822B BIT(15)
#define BIT_SHIFT_CPU_DMEM_CON_8822B 0
#define BIT_MASK_CPU_DMEM_CON_8822B 0xff
#define BIT_CPU_DMEM_CON_8822B(x) \
(((x) & BIT_MASK_CPU_DMEM_CON_8822B) << BIT_SHIFT_CPU_DMEM_CON_8822B)
#define BIT_GET_CPU_DMEM_CON_8822B(x) \
(((x) >> BIT_SHIFT_CPU_DMEM_CON_8822B) & BIT_MASK_CPU_DMEM_CON_8822B)
/* 2 REG_BOOT_REASON_8822B */
#define BIT_SHIFT_BOOT_REASON_8822B 0
#define BIT_MASK_BOOT_REASON_8822B 0x7
#define BIT_BOOT_REASON_8822B(x) \
(((x) & BIT_MASK_BOOT_REASON_8822B) << BIT_SHIFT_BOOT_REASON_8822B)
#define BIT_GET_BOOT_REASON_8822B(x) \
(((x) >> BIT_SHIFT_BOOT_REASON_8822B) & BIT_MASK_BOOT_REASON_8822B)
/* 2 REG_NFCPAD_CTRL_8822B */
#define BIT_PAD_SHUTDW_8822B BIT(18)
#define BIT_SYSON_NFC_PAD_8822B BIT(17)
#define BIT_NFC_INT_PAD_CTRL_8822B BIT(16)
#define BIT_NFC_RFDIS_PAD_CTRL_8822B BIT(15)
#define BIT_NFC_CLK_PAD_CTRL_8822B BIT(14)
#define BIT_NFC_DATA_PAD_CTRL_8822B BIT(13)
#define BIT_NFC_PAD_PULL_CTRL_8822B BIT(12)
#define BIT_SHIFT_NFCPAD_IO_SEL_8822B 8
#define BIT_MASK_NFCPAD_IO_SEL_8822B 0xf
#define BIT_NFCPAD_IO_SEL_8822B(x) \
(((x) & BIT_MASK_NFCPAD_IO_SEL_8822B) << BIT_SHIFT_NFCPAD_IO_SEL_8822B)
#define BIT_GET_NFCPAD_IO_SEL_8822B(x) \
(((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8822B) & BIT_MASK_NFCPAD_IO_SEL_8822B)
#define BIT_SHIFT_NFCPAD_OUT_8822B 4
#define BIT_MASK_NFCPAD_OUT_8822B 0xf
#define BIT_NFCPAD_OUT_8822B(x) \
(((x) & BIT_MASK_NFCPAD_OUT_8822B) << BIT_SHIFT_NFCPAD_OUT_8822B)
#define BIT_GET_NFCPAD_OUT_8822B(x) \
(((x) >> BIT_SHIFT_NFCPAD_OUT_8822B) & BIT_MASK_NFCPAD_OUT_8822B)
#define BIT_SHIFT_NFCPAD_IN_8822B 0
#define BIT_MASK_NFCPAD_IN_8822B 0xf
#define BIT_NFCPAD_IN_8822B(x) \
(((x) & BIT_MASK_NFCPAD_IN_8822B) << BIT_SHIFT_NFCPAD_IN_8822B)
#define BIT_GET_NFCPAD_IN_8822B(x) \
(((x) >> BIT_SHIFT_NFCPAD_IN_8822B) & BIT_MASK_NFCPAD_IN_8822B)
/* 2 REG_HIMR2_8822B */
#define BIT_BCNDMAINT_P4_MSK_8822B BIT(31)
#define BIT_BCNDMAINT_P3_MSK_8822B BIT(30)
#define BIT_BCNDMAINT_P2_MSK_8822B BIT(29)
#define BIT_BCNDMAINT_P1_MSK_8822B BIT(28)
#define BIT_ATIMEND7_MSK_8822B BIT(22)
#define BIT_ATIMEND6_MSK_8822B BIT(21)
#define BIT_ATIMEND5_MSK_8822B BIT(20)
#define BIT_ATIMEND4_MSK_8822B BIT(19)
#define BIT_ATIMEND3_MSK_8822B BIT(18)
#define BIT_ATIMEND2_MSK_8822B BIT(17)
#define BIT_ATIMEND1_MSK_8822B BIT(16)
#define BIT_TXBCN7OK_MSK_8822B BIT(14)
#define BIT_TXBCN6OK_MSK_8822B BIT(13)
#define BIT_TXBCN5OK_MSK_8822B BIT(12)
#define BIT_TXBCN4OK_MSK_8822B BIT(11)
#define BIT_TXBCN3OK_MSK_8822B BIT(10)
#define BIT_TXBCN2OK_MSK_8822B BIT(9)
#define BIT_TXBCN1OK_MSK_V1_8822B BIT(8)
#define BIT_TXBCN7ERR_MSK_8822B BIT(6)
#define BIT_TXBCN6ERR_MSK_8822B BIT(5)
#define BIT_TXBCN5ERR_MSK_8822B BIT(4)
#define BIT_TXBCN4ERR_MSK_8822B BIT(3)
#define BIT_TXBCN3ERR_MSK_8822B BIT(2)
#define BIT_TXBCN2ERR_MSK_8822B BIT(1)
#define BIT_TXBCN1ERR_MSK_V1_8822B BIT(0)
/* 2 REG_HISR2_8822B */
#define BIT_BCNDMAINT_P4_8822B BIT(31)
#define BIT_BCNDMAINT_P3_8822B BIT(30)
#define BIT_BCNDMAINT_P2_8822B BIT(29)
#define BIT_BCNDMAINT_P1_8822B BIT(28)
#define BIT_ATIMEND7_8822B BIT(22)
#define BIT_ATIMEND6_8822B BIT(21)
#define BIT_ATIMEND5_8822B BIT(20)
#define BIT_ATIMEND4_8822B BIT(19)
#define BIT_ATIMEND3_8822B BIT(18)
#define BIT_ATIMEND2_8822B BIT(17)
#define BIT_ATIMEND1_8822B BIT(16)
#define BIT_TXBCN7OK_8822B BIT(14)
#define BIT_TXBCN6OK_8822B BIT(13)
#define BIT_TXBCN5OK_8822B BIT(12)
#define BIT_TXBCN4OK_8822B BIT(11)
#define BIT_TXBCN3OK_8822B BIT(10)
#define BIT_TXBCN2OK_8822B BIT(9)
#define BIT_TXBCN1OK_8822B BIT(8)
#define BIT_TXBCN7ERR_8822B BIT(6)
#define BIT_TXBCN6ERR_8822B BIT(5)
#define BIT_TXBCN5ERR_8822B BIT(4)
#define BIT_TXBCN4ERR_8822B BIT(3)
#define BIT_TXBCN3ERR_8822B BIT(2)
#define BIT_TXBCN2ERR_8822B BIT(1)
#define BIT_TXBCN1ERR_8822B BIT(0)
/* 2 REG_HIMR3_8822B */
#define BIT_WDT_PLATFORM_INT_MSK_8822B BIT(18)
#define BIT_WDT_CPU_INT_MSK_8822B BIT(17)
#define BIT_SETH2CDOK_MASK_8822B BIT(16)
#define BIT_H2C_CMD_FULL_MASK_8822B BIT(15)
#define BIT_PWR_INT_127_MASK_8822B BIT(14)
#define BIT_TXSHORTCUT_TXDESUPDATEOK_MASK_8822B BIT(13)
#define BIT_TXSHORTCUT_BKUPDATEOK_MASK_8822B BIT(12)
#define BIT_TXSHORTCUT_BEUPDATEOK_MASK_8822B BIT(11)
#define BIT_TXSHORTCUT_VIUPDATEOK_MAS_8822B BIT(10)
#define BIT_TXSHORTCUT_VOUPDATEOK_MASK_8822B BIT(9)
#define BIT_PWR_INT_127_MASK_V1_8822B BIT(8)
#define BIT_PWR_INT_126TO96_MASK_8822B BIT(7)
#define BIT_PWR_INT_95TO64_MASK_8822B BIT(6)
#define BIT_PWR_INT_63TO32_MASK_8822B BIT(5)
#define BIT_PWR_INT_31TO0_MASK_8822B BIT(4)
#define BIT_DDMA0_LP_INT_MSK_8822B BIT(1)
#define BIT_DDMA0_HP_INT_MSK_8822B BIT(0)
/* 2 REG_HISR3_8822B */
#define BIT_WDT_PLATFORM_INT_8822B BIT(18)
#define BIT_WDT_CPU_INT_8822B BIT(17)
#define BIT_SETH2CDOK_8822B BIT(16)
#define BIT_H2C_CMD_FULL_8822B BIT(15)
#define BIT_PWR_INT_127_8822B BIT(14)
#define BIT_TXSHORTCUT_TXDESUPDATEOK_8822B BIT(13)
#define BIT_TXSHORTCUT_BKUPDATEOK_8822B BIT(12)
#define BIT_TXSHORTCUT_BEUPDATEOK_8822B BIT(11)
#define BIT_TXSHORTCUT_VIUPDATEOK_8822B BIT(10)
#define BIT_TXSHORTCUT_VOUPDATEOK_8822B BIT(9)
#define BIT_PWR_INT_127_V1_8822B BIT(8)
#define BIT_PWR_INT_126TO96_8822B BIT(7)
#define BIT_PWR_INT_95TO64_8822B BIT(6)
#define BIT_PWR_INT_63TO32_8822B BIT(5)
#define BIT_PWR_INT_31TO0_8822B BIT(4)
#define BIT_DDMA0_LP_INT_8822B BIT(1)
#define BIT_DDMA0_HP_INT_8822B BIT(0)
/* 2 REG_SW_MDIO_8822B */
#define BIT_DIS_TIMEOUT_IO_8822B BIT(24)
/* 2 REG_SW_FLUSH_8822B */
#define BIT_FLUSH_HOLDN_EN_8822B BIT(25)
#define BIT_FLUSH_WR_EN_8822B BIT(24)
#define BIT_SW_FLASH_CONTROL_8822B BIT(23)
#define BIT_SW_FLASH_WEN_E_8822B BIT(19)
#define BIT_SW_FLASH_HOLDN_E_8822B BIT(18)
#define BIT_SW_FLASH_SO_E_8822B BIT(17)
#define BIT_SW_FLASH_SI_E_8822B BIT(16)
#define BIT_SW_FLASH_SK_O_8822B BIT(13)
#define BIT_SW_FLASH_CEN_O_8822B BIT(12)
#define BIT_SW_FLASH_WEN_O_8822B BIT(11)
#define BIT_SW_FLASH_HOLDN_O_8822B BIT(10)
#define BIT_SW_FLASH_SO_O_8822B BIT(9)
#define BIT_SW_FLASH_SI_O_8822B BIT(8)
#define BIT_SW_FLASH_WEN_I_8822B BIT(3)
#define BIT_SW_FLASH_HOLDN_I_8822B BIT(2)
#define BIT_SW_FLASH_SO_I_8822B BIT(1)
#define BIT_SW_FLASH_SI_I_8822B BIT(0)
/* 2 REG_H2C_PKT_READADDR_8822B */
#define BIT_SHIFT_H2C_PKT_READADDR_8822B 0
#define BIT_MASK_H2C_PKT_READADDR_8822B 0x3ffff
#define BIT_H2C_PKT_READADDR_8822B(x) \
(((x) & BIT_MASK_H2C_PKT_READADDR_8822B) \
<< BIT_SHIFT_H2C_PKT_READADDR_8822B)
#define BIT_GET_H2C_PKT_READADDR_8822B(x) \
(((x) >> BIT_SHIFT_H2C_PKT_READADDR_8822B) & \
BIT_MASK_H2C_PKT_READADDR_8822B)
/* 2 REG_H2C_PKT_WRITEADDR_8822B */
#define BIT_SHIFT_H2C_PKT_WRITEADDR_8822B 0
#define BIT_MASK_H2C_PKT_WRITEADDR_8822B 0x3ffff
#define BIT_H2C_PKT_WRITEADDR_8822B(x) \
(((x) & BIT_MASK_H2C_PKT_WRITEADDR_8822B) \
<< BIT_SHIFT_H2C_PKT_WRITEADDR_8822B)
#define BIT_GET_H2C_PKT_WRITEADDR_8822B(x) \
(((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8822B) & \
BIT_MASK_H2C_PKT_WRITEADDR_8822B)
/* 2 REG_MEM_PWR_CRTL_8822B */
#define BIT_MEM_BB_SD_8822B BIT(17)
#define BIT_MEM_BB_DS_8822B BIT(16)
#define BIT_MEM_BT_DS_8822B BIT(10)
#define BIT_MEM_SDIO_LS_8822B BIT(9)
#define BIT_MEM_SDIO_DS_8822B BIT(8)
#define BIT_MEM_USB_LS_8822B BIT(7)
#define BIT_MEM_USB_DS_8822B BIT(6)
#define BIT_MEM_PCI_LS_8822B BIT(5)
#define BIT_MEM_PCI_DS_8822B BIT(4)
#define BIT_MEM_WLMAC_LS_8822B BIT(3)
#define BIT_MEM_WLMAC_DS_8822B BIT(2)
#define BIT_MEM_WLMCU_LS_8822B BIT(1)
#define BIT_MEM_WLMCU_DS_8822B BIT(0)
/* 2 REG_FW_DBG0_8822B */
#define BIT_SHIFT_FW_DBG0_8822B 0
#define BIT_MASK_FW_DBG0_8822B 0xffffffffL
#define BIT_FW_DBG0_8822B(x) \
(((x) & BIT_MASK_FW_DBG0_8822B) << BIT_SHIFT_FW_DBG0_8822B)
#define BIT_GET_FW_DBG0_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG0_8822B) & BIT_MASK_FW_DBG0_8822B)
/* 2 REG_FW_DBG1_8822B */
#define BIT_SHIFT_FW_DBG1_8822B 0
#define BIT_MASK_FW_DBG1_8822B 0xffffffffL
#define BIT_FW_DBG1_8822B(x) \
(((x) & BIT_MASK_FW_DBG1_8822B) << BIT_SHIFT_FW_DBG1_8822B)
#define BIT_GET_FW_DBG1_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG1_8822B) & BIT_MASK_FW_DBG1_8822B)
/* 2 REG_FW_DBG2_8822B */
#define BIT_SHIFT_FW_DBG2_8822B 0
#define BIT_MASK_FW_DBG2_8822B 0xffffffffL
#define BIT_FW_DBG2_8822B(x) \
(((x) & BIT_MASK_FW_DBG2_8822B) << BIT_SHIFT_FW_DBG2_8822B)
#define BIT_GET_FW_DBG2_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG2_8822B) & BIT_MASK_FW_DBG2_8822B)
/* 2 REG_FW_DBG3_8822B */
#define BIT_SHIFT_FW_DBG3_8822B 0
#define BIT_MASK_FW_DBG3_8822B 0xffffffffL
#define BIT_FW_DBG3_8822B(x) \
(((x) & BIT_MASK_FW_DBG3_8822B) << BIT_SHIFT_FW_DBG3_8822B)
#define BIT_GET_FW_DBG3_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG3_8822B) & BIT_MASK_FW_DBG3_8822B)
/* 2 REG_FW_DBG4_8822B */
#define BIT_SHIFT_FW_DBG4_8822B 0
#define BIT_MASK_FW_DBG4_8822B 0xffffffffL
#define BIT_FW_DBG4_8822B(x) \
(((x) & BIT_MASK_FW_DBG4_8822B) << BIT_SHIFT_FW_DBG4_8822B)
#define BIT_GET_FW_DBG4_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG4_8822B) & BIT_MASK_FW_DBG4_8822B)
/* 2 REG_FW_DBG5_8822B */
#define BIT_SHIFT_FW_DBG5_8822B 0
#define BIT_MASK_FW_DBG5_8822B 0xffffffffL
#define BIT_FW_DBG5_8822B(x) \
(((x) & BIT_MASK_FW_DBG5_8822B) << BIT_SHIFT_FW_DBG5_8822B)
#define BIT_GET_FW_DBG5_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG5_8822B) & BIT_MASK_FW_DBG5_8822B)
/* 2 REG_FW_DBG6_8822B */
#define BIT_SHIFT_FW_DBG6_8822B 0
#define BIT_MASK_FW_DBG6_8822B 0xffffffffL
#define BIT_FW_DBG6_8822B(x) \
(((x) & BIT_MASK_FW_DBG6_8822B) << BIT_SHIFT_FW_DBG6_8822B)
#define BIT_GET_FW_DBG6_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG6_8822B) & BIT_MASK_FW_DBG6_8822B)
/* 2 REG_FW_DBG7_8822B */
#define BIT_SHIFT_FW_DBG7_8822B 0
#define BIT_MASK_FW_DBG7_8822B 0xffffffffL
#define BIT_FW_DBG7_8822B(x) \
(((x) & BIT_MASK_FW_DBG7_8822B) << BIT_SHIFT_FW_DBG7_8822B)
#define BIT_GET_FW_DBG7_8822B(x) \
(((x) >> BIT_SHIFT_FW_DBG7_8822B) & BIT_MASK_FW_DBG7_8822B)
/* 2 REG_NOT_VALID_8822B */
/* 2 REG_CR_8822B */
#define BIT_SHIFT_LBMODE_8822B 24
#define BIT_MASK_LBMODE_8822B 0x1f
#define BIT_LBMODE_8822B(x) \
(((x) & BIT_MASK_LBMODE_8822B) << BIT_SHIFT_LBMODE_8822B)
#define BIT_GET_LBMODE_8822B(x) \
(((x) >> BIT_SHIFT_LBMODE_8822B) & BIT_MASK_LBMODE_8822B)
#define BIT_SHIFT_NETYPE1_8822B 18
#define BIT_MASK_NETYPE1_8822B 0x3
#define BIT_NETYPE1_8822B(x) \
(((x) & BIT_MASK_NETYPE1_8822B) << BIT_SHIFT_NETYPE1_8822B)
#define BIT_GET_NETYPE1_8822B(x) \
(((x) >> BIT_SHIFT_NETYPE1_8822B) & BIT_MASK_NETYPE1_8822B)
#define BIT_SHIFT_NETYPE0_8822B 16
#define BIT_MASK_NETYPE0_8822B 0x3
#define BIT_NETYPE0_8822B(x) \
(((x) & BIT_MASK_NETYPE0_8822B) << BIT_SHIFT_NETYPE0_8822B)
#define BIT_GET_NETYPE0_8822B(x) \
(((x) >> BIT_SHIFT_NETYPE0_8822B) & BIT_MASK_NETYPE0_8822B)
#define BIT_I2C_MAILBOX_EN_8822B BIT(12)
#define BIT_SHCUT_EN_8822B BIT(11)
#define BIT_32K_CAL_TMR_EN_8822B BIT(10)
#define BIT_MAC_SEC_EN_8822B BIT(9)
#define BIT_ENSWBCN_8822B BIT(8)
#define BIT_MACRXEN_8822B BIT(7)
#define BIT_MACTXEN_8822B BIT(6)
#define BIT_SCHEDULE_EN_8822B BIT(5)
#define BIT_PROTOCOL_EN_8822B BIT(4)
#define BIT_RXDMA_EN_8822B BIT(3)
#define BIT_TXDMA_EN_8822B BIT(2)
#define BIT_HCI_RXDMA_EN_8822B BIT(1)
#define BIT_HCI_TXDMA_EN_8822B BIT(0)
/* 2 REG_PKT_BUFF_ACCESS_CTRL_8822B */
#define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B 0
#define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B 0xff
#define BIT_PKT_BUFF_ACCESS_CTRL_8822B(x) \
(((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B) \
<< BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B)
#define BIT_GET_PKT_BUFF_ACCESS_CTRL_8822B(x) \
(((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B) & \
BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B)
/* 2 REG_TSF_CLK_STATE_8822B */
#define BIT_TSF_CLK_STABLE_8822B BIT(15)
/* 2 REG_TXDMA_PQ_MAP_8822B */
#define BIT_SHIFT_TXDMA_HIQ_MAP_8822B 14
#define BIT_MASK_TXDMA_HIQ_MAP_8822B 0x3
#define BIT_TXDMA_HIQ_MAP_8822B(x) \
(((x) & BIT_MASK_TXDMA_HIQ_MAP_8822B) << BIT_SHIFT_TXDMA_HIQ_MAP_8822B)
#define BIT_GET_TXDMA_HIQ_MAP_8822B(x) \
(((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8822B) & BIT_MASK_TXDMA_HIQ_MAP_8822B)
#define BIT_SHIFT_TXDMA_MGQ_MAP_8822B 12
#define BIT_MASK_TXDMA_MGQ_MAP_8822B 0x3
#define BIT_TXDMA_MGQ_MAP_8822B(x) \
(((x) & BIT_MASK_TXDMA_MGQ_MAP_8822B) << BIT_SHIFT_TXDMA_MGQ_MAP_8822B)
#define BIT_GET_TXDMA_MGQ_MAP_8822B(x) \
(((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8822B) & BIT_MASK_TXDMA_MGQ_MAP_8822B)
#define BIT_SHIFT_TXDMA_BKQ_MAP_8822B 10
#define BIT_MASK_TXDMA_BKQ_MAP_8822B 0x3
#define BIT_TXDMA_BKQ_MAP_8822B(x) \
(((x) & BIT_MASK_TXDMA_BKQ_MAP_8822B) << BIT_SHIFT_TXDMA_BKQ_MAP_8822B)
#define BIT_GET_TXDMA_BKQ_MAP_8822B(x) \
(((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8822B) & BIT_MASK_TXDMA_BKQ_MAP_8822B)
#define BIT_SHIFT_TXDMA_BEQ_MAP_8822B 8
#define BIT_MASK_TXDMA_BEQ_MAP_8822B 0x3
#define BIT_TXDMA_BEQ_MAP_8822B(x) \
(((x) & BIT_MASK_TXDMA_BEQ_MAP_8822B) << BIT_SHIFT_TXDMA_BEQ_MAP_8822B)
#define BIT_GET_TXDMA_BEQ_MAP_8822B(x) \
(((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8822B) & BIT_MASK_TXDMA_BEQ_MAP_8822B)
#define BIT_SHIFT_TXDMA_VIQ_MAP_8822B 6
#define BIT_MASK_TXDMA_VIQ_MAP_8822B 0x3
#define BIT_TXDMA_VIQ_MAP_8822B(x) \
(((x) & BIT_MASK_TXDMA_VIQ_MAP_8822B) << BIT_SHIFT_TXDMA_VIQ_MAP_8822B)
#define BIT_GET_TXDMA_VIQ_MAP_8822B(x) \
(((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8822B) & BIT_MASK_TXDMA_VIQ_MAP_8822B)
#define BIT_SHIFT_TXDMA_VOQ_MAP_8822B 4
#define BIT_MASK_TXDMA_VOQ_MAP_8822B 0x3
#define BIT_TXDMA_VOQ_MAP_8822B(x) \
(((x) & BIT_MASK_TXDMA_VOQ_MAP_8822B) << BIT_SHIFT_TXDMA_VOQ_MAP_8822B)
#define BIT_GET_TXDMA_VOQ_MAP_8822B(x) \
(((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8822B) & BIT_MASK_TXDMA_VOQ_MAP_8822B)
#define BIT_RXDMA_AGG_EN_8822B BIT(2)
#define BIT_RXSHFT_EN_8822B BIT(1)
#define BIT_RXDMA_ARBBW_EN_8822B BIT(0)
/* 2 REG_TRXFF_BNDY_8822B */
#define BIT_SHIFT_RXFFOVFL_RSV_V2_8822B 8
#define BIT_MASK_RXFFOVFL_RSV_V2_8822B 0xf
#define BIT_RXFFOVFL_RSV_V2_8822B(x) \
(((x) & BIT_MASK_RXFFOVFL_RSV_V2_8822B) \
<< BIT_SHIFT_RXFFOVFL_RSV_V2_8822B)
#define BIT_GET_RXFFOVFL_RSV_V2_8822B(x) \
(((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8822B) & \
BIT_MASK_RXFFOVFL_RSV_V2_8822B)
#define BIT_SHIFT_TXPKTBUF_PGBNDY_8822B 0
#define BIT_MASK_TXPKTBUF_PGBNDY_8822B 0xff
#define BIT_TXPKTBUF_PGBNDY_8822B(x) \
(((x) & BIT_MASK_TXPKTBUF_PGBNDY_8822B) \
<< BIT_SHIFT_TXPKTBUF_PGBNDY_8822B)
#define BIT_GET_TXPKTBUF_PGBNDY_8822B(x) \
(((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8822B) & \
BIT_MASK_TXPKTBUF_PGBNDY_8822B)
/* 2 REG_PTA_I2C_MBOX_8822B */
/* 2 REG_NOT_VALID_8822B */
#define BIT_SHIFT_I2C_M_STATUS_8822B 8
#define BIT_MASK_I2C_M_STATUS_8822B 0xf
#define BIT_I2C_M_STATUS_8822B(x) \
(((x) & BIT_MASK_I2C_M_STATUS_8822B) << BIT_SHIFT_I2C_M_STATUS_8822B)
#define BIT_GET_I2C_M_STATUS_8822B(x) \
(((x) >> BIT_SHIFT_I2C_M_STATUS_8822B) & BIT_MASK_I2C_M_STATUS_8822B)
#define BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B 4
#define BIT_MASK_I2C_M_BUS_GNT_FW_8822B 0x7
#define BIT_I2C_M_BUS_GNT_FW_8822B(x) \
(((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B) \
<< BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B)
#define BIT_GET_I2C_M_BUS_GNT_FW_8822B(x) \
(((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B) & \
BIT_MASK_I2C_M_BUS_GNT_FW_8822B)
#define BIT_I2C_M_GNT_FW_8822B BIT(3)
#define BIT_SHIFT_I2C_M_SPEED_8822B 1
#define BIT_MASK_I2C_M_SPEED_8822B 0x3
#define BIT_I2C_M_SPEED_8822B(x) \
(((x) & BIT_MASK_I2C_M_SPEED_8822B) << BIT_SHIFT_I2C_M_SPEED_8822B)
#define BIT_GET_I2C_M_SPEED_8822B(x) \
(((x) >> BIT_SHIFT_I2C_M_SPEED_8822B) & BIT_MASK_I2C_M_SPEED_8822B)
#define BIT_I2C_M_UNLOCK_8822B BIT(0)
/* 2 REG_RXFF_BNDY_8822B */
/* 2 REG_NOT_VALID_8822B */
#define BIT_SHIFT_RXFF0_BNDY_V2_8822B 0
#define BIT_MASK_RXFF0_BNDY_V2_8822B 0x3ffff
#define BIT_RXFF0_BNDY_V2_8822B(x) \
(((x) & BIT_MASK_RXFF0_BNDY_V2_8822B) << BIT_SHIFT_RXFF0_BNDY_V2_8822B)
#define BIT_GET_RXFF0_BNDY_V2_8822B(x) \
(((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8822B) & BIT_MASK_RXFF0_BNDY_V2_8822B)
/* 2 REG_FE1IMR_8822B */
#define BIT_FS_RXDMA2_DONE_INT_EN_8822B BIT(28)
#define BIT_FS_RXDONE3_INT_EN_8822B BIT(27)
#define BIT_FS_RXDONE2_INT_EN_8822B BIT(26)
#define BIT_FS_RX_BCN_P4_INT_EN_8822B BIT(25)
#define BIT_FS_RX_BCN_P3_INT_EN_8822B BIT(24)
#define BIT_FS_RX_BCN_P2_INT_EN_8822B BIT(23)
#define BIT_FS_RX_BCN_P1_INT_EN_8822B BIT(22)
#define BIT_FS_RX_BCN_P0_INT_EN_8822B BIT(21)
#define BIT_FS_RX_UMD0_INT_EN_8822B BIT(20)
#define BIT_FS_RX_UMD1_INT_EN_8822B BIT(19)
#define BIT_FS_RX_BMD0_INT_EN_8822B BIT(18)
#define BIT_FS_RX_BMD1_INT_EN_8822B BIT(17)
#define BIT_FS_RXDONE_INT_EN_8822B BIT(16)
#define BIT_FS_WWLAN_INT_EN_8822B BIT(15)
#define BIT_FS_SOUND_DONE_INT_EN_8822B BIT(14)
#define BIT_FS_LP_STBY_INT_EN_8822B BIT(13)
#define BIT_FS_TRL_MTR_INT_EN_8822B BIT(12)
#define BIT_FS_BF1_PRETO_INT_EN_8822B BIT(11)
#define BIT_FS_BF0_PRETO_INT_EN_8822B BIT(10)
#define BIT_FS_PTCL_RELEASE_MACID_INT_EN_8822B BIT(9)
#define BIT_FS_LTE_COEX_EN_8822B BIT(6)
#define BIT_FS_WLACTOFF_INT_EN_8822B BIT(5)
#define BIT_FS_WLACTON_INT_EN_8822B BIT(4)
#define BIT_FS_BTCMD_INT_EN_8822B BIT(3)
#define BIT_FS_REG_MAILBOX_TO_I2C_INT_EN_8822B BIT(2)
#define BIT_FS_TRPC_TO_INT_EN_V1_8822B BIT(1)
#define BIT_FS_RPC_O_T_INT_EN_V1_8822B BIT(0)
/* 2 REG_FE1ISR_8822B */
#define BIT_FS_RXDMA2_DONE_INT_8822B BIT(28)
#define BIT_FS_RXDONE3_INT_8822B BIT(27)
#define BIT_FS_RXDONE2_INT_8822B BIT(26)
#define BIT_FS_RX_BCN_P4_INT_8822B BIT(25)
#define BIT_FS_RX_BCN_P3_INT_8822B BIT(24)
#define BIT_FS_RX_BCN_P2_INT_8822B BIT(23)
#define BIT_FS_RX_BCN_P1_INT_8822B BIT(22)
#define BIT_FS_RX_BCN_P0_INT_8822B BIT(21)
#define BIT_FS_RX_UMD0_INT_8822B BIT(20)
#define BIT_FS_RX_UMD1_INT_8822B BIT(19)
#define BIT_FS_RX_BMD0_INT_8822B BIT(18)
#define BIT_FS_RX_BMD1_INT_8822B BIT(17)
#define BIT_FS_RXDONE_INT_8822B BIT(16)
#define BIT_FS_WWLAN_INT_8822B BIT(15)
#define BIT_FS_SOUND_DONE_INT_8822B BIT(14)
#define BIT_FS_LP_STBY_INT_8822B BIT(13)
#define BIT_FS_TRL_MTR_INT_8822B BIT(12)
#define BIT_FS_BF1_PRETO_INT_8822B BIT(11)
#define BIT_FS_BF0_PRETO_INT_8822B BIT(10)
#define BIT_FS_PTCL_RELEASE_MACID_INT_8822B BIT(9)
#define BIT_FS_LTE_COEX_INT_8822B BIT(6)
#define BIT_FS_WLACTOFF_INT_8822B BIT(5)
#define BIT_FS_WLACTON_INT_8822B BIT(4)
#define BIT_FS_BCN_RX_INT_INT_8822B BIT(3)
#define BIT_FS_MAILBOX_TO_I2C_INT_8822B BIT(2)
#define BIT_FS_TRPC_TO_INT_8822B BIT(1)
#define BIT_FS_RPC_O_T_INT_8822B BIT(0)
/* 2 REG_NOT_VALID_8822B */
/* 2 REG_CPWM_8822B */
#define BIT_CPWM_TOGGLING_8822B BIT(31)
#define BIT_SHIFT_CPWM_MOD_8822B 24
#define BIT_MASK_CPWM_MOD_8822B 0x7f
#define BIT_CPWM_MOD_8822B(x) \
(((x) & BIT_MASK_CPWM_MOD_8822B) << BIT_SHIFT_CPWM_MOD_8822B)
#define BIT_GET_CPWM_MOD_8822B(x) \
(((x) >> BIT_SHIFT_CPWM_MOD_8822B) & BIT_MASK_CPWM_MOD_8822B)
/* 2 REG_FWIMR_8822B */
#define BIT_FS_TXBCNOK_MB7_INT_EN_8822B BIT(31)
#define BIT_FS_TXBCNOK_MB6_INT_EN_8822B BIT(30)
#define BIT_FS_TXBCNOK_MB5_INT_EN_8822B BIT(29)
#define BIT_FS_TXBCNOK_MB4_INT_EN_8822B BIT(28)
#define BIT_FS_TXBCNOK_MB3_INT_EN_8822B BIT(27)
#define BIT_FS_TXBCNOK_MB2_INT_EN_8822B BIT(26)
#define BIT_FS_TXBCNOK_MB1_INT_EN_8822B BIT(25)
#define BIT_FS_TXBCNOK_MB0_INT_EN_8822B BIT(24)
#define BIT_FS_TXBCNERR_MB7_INT_EN_8822B BIT(23)
#define BIT_FS_TXBCNERR_MB6_INT_EN_8822B BIT(22)
#define BIT_FS_TXBCNERR_MB5_INT_EN_8822B BIT(21)
#define BIT_FS_TXBCNERR_MB4_INT_EN_8822B BIT(20)
#define BIT_FS_TXBCNERR_MB3_INT_EN_8822B BIT(19)
#define BIT_FS_TXBCNERR_MB2_INT_EN_8822B BIT(18)
#define BIT_FS_TXBCNERR_MB1_INT_EN_8822B BIT(17)
#define BIT_FS_TXBCNERR_MB0_INT_EN_8822B BIT(16)
#define BIT_CPU_MGQ_TXDONE_INT_EN_8822B BIT(15)
#define BIT_SIFS_OVERSPEC_INT_EN_8822B BIT(14)
#define BIT_FS_MGNTQ_RPTR_RELEASE_INT_EN_8822B BIT(13)
#define BIT_FS_MGNTQFF_TO_INT_EN_8822B BIT(12)
#define BIT_FS_DDMA1_LP_INT_EN_8822B BIT(11)
#define BIT_FS_DDMA1_HP_INT_EN_8822B BIT(10)
#define BIT_FS_DDMA0_LP_INT_EN_8822B BIT(9)
#define BIT_FS_DDMA0_HP_INT_EN_8822B BIT(8)
#define BIT_FS_TRXRPT_INT_EN_8822B BIT(7)
#define BIT_FS_C2H_W_READY_INT_EN_8822B BIT(6)
#define BIT_FS_HRCV_INT_EN_8822B BIT(5)
#define BIT_FS_H2CCMD_INT_EN_8822B BIT(4)
#define BIT_FS_TXPKTIN_INT_EN_8822B BIT(3)
#define BIT_FS_ERRORHDL_INT_EN_8822B BIT(2)
#define BIT_FS_TXCCX_INT_EN_8822B BIT(1)
#define BIT_FS_TXCLOSE_INT_EN_8822B BIT(0)
/* 2 REG_FWISR_8822B */
#define BIT_FS_TXBCNOK_MB7_INT_8822B BIT(31)
#define BIT_FS_TXBCNOK_MB6_INT_8822B BIT(30)
#define BIT_FS_TXBCNOK_MB5_INT_8822B BIT(29)
#define BIT_FS_TXBCNOK_MB4_INT_8822B BIT(28)
#define BIT_FS_TXBCNOK_MB3_INT_8822B BIT(27)
#define BIT_FS_TXBCNOK_MB2_INT_8822B BIT(26)
#define BIT_FS_TXBCNOK_MB1_INT_8822B BIT(25)
#define BIT_FS_TXBCNOK_MB0_INT_8822B BIT(24)
#define BIT_FS_TXBCNERR_MB7_INT_8822B BIT(23)
#define BIT_FS_TXBCNERR_MB6_INT_8822B BIT(22)
#define BIT_FS_TXBCNERR_MB5_INT_8822B BIT(21)
#define BIT_FS_TXBCNERR_MB4_INT_8822B BIT(20)
#define BIT_FS_TXBCNERR_MB3_INT_8822B BIT(19)
#define BIT_FS_TXBCNERR_MB2_INT_8822B BIT(18)
#define BIT_FS_TXBCNERR_MB1_INT_8822B BIT(17)
#define BIT_FS_TXBCNERR_MB0_INT_8822B BIT(16)
#define BIT_CPU_MGQ_TXDONE_INT_8822B BIT(15)
#define BIT_SIFS_OVERSPEC_INT_8822B BIT(14)
#define BIT_FS_MGNTQ_RPTR_RELEASE_INT_8822B BIT(13)
#define BIT_FS_MGNTQFF_TO_INT_8822B BIT(12)
#define BIT_FS_DDMA1_LP_INT_8822B BIT(11)
#define BIT_FS_DDMA1_HP_INT_8822B BIT(10)
#define BIT_FS_DDMA0_LP_INT_8822B BIT(9)
#define BIT_FS_DDMA0_HP_INT_8822B BIT(8)
#define BIT_FS_TRXRPT_INT_8822B BIT(7)
#define BIT_FS_C2H_W_READY_INT_8822B BIT(6)
#define BIT_FS_HRCV_INT_8822B BIT(5)
#define BIT_FS_H2CCMD_INT_8822B BIT(4)
#define BIT_FS_TXPKTIN_INT_8822B BIT(3)
#define BIT_FS_ERRORHDL_INT_8822B BIT(2)
#define BIT_FS_TXCCX_INT_8822B BIT(1)
#define BIT_FS_TXCLOSE_INT_8822B BIT(0)
/* 2 REG_FTIMR_8822B */
#define BIT_PS_TIMER_C_EARLY_INT_EN_8822B BIT(23)
#define BIT_PS_TIMER_B_EARLY_INT_EN_8822B BIT(22)
#define BIT_PS_TIMER_A_EARLY_INT_EN_8822B BIT(21)
#define BIT_CPUMGQ_TX_TIMER_EARLY_INT_EN_8822B BIT(20)
#define BIT_PS_TIMER_C_INT_EN_8822B BIT(19)
#define BIT_PS_TIMER_B_INT_EN_8822B BIT(18)
#define BIT_PS_TIMER_A_INT_EN_8822B BIT(17)
#define BIT_CPUMGQ_TX_TIMER_INT_EN_8822B BIT(16)
#define BIT_FS_PS_TIMEOUT2_EN_8822B BIT(15)
#define BIT_FS_PS_TIMEOUT1_EN_8822B BIT(14)
#define BIT_FS_PS_TIMEOUT0_EN_8822B BIT(13)
#define BIT_FS_GTINT8_EN_8822B BIT(8)
#define BIT_FS_GTINT7_EN_8822B BIT(7)
#define BIT_FS_GTINT6_EN_8822B BIT(6)
#define BIT_FS_GTINT5_EN_8822B BIT(5)
#define BIT_FS_GTINT4_EN_8822B BIT(4)
#define BIT_FS_GTINT3_EN_8822B BIT(3)
#define BIT_FS_GTINT2_EN_8822B BIT(2)
#define BIT_FS_GTINT1_EN_8822B BIT(1)
#define BIT_FS_GTINT0_EN_8822B BIT(0)
/* 2 REG_FTISR_8822B */
#define BIT_PS_TIMER_C_EARLY__INT_8822B BIT(23)
#define BIT_PS_TIMER_B_EARLY__INT_8822B BIT(22)
#define BIT_PS_TIMER_A_EARLY__INT_8822B BIT(21)
#define BIT_CPUMGQ_TX_TIMER_EARLY_INT_8822B BIT(20)
#define BIT_PS_TIMER_C_INT_8822B BIT(19)
#define BIT_PS_TIMER_B_INT_8822B BIT(18)
#define BIT_PS_TIMER_A_INT_8822B BIT(17)
#define BIT_CPUMGQ_TX_TIMER_INT_8822B BIT(16)
#define BIT_FS_PS_TIMEOUT2_INT_8822B BIT(15)
#define BIT_FS_PS_TIMEOUT1_INT_8822B BIT(14)
#define BIT_FS_PS_TIMEOUT0_INT_8822B BIT(13)
#define BIT_FS_GTINT8_INT_8822B BIT(8)
#define BIT_FS_GTINT7_INT_8822B BIT(7)
#define BIT_FS_GTINT6_INT_8822B BIT(6)
#define BIT_FS_GTINT5_INT_8822B BIT(5)
#define BIT_FS_GTINT4_INT_8822B BIT(4)
#define BIT_FS_GTINT3_INT_8822B BIT(3)
#define BIT_FS_GTINT2_INT_8822B BIT(2)
#define BIT_FS_GTINT1_INT_8822B BIT(1)
#define BIT_FS_GTINT0_INT_8822B BIT(0)
/* 2 REG_PKTBUF_DBG_CTRL_8822B */
#define BIT_SHIFT_PKTBUF_WRITE_EN_8822B 24
#define BIT_MASK_PKTBUF_WRITE_EN_8822B 0xff
#define BIT_PKTBUF_WRITE_EN_8822B(x) \
(((x) & BIT_MASK_PKTBUF_WRITE_EN_8822B) \
<< BIT_SHIFT_PKTBUF_WRITE_EN_8822B)
#define BIT_GET_PKTBUF_WRITE_EN_8822B(x) \
(((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8822B) & \
BIT_MASK_PKTBUF_WRITE_EN_8822B)
#define BIT_TXRPTBUF_DBG_8822B BIT(23)
/* 2 REG_NOT_VALID_8822B */
#define BIT_TXPKTBUF_DBG_V2_8822B BIT(20)
#define BIT_RXPKTBUF_DBG_8822B BIT(16)
#define BIT_SHIFT_PKTBUF_DBG_ADDR_8822B 0
#define BIT_MASK_PKTBUF_DBG_ADDR_8822B 0x1fff
#define BIT_PKTBUF_DBG_ADDR_8822B(x) \
(((x) & BIT_MASK_PKTBUF_DBG_ADDR_8822B) \
<< BIT_SHIFT_PKTBUF_DBG_ADDR_8822B)
#define BIT_GET_PKTBUF_DBG_ADDR_8822B(x) \
(((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8822B) & \
BIT_MASK_PKTBUF_DBG_ADDR_8822B)
/* 2 REG_PKTBUF_DBG_DATA_L_8822B */
#define BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B 0
#define BIT_MASK_PKTBUF_DBG_DATA_L_8822B 0xffffffffL
#define BIT_PKTBUF_DBG_DATA_L_8822B(x) \
(((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B) \
<< BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B)
#define BIT_GET_PKTBUF_DBG_DATA_L_8822B(x) \
(((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B) & \
BIT_MASK_PKTBUF_DBG_DATA_L_8822B)
/* 2 REG_PKTBUF_DBG_DATA_H_8822B */
#define BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B 0
#define BIT_MASK_PKTBUF_DBG_DATA_H_8822B 0xffffffffL
#define BIT_PKTBUF_DBG_DATA_H_8822B(x) \
(((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B) \
<< BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B)
#define BIT_GET_PKTBUF_DBG_DATA_H_8822B(x) \
(((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B) & \
BIT_MASK_PKTBUF_DBG_DATA_H_8822B)
/* 2 REG_CPWM2_8822B */
#define BIT_SHIFT_L0S_TO_RCVY_NUM_8822B 16
#define BIT_MASK_L0S_TO_RCVY_NUM_8822B 0xff
#define BIT_L0S_TO_RCVY_NUM_8822B(x) \
(((x) & BIT_MASK_L0S_TO_RCVY_NUM_8822B) \
<< BIT_SHIFT_L0S_TO_RCVY_NUM_8822B)
#define BIT_GET_L0S_TO_RCVY_NUM_8822B(x) \
(((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8822B) & \
BIT_MASK_L0S_TO_RCVY_NUM_8822B)
#define BIT_CPWM2_TOGGLING_8822B BIT(15)
#define BIT_SHIFT_CPWM2_MOD_8822B 0
#define BIT_MASK_CPWM2_MOD_8822B 0x7fff
#define BIT_CPWM2_MOD_8822B(x) \
(((x) & BIT_MASK_CPWM2_MOD_8822B) << BIT_SHIFT_CPWM2_MOD_8822B)
#define BIT_GET_CPWM2_MOD_8822B(x) \
(((x) >> BIT_SHIFT_CPWM2_MOD_8822B) & BIT_MASK_CPWM2_MOD_8822B)
/* 2 REG_NOT_VALID_8822B */
/* 2 REG_TC0_CTRL_8822B */
#define BIT_TC0INT_EN_8822B BIT(26)
#define BIT_TC0MODE_8822B BIT(25)
#define BIT_TC0EN_8822B BIT(24)
#define BIT_SHIFT_TC0DATA_8822B 0
#define BIT_MASK_TC0DATA_8822B 0xffffff
#define BIT_TC0DATA_8822B(x) \
(((x) & BIT_MASK_TC0DATA_8822B) << BIT_SHIFT_TC0DATA_8822B)
#define BIT_GET_TC0DATA_8822B(x) \
(((x) >> BIT_SHIFT_TC0DATA_8822B) & BIT_MASK_TC0DATA_8822B)
/* 2 REG_TC1_CTRL_8822B */
#define BIT_TC1INT_EN_8822B BIT(26)
#define BIT_TC1MODE_8822B BIT(25)
#define BIT_TC1EN_8822B BIT(24)
#define BIT_SHIFT_TC1DATA_8822B 0
#define BIT_MASK_TC1DATA_8822B 0xffffff
#define BIT_TC1DATA_8822B(x) \
(((x) & BIT_MASK_TC1DATA_8822B) << BIT_SHIFT_TC1DATA_8822B)
#define BIT_GET_TC1DATA_8822B(x) \
(((x) >> BIT_SHIFT_TC1DATA_8822B) & BIT_MASK_TC1DATA_8822B)
/* 2 REG_TC2_CTRL_8822B */
#define BIT_TC2INT_EN_8822B BIT(26)
#define BIT_TC2MODE_8822B BIT(25)
#define BIT_TC2EN_8822B BIT(24)
#define BIT_SHIFT_TC2DATA_8822B 0
#define BIT_MASK_TC2DATA_8822B 0xffffff
#define BIT_TC2DATA_8822B(x) \
(((x) & BIT_MASK_TC2DATA_8822B) << BIT_SHIFT_TC2DATA_8822B)
#define BIT_GET_TC2DATA_8822B(x) \
(((x) >> BIT_SHIFT_TC2DATA_8822B) & BIT_MASK_TC2DATA_8822B)
/* 2 REG_TC3_CTRL_8822B */
#define BIT_TC3INT_EN_8822B BIT(26)
#define BIT_TC3MODE_8822B BIT(25)
#define BIT_TC3EN_8822B BIT(24)
#define BIT_SHIFT_TC3DATA_8822B 0
#define BIT_MASK_TC3DATA_8822B 0xffffff
#define BIT_TC3DATA_8822B(x) \
(((x) & BIT_MASK_TC3DATA_8822B) << BIT_SHIFT_TC3DATA_8822B)
#define BIT_GET_TC3DATA_8822B(x) \
(((x) >> BIT_SHIFT_TC3DATA_8822B) & BIT_MASK_TC3DATA_8822B)
/* 2 REG_TC4_CTRL_8822B */
#define BIT_TC4INT_EN_8822B BIT(26)
#define BIT_TC4MODE_8822B BIT(25)
#define BIT_TC4EN_8822B BIT(24)
#define BIT_SHIFT_TC4DATA_8822B 0
#define BIT_MASK_TC4DATA_8822B 0xffffff
#define BIT_TC4DATA_8822B(x) \
(((x) & BIT_MASK_TC4DATA_8822B) << BIT_SHIFT_TC4DATA_8822B)
#define BIT_GET_TC4DATA_8822B(x) \
(((x) >> BIT_SHIFT_TC4DATA_8822B) & BIT_MASK_TC4DATA_8822B)
/* 2 REG_TCUNIT_BASE_8822B */
#define BIT_SHIFT_TCUNIT_BASE_8822B 0
#define BIT_MASK_TCUNIT_BASE_8822B 0x3fff
#define BIT_TCUNIT_BASE_8822B(x) \
(((x) & BIT_MASK_TCUNIT_BASE_8822B) << BIT_SHIFT_TCUNIT_BASE_8822B)
#define BIT_GET_TCUNIT_BASE_8822B(x) \
(((x) >> BIT_SHIFT_TCUNIT_BASE_8822B) & BIT_MASK_TCUNIT_BASE_8822B)
/* 2 REG_TC5_CTRL_8822B */
#define BIT_TC5INT_EN_8822B BIT(26)
#define BIT_TC5MODE_8822B BIT(25)
#define BIT_TC5EN_8822B BIT(24)
#define BIT_SHIFT_TC5DATA_8822B 0
#define BIT_MASK_TC5DATA_8822B 0xffffff
#define BIT_TC5DATA_8822B(x) \
(((x) & BIT_MASK_TC5DATA_8822B) << BIT_SHIFT_TC5DATA_8822B)
#define BIT_GET_TC5DATA_8822B(x) \
(((x) >> BIT_SHIFT_TC5DATA_8822B) & BIT_MASK_TC5DATA_8822B)
/* 2 REG_TC6_CTRL_8822B */
#define BIT_TC6INT_EN_8822B BIT(26)
#define BIT_TC6MODE_8822B BIT(25)
#define BIT_TC6EN_8822B BIT(24)
#define BIT_SHIFT_TC6DATA_8822B 0
#define BIT_MASK_TC6DATA_8822B 0xffffff
#define BIT_TC6DATA_8822B(x)