| commit | d20adc5b4362a3fece406d4ce668eb924cb1f1dc | [log] [tgz] |
|---|---|---|
| author | Jacopo Mondi <jacopo@jmondi.org> | Thu Jun 16 16:31:58 2022 +0200 |
| committer | Jacopo Mondi <jacopo.mondi@ideasonboard.com> | Thu Feb 23 12:13:50 2023 +0100 |
| tree | a0b508a0aa9f4c3424c7e62519af5175c5234b1f | |
| parent | 40e0fba1f0a7a82aed594390c678645363ddce64 [diff] |
arm64: dts: freescale: icore: edimm2.2: Add AR0521 Maintain the CSI-2 timings commented out in DTS (they do not take effect in mainline but do on the CSI-2 downstream driver) for reference. Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>