| commit | e61f487fd596ce570e87ccfdc0a7fc9fa87aced9 | [log] [tgz] |
|---|---|---|
| author | Chew, Chiau Ee <chiau.ee.chew@intel.com> | Fri Jun 13 23:57:25 2014 +0800 |
| committer | Mark Brown <broonie@linaro.org> | Tue Jun 17 15:45:52 2014 +0100 |
| tree | 7f7ac8e9170d7c41cb49f2abde20542e80309df2 | |
| parent | 01d7aafb3fbaafe2403780ef9ed497b3289ab1b9 [diff] |
spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI It was observed that after module removal followed by insertion, the SW mode chipselect is not properly set. Thus causing transfer failure due to incorrect CS toggling. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>