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asm-cris
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cache.h
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#ifndef
_ASM_CACHE_H
#define
_ASM_CACHE_H
/* Etrax 100LX have 32-byte cache-lines. When we add support for future chips
* here should be a check for CPU type.
*/
#define
L1_CACHE_BYTES
32
#endif
/* _ASM_CACHE_H */