blob: ee26afe2408e81e2b3eb2d1e587cc254bb1553d4 [file] [log] [blame]
/************************************************************************
* Linux driver for *
* ICP vortex GmbH: GDT ISA/EISA/PCI Disk Array Controllers *
* Intel Corporation: Storage RAID Controllers *
* *
* gdth.c *
* Copyright (C) 1995-03 ICP vortex, an Intel company, Achim Leubner *
* <achim.leubner@intel.com> *
* *
* Additions/Fixes: Boji Tony Kannanthanam *
* <boji.t.kannanthanam@intel.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published *
* by the Free Software Foundation; either version 2 of the License, *
* or (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this kernel; if not, write to the Free Software *
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
* *
* Tested with Linux 1.2.13, ..., 2.2.20, ..., 2.4.20 *
* *
* $Log: gdth.c,v $
* Revision 1.62 2003/02/27 15:01:59 achim
* Dynamic DMA mapping implemented
* New (character device) IOCTL interface added
* Other controller related changes made
*
* Revision 1.61 2002/11/08 13:09:52 boji
* Added support for XSCALE based RAID Controllers
* Fixed SCREENSERVICE initialization in SMP cases
* Added checks for gdth_polling before GDTH_HA_LOCK
*
* Revision 1.60 2002/02/05 09:35:22 achim
* MODULE_LICENSE only if kernel >= 2.4.11
*
* Revision 1.59 2002/01/30 09:46:33 achim
* Small changes
*
* Revision 1.58 2002/01/29 15:30:02 achim
* Set default value of shared_access to Y
* New status S_CACHE_RESERV for clustering added
*
* Revision 1.57 2001/08/21 11:16:35 achim
* Bugfix free_irq()
*
* Revision 1.56 2001/08/09 11:19:39 achim
* Scsi_Host_Template changes
*
* Revision 1.55 2001/08/09 10:11:28 achim
* Command HOST_UNFREEZE_IO before cache service init.
*
* Revision 1.54 2001/07/20 13:48:12 achim
* Expand: gdth_analyse_hdrive() removed
*
* Revision 1.53 2001/07/17 09:52:49 achim
* Small OEM related change
*
* Revision 1.52 2001/06/19 15:06:20 achim
* New host command GDT_UNFREEZE_IO added
*
* Revision 1.51 2001/05/22 06:42:37 achim
* PCI: Subdevice ID added
*
* Revision 1.50 2001/05/17 13:42:16 achim
* Support for Intel Storage RAID Controllers added
*
* Revision 1.50 2001/05/17 12:12:34 achim
* Support for Intel Storage RAID Controllers added
*
* Revision 1.49 2001/03/15 15:07:17 achim
* New __setup interface for boot command line options added
*
* Revision 1.48 2001/02/06 12:36:28 achim
* Bugfix Cluster protocol
*
* Revision 1.47 2001/01/10 14:42:06 achim
* New switch shared_access added
*
* Revision 1.46 2001/01/09 08:11:35 achim
* gdth_command() removed
* meaning of Scsi_Pointer members changed
*
* Revision 1.45 2000/11/16 12:02:24 achim
* Changes for kernel 2.4
*
* Revision 1.44 2000/10/11 08:44:10 achim
* Clustering changes: New flag media_changed added
*
* Revision 1.43 2000/09/20 12:59:01 achim
* DPMEM remap functions for all PCI controller types implemented
* Small changes for ia64 platform
*
* Revision 1.42 2000/07/20 09:04:50 achim
* Small changes for kernel 2.4
*
* Revision 1.41 2000/07/04 14:11:11 achim
* gdth_analyse_hdrive() added to rescan drives after online expansion
*
* Revision 1.40 2000/06/27 11:24:16 achim
* Changes Clustering, Screenservice
*
* Revision 1.39 2000/06/15 13:09:04 achim
* Changes for gdth_do_cmd()
*
* Revision 1.38 2000/06/15 12:08:43 achim
* Bugfix gdth_sync_event(), service SCREENSERVICE
* Data direction for command 0xc2 changed to DOU
*
* Revision 1.37 2000/05/25 13:50:10 achim
* New driver parameter virt_ctr added
*
* Revision 1.36 2000/05/04 08:50:46 achim
* Event buffer now in gdth_ha_str
*
* Revision 1.35 2000/03/03 10:44:08 achim
* New event_string only valid for the RP controller family
*
* Revision 1.34 2000/03/02 14:55:29 achim
* New mechanism for async. event handling implemented
*
* Revision 1.33 2000/02/21 15:37:37 achim
* Bugfix Alpha platform + DPMEM above 4GB
*
* Revision 1.32 2000/02/14 16:17:37 achim
* Bugfix sense_buffer[] + raw devices
*
* Revision 1.31 2000/02/10 10:29:00 achim
* Delete sense_buffer[0], if command OK
*
* Revision 1.30 1999/11/02 13:42:39 achim
* ARRAY_DRV_LIST2 implemented
* Now 255 log. and 100 host drives supported
*
* Revision 1.29 1999/10/05 13:28:47 achim
* GDT_CLUST_RESET added
*
* Revision 1.28 1999/08/12 13:44:54 achim
* MOUNTALL removed
* Cluster drives -> removeable drives
*
* Revision 1.27 1999/06/22 07:22:38 achim
* Small changes
*
* Revision 1.26 1999/06/10 16:09:12 achim
* Cluster Host Drive support: Bugfixes
*
* Revision 1.25 1999/06/01 16:03:56 achim
* gdth_init_pci(): Manipulate config. space to start RP controller
*
* Revision 1.24 1999/05/26 11:53:06 achim
* Cluster Host Drive support added
*
* Revision 1.23 1999/03/26 09:12:31 achim
* Default value for hdr_channel set to 0
*
* Revision 1.22 1999/03/22 16:27:16 achim
* Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
*
* Revision 1.21 1999/03/16 13:40:34 achim
* Problems with reserved drives solved
* gdth_eh_bus_reset() implemented
*
* Revision 1.20 1999/03/10 09:08:13 achim
* Bugfix: Corrections in gdth_direction_tab[] made
* Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
*
* Revision 1.19 1999/03/05 14:38:16 achim
* Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
* -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
* INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
* with BIOS disabled and memory test set to Intensive
* Enhanced /proc support
*
* Revision 1.18 1999/02/24 09:54:33 achim
* Command line parameter hdr_channel implemented
* Bugfix for EISA controllers + Linux 2.2.x
*
* Revision 1.17 1998/12/17 15:58:11 achim
* Command line parameters implemented
* Changes for Alpha platforms
* PCI controller scan changed
* SMP support improved (spin_lock_irqsave(),...)
* New async. events, new scan/reserve commands included
*
* Revision 1.16 1998/09/28 16:08:46 achim
* GDT_PCIMPR: DPMEM remapping, if required
* mdelay() added
*
* Revision 1.15 1998/06/03 14:54:06 achim
* gdth_delay(), gdth_flush() implemented
* Bugfix: gdth_release() changed
*
* Revision 1.14 1998/05/22 10:01:17 achim
* mj: pcibios_strerror() removed
* Improved SMP support (if version >= 2.1.95)
* gdth_halt(): halt_called flag added (if version < 2.1)
*
* Revision 1.13 1998/04/16 09:14:57 achim
* Reserve drives (for raw service) implemented
* New error handling code enabled
* Get controller name from board_info() IOCTL
* Final round of PCI device driver patches by Martin Mares
*
* Revision 1.12 1998/03/03 09:32:37 achim
* Fibre channel controller support added
*
* Revision 1.11 1998/01/27 16:19:14 achim
* SA_SHIRQ added
* add_timer()/del_timer() instead of GDTH_TIMER
* scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
* New error handling included
*
* Revision 1.10 1997/10/31 12:29:57 achim
* Read heads/sectors from host drive
*
* Revision 1.9 1997/09/04 10:07:25 achim
* IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
* register_reboot_notifier() to get a notify on shutown used
*
* Revision 1.8 1997/04/02 12:14:30 achim
* Version 1.00 (see gdth.h), tested with kernel 2.0.29
*
* Revision 1.7 1997/03/12 13:33:37 achim
* gdth_reset() changed, new async. events
*
* Revision 1.6 1997/03/04 14:01:11 achim
* Shutdown routine gdth_halt() implemented
*
* Revision 1.5 1997/02/21 09:08:36 achim
* New controller included (RP, RP1, RP2 series)
* IOCTL interface implemented
*
* Revision 1.4 1996/07/05 12:48:55 achim
* Function gdth_bios_param() implemented
* New constant GDTH_MAXC_P_L inserted
* GDT_WRITE_THR, GDT_EXT_INFO implemented
* Function gdth_reset() changed
*
* Revision 1.3 1996/05/10 09:04:41 achim
* Small changes for Linux 1.2.13
*
* Revision 1.2 1996/05/09 12:45:27 achim
* Loadable module support implemented
* /proc support corrections made
*
* Revision 1.1 1996/04/11 07:35:57 achim
* Initial revision
*
************************************************************************/
#ident "$Id: gdth.c,v 1.62 2003/02/27 15:01:59 achim Exp $"
/* All GDT Disk Array Controllers are fully supported by this driver.
* This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
* PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
* list of all controller types.
*
* If you have one or more GDT3000/3020 EISA controllers with
* controller BIOS disabled, you have to set the IRQ values with the
* command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
* the IRQ values for the EISA controllers.
*
* After the optional list of IRQ values, other possible
* command line options are:
* disable:Y disable driver
* disable:N enable driver
* reserve_mode:0 reserve no drives for the raw service
* reserve_mode:1 reserve all not init., removable drives
* reserve_mode:2 reserve all not init. drives
* reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with
* h- controller no., b- channel no.,
* t- target ID, l- LUN
* reverse_scan:Y reverse scan order for PCI controllers
* reverse_scan:N scan PCI controllers like BIOS
* max_ids:x x - target ID count per channel (1..MAXID)
* rescan:Y rescan all channels/IDs
* rescan:N use all devices found until now
* virt_ctr:Y map every channel to a virtual controller
* virt_ctr:N use multi channel support
* hdr_channel:x x - number of virtual bus for host drives
* shared_access:Y disable driver reserve/release protocol to
* access a shared resource from several nodes,
* appropiate controller firmware required
* shared_access:N enable driver reserve/release protocol
*
* The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
* max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
* shared_access:Y".
* Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
*
* When loading the gdth driver as a module, the same options are available.
* You can set the IRQs with "IRQ=...". However, the syntax to specify the
* options changes slightly. You must replace all ',' between options
* with ' ' and all ':' with '=' and you must use
* '1' in place of 'Y' and '0' in place of 'N'.
*
* Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
* max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0"
* The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
*/
/* The meaning of the Scsi_Pointer members in this driver is as follows:
* ptr: Chaining
* this_residual: Command priority
* buffer: phys. DMA sense buffer
* dma_handle: phys. DMA buffer (kernel >= 2.4.0)
* buffers_residual: Timeout value
* Status: Command status (gdth_do_cmd()), DMA mem. mappings
* Message: Additional info (gdth_do_cmd()), DMA direction
* have_data_in: Flag for gdth_wait_completion()
* sent_command: Opcode special command
* phase: Service/parameter/return code special command
*/
/* default: activate /proc and character device IOCTL interface */
#define GDTH_IOCTL_PROC
#define GDTH_IOCTL_CHRDEV
#include <linux/module.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/in.h>
#include <linux/proc_fs.h>
#include <linux/time.h>
#include <linux/timer.h>
#ifdef GDTH_RTC
#include <linux/mc146818rtc.h>
#endif
#if LINUX_VERSION_CODE >= 0x020100
#include <linux/reboot.h>
#else
#include <linux/bios32.h>
#endif
#include <asm/dma.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#if LINUX_VERSION_CODE >= 0x020322
#include <linux/spinlock.h>
#elif LINUX_VERSION_CODE >= 0x02015F
#include <asm/spinlock.h>
#endif
#if LINUX_VERSION_CODE >= 0x010300
#include <linux/blk.h>
#else
#include "../block/blk.h"
#endif
#include "scsi.h"
#include "hosts.h"
#if LINUX_VERSION_CODE < 0x020503
#include "sd.h"
#endif
#include "gdth.h"
static void gdth_delay(int milliseconds);
static void gdth_eval_mapping(ulong32 size, int *cyls, int *heads, int *secs);
#if LINUX_VERSION_CODE >= 0x010346
static void gdth_interrupt(int irq,void *dev_id,struct pt_regs *regs);
#else
static void gdth_interrupt(int irq,struct pt_regs *regs);
#endif
static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
static int gdth_async_event(int hanum);
static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
static void gdth_next(int hanum);
static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
ushort idx, gdth_evt_data *evt);
static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
gdth_evt_str *estr);
static void gdth_clear_events(void);
static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
char *buffer,ushort count);
static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
static int gdth_search_eisa(ushort eisa_adr);
static int gdth_search_isa(ulong32 bios_adr);
static int gdth_search_pci(gdth_pci_str *pcistr);
static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
ushort vendor, ushort dev);
static void gdth_sort_pci(gdth_pci_str *pcistr, int cnt);
static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
static void gdth_enable_int(int hanum);
static int gdth_get_status(unchar *pIStatus,int irq);
static int gdth_test_busy(int hanum);
static int gdth_get_cmd_index(int hanum);
static void gdth_release_event(int hanum);
static int gdth_wait(int hanum,int index,ulong32 time);
static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
ulong32 p2,ulong32 p3);
static int gdth_search_drives(int hanum);
static int gdth_analyse_hdrive(int hanum, ushort hdrive);
static void *gdth_mmap(ulong paddr, ulong size);
static void gdth_munmap(void *addr);
static const char *gdth_ctr_name(int hanum);
#ifdef GDTH_IOCTL_CHRDEV
static int gdth_open(struct inode *inode, struct file *filep);
static int gdth_close(struct inode *inode, struct file *filep);
static int gdth_ioctl(struct inode *inode, struct file *filep,
unsigned int cmd, unsigned long arg);
#endif
#if LINUX_VERSION_CODE >= 0x010300
static void gdth_flush(int hanum);
#if LINUX_VERSION_CODE >= 0x020100
static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
#else
static int halt_called = FALSE;
void gdth_halt(void);
#endif
#endif
#ifdef DEBUG_GDTH
static unchar DebugState = DEBUG_GDTH;
#ifdef __SERIAL__
#define MAX_SERBUF 160
static void ser_init(void);
static void ser_puts(char *str);
static void ser_putc(char c);
static int ser_printk(const char *fmt, ...);
static char strbuf[MAX_SERBUF+1];
#ifdef __COM2__
#define COM_BASE 0x2f8
#else
#define COM_BASE 0x3f8
#endif
static void ser_init()
{
unsigned port=COM_BASE;
outb(0x80,port+3);
outb(0,port+1);
/* 19200 Baud, if 9600: outb(12,port) */
outb(6, port);
outb(3,port+3);
outb(0,port+1);
/*
ser_putc('I');
ser_putc(' ');
*/
}
static void ser_puts(char *str)
{
char *ptr;
ser_init();
for (ptr=str;*ptr;++ptr)
ser_putc(*ptr);
}
static void ser_putc(char c)
{
unsigned port=COM_BASE;
while ((inb(port+5) & 0x20)==0);
outb(c,port);
if (c==0x0a)
{
while ((inb(port+5) & 0x20)==0);
outb(0x0d,port);
}
}
static int ser_printk(const char *fmt, ...)
{
va_list args;
int i;
va_start(args,fmt);
i = vsprintf(strbuf,fmt,args);
ser_puts(strbuf);
va_end(args);
return i;
}
#define TRACE(a) {if (DebugState==1) {ser_printk a;}}
#define TRACE2(a) {if (DebugState==1 || DebugState==2) {ser_printk a;}}
#define TRACE3(a) {if (DebugState!=0) {ser_printk a;}}
#else /* !__SERIAL__ */
#define TRACE(a) {if (DebugState==1) {printk a;}}
#define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}}
#define TRACE3(a) {if (DebugState!=0) {printk a;}}
#endif
#else /* !DEBUG */
#define TRACE(a)
#define TRACE2(a)
#define TRACE3(a)
#endif
#ifdef GDTH_STATISTICS
static ulong32 max_rq=0, max_index=0, max_sg=0;
static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
static struct timer_list gdth_timer;
#endif
#define PTR2USHORT(a) (ushort)(ulong)(a)
#define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
#define INDEX_OK(i,t) ((i)<sizeof(t)/sizeof((t)[0]))
#define NUMDATA(a) ( (gdth_num_str *)((a)->hostdata))
#define HADATA(a) (&((gdth_ext_str *)((a)->hostdata))->haext)
#define CMDDATA(a) (&((gdth_ext_str *)((a)->hostdata))->cmdext)
#define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
#if LINUX_VERSION_CODE < 0x010300
static void *gdth_mmap(ulong paddr, ulong size)
{
if (paddr >= high_memory)
return NULL;
else
return (void *)paddr;
}
static void gdth_munmap(void *addr)
{
}
inline ulong32 virt_to_phys(volatile void *addr)
{
return (ulong32)addr;
}
inline void *phys_to_virt(ulong32 addr)
{
return (void *)addr;
}
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt
#define gdth_readb(addr) (*(volatile unchar *)(addr))
#define gdth_readw(addr) (*(volatile ushort *)(addr))
#define gdth_readl(addr) (*(volatile ulong32 *)(addr))
#define gdth_writeb(b,addr) (*(volatile unchar *)(addr) = (b))
#define gdth_writew(b,addr) (*(volatile ushort *)(addr) = (b))
#define gdth_writel(b,addr) (*(volatile ulong32 *)(addr) = (b))
#define memset_io(a,b,c) memset((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
#define PCI_SLOT(devfn) ((devfn >> 3) & 0x1f)
#elif LINUX_VERSION_CODE < 0x020100
static int remapped = FALSE;
static void *gdth_mmap(ulong paddr, ulong size)
{
if ( paddr >= high_memory) {
remapped = TRUE;
return vremap(paddr, size);
} else {
return (void *)paddr;
}
}
static void gdth_munmap(void *addr)
{
if (remapped)
vfree(addr);
remapped = FALSE;
}
#define gdth_readb(addr) readb((ulong)(addr))
#define gdth_readw(addr) readw((ulong)(addr))
#define gdth_readl(addr) (ulong32)readl((ulong)(addr))
#define gdth_writeb(b,addr) writeb((b),(ulong)(addr))
#define gdth_writew(b,addr) writew((b),(ulong)(addr))
#define gdth_writel(b,addr) writel((ulong32)(b),(ulong)(addr))
#else
static void *gdth_mmap(ulong paddr, ulong size)
{
return ioremap(paddr, size);
}
static void gdth_munmap(void *addr)
{
return iounmap(addr);
}
#define gdth_readb(addr) readb((ulong)(addr))
#define gdth_readw(addr) readw((ulong)(addr))
#define gdth_readl(addr) (ulong32)readl((ulong)(addr))
#define gdth_writeb(b,addr) writeb((b),(ulong)(addr))
#define gdth_writew(b,addr) writew((b),(ulong)(addr))
#define gdth_writel(b,addr) writel((ulong32)(b),(ulong)(addr))
#endif
static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */
static unchar gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */
static unchar gdth_polling; /* polling if TRUE */
static unchar gdth_from_wait = FALSE; /* gdth_wait() */
static int wait_index,wait_hanum; /* gdth_wait() */
static int gdth_ctr_count = 0; /* controller count */
static int gdth_ctr_vcount = 0; /* virt. ctr. count */
static int gdth_ctr_released = 0; /* gdth_release() */
static struct Scsi_Host *gdth_ctr_tab[MAXHA]; /* controller table */
static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS]; /* virt. ctr. table */
static unchar gdth_write_through = FALSE; /* write through */
static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */
static int elastidx;
static int eoldidx;
#ifdef GDTH_IOCTL_CHRDEV
static int major;
#endif
#define DIN 1 /* IN data direction */
#define DOU 2 /* OUT data direction */
#define DNO DIN /* no data transfer */
#define DUN DIN /* unknown data direction */
static unchar gdth_direction_tab[0x100] = {
DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
};
/* __initfunc, __initdata macros */
#if LINUX_VERSION_CODE >= 0x020322
#define GDTH_INITFUNC(type, func) type __init func
#include <linux/init.h>
#elif LINUX_VERSION_CODE >= 0x020126
#define GDTH_INITFUNC(type, func) __initfunc(type func)
#include <linux/init.h>
#else
#define GDTH_INITFUNC(type, func) type func
#define __initdata
#define __init
#endif
#if LINUX_VERSION_CODE >= 0x020503
#define GDTH_INIT_LOCK_HA(ha) spin_lock_init(&(ha)->smp_lock)
#define GDTH_LOCK_HA(ha,flags) spin_lock_irqsave(&(ha)->smp_lock,flags)
#define GDTH_UNLOCK_HA(ha,flags) spin_unlock_irqrestore(&(ha)->smp_lock,flags)
#define GDTH_LOCK_SCSI_DONE(dev, flags) spin_lock_irqsave(dev->host_lock,flags)
#define GDTH_UNLOCK_SCSI_DONE(dev, flags) spin_unlock_irqrestore(dev->host_lock,flags)
#define GDTH_LOCK_SCSI_DOCMD(dev) spin_lock_irq(dev->host_lock)
#define GDTH_UNLOCK_SCSI_DOCMD(dev) spin_unlock_irq(dev->host_lock)
#elif LINUX_VERSION_CODE >= 0x02015F
#define GDTH_INIT_LOCK_HA(ha) spin_lock_init(&(ha)->smp_lock)
#define GDTH_LOCK_HA(ha,flags) spin_lock_irqsave(&(ha)->smp_lock,flags)
#define GDTH_UNLOCK_HA(ha,flags) spin_unlock_irqrestore(&(ha)->smp_lock,flags)
#define GDTH_LOCK_SCSI_DONE(flags) spin_lock_irqsave(&io_request_lock,flags)
#define GDTH_UNLOCK_SCSI_DONE(flags) spin_unlock_irqrestore(&io_request_lock,flags)
#define GDTH_LOCK_SCSI_DOCMD() spin_lock_irq(&io_request_lock)
#define GDTH_UNLOCK_SCSI_DOCMD() spin_unlock_irq(&io_request_lock)
#else
#define GDTH_INIT_LOCK_HA(ha) do {} while (0)
#define GDTH_LOCK_HA(ha,flags) do {save_flags(flags); cli();} while (0)
#define GDTH_UNLOCK_HA(ha,flags) do {restore_flags(flags);} while (0)
#define GDTH_LOCK_SCSI_DONE(flags) do {} while (0)
#define GDTH_UNLOCK_SCSI_DONE(flags) do {} while (0)
#define GDTH_LOCK_SCSI_DOCMD() do {} while (0)
#define GDTH_UNLOCK_SCSI_DOCMD() do {} while (0)
#endif
/* LILO and modprobe/insmod parameters */
/* IRQ list for GDT3000/3020 EISA controllers */
static int irq[MAXHA] __initdata =
{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
/* disable driver flag */
static int disable __initdata = 0;
/* reserve flag */
static int reserve_mode = 1;
/* reserve list */
static int reserve_list[MAX_RES_ARGS] =
{0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
/* scan order for PCI controllers */
static int reverse_scan = 0;
/* virtual channel for the host drives */
static int hdr_channel = 0;
/* max. IDs per channel */
static int max_ids = MAXID;
/* rescan all IDs */
static int rescan = 0;
/* map channels to virtual controllers */
static int virt_ctr = 0;
/* shared access */
static int shared_access = 1;
#ifdef MODULE
#if LINUX_VERSION_CODE >= 0x02011A
/* parameters for modprobe/insmod */
MODULE_PARM(irq, "i");
MODULE_PARM(disable, "i");
MODULE_PARM(reserve_mode, "i");
MODULE_PARM(reserve_list, "4-" __MODULE_STRING(MAX_RES_ARGS) "i");
MODULE_PARM(reverse_scan, "i");
MODULE_PARM(hdr_channel, "i");
MODULE_PARM(max_ids, "i");
MODULE_PARM(rescan, "i");
MODULE_PARM(virt_ctr, "i");
MODULE_PARM(shared_access, "i");
MODULE_AUTHOR("Achim Leubner");
#endif
#if LINUX_VERSION_CODE >= 0x02040B
MODULE_LICENSE("GPL");
#endif
#endif
#ifdef GDTH_IOCTL_CHRDEV
/* ioctl interface */
static struct file_operations gdth_fops = {
ioctl:gdth_ioctl,
open:gdth_open,
release:gdth_close,
};
#endif
/* /proc support */
#if LINUX_VERSION_CODE >= 0x010300
#include <linux/stat.h>
#if LINUX_VERSION_CODE < 0x020322
struct proc_dir_entry proc_scsi_gdth = {
PROC_SCSI_GDTH, 4, "gdth",
S_IFDIR | S_IRUGO | S_IXUGO, 2
};
#endif
#include "gdth_proc.h"
#include "gdth_proc.c"
#endif
#if LINUX_VERSION_CODE >= 0x020100
/* notifier block to get a notify on system shutdown/halt/reboot */
static struct notifier_block gdth_notifier = {
gdth_halt, NULL, 0
};
#endif
static void gdth_delay(int milliseconds)
{
if (milliseconds == 0) {
udelay(1);
} else {
#if LINUX_VERSION_CODE >= 0x020168
mdelay(milliseconds);
#else
int i;
for (i = 0; i < milliseconds; ++i)
udelay(1000);
#endif
}
}
static void gdth_eval_mapping(ulong32 size, int *cyls, int *heads, int *secs)
{
*cyls = size /HEADS/SECS;
if (*cyls <= MAXCYLS) {
*heads = HEADS;
*secs = SECS;
} else { /* too high for 64*32 */
*cyls = size /MEDHEADS/MEDSECS;
if (*cyls <= MAXCYLS) {
*heads = MEDHEADS;
*secs = MEDSECS;
} else { /* too high for 127*63 */
*cyls = size /BIGHEADS/BIGSECS;
*heads = BIGHEADS;
*secs = BIGSECS;
}
}
}
/* controller search and initialization functions */
GDTH_INITFUNC(static int, gdth_search_eisa(ushort eisa_adr))
{
ulong32 id;
TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
id = inl(eisa_adr+ID0REG);
if (id == GDT3A_ID || id == GDT3B_ID) { /* GDT3000A or GDT3000B */
if ((inb(eisa_adr+EISAREG) & 8) == 0)
return 0; /* not EISA configured */
return 1;
}
if (id == GDT3_ID) /* GDT3000 */
return 1;
return 0;
}
GDTH_INITFUNC(static int, gdth_search_isa(ulong32 bios_adr))
{
void *addr;
ulong32 id;
TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
if ((addr = gdth_mmap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
id = gdth_readl(addr);
gdth_munmap(addr);
if (id == GDT2_ID) /* GDT2000 */
return 1;
}
return 0;
}
GDTH_INITFUNC(static int, gdth_search_pci(gdth_pci_str *pcistr))
{
ushort device, cnt;
TRACE(("gdth_search_pci()\n"));
cnt = 0;
for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
PCI_DEVICE_ID_VORTEX_GDTNEWRX);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_SRC);
gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_SRC_XSCALE);
return cnt;
}
#if LINUX_VERSION_CODE >= 0x20363
/* Vortex only makes RAID controllers.
* We do not really want to specify all 550 ids here, so wildcard match.
*/
static struct pci_device_id gdthtable[] __devinitdata = {
{PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
{PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
{PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
{0}
};
MODULE_DEVICE_TABLE(pci,gdthtable);
#endif
GDTH_INITFUNC(static void, gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
ushort vendor, ushort device))
{
ulong base0, base1, base2;
#if LINUX_VERSION_CODE >= 0x2015C
struct pci_dev *pdev;
#else
int error;
ushort idx;
#endif
TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
*cnt, vendor, device));
#if LINUX_VERSION_CODE >= 0x20363
pdev = NULL;
while ((pdev = pci_find_device(vendor, device, pdev))
!= NULL) {
if (pci_enable_device(pdev))
continue;
if (*cnt >= MAXHA)
return;
/* GDT PCI controller found, resources are already in pdev */
pcistr[*cnt].pdev = pdev;
pcistr[*cnt].vendor_id = vendor;
pcistr[*cnt].device_id = device;
pcistr[*cnt].subdevice_id = pdev->subsystem_device;
pcistr[*cnt].bus = pdev->bus->number;
pcistr[*cnt].device_fn = pdev->devfn;
pcistr[*cnt].irq = pdev->irq;
base0 = pci_resource_flags(pdev, 0);
base1 = pci_resource_flags(pdev, 1);
base2 = pci_resource_flags(pdev, 2);
if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
if (!(base0 & IORESOURCE_MEM))
continue;
pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
} else { /* GDT6110, GDT6120, .. */
if (!(base0 & IORESOURCE_MEM) ||
!(base2 & IORESOURCE_MEM) ||
!(base1 & IORESOURCE_IO))
continue;
pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
pcistr[*cnt].io = pci_resource_start(pdev, 1);
}
TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
pcistr[*cnt].irq, pcistr[*cnt].dpmem));
(*cnt)++;
}
#elif LINUX_VERSION_CODE >= 0x2015C
pdev = NULL;
while ((pdev = pci_find_device(vendor, device, pdev))
!= NULL) {
if (*cnt >= MAXHA)
return;
/* GDT PCI controller found, resources are already in pdev */
pcistr[*cnt].pdev = pdev;
pcistr[*cnt].vendor_id = vendor;
pcistr[*cnt].device_id = device;
pcistr[*cnt].bus = pdev->bus->number;
pcistr[*cnt].device_fn = pdev->devfn;
pcibios_read_config_word(pcistr[*cnt].bus, pcistr[*cnt].device_fn,
PCI_SUBSYSTEM_ID, &pcistr[*cnt].subdevice_id);
pcistr[*cnt].irq = pdev->irq;
base0 = pdev->base_address[0];
base1 = pdev->base_address[1];
base2 = pdev->base_address[2];
if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY)
continue;
pcistr[*cnt].dpmem = base0 & PCI_BASE_ADDRESS_MEM_MASK;
} else { /* GDT6110, GDT6120, .. */
if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY ||
(base2 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY ||
(base1 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_IO)
continue;
pcistr[*cnt].dpmem = base2 & PCI_BASE_ADDRESS_MEM_MASK;
pcistr[*cnt].io_mm = base0 & PCI_BASE_ADDRESS_MEM_MASK;
pcistr[*cnt].io = base1 & PCI_BASE_ADDRESS_IO_MASK;
}
TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
pcistr[*cnt].irq, pcistr[*cnt].dpmem));
(*cnt)++;
}
#else
idx = 0;
while (!pcibios_find_device(vendor, device, idx++,
&pcistr[*cnt].bus,&pcistr[*cnt].device_fn)) {
if (*cnt >= MAXHA)
return;
/* GDT PCI ctr. found, now read resources from config space */
#if LINUX_VERSION_CODE >= 0x010300
#define GDTH_BASEP (int *)
#else
#define GDTH_BASEP
#endif
if ((error = pcibios_read_config_dword(pcistr[*cnt].bus,
pcistr[*cnt].device_fn,
PCI_BASE_ADDRESS_0,
GDTH_BASEP&base0)) ||
(error = pcibios_read_config_dword(pcistr[*cnt].bus,
pcistr[*cnt].device_fn,
PCI_BASE_ADDRESS_1,
GDTH_BASEP&base1)) ||
(error = pcibios_read_config_dword(pcistr[*cnt].bus,
pcistr[*cnt].device_fn,
PCI_BASE_ADDRESS_2,
GDTH_BASEP&base2)) ||
(error = pcibios_read_config_word(pcistr[*cnt].bus,
pcistr[*cnt].device_fn,
PCI_SUBSYSTEM_ID,
&pcistr[*cnt].subdevice_id)) ||
(error = pcibios_read_config_byte(pcistr[*cnt].bus,
pcistr[*cnt].device_fn,
PCI_INTERRUPT_LINE,
&pcistr[*cnt].irq))) {
printk("GDT-PCI: error %d reading configuration space", error);
continue;
}
pcistr[*cnt].vendor_id = vendor;
pcistr[*cnt].device_id = device;
if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY)
continue;
pcistr[*cnt].dpmem = base0 & PCI_BASE_ADDRESS_MEM_MASK;
} else { /* GDT6110, GDT6120, .. */
if ((base0 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY ||
(base2 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_MEMORY ||
(base1 & PCI_BASE_ADDRESS_SPACE) !=
PCI_BASE_ADDRESS_SPACE_IO)
continue;
pcistr[*cnt].dpmem = base2 & PCI_BASE_ADDRESS_MEM_MASK;
pcistr[*cnt].io_mm = base0 & PCI_BASE_ADDRESS_MEM_MASK;
pcistr[*cnt].io = base1 & PCI_BASE_ADDRESS_IO_MASK;
}
TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
pcistr[*cnt].irq, pcistr[*cnt].dpmem));
(*cnt)++;
}
#endif
}
GDTH_INITFUNC(static void, gdth_sort_pci(gdth_pci_str *pcistr, int cnt))
{
gdth_pci_str temp;
int i, changed;
TRACE(("gdth_sort_pci() cnt %d\n",cnt));
if (cnt == 0)
return;
do {
changed = FALSE;
for (i = 0; i < cnt-1; ++i) {
if (!reverse_scan) {
if ((pcistr[i].bus > pcistr[i+1].bus) ||
(pcistr[i].bus == pcistr[i+1].bus &&
PCI_SLOT(pcistr[i].device_fn) >
PCI_SLOT(pcistr[i+1].device_fn))) {
temp = pcistr[i];
pcistr[i] = pcistr[i+1];
pcistr[i+1] = temp;
changed = TRUE;
}
} else {
if ((pcistr[i].bus < pcistr[i+1].bus) ||
(pcistr[i].bus == pcistr[i+1].bus &&
PCI_SLOT(pcistr[i].device_fn) <
PCI_SLOT(pcistr[i+1].device_fn))) {
temp = pcistr[i];
pcistr[i] = pcistr[i+1];
pcistr[i+1] = temp;
changed = TRUE;
}
}
}
} while (changed);
}
GDTH_INITFUNC(static int, gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha))
{
ulong32 retries,id;
unchar prot_ver,eisacf,i,irq_found;
TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
/* disable board interrupts, deinitialize services */
outb(0xff,eisa_adr+EDOORREG);
outb(0x00,eisa_adr+EDENABREG);
outb(0x00,eisa_adr+EINTENABREG);
outb(0xff,eisa_adr+LDOORREG);
retries = INIT_RETRIES;
gdth_delay(20);
while (inb(eisa_adr+EDOORREG) != 0xff) {
if (--retries == 0) {
printk("GDT-EISA: Initialization error (DEINIT failed)\n");
return 0;
}
gdth_delay(1);
TRACE2(("wait for DEINIT: retries=%d\n",retries));
}
prot_ver = inb(eisa_adr+MAILBOXREG);
outb(0xff,eisa_adr+EDOORREG);
if (prot_ver != PROTOCOL_VERSION) {
printk("GDT-EISA: Illegal protocol version\n");
return 0;
}
ha->bmic = eisa_adr;
ha->brd_phys = (ulong32)eisa_adr >> 12;
outl(0,eisa_adr+MAILBOXREG);
outl(0,eisa_adr+MAILBOXREG+4);
outl(0,eisa_adr+MAILBOXREG+8);
outl(0,eisa_adr+MAILBOXREG+12);
/* detect IRQ */
if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
ha->oem_id = OEM_ID_ICP;
ha->type = GDT_EISA;
ha->stype = id;
outl(1,eisa_adr+MAILBOXREG+8);
outb(0xfe,eisa_adr+LDOORREG);
retries = INIT_RETRIES;
gdth_delay(20);
while (inb(eisa_adr+EDOORREG) != 0xfe) {
if (--retries == 0) {
printk("GDT-EISA: Initialization error (get IRQ failed)\n");
return 0;
}
gdth_delay(1);
}
ha->irq = inb(eisa_adr+MAILBOXREG);
outb(0xff,eisa_adr+EDOORREG);
TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
/* check the result */
if (ha->irq == 0) {
TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
for (i = 0, irq_found = FALSE;
i < MAXHA && irq[i] != 0xff; ++i) {
if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
irq_found = TRUE;
break;
}
}
if (irq_found) {
ha->irq = irq[i];
irq[i] = 0;
printk("GDT-EISA: Can not detect controller IRQ,\n");
printk("Use IRQ setting from command line (IRQ = %d)\n",
ha->irq);
} else {
printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
printk("the controller BIOS or use command line parameters\n");
return 0;
}
}
} else {
eisacf = inb(eisa_adr+EISAREG) & 7;
if (eisacf > 4) /* level triggered */
eisacf -= 4;
ha->irq = gdth_irq_tab[eisacf];
ha->oem_id = OEM_ID_ICP;
ha->type = GDT_EISA;
ha->stype = id;
}
return 1;
}
GDTH_INITFUNC(static int, gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha))
{
register gdt2_dpram_str *dp2_ptr;
int i;
unchar irq_drq,prot_ver;
ulong32 retries;
TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
ha->brd = gdth_mmap(bios_adr, sizeof(gdt2_dpram_str));
if (ha->brd == NULL) {
printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
return 0;
}
dp2_ptr = (gdt2_dpram_str *)ha->brd;
gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
/* reset interface area */
memset_io((char *)&dp2_ptr->u,0,sizeof(dp2_ptr->u));
if (gdth_readl(&dp2_ptr->u) != 0) {
printk("GDT-PCI: Initialization error (DPMEM write error)\n");
gdth_munmap(ha->brd);
return 0;
}
/* disable board interrupts, read DRQ and IRQ */
gdth_writeb(0xff, &dp2_ptr->io.irqdel);
gdth_writeb(0x00, &dp2_ptr->io.irqen);
gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
irq_drq = gdth_readb(&dp2_ptr->io.rq);
for (i=0; i<3; ++i) {
if ((irq_drq & 1)==0)
break;
irq_drq >>= 1;
}
ha->drq = gdth_drq_tab[i];
irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
for (i=1; i<5; ++i) {
if ((irq_drq & 1)==0)
break;
irq_drq >>= 1;
}
ha->irq = gdth_irq_tab[i];
/* deinitialize services */
gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
gdth_writeb(0, &dp2_ptr->io.event);
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
if (--retries == 0) {
printk("GDT-ISA: Initialization error (DEINIT failed)\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]);
gdth_writeb(0, &dp2_ptr->u.ic.Status);
gdth_writeb(0xff, &dp2_ptr->io.irqdel);
if (prot_ver != PROTOCOL_VERSION) {
printk("GDT-ISA: Illegal protocol version\n");
gdth_munmap(ha->brd);
return 0;
}
ha->oem_id = OEM_ID_ICP;
ha->type = GDT_ISA;
ha->ic_all_size = sizeof(dp2_ptr->u);
ha->stype= GDT2_ID;
ha->brd_phys = bios_adr >> 4;
/* special request to controller BIOS */
gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
gdth_writeb(0, &dp2_ptr->io.event);
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
if (--retries == 0) {
printk("GDT-ISA: Initialization error\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
gdth_writeb(0, &dp2_ptr->u.ic.Status);
gdth_writeb(0xff, &dp2_ptr->io.irqdel);
return 1;
}
GDTH_INITFUNC(static int, gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha))
{
register gdt6_dpram_str *dp6_ptr;
register gdt6c_dpram_str *dp6c_ptr;
register gdt6m_dpram_str *dp6m_ptr;
ulong32 retries;
unchar prot_ver;
ushort command;
int i, found = FALSE;
#if LINUX_VERSION_CODE < 0x2015C
int rom_addr;
#endif
TRACE(("gdth_init_pci()\n"));
if (pcistr->vendor_id == PCI_VENDOR_ID_INTEL)
ha->oem_id = OEM_ID_INTEL;
else
ha->oem_id = OEM_ID_ICP;
ha->brd_phys = (pcistr->bus << 8) | (pcistr->device_fn & 0xf8);
ha->stype = (ulong32)pcistr->device_id;
ha->subdevice_id = pcistr->subdevice_id;
ha->irq = pcistr->irq;
#if LINUX_VERSION_CODE >= 0x20400
ha->pdev = pcistr->pdev;
#endif
if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */
TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
ha->brd = gdth_mmap(pcistr->dpmem, sizeof(gdt6_dpram_str));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
/* check and reset interface area */
dp6_ptr = (gdt6_dpram_str *)ha->brd;
gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) {
printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
pcistr->dpmem);
found = FALSE;
for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
gdth_munmap(ha->brd);
ha->brd = gdth_mmap(i, sizeof(ushort));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
if (gdth_readw(ha->brd) != 0xffff) {
TRACE2(("init_pci_old() address 0x%x busy\n", i));
continue;
}
gdth_munmap(ha->brd);
#if LINUX_VERSION_CODE >= 0x2015C
pci_write_config_dword(pcistr->pdev,
PCI_BASE_ADDRESS_0, i);
#else
pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
PCI_BASE_ADDRESS_0, i);
#endif
ha->brd = gdth_mmap(i, sizeof(gdt6_dpram_str));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
dp6_ptr = (gdt6_dpram_str *)ha->brd;
gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) {
printk("GDT-PCI: Use free address at 0x%x\n", i);
found = TRUE;
break;
}
}
if (!found) {
printk("GDT-PCI: No free address found!\n");
gdth_munmap(ha->brd);
return 0;
}
}
memset_io((char *)&dp6_ptr->u,0,sizeof(dp6_ptr->u));
if (gdth_readl(&dp6_ptr->u) != 0) {
printk("GDT-PCI: Initialization error (DPMEM write error)\n");
gdth_munmap(ha->brd);
return 0;
}
/* disable board interrupts, deinit services */
gdth_writeb(0xff, &dp6_ptr->io.irqdel);
gdth_writeb(0x00, &dp6_ptr->io.irqen);;
gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status);
gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
gdth_writeb(0, &dp6_ptr->io.event);
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
if (--retries == 0) {
printk("GDT-PCI: Initialization error (DEINIT failed)\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]);
gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
gdth_writeb(0xff, &dp6_ptr->io.irqdel);
if (prot_ver != PROTOCOL_VERSION) {
printk("GDT-PCI: Illegal protocol version\n");
gdth_munmap(ha->brd);
return 0;
}
ha->type = GDT_PCI;
ha->ic_all_size = sizeof(dp6_ptr->u);
/* special command to controller BIOS */
gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
gdth_writel(0x01, &dp6_ptr->u.ic.S_Info[2]);
gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
gdth_writeb(0, &dp6_ptr->io.event);
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
if (--retries == 0) {
printk("GDT-PCI: Initialization error\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
gdth_writeb(0xff, &dp6_ptr->io.irqdel);
} else if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
ha->plx = (gdt6c_plx_regs *)pcistr->io;
TRACE2(("init_pci_new() dpmem %lx irq %d\n",
pcistr->dpmem,ha->irq));
ha->brd = gdth_mmap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
gdth_munmap(ha->brd);
return 0;
}
/* check and reset interface area */
dp6c_ptr = (gdt6c_dpram_str *)ha->brd;
gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
pcistr->dpmem);
found = FALSE;
for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
gdth_munmap(ha->brd);
ha->brd = gdth_mmap(i, sizeof(ushort));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
if (gdth_readw(ha->brd) != 0xffff) {
TRACE2(("init_pci_plx() address 0x%x busy\n", i));
continue;
}
gdth_munmap(ha->brd);
#if LINUX_VERSION_CODE >= 0x2015C
pci_write_config_dword(pcistr->pdev,
PCI_BASE_ADDRESS_2, i);
#else
pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
PCI_BASE_ADDRESS_2, i);
#endif
ha->brd = gdth_mmap(i, sizeof(gdt6c_dpram_str));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
dp6c_ptr = (gdt6c_dpram_str *)ha->brd;
gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
printk("GDT-PCI: Use free address at 0x%x\n", i);
found = TRUE;
break;
}
}
if (!found) {
printk("GDT-PCI: No free address found!\n");
gdth_munmap(ha->brd);
return 0;
}
}
memset_io((char *)&dp6c_ptr->u,0,sizeof(dp6c_ptr->u));
if (gdth_readl(&dp6c_ptr->u) != 0) {
printk("GDT-PCI: Initialization error (DPMEM write error)\n");
gdth_munmap(ha->brd);
return 0;
}
/* disable board interrupts, deinit services */
outb(0x00,PTR2USHORT(&ha->plx->control1));
outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status);
gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
if (--retries == 0) {
printk("GDT-PCI: Initialization error (DEINIT failed)\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]);
gdth_writeb(0, &dp6c_ptr->u.ic.Status);
if (prot_ver != PROTOCOL_VERSION) {
printk("GDT-PCI: Illegal protocol version\n");
gdth_munmap(ha->brd);
return 0;
}
ha->type = GDT_PCINEW;
ha->ic_all_size = sizeof(dp6c_ptr->u);
/* special command to controller BIOS */
gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
gdth_writel(0x01, &dp6c_ptr->u.ic.S_Info[2]);
gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
if (--retries == 0) {
printk("GDT-PCI: Initialization error\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
gdth_writeb(0, &dp6c_ptr->u.ic.S_Status);
} else { /* MPR */
TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
ha->brd = gdth_mmap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
/* manipulate config. space to enable DPMEM, start RP controller */
#if LINUX_VERSION_CODE >= 0x20363
pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
command |= 6;
pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
if (pci_resource_start(pcistr->pdev, 8) == 1UL)
pci_resource_start(pcistr->pdev, 8) = 0UL;
i = 0xFEFF0001UL;
pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
gdth_delay(1);
pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
pci_resource_start(pcistr->pdev, 8));
#elif LINUX_VERSION_CODE >= 0x2015C
pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
command |= 6;
pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
if (pcistr->pdev->rom_address == 1UL)
pcistr->pdev->rom_address = 0UL;
i = 0xFEFF0001UL;
pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
gdth_delay(1);
pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
pcistr->pdev->rom_address);
#else
pcibios_read_config_word(pcistr->bus, pcistr->device_fn,
PCI_COMMAND, &command);
command |= 6;
pcibios_write_config_word(pcistr->bus, pcistr->device_fn,
PCI_COMMAND, command);
pcibios_read_config_dword(pcistr->bus, pcistr->device_fn,
PCI_ROM_ADDRESS, &rom_addr);
if (rom_addr == 1UL)
rom_addr = 0UL;
i = 0xFEFF0001UL;
pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
PCI_ROM_ADDRESS, i);
gdth_delay(1);
pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
PCI_ROM_ADDRESS, rom_addr);
#endif
/* Ensure that it is safe to access the non HW portions of DPMEM.
* Aditional check needed for Xscale based RAID controllers */
while( ((int)gdth_readb(&((gdt6m_dpram_str *)ha->brd)->i960r.sema0_reg) ) & 3 )
gdth_delay(1);
/* check and reset interface area */
dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
pcistr->dpmem);
found = FALSE;
for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
gdth_munmap(ha->brd);
ha->brd = gdth_mmap(i, sizeof(ushort));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
if (gdth_readw(ha->brd) != 0xffff) {
TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
continue;
}
gdth_munmap(ha->brd);
#if LINUX_VERSION_CODE >= 0x2015C
pci_write_config_dword(pcistr->pdev,
PCI_BASE_ADDRESS_0, i);
#else
pcibios_write_config_dword(pcistr->bus, pcistr->device_fn,
PCI_BASE_ADDRESS_0, i);
#endif
ha->brd = gdth_mmap(i, sizeof(gdt6m_dpram_str));
if (ha->brd == NULL) {
printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
return 0;
}
dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
printk("GDT-PCI: Use free address at 0x%x\n", i);
found = TRUE;
break;
}
}
if (!found) {
printk("GDT-PCI: No free address found!\n");
gdth_munmap(ha->brd);
return 0;
}
}
memset_io((char *)&dp6m_ptr->u,0,sizeof(dp6m_ptr->u));
/* disable board interrupts, deinit services */
gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
&dp6m_ptr->i960r.edoor_en_reg);
gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status);
gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
if (--retries == 0) {
printk("GDT-PCI: Initialization error (DEINIT failed)\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]);
gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
if (prot_ver != PROTOCOL_VERSION) {
printk("GDT-PCI: Illegal protocol version\n");
gdth_munmap(ha->brd);
return 0;
}
ha->type = GDT_PCIMPR;
ha->ic_all_size = sizeof(dp6m_ptr->u);
/* special command to controller BIOS */
gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
gdth_writel(0x01, &dp6m_ptr->u.ic.S_Info[2]);
gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
retries = INIT_RETRIES;
gdth_delay(20);
while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
if (--retries == 0) {
printk("GDT-PCI: Initialization error\n");
gdth_munmap(ha->brd);
return 0;
}
gdth_delay(1);
}
gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
}
return 1;
}
/* controller protocol functions */
GDTH_INITFUNC(static void, gdth_enable_int(int hanum))
{
gdth_ha_str *ha;
ulong flags;
gdt2_dpram_str *dp2_ptr;
gdt6_dpram_str *dp6_ptr;
gdt6m_dpram_str *dp6m_ptr;
TRACE(("gdth_enable_int() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
GDTH_LOCK_HA(ha, flags);
if (ha->type == GDT_EISA) {
outb(0xff, ha->bmic + EDOORREG);
outb(0xff, ha->bmic + EDENABREG);
outb(0x01, ha->bmic + EINTENABREG);
} else if (ha->type == GDT_ISA) {
dp2_ptr = (gdt2_dpram_str *)ha->brd;
gdth_writeb(1, &dp2_ptr->io.irqdel);
gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);
gdth_writeb(1, &dp2_ptr->io.irqen);
} else if (ha->type == GDT_PCI) {
dp6_ptr = (gdt6_dpram_str *)ha->brd;
gdth_writeb(1, &dp6_ptr->io.irqdel);
gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);
gdth_writeb(1, &dp6_ptr->io.irqen);
} else if (ha->type == GDT_PCINEW) {
outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
outb(0x03, PTR2USHORT(&ha->plx->control1));
} else if (ha->type == GDT_PCIMPR) {
dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
&dp6m_ptr->i960r.edoor_en_reg);
}
GDTH_UNLOCK_HA(ha, flags);
}
static int gdth_get_status(unchar *pIStatus,int irq)
{
register gdth_ha_str *ha;
int i;
TRACE(("gdth_get_status() irq %d ctr_count %d\n",
irq,gdth_ctr_count));
*pIStatus = 0;
for (i=0; i<gdth_ctr_count; ++i) {
ha = HADATA(gdth_ctr_tab[i]);
if (ha->irq != (unchar)irq) /* check IRQ */
continue;
if (ha->type == GDT_EISA)
*pIStatus = inb((ushort)ha->bmic + EDOORREG);
else if (ha->type == GDT_ISA)
*pIStatus =
gdth_readb(&((gdt2_dpram_str *)ha->brd)->u.ic.Cmd_Index);
else if (ha->type == GDT_PCI)
*pIStatus =
gdth_readb(&((gdt6_dpram_str *)ha->brd)->u.ic.Cmd_Index);
else if (ha->type == GDT_PCINEW)
*pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
else if (ha->type == GDT_PCIMPR)
*pIStatus =
gdth_readb(&((gdt6m_dpram_str *)ha->brd)->i960r.edoor_reg);
if (*pIStatus)
return i; /* board found */
}
return -1;
}
static int gdth_test_busy(int hanum)
{
register gdth_ha_str *ha;
register int gdtsema0 = 0;
TRACE(("gdth_test_busy() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
if (ha->type == GDT_EISA)
gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
else if (ha->type == GDT_ISA)
gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str *)ha->brd)->u.ic.Sema0);
else if (ha->type == GDT_PCI)
gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str *)ha->brd)->u.ic.Sema0);
else if (ha->type == GDT_PCINEW)
gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
else if (ha->type == GDT_PCIMPR)
gdtsema0 =
(int)gdth_readb(&((gdt6m_dpram_str *)ha->brd)->i960r.sema0_reg);
return (gdtsema0 & 1);
}
static int gdth_get_cmd_index(int hanum)
{
register gdth_ha_str *ha;
int i;
TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
for (i=0; i<GDTH_MAXCMDS; ++i) {
if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
ha->cmd_tab[i].service = ha->pccb->Service;
ha->pccb->CommandIndex = (ulong32)i+2;
return (i+2);
}
}
return 0;
}
static void gdth_set_sema0(int hanum)
{
register gdth_ha_str *ha;
TRACE(("gdth_set_sema0() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
if (ha->type == GDT_EISA) {
outb(1, ha->bmic + SEMA0REG);
} else if (ha->type == GDT_ISA) {
gdth_writeb(1, &((gdt2_dpram_str *)ha->brd)->u.ic.Sema0);
} else if (ha->type == GDT_PCI) {
gdth_writeb(1, &((gdt6_dpram_str *)ha->brd)->u.ic.Sema0);
} else if (ha->type == GDT_PCINEW) {
outb(1, PTR2USHORT(&ha->plx->sema0_reg));
} else if (ha->type == GDT_PCIMPR) {
gdth_writeb(1, &((gdt6m_dpram_str *)ha->brd)->i960r.sema0_reg);
}
}
static void gdth_copy_command(int hanum)
{
register gdth_ha_str *ha;
register gdth_cmd_str *cmd_ptr;
register gdt6m_dpram_str *dp6m_ptr;
register gdt6c_dpram_str *dp6c_ptr;
gdt6_dpram_str *dp6_ptr;
gdt2_dpram_str *dp2_ptr;
ushort cp_count,dp_offset,cmd_no;
TRACE(("gdth_copy_command() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
cp_count = ha->cmd_len;
dp_offset= ha->cmd_offs_dpmem;
cmd_no = ha->cmd_cnt;
cmd_ptr = ha->pccb;
++ha->cmd_cnt;
if (ha->type == GDT_EISA)
return; /* no DPMEM, no copy */
/* set cpcount dword aligned */
if (cp_count & 3)
cp_count += (4 - (cp_count & 3));
ha->cmd_offs_dpmem += cp_count;
/* set offset and service, copy command to DPMEM */
if (ha->type == GDT_ISA) {
dp2_ptr = (gdt2_dpram_str *)ha->brd;
gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
&dp2_ptr->u.ic.comm_queue[cmd_no].offset);
gdth_writew((ushort)cmd_ptr->Service,
&dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
} else if (ha->type == GDT_PCI) {
dp6_ptr = (gdt6_dpram_str *)ha->brd;
gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
&dp6_ptr->u.ic.comm_queue[cmd_no].offset);
gdth_writew((ushort)cmd_ptr->Service,
&dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
} else if (ha->type == GDT_PCINEW) {
dp6c_ptr = (gdt6c_dpram_str *)ha->brd;
gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
&dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
gdth_writew((ushort)cmd_ptr->Service,
&dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
} else if (ha->type == GDT_PCIMPR) {
dp6m_ptr = (gdt6m_dpram_str *)ha->brd;
gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
&dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
gdth_writew((ushort)cmd_ptr->Service,
&dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
}
}
static void gdth_release_event(int hanum)
{
register gdth_ha_str *ha;
TRACE(("gdth_release_event() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
#ifdef GDTH_STATISTICS
{
ulong32 i,j;
for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
++i;
}
if (max_index < i) {
max_index = i;
TRACE3(("GDT: max_index = %d\n",(ushort)i));
}
}
#endif
if (ha->pccb->OpCode == GDT_INIT)
ha->pccb->Service |= 0x80;
if (ha->type == GDT_EISA) {
if (ha->pccb->OpCode == GDT_INIT) /* store DMA buffer */
outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
outb(ha->pccb->Service, ha->bmic + LDOORREG);
} else if (ha->type == GDT_ISA) {
gdth_writeb(0, &((gdt2_dpram_str *)ha->brd)->io.event);
} else if (ha->type == GDT_PCI) {
gdth_writeb(0, &((gdt6_dpram_str *)ha->brd)->io.event);
} else if (ha->type == GDT_PCINEW) {
outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
} else if (ha->type == GDT_PCIMPR) {
gdth_writeb(1, &((gdt6m_dpram_str *)ha->brd)->i960r.ldoor_reg);
}
}
static int gdth_wait(int hanum,int index,ulong32 time)
{
gdth_ha_str *ha;
int answer_found = FALSE;
TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
ha = HADATA(gdth_ctr_tab[hanum]);
if (index == 0)
return 1; /* no wait required */
gdth_from_wait = TRUE;
do {
#if LINUX_VERSION_CODE >= 0x010346
gdth_interrupt((int)ha->irq,ha,NULL);
#else
gdth_interrupt((int)ha->irq,NULL);
#endif
if (wait_hanum==hanum && wait_index==index) {
answer_found = TRUE;
break;
}
gdth_delay(1);
} while (--time);
gdth_from_wait = FALSE;
while (gdth_test_busy(hanum))
gdth_delay(0);
return (answer_found);
}
static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
ulong32 p2,ulong32 p3)
{
register gdth_ha_str *ha;
register gdth_cmd_str *cmd_ptr;
int retries,index;
TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
ha = HADATA(gdth_ctr_tab[hanum]);
cmd_ptr = ha->pccb;
memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
/* make command */
for (retries = INIT_RETRIES;;) {
cmd_ptr->Service = service;
cmd_ptr->RequestBuffer = INTERNAL_CMND;
if (!(index=gdth_get_cmd_index(hanum))) {
TRACE(("GDT: No free command index found\n"));
return 0;
}
gdth_set_sema0(hanum);
cmd_ptr->OpCode = opcode;
cmd_ptr->BoardNode = LOCALBOARD;
if (service == CACHESERVICE) {
if (opcode == GDT_IOCTL) {
cmd_ptr->u.ioctl.subfunc = p1;
cmd_ptr->u.ioctl.channel = p2;
cmd_ptr->u.ioctl.param_size = (ushort)p3;
cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
} else {
cmd_ptr->u.cache.DeviceNo = (ushort)p1;
cmd_ptr->u.cache.BlockNo = p2;
}
} else if (service == SCSIRAWSERVICE) {
cmd_ptr->u.raw.direction = p1;
cmd_ptr->u.raw.bus = (unchar)p2;
cmd_ptr->u.raw.target = (unchar)p3;
cmd_ptr->u.raw.lun = (unchar)(p3 >> 8);
} else if (service == SCREENSERVICE) {
if (opcode == GDT_REALTIME) {
*(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
*(ulong32 *)&cmd_ptr->u.screen.su.data[4] = p2;
*(ulong32 *)&cmd_ptr->u.screen.su.data[8] = p3;
}
}
ha->cmd_len = sizeof(gdth_cmd_str);
ha->cmd_offs_dpmem = 0;
ha->cmd_cnt = 0;
gdth_copy_command(hanum);
gdth_release_event(hanum);
gdth_delay(20);
if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
printk("GDT: Initialization error (timeout service %d)\n",service);
return 0;
}
if (ha->status != S_BSY || --retries == 0)
break;
gdth_delay(1);
}
return (ha->status != S_OK ? 0:1);
}
/* search for devices */
GDTH_INITFUNC(static int, gdth_search_drives(int hanum))
{
register gdth_ha_str *ha;
ushort cdev_cnt, i;
ulong32 bus_no, drv_cnt, drv_no, j;
gdth_getch_str *chn;
gdth_drlist_str *drl;
gdth_iochan_str *ioc;
gdth_raw_iochan_str *iocr;
gdth_arcdl_str *alst;
gdth_alist_str *alst2;
gdth_oem_str_ioctl *oemstr;
#ifdef GDTH_RTC
unchar rtc[12];
ulong flags;
#endif
TRACE(("gdth_search_drives() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
/* initialize controller services, at first: screen service */
if (!gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0)) {
printk("GDT: Initialization error screen service (code %d)\n",
ha->status);
return 0;
}
TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
#ifdef GDTH_RTC
/* read realtime clock info, send to controller */
/* 1. wait for the falling edge of update flag */
spin_lock_irqsave(&rtc_lock, flags);
for (j = 0; j < 1000000; ++j)
if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
break;
for (j = 0; j < 1000000; ++j)
if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
break;
/* 2. read info */
do {
for (j = 0; j < 12; ++j)
rtc[j] = CMOS_READ(j);
} while (rtc[0] != CMOS_READ(0));
spin_lock_irqrestore(&rtc_lock, flags);
TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
*(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
/* 3. send to controller firmware */
gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
*(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
#endif
/* unfreeze all IOs */
gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
/* initialize cache service */
if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0)) {
printk("GDT: Initialization error cache service (code %d)\n",
ha->status);
return 0;
}
TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
cdev_cnt = (ushort)ha->info;
ha->fw_vers = ha->service;
/* detect number of buses - try new IOCTL */
iocr = (gdth_raw_iochan_str *)ha->pscratch;
iocr->hdr.version = 0xffffffff;
iocr->hdr.list_entries = MAXBUS;
iocr->hdr.first_chan = 0;
iocr->hdr.last_chan = MAXBUS-1;
iocr->hdr.list_offset = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
TRACE2(("IOCHAN_RAW_DESC supported!\n"));
ha->bus_cnt = iocr->hdr.chan_count;
for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
if (iocr->list[bus_no].proc_id < MAXID)
ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
else
ha->bus_id[bus_no] = 0xff;
}
} else {
/* old method */
chn = (gdth_getch_str *)ha->pscratch;
for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
chn->channel_no = bus_no;
if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
SCSI_CHAN_CNT | L_CTRL_PATTERN,
IO_CHANNEL | INVALID_CHANNEL,
sizeof(gdth_getch_str))) {
if (bus_no == 0) {
printk("GDT: Error detecting channel count (0x%x)\n",
ha->status);
return 0;
}
break;
}
if (chn->siop_id < MAXID)
ha->bus_id[bus_no] = chn->siop_id;
else
ha->bus_id[bus_no] = 0xff;
}
ha->bus_cnt = (unchar)bus_no;
}
TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
/* read cache configuration */
if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
printk("GDT: Initialization error cache service (code %d)\n",
ha->status);
return 0;
}
ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
ha->cpar.write_back,ha->cpar.block_size));
/* read board info and features */
ha->more_proc = FALSE;
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
sizeof(gdth_binfo_str));
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
ha->more_proc = TRUE;
}
} else {
TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
}
TRACE2(("Controller name: %s\n",ha->binfo.type_string));
/* read more informations */
if (ha->more_proc) {
/* physical drives, channel addresses */
ioc = (gdth_iochan_str *)ha->pscratch;
ioc->hdr.version = 0xffffffff;
ioc->hdr.list_entries = MAXBUS;
ioc->hdr.first_chan = 0;
ioc->hdr.last_chan = MAXBUS-1;
ioc->hdr.list_offset = GDTOFFSOF(gdth_iochan_str, list[0]);
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
ha->raw[bus_no].address = ioc->list[bus_no].address;
ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
}
} else {
for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
ha->raw[bus_no].address = IO_CHANNEL;
ha->raw[bus_no].local_no = bus_no;
}
}
for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
chn = (gdth_getch_str *)ha->pscratch;
chn->channel_no = ha->raw[bus_no].local_no;
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
SCSI_CHAN_CNT | L_CTRL_PATTERN,
ha->raw[bus_no].address | INVALID_CHANNEL,
sizeof(gdth_getch_str))) {
ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
TRACE2(("Channel %d: %d phys. drives\n",
bus_no,chn->drive_cnt));
}
if (ha->raw[bus_no].pdev_cnt > 0) {
drl = (gdth_drlist_str *)ha->pscratch;
drl->sc_no = ha->raw[bus_no].local_no;
drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
SCSI_DR_LIST | L_CTRL_PATTERN,
ha->raw[bus_no].address | INVALID_CHANNEL,
sizeof(gdth_drlist_str))) {
for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
ha->raw[bus_no].id_list[j] = drl->sc_list[j];
} else {
ha->raw[bus_no].pdev_cnt = 0;
}
}
}
/* logical drives */
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
INVALID_CHANNEL,sizeof(ulong32))) {
drv_cnt = *(ulong32 *)ha->pscratch;
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
for (j = 0; j < drv_cnt; ++j) {
drv_no = ((ulong32 *)ha->pscratch)[j];
if (drv_no < MAX_LDRIVES) {
ha->hdr[drv_no].is_logdrv = TRUE;
TRACE2(("Drive %d is log. drive\n",drv_no));
}
}
}
alst = (gdth_arcdl_str *)ha->pscratch;
alst->entries_avail = MAX_LDRIVES;
alst->first_entry = 0;
alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
(alst->entries_avail-1) * sizeof(gdth_alist_str))) {
for (j = 0; j < alst->entries_init; ++j) {
ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
ha->hdr[j].is_master = alst->list[j].is_master;
ha->hdr[j].is_parity = alst->list[j].is_parity;
ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
ha->hdr[j].master_no = alst->list[j].cd_handle;
}
} else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
ARRAY_DRV_LIST | LA_CTRL_PATTERN,
0, 35 * sizeof(gdth_alist_str))) {
for (j = 0; j < 35; ++j) {
alst2 = &((gdth_alist_str *)ha->pscratch)[j];
ha->hdr[j].is_arraydrv = alst2->is_arrayd;
ha->hdr[j].is_master = alst2->is_master;
ha->hdr[j].is_parity = alst2->is_parity;
ha->hdr[j].is_hotfix = alst2->is_hotfix;
ha->hdr[j].master_no = alst2->cd_handle;
}
}
}
}
/* initialize raw service */
if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0)) {
printk("GDT: Initialization error raw service (code %d)\n",
ha->status);
return 0;
}
TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
/* set/get features raw service (scatter/gather) */
if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
0,0)) {
TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
ha->info));
ha->raw_feat = (ushort)ha->info;
}
}
/* set/get features cache service (equal to raw service) */
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
SCATTER_GATHER,0)) {
TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
ha->info));
ha->cache_feat = (ushort)ha->info;
}
}
/* reserve drives for raw service */
if (reserve_mode != 0) {
gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
reserve_mode == 1 ? 1 : 3, 0, 0);
TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
ha->status));
}
for (i = 0; i < MAX_RES_ARGS; i += 4) {
if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
reserve_list[i], reserve_list[i+1],
reserve_list[i+2], reserve_list[i+3]));
if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
reserve_list[i+1], reserve_list[i+2] |
(reserve_list[i+3] << 8))) {
printk("GDT: Error raw service (RESERVE, code %d)\n",
ha->status);
}
}
}
/* Determine OEM string using IOCTL */
oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
oemstr->params.ctl_version = 0x01;
oemstr->params.buffer_size = sizeof(oemstr->text);
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
sizeof(gdth_oem_str_ioctl))) {
TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
printk("GDT CTR%d Vendor: %s\n",hanum,oemstr->text.oem_company_name);
/* Save the Host Drive inquiry data */
strncpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,7);
ha->oem_name[7] = '\0';
} else {
/* Old method, based on PCI ID */
TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
if (ha->oem_id == OEM_ID_INTEL)
strcpy(ha->oem_name,"Intel ");
else
strcpy(ha->oem_name,"ICP ");
}
/* scanning for host drives */
for (i = 0; i < cdev_cnt; ++i)
gdth_analyse_hdrive(hanum,i);
TRACE(("gdth_search_drives() OK\n"));
return 1;
}
static int gdth_analyse_hdrive(int hanum,ushort hdrive)
{
register gdth_ha_str *ha;
int drv_cyls, drv_hds, drv_secs;
TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
if (hdrive >= MAX_HDRIVES)
return 0;
ha = HADATA(gdth_ctr_tab[hanum]);
if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
return 0;
ha->hdr[hdrive].present = TRUE;
ha->hdr[hdrive].size = ha->info;
/* evaluate mapping (sectors per head, heads per cylinder) */
ha->hdr[hdrive].size &= ~SECS32;
if (ha->info2 == 0) {
gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
} else {
drv_hds = ha->info2 & 0xff;
drv_secs = (ha->info2 >> 8) & 0xff;
drv_cyls = ha->hdr[hdrive].size /drv_hds/drv_secs;
}
ha->hdr[hdrive].heads = (unchar)drv_hds;
ha->hdr[hdrive].secs = (unchar)drv_secs;
/* round size */
ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs;
TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
/* get informations about device */
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
hdrive,ha->info));
ha->hdr[hdrive].devtype = (ushort)ha->info;
}
/* cluster info */
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
hdrive,ha->info));
if (!shared_access)
ha->hdr[hdrive].cluster_type = (unchar)ha->info;
}
/* R/W attributes */
if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
hdrive,ha->info));
ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
}
return 1;
}
/* command queueing/sending functions */
static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
{
register gdth_ha_str *ha;
register Scsi_Cmnd *pscp;
register Scsi_Cmnd *nscp;
ulong flags;
unchar b, t;
TRACE(("gdth_putq() priority %d\n",priority));
ha = HADATA(gdth_ctr_tab[hanum]);
GDTH_LOCK_HA(ha, flags);
scp->SCp.this_residual = (int)priority;
#if LINUX_VERSION_CODE >= 0x02053C
b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
t = scp->device->id;
#else
b = virt_ctr ? NUMDATA(scp->host)->busnum : scp->channel;
t = scp->target;
#endif
#if LINUX_VERSION_CODE >= 0x010300
if (priority >= DEFAULT_PRI) {
if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
(b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) {
TRACE2(("gdth_putq(): locked IO -> update_timeout()\n"));
scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
}
}
#endif
if (ha->req_first==NULL) {
ha->req_first = scp; /* queue was empty */
scp->SCp.ptr = NULL;
} else { /* queue not empty */
pscp = ha->req_first;
nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
/* priority: 0-highest,..,0xff-lowest */
while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
pscp = nscp;
nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
}
pscp->SCp.ptr = (char *)scp;
scp->SCp.ptr = (char *)nscp;
}
GDTH_UNLOCK_HA(ha, flags);
#ifdef GDTH_STATISTICS
flags = 0;
for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
++flags;
if (max_rq < flags) {
max_rq = flags;
TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
}
#endif
}
static void gdth_next(int hanum)
{
register gdth_ha_str *ha;
register Scsi_Cmnd *pscp;
register Scsi_Cmnd *nscp;
unchar b, t, l, firsttime;
unchar this_cmd, next_cmd;
ulong flags = 0;
int cmd_index;
TRACE(("gdth_next() hanum %d\n",hanum));
ha = HADATA(gdth_ctr_tab[hanum]);
if (!gdth_polling)
GDTH_LOCK_HA(ha, flags);
ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
this_cmd = firsttime = TRUE;
next_cmd = gdth_polling ? FALSE:TRUE;
cmd_index = 0;
for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
#if LINUX_VERSION_CODE >= 0x02053C
b = virt_ctr ? NUMDATA(nscp->device->host)->busnum : nscp->device->channel;
t = nscp->device->id;
l = nscp->device->lun;
#else