net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap
The data manual for DP83867IR/CR, SNLS484E, revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).
There are some boards which have the pin strapped this way and need
software workaround suggested by the data manual. Bit of
Configuration Register 4 (address 0x0031) must be cleared to 0. This
ensures proper operation of the PHY.
Implement driver support for device-tree property meant to advertise
the wrong strapping.
Signed-off-by: Murali Karicheri <firstname.lastname@example.org>
[email@example.com: rebase to mainline, code simplification]
Signed-off-by: Sekhar Nori <firstname.lastname@example.org>
Signed-off-by: David S. Miller <email@example.com>
1 file changed