| commit | 479ab3c37688bcc48a014f4f3006f86d91383d3c | [log] [tgz] |
|---|---|---|
| author | Koji Matsuoka <koji.matsuoka.xm@renesas.com> | Fri Nov 11 18:07:41 2016 +0100 |
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | Tue Dec 06 03:22:05 2016 +0200 |
| tree | 313da791cde492d7439fefcab9def87541a477af | |
| parent | cd7c55051605f67ad4ebc24c293c341633b7247f [diff] |
drm: rcar-du: Add DPLL support The implementation hardcodes a workaround for the H3 ES1.x SoC regardless of the SoC revision, as the workaround can be safely applied on all devices in the Gen3 family without any side effect. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>