tag 169fc38de2743a1f7aad509ac2e59ad91ad3883b
tagger Simon Horman <horms@verge.net.au> Tue Dec 24 21:36:09 2013 +0900
object d85bcfa916ffdf078f188aeab60f738b290f4309

Third Round of Renesas ARM Based SoC Updates for v3.14

* Global
  - Don't set plat_sci_port scbrr_algo_id field
  - Declare SCIF register base and IRQ as resources
  - Don't define SCIF platform data in an array
  - Use macros to declare SCIF devices

* r7s72100 SoC (RZ/A1H)
  - Add i2c clocks

* r8a7778 (R-Car M1)
  - Add sound SCU clock support

commit d85bcfa916ffdf078f188aeab60f738b290f4309
author Wolfram Sang <wsa@sang-engineering.com> Wed Dec 18 22:31:58 2013 +0100
committer Simon Horman <horms+renesas@verge.net.au> Tue Dec 24 21:09:19 2013 +0900
tree 3a9cfce48e29a5745a62752742051404d8255e92
parent f72ed4beb198eb25c8532e76addc0034ae2aa8c7

arm: shmobile: r7s72100: add i2c clocks

Tested with RIIC2 on a genmai board. Others untested but hopefully
trivial enough to be added.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>