)]}'
{
  "commit": "2fabd2f406d0cf787be47b3bbeea99b30004033d",
  "tree": "c01aaf554ffd1c4417195c6f3bc1a29ec8e2ead3",
  "parents": [
    "cee9395acd8043be0644b25c34bfa86623f2b935"
  ],
  "author": {
    "name": "David Oberhollenzer",
    "email": "david.oberhollenzer@sigma-star.at",
    "time": "Thu Jul 16 13:39:47 2026 +0200"
  },
  "committer": {
    "name": "Kevin Hilman (TI)",
    "email": "khilman@baylibre.com",
    "time": "Mon Aug 31 09:54:09 2026 -0700"
  },
  "message": "ARM: dts: ti/omap: dra7: fix PCIe PHY clock divider definition\n\nCommit d0bdd8bb7f35 (\"ARM: dts: ti/omap: dra7: fix redundant\nclock divider definition\") removes the clock divider definition\nfrom optfclk_pciephy_div, reasoning that the table is redundant,\nas it contains the values 1 and 2, while also setting ti,max-div\nto 2 while ti,min-div is implicitly initialized to 1.\n\nWhat that commit missed was the fact that the values in the table\nare in reverse order, i.e. first 2, then 1.\n\nAs is clearly described in the documentation, the ordering is\nsignifficant, the actual values for the register setting are\nderived from the index. If no table is specified, the driver\nassumes that the register value is divider - 1 (see also `_get_val`\nin `drivers/clk/ti/divider.c`).\n\nWhat is in fact redundant is the value of ti,max-div that is\nderived from the table if none is specified. To satisfy device\ntree semantic linters, it is removed instead.\n\nFixes: d0bdd8bb7f35 (\"ARM: dts: ti/omap: dra7: fix redundant clock divider definition\")\nSigned-off-by: David Oberhollenzer \u003cdavid.oberhollenzer@sigma-star.at\u003e\nLink: https://patch.msgid.link/20260716113947.92513-1-david.oberhollenzer@sigma-star.at\nSigned-off-by: Kevin Hilman (TI) \u003ckhilman@baylibre.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0de16ee262cf47e576630543652b3855f76d98e3",
      "old_mode": 33188,
      "old_path": "arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi",
      "new_id": "615a8fb47776159b1d58d683007e835766d21219",
      "new_mode": 33188,
      "new_path": "arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi"
    }
  ]
}