phy: exynos-dp-video: Use syscon support to control pmu register

Currently the DP_PHY_ENABLE register is mapped in the driver,
and accessed to control power to the PHY.
With mfd-syscon and regmap interface available at our disposal,
it's wise to use that instead of using a 'reg' property for the
controller and allocating a memory resource for that.

To facilitate this, we have added another compatible string
for Exynso5420 SoC to acquire driver data which contains
different DP-PHY-CONTROL register offset.

Signed-off-by: Vivek Gautam <>
Cc: Jingoo Han <>
Cc: Kishon Vijay Abraham I <>
Signed-off-by: Kishon Vijay Abraham I <>
2 files changed