)]}'
{
  "commit": "7ae14cf581f2cdd2ebae29ca5b3d42bdfebca597",
  "tree": "781db0ef1b9053d1b8360af3642e30dda48c4cf2",
  "parents": [
    "8f3d9f354286745c751374f5f1fcafee6b3f3136"
  ],
  "author": {
    "name": "Jyri Sarha",
    "email": "jsarha@ti.com",
    "time": "Wed Jan 08 10:30:08 2020 +0200"
  },
  "committer": {
    "name": "Kishon Vijay Abraham I",
    "email": "kishon@ti.com",
    "time": "Fri Apr 24 14:50:23 2020 +0530"
  },
  "message": "phy: ti: j721e-wiz: Implement DisplayPort mode to the wiz driver\n\nFor DisplayPort use we need to set WIZ_CONFIG_LANECTL register\u0027s\nP_STANDARD_MODE bits to \"mode 3\". In the DisplayPort use also the\nP_ENABLE bits of the same register are set to P_ENABLE instead of\nP_ENABLE_FORCE, so that the DisplayPort driver can enable and disable\nthe lane as needed. The DisplayPort mode is selected according to\n\"cdns,phy-type\"-properties found in link subnodes under the managed\nserdes (see \"ti,sierra-phy-t0\" and \"ti,j721e-serdes-10g\" devicetree\nbindings for details). All other values of \"cdns,phy-type\"-property\nbut PHY_TYPE_DP will set P_STANDARD_MODE bits to 0 and P_ENABLE bits\nto force enable.\n\nSigned-off-by: Jyri Sarha \u003cjsarha@ti.com\u003e\nSigned-off-by: Kishon Vijay Abraham I \u003ckishon@ti.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7b51045df7836592783bfa4f00088fcf95ae2b66",
      "old_mode": 33188,
      "old_path": "drivers/phy/ti/phy-j721e-wiz.c",
      "new_id": "1d12d1b1b63a8ac6dd0a64cb063c1a37b17ee674",
      "new_mode": 33188,
      "new_path": "drivers/phy/ti/phy-j721e-wiz.c"
    }
  ]
}