phy: for 4.15

 *) Add support in phy core to perform phy calibration
 *) Return NULL for optional PHY's even if CONFIG_GENERIC_PHY is not selected
 *) Add USB Phy driver for Broadcom STB SoCs
 *) Add support to force mediatek PHY with USB OTG function to enter
    a specific mode
 *) Calibrate rockchip-typec PHY according to docs
 *) Enable dual route feature for sun4i-usb in V3s SoC
 *) Use dr_mode dt property to enable otg capability in rcar-gen3-usb2
 *) Add driver data to specify dedicated otg pins in rcar-gen3-usb2 driver
 *) Configure the RX equalizer of brcm-sata PHY
 *) Update pcie phy settings for ti-pipe3 phy
 *) Add set_mode callback in qcom-ufs-qmp-14nm phy
 *) Use PHY callbacks in phy-qcom-ufs instead of export APIs

Signed-off-by: Kishon Vijay Abraham I <>
drivers: phy: add calibrate method

Some quirky UDCs (like dwc3 on Exynos) need to have their phys calibrated e.g.
for using super speed. This patch adds a new phy_calibrate() method.
When the calibration should be used is dependent on actual chip.

In case of dwc3 on Exynos the calibration must happen after usb_add_hcd()
(while in host mode), because certain phy parameters like Tx LOS levels
and boost levels need to be calibrated further post initialization of xHCI
controller, to get SuperSpeed operations working. But an hcd must be
prepared first in order to pass it to usb_add_hcd(), so, in particular, dwc3
registers must be available first, and in order for the latter to happen
the phys must be initialized. This poses a chicken and egg problem if
the calibration were to be performed in phy_init(). To break the circular
dependency a separate method is added which can be called at a desired
moment after phy intialization.

Signed-off-by: Andrzej Pietrasiewicz <>
Signed-off-by: Kishon Vijay Abraham I <>
2 files changed