)]}'
{
  "commit": "963bbdb32b47cfa67a449e715e1dcc525fbd01fc",
  "tree": "8827c72c6bdf6fda274887dd55ce1a904f49d3e7",
  "parents": [
    "11ce8fd8fd8718247f17475802639cd7e2d3765c"
  ],
  "author": {
    "name": "Jani Nikula",
    "email": "jani.nikula@intel.com",
    "time": "Mon Dec 19 12:59:55 2022 +0200"
  },
  "committer": {
    "name": "Rodrigo Vivi",
    "email": "rodrigo.vivi@intel.com",
    "time": "Fri Dec 30 04:27:04 2022 -0500"
  },
  "message": "drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence\n\nStarting from ICL, the default for MIPI GPIO sequences seems to be using\nnative GPIOs i.e. GPIOs available in the GPU. These native GPIOs reuse\nmany pins that quite frankly seem scary to poke based on the VBT\nsequences. We pretty much have to trust that the board is configured\nsuch that the relevant HPD, PP_CONTROL and GPIO bits aren\u0027t used for\nanything else.\n\nMIPI sequence v4 also adds a flag to fall back to non-native sequences.\n\nv5:\n- Wrap SHOTPLUG_CTL_DDI modification in spin_lock() in icp_irq_handler()\n  too (Ville)\n- References instead of Closes issue 6131 because this does not fix everything\n\nv4:\n- Wrap SHOTPLUG_CTL_DDI modification in spin_lock_irq() (Ville)\n\nv3:\n- Fix -Wbitwise-conditional-parentheses (kernel test robot \u003clkp@intel.com\u003e)\n\nv2:\n- Fix HPD pin output set (impacts GPIOs 0 and 5)\n- Fix GPIO data output direction set (impacts GPIOs 4 and 9)\n- Reduce register accesses to single intel_de_rwm()\n\nReferences: https://gitlab.freedesktop.org/drm/intel/-/issues/6131\nCc: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nSigned-off-by: Jani Nikula \u003cjani.nikula@intel.com\u003e\nReviewed-by: Ville Syrjälä \u003cville.syrjala@linux.intel.com\u003e\nLink: https://patchwork.freedesktop.org/patch/msgid/20221219105955.4014451-1-jani.nikula@intel.com\n(cherry picked from commit f087cfe6fcff58044f7aa3b284965af47f472fb0)\nCc: stable@vger.kernel.org # 6.1\nSigned-off-by: Rodrigo Vivi \u003crodrigo.vivi@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "fce69fa446d586eb2b1c715f4714f024d4c39bce",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/i915/display/intel_dsi_vbt.c",
      "new_id": "41f025f089d9f643afa1754c41131321267af6df",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/i915/display/intel_dsi_vbt.c"
    },
    {
      "type": "modify",
      "old_id": "edfe363af8389f1e5f1ec396d8b39c4612be23e7",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/i915/i915_irq.c",
      "new_id": "91c5339860412105d67cc5560103ab73f19c37bc",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/i915/i915_irq.c"
    },
    {
      "type": "modify",
      "old_id": "8e1892d147741c47dd4a25df76169c6e5441ee6b",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/i915/i915_reg.h",
      "new_id": "916176872544927f95b76f45a6964b2cba9b63af",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/i915/i915_reg.h"
    }
  ]
}