)]}'
{
  "commit": "6cb9ec064c24d994c86369ddf28f156146115085",
  "tree": "eee34876d8bce60b74ecf375dd0c3e6a744e8b7d",
  "parents": [
    "2808d026797b241acd2f214139ee349f486d1231"
  ],
  "author": {
    "name": "Leon Romanovsky",
    "email": "leonro@nvidia.com",
    "time": "Wed Mar 11 06:17:01 2026 -0400"
  },
  "committer": {
    "name": "Leon Romanovsky",
    "email": "leonro@nvidia.com",
    "time": "Wed Mar 11 15:01:43 2026 -0400"
  },
  "message": "mm/hmm: Indicate that HMM requires DMA coherency\n\nHMM mirroring can work on coherent systems without SWIOTLB path only.\nUntil introduction of DMA_ATTR_REQUIRE_COHERENT, there was no reliable\nway to indicate that and various approximation was done:\n\nint hmm_dma_map_alloc(struct device *dev, struct hmm_dma_map *map,\n                      size_t nr_entries, size_t dma_entry_size)\n{\n\u003c...\u003e\n        /*\n         * The HMM API violates our normal DMA buffer ownership rules and can\u0027t\n         * transfer buffer ownership.  The dma_addressing_limited() check is a\n         * best approximation to ensure no swiotlb buffering happens.\n         */\n        dma_need_sync \u003d !dev-\u003edma_skip_sync;\n        if (dma_need_sync || dma_addressing_limited(dev))\n                return -EOPNOTSUPP;\n\nSo let\u0027s mark mapped buffers with DMA_ATTR_REQUIRE_COHERENT attribute\nto prevent DMA debugging warnings for cache overlapped entries.\n\nSigned-off-by: Leon Romanovsky \u003cleonro@nvidia.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f6c4ddff4bd611d86bab90eecce7fd0cbbc0a16f",
      "old_mode": 33188,
      "old_path": "mm/hmm.c",
      "new_id": "5955f2f0c83db180cd9ae781214ccde2a8eeaed6",
      "new_mode": 33188,
      "new_path": "mm/hmm.c"
    }
  ]
}