tag 1cb5f161db49f10045644b7c91761d095429717a
tagger Linus Walleij <linus.walleij@linaro.org> Tue Dec 05 14:11:14 2017 +0100
object 07c43a382d7de3db01cc28bf2e17ed151cde2046

Pin control fixes for the v4.15 cycle:

- Fix the UART2 RTS pin mode on Intel Denverton.
- Fix the direction_output() behaviour on the Armada 37xx.
- Fix the groups selection per-SoC on the Gemini.
- Fix the interrupt pin bank on the Sunxi A80.
- Fix the UART mux on the Sunxi A64.
- Disable the strict mode on the Sunxi H5 driver.

commit 07c43a382d7de3db01cc28bf2e17ed151cde2046
author Andre Przywara <andre.przywara@arm.com> Sat Nov 25 12:02:00 2017 +0000
committer Linus Walleij <linus.walleij@linaro.org> Thu Nov 30 16:50:43 2017 +0100
tree 0c58b6e1c6d7fe9948fa4b8b99b1a747f2028447
parent 7c5c2c2d18d778e51fd8b899965097168306031c

pinctrl: sunxi: Disable strict mode for H5 driver

All of the H5 boards in the kernel reference the MMC0 CD pin twice in
their DT, so strict mode will make the MMC driver fail to load.
To keep existing DTs working, disable strict mode in the H5 driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Chris Obbard <obbardc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>