blob: ec20f888e2fcefbd47cef56f823f6a354101d9f3 [file] [log] [blame]
#include <stdint.h>
void delayUs(uint32_t usec);
#define delayMicroseconds delayUs
#define FALSE 0
#define TRUE 1
#define PROGMEM
#define INPUT 0
void pinMode(uint8_t pin, uint8_t mode);
#if defined(__MKL26Z64__)
struct digital_pin_bitband_and_config_table_struct {
volatile uint8_t *reg;
volatile uint32_t *config;
uint8_t mask;
};
extern const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[];
#define portOutputRegister(pin) ((digital_pin_to_info_PGM[(pin)].reg + 0))
#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
#define PIN_TO_BITMASK(pin) (digitalPinToBitMask(pin))
#define IO_REG_TYPE uint8_t
#define IO_REG_ASM
#define DIRECT_READ(base, mask) ((*((base)+16) & (mask)) ? 1 : 0)
#define DIRECT_MODE_INPUT(base, mask) (*((base)+20) &= ~(mask))
#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+20) |= (mask))
#define DIRECT_WRITE_LOW(base, mask) (*((base)+8) = (mask))
#define DIRECT_WRITE_HIGH(base, mask) (*((base)+4) = (mask))
#else
struct digital_pin_bitband_and_config_table_struct {
volatile uint32_t *reg;
volatile uint32_t *config;
};
extern const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[];
#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0))
#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
#define PIN_TO_BITMASK(pin) (1)
#define IO_REG_TYPE uint8_t
#define IO_REG_ASM
#define DIRECT_READ(base, mask) (*((base)+512))
#define DIRECT_MODE_INPUT(base, mask) (*((base)+640) = 0)
#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+640) = 1)
#define DIRECT_WRITE_LOW(base, mask) (*((base)+256) = 1)
#define DIRECT_WRITE_HIGH(base, mask) (*((base)+128) = 1)
#endif
#define __disable_irq() __asm__ volatile("CPSID i":::"memory");
#define __enable_irq() __asm__ volatile("CPSIE i":::"memory");
#define interrupts() __enable_irq()
#define noInterrupts() __disable_irq()