| From e4f535b3c4be699cdb91b9c4c3ffc39668b821c9 Mon Sep 17 00:00:00 2001 |
| From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Date: Wed, 7 Dec 2016 17:44:27 +0100 |
| Subject: [PATCH 017/286] arm64: dts: r8a7796: Enable SCIF DMA |
| |
| Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit dbcae5ea4bd27409291e3329c9106f37f0118590) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7796.dtsi | 13 +++++++++++++ |
| 1 file changed, 13 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| @@ -568,6 +568,9 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac1 0x51>, <&dmac1 0x50>, |
| + <&dmac2 0x51>, <&dmac2 0x50>; |
| + dma-names = "tx", "rx", "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -581,6 +584,9 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac1 0x53>, <&dmac1 0x52>, |
| + <&dmac2 0x53>, <&dmac2 0x52>; |
| + dma-names = "tx", "rx", "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -607,6 +613,8 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
| + dma-names = "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -620,6 +628,8 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
| + dma-names = "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
| @@ -633,6 +643,9 @@ |
| <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| <&scif_clk>; |
| clock-names = "fck", "brg_int", "scif_clk"; |
| + dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, |
| + <&dmac2 0x5b>, <&dmac2 0x5a>; |
| + dma-names = "tx", "rx", "tx", "rx"; |
| power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| status = "disabled"; |
| }; |
