| From 42784f869694091eaa471fecdc6863696de627f5 Mon Sep 17 00:00:00 2001 |
| From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Date: Wed, 4 Jan 2017 22:18:24 +0300 |
| Subject: [PATCH 117/299] sh_eth: fix EESIPR values for SH77{34|63} |
| |
| As the SH77{34|63} manuals are freely available, I've checked the EESIPR |
| values written against the manuals, and they appeared to set the reserved |
| bits 11-15 (which should be 0 on write). Fix those EESIPR values. |
| |
| Fixes: 380af9e390ec ("net: sh_eth: CPU dependency code collect to "struct sh_eth_cpu_data"") |
| Fixes: f5d12767c8fd ("sh_eth: get SH77{34|63} support out of #ifdef") |
| Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Signed-off-by: David S. Miller <davem@davemloft.net> |
| (cherry picked from commit 978d3639fd13d987950e4ce85c8737ae92154b2c) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/net/ethernet/renesas/sh_eth.c | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/net/ethernet/renesas/sh_eth.c |
| +++ b/drivers/net/ethernet/renesas/sh_eth.c |
| @@ -802,7 +802,7 @@ static struct sh_eth_cpu_data sh7734_dat |
| |
| .ecsr_value = ECSR_ICD | ECSR_MPD, |
| .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, |
| - .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, |
| + .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff, |
| |
| .tx_check = EESR_TC1 | EESR_FTC, |
| .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | |
| @@ -832,7 +832,7 @@ static struct sh_eth_cpu_data sh7763_dat |
| |
| .ecsr_value = ECSR_ICD | ECSR_MPD, |
| .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, |
| - .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, |
| + .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff, |
| |
| .tx_check = EESR_TC1 | EESR_FTC, |
| .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | |
