| From 54fc2e6bf87f85a7f7f0b87d4f043d78f3a99723 Mon Sep 17 00:00:00 2001 |
| From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Date: Wed, 14 Sep 2016 18:46:46 +0200 |
| Subject: [PATCH 160/299] clk: renesas: r8a7796: Add SCIF clocks |
| |
| Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| (cherry picked from commit 951456c37df6d778dc0ce42357417cba440cba87) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++ |
| 1 file changed, 5 insertions(+) |
| |
| --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| @@ -109,6 +109,11 @@ static const struct cpg_core_clk r8a7796 |
| }; |
| |
| static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { |
| + DEF_MOD("scif5", 202, R8A7796_CLK_S3D4), |
| + DEF_MOD("scif4", 203, R8A7796_CLK_S3D4), |
| + DEF_MOD("scif3", 204, R8A7796_CLK_S3D4), |
| + DEF_MOD("scif1", 206, R8A7796_CLK_S3D4), |
| + DEF_MOD("scif0", 207, R8A7796_CLK_S3D4), |
| DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3), |
| DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3), |
| DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3), |
