| From 446bb1a8245bf113400ab05f3194a196fa1c44a0 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Wed, 1 Jun 2016 14:46:01 +0200 |
| Subject: [PATCH 179/299] clk: renesas: r8a7778: Obtain mode pin values using |
| R-Car RST driver |
| |
| Obtain the values of the mode pins from the R-Car RST driver, which |
| relies on the presence in DT of a device node for the RESET/WDT module. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Acked-by: Dirk Behme <dirk.behme@de.bosch.com> |
| (cherry picked from commit 578d601cbc514b92bc9ed71fd4fb700180275211) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/clk/renesas/clk-r8a7778.c | 13 +++++++++++++ |
| 1 file changed, 13 insertions(+) |
| |
| --- a/drivers/clk/renesas/clk-r8a7778.c |
| +++ b/drivers/clk/renesas/clk-r8a7778.c |
| @@ -12,6 +12,7 @@ |
| #include <linux/clk/renesas.h> |
| #include <linux/of_address.h> |
| #include <linux/slab.h> |
| +#include <linux/soc/renesas/rcar-rst.h> |
| |
| struct r8a7778_cpg { |
| struct clk_onecell_data data; |
| @@ -83,6 +84,18 @@ static void __init r8a7778_cpg_clocks_in |
| struct clk **clks; |
| unsigned int i; |
| int num_clks; |
| + u32 mode; |
| + |
| + if (rcar_rst_read_mode_pins(&mode)) |
| + return; |
| + |
| + BUG_ON(!(mode & BIT(19))); |
| + |
| + cpg_mode_rates = (!!(mode & BIT(18)) << 2) | |
| + (!!(mode & BIT(12)) << 1) | |
| + (!!(mode & BIT(11))); |
| + cpg_mode_divs = (!!(mode & BIT(2)) << 1) | |
| + (!!(mode & BIT(1))); |
| |
| num_clks = of_property_count_strings(np, "clock-output-names"); |
| if (num_clks < 0) { |
