blob: 90bf4def0360f8e3d1dbcac6a5fc9da63d183145 [file] [log] [blame]
From 8389168f97247173c7e981c000ec221c0b62aa2a Mon Sep 17 00:00:00 2001
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Date: Wed, 13 Dec 2017 15:46:57 +0900
Subject: [PATCH 0510/1795] usb: renesas_usbhs: Add a function to write the
UGCTRL2 register
To cleanup the code, this patch adds a function to write the UGCTRL2
register.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
(cherry picked from commit 05e37b626f7911865ec1f7c19864d1e1edc9f1d0)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/usb/renesas_usbhs/rcar3.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
index c929d296c77b..50e5fb55c8a0 100644
--- a/drivers/usb/renesas_usbhs/rcar3.c
+++ b/drivers/usb/renesas_usbhs/rcar3.c
@@ -44,13 +44,17 @@ static u32 usbhs_read32(struct usbhs_priv *priv, u32 reg)
return ioread32(priv->base + reg);
}
+static void usbhs_rcar3_set_ugctrl2(struct usbhs_priv *priv, u32 val)
+{
+ usbhs_write32(priv, UGCTRL2, val | UGCTRL2_RESERVED_3);
+}
+
static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
void __iomem *base, int enable)
{
struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
- usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG |
- UGCTRL2_VBUSSEL);
+ usbhs_rcar3_set_ugctrl2(priv, UGCTRL2_USB0SEL_OTG | UGCTRL2_VBUSSEL);
if (enable) {
usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
@@ -73,8 +77,7 @@ static int usbhs_rcar3_power_and_pll_ctrl(struct platform_device *pdev,
if (enable) {
usbhs_write32(priv, UGCTRL, 0); /* release PLLRESET */
- usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 |
- UGCTRL2_USB0SEL_HSUSB);
+ usbhs_rcar3_set_ugctrl2(priv, UGCTRL2_USB0SEL_HSUSB);
usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
do {
--
2.19.0