| From 8aa1839999b3e2aa88b1ef36e760a8966b692dfe Mon Sep 17 00:00:00 2001 |
| From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
| Date: Tue, 7 Nov 2017 15:10:47 +0000 |
| Subject: [PATCH 0691/1795] ARM: dts: r8a7743: Add CAN[01] SoC support |
| |
| Add the definitions for can0 and can1 to the SoC .dtsi. |
| |
| Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
| Reviewed-by: Biju Das <biju.das@bp.renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 6ee6959fb85c3e03ec0674d329dc96c733f51dce) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm/boot/dts/r8a7743.dtsi | 36 ++++++++++++++++++++++++++++++++++ |
| 1 file changed, 36 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi |
| index 6aa86b75b80c..12c7b9267fd7 100644 |
| --- a/arch/arm/boot/dts/r8a7743.dtsi |
| +++ b/arch/arm/boot/dts/r8a7743.dtsi |
| @@ -1067,6 +1067,34 @@ |
| }; |
| }; |
| |
| + can0: can@e6e80000 { |
| + compatible = "renesas,can-r8a7743", |
| + "renesas,rcar-gen2-can"; |
| + reg = <0 0xe6e80000 0 0x1000>; |
| + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 916>, |
| + <&cpg CPG_CORE R8A7743_CLK_RCAN>, |
| + <&can_clk>; |
| + clock-names = "clkp1", "clkp2", "can_clk"; |
| + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; |
| + resets = <&cpg 916>; |
| + status = "disabled"; |
| + }; |
| + |
| + can1: can@e6e88000 { |
| + compatible = "renesas,can-r8a7743", |
| + "renesas,rcar-gen2-can"; |
| + reg = <0 0xe6e88000 0 0x1000>; |
| + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 915>, |
| + <&cpg CPG_CORE R8A7743_CLK_RCAN>, |
| + <&can_clk>; |
| + clock-names = "clkp1", "clkp2", "can_clk"; |
| + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; |
| + resets = <&cpg 915>; |
| + status = "disabled"; |
| + }; |
| + |
| pci0: pci@ee090000 { |
| compatible = "renesas,pci-r8a7743", |
| "renesas,pci-rcar-gen2"; |
| @@ -1153,6 +1181,14 @@ |
| clock-frequency = <48000000>; |
| }; |
| |
| + /* External CAN clock */ |
| + can_clk: can { |
| + compatible = "fixed-clock"; |
| + #clock-cells = <0>; |
| + /* This value must be overridden by the board. */ |
| + clock-frequency = <0>; |
| + }; |
| + |
| /* External SCIF clock */ |
| scif_clk: scif { |
| compatible = "fixed-clock"; |
| -- |
| 2.19.0 |
| |