| From ac3d86ac8ff26fa8fd28d1581e4ea86b645682b4 Mon Sep 17 00:00:00 2001 |
| From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> |
| Date: Wed, 14 Feb 2018 09:55:05 +0000 |
| Subject: [PATCH 0969/1795] arm64: dts: renesas: r8a77995: add VSP instances |
| |
| The r8a77995 has a VSPBS to support image processing such as blending of |
| two input images, and has two VSPDs to handle display pipelines with a |
| DU. |
| |
| Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> |
| Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| [simon: updated base address of vsp node to fea28000] |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| |
| (cherry picked from commit 295952a183d3d10d4f532c623c51c30e25d6a421) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| arch/arm64/boot/dts/renesas/r8a77995.dtsi | 30 +++++++++++++++++++++++ |
| 1 file changed, 30 insertions(+) |
| |
| diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi |
| index 196a917afea6..621cf30e521d 100644 |
| --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi |
| @@ -692,6 +692,16 @@ |
| status = "disabled"; |
| }; |
| |
| + vspbs: vsp@fe960000 { |
| + compatible = "renesas,vsp2"; |
| + reg = <0 0xfe960000 0 0x8000>; |
| + interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 627>; |
| + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
| + resets = <&cpg 627>; |
| + renesas,fcp = <&fcpvb0>; |
| + }; |
| + |
| fcpvb0: fcp@fe96f000 { |
| compatible = "renesas,fcpv"; |
| reg = <0 0xfe96f000 0 0x200>; |
| @@ -701,6 +711,16 @@ |
| iommus = <&ipmmu_vp0 5>; |
| }; |
| |
| + vspd0: vsp@fea20000 { |
| + compatible = "renesas,vsp2"; |
| + reg = <0 0xfea20000 0 0x8000>; |
| + interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 623>; |
| + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
| + resets = <&cpg 623>; |
| + renesas,fcp = <&fcpvd0>; |
| + }; |
| + |
| fcpvd0: fcp@fea27000 { |
| compatible = "renesas,fcpv"; |
| reg = <0 0xfea27000 0 0x200>; |
| @@ -710,6 +730,16 @@ |
| iommus = <&ipmmu_vi0 8>; |
| }; |
| |
| + vspd1: vsp@fea28000 { |
| + compatible = "renesas,vsp2"; |
| + reg = <0 0xfea28000 0 0x8000>; |
| + interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 622>; |
| + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
| + resets = <&cpg 622>; |
| + renesas,fcp = <&fcpvd1>; |
| + }; |
| + |
| fcpvd1: fcp@fea2f000 { |
| compatible = "renesas,fcpv"; |
| reg = <0 0xfea2f000 0 0x200>; |
| -- |
| 2.19.0 |
| |