| From 3e30b73fbad9de8c9f84a5c43066cff94ab7d5c8 Mon Sep 17 00:00:00 2001 |
| From: Vladimir Barinov <vladimir.barinov@cogentembedded.com> |
| Date: Wed, 1 Feb 2017 09:42:02 +0100 |
| Subject: [PATCH 010/286] arm64: dts: h3ulcb: Fix EthernetAVB PHY timing |
| |
| Set PHY rxc-skew-ps to 1500 and all other values to their default values. |
| |
| This is intended to to address failures in the case of 1Gbps communication |
| using the by h3ulcb board with the KSZ9031RNX phy. |
| |
| Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> |
| Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 5b9fd1962f605a31842371471e559407c293131f) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 13 +------------ |
| 1 file changed, 1 insertion(+), 12 deletions(-) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |
| +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts |
| @@ -354,18 +354,7 @@ |
| status = "okay"; |
| |
| phy0: ethernet-phy@0 { |
| - rxc-skew-ps = <900>; |
| - rxdv-skew-ps = <0>; |
| - rxd0-skew-ps = <0>; |
| - rxd1-skew-ps = <0>; |
| - rxd2-skew-ps = <0>; |
| - rxd3-skew-ps = <0>; |
| - txc-skew-ps = <900>; |
| - txen-skew-ps = <0>; |
| - txd0-skew-ps = <0>; |
| - txd1-skew-ps = <0>; |
| - txd2-skew-ps = <0>; |
| - txd3-skew-ps = <0>; |
| + rxc-skew-ps = <1500>; |
| reg = <0>; |
| interrupt-parent = <&gpio2>; |
| interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |
