| From 4cc08b22ce6f82d5ce6d70d5fe18f2cef864619a Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= |
| <niklas.soderlund+renesas@ragnatech.se> |
| Date: Fri, 11 Nov 2016 21:33:40 +0100 |
| Subject: [PATCH 102/299] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and |
| MII pins |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| Group the AVB pins into similar groups found in other sh-pfc drivers. |
| The pins can not be muxed between functions other then AVB but their |
| drive strength can be controlled. |
| |
| The group avb_mdc containing ADV_MDC and ADV_MDIO are on other SoCs |
| called avb_mdio. In pfc-r8a7795 the avb_mdc group already existed and |
| is in use in DT. Therefore add the ADV_MDIO pin to the existing group |
| instead of renaming it. |
| |
| Signed-off-by: Niklas Sรถderlund <niklas.soderlund+renesas@ragnatech.se> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| (cherry picked from commit b25719eb938eb39aeaaa9535f7b70405d6ff2700) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 30 +++++++++++++++++++++++++++--- |
| 1 file changed, 27 insertions(+), 3 deletions(-) |
| |
| --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c |
| +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c |
| @@ -1648,11 +1648,33 @@ static const unsigned int avb_phy_int_mu |
| AVB_PHY_INT_MARK, |
| }; |
| static const unsigned int avb_mdc_pins[] = { |
| - /* AVB_MDC */ |
| - RCAR_GP_PIN(2, 9), |
| + /* AVB_MDC, AVB_MDIO */ |
| + RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), |
| }; |
| static const unsigned int avb_mdc_mux[] = { |
| - AVB_MDC_MARK, |
| + AVB_MDC_MARK, AVB_MDIO_MARK, |
| +}; |
| +static const unsigned int avb_mii_pins[] = { |
| + /* |
| + * AVB_TX_CTL, AVB_TXC, AVB_TD0, |
| + * AVB_TD1, AVB_TD2, AVB_TD3, |
| + * AVB_RX_CTL, AVB_RXC, AVB_RD0, |
| + * AVB_RD1, AVB_RD2, AVB_RD3, |
| + * AVB_TXCREFCLK |
| + */ |
| + PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), |
| + PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), |
| + PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), |
| + PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), |
| + PIN_NUMBER('A', 12), |
| + |
| +}; |
| +static const unsigned int avb_mii_mux[] = { |
| + AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, |
| + AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK, |
| + AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK, |
| + AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK, |
| + AVB_TXCREFCLK_MARK, |
| }; |
| static const unsigned int avb_avtp_pps_pins[] = { |
| /* AVB_AVTP_PPS */ |
| @@ -3720,6 +3742,7 @@ static const struct sh_pfc_pin_group pin |
| SH_PFC_PIN_GROUP(avb_magic), |
| SH_PFC_PIN_GROUP(avb_phy_int), |
| SH_PFC_PIN_GROUP(avb_mdc), |
| + SH_PFC_PIN_GROUP(avb_mii), |
| SH_PFC_PIN_GROUP(avb_avtp_pps), |
| SH_PFC_PIN_GROUP(avb_avtp_match_a), |
| SH_PFC_PIN_GROUP(avb_avtp_capture_a), |
| @@ -4024,6 +4047,7 @@ static const char * const avb_groups[] = |
| "avb_magic", |
| "avb_phy_int", |
| "avb_mdc", |
| + "avb_mii", |
| "avb_avtp_pps", |
| "avb_avtp_match_a", |
| "avb_avtp_capture_a", |
