| From 1d7766984ea449f7142a53b6ba637e56ab6799fc Mon Sep 17 00:00:00 2001 |
| From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Date: Wed, 26 Oct 2016 16:14:07 +0200 |
| Subject: [PATCH 125/299] arm64: dts: r8a7796: add I2C support |
| |
| Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> |
| Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit fcb008a75702c9932f54e5425e7c12b0ea5cf487) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm64/boot/dts/renesas/r8a7796.dtsi | 94 +++++++++++++++++++++++++++++++ |
| 1 file changed, 94 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi |
| @@ -17,6 +17,16 @@ |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| + aliases { |
| + i2c0 = &i2c0; |
| + i2c1 = &i2c1; |
| + i2c2 = &i2c2; |
| + i2c3 = &i2c3; |
| + i2c4 = &i2c4; |
| + i2c5 = &i2c5; |
| + i2c6 = &i2c6; |
| + }; |
| + |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| @@ -238,6 +248,90 @@ |
| #power-domain-cells = <1>; |
| }; |
| |
| + i2c0: i2c@e6500000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe6500000 0 0x40>; |
| + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 931>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <110>; |
| + status = "disabled"; |
| + }; |
| + |
| + i2c1: i2c@e6508000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe6508000 0 0x40>; |
| + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 930>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <6>; |
| + status = "disabled"; |
| + }; |
| + |
| + i2c2: i2c@e6510000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe6510000 0 0x40>; |
| + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 929>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <6>; |
| + status = "disabled"; |
| + }; |
| + |
| + i2c3: i2c@e66d0000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe66d0000 0 0x40>; |
| + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 928>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <110>; |
| + status = "disabled"; |
| + }; |
| + |
| + i2c4: i2c@e66d8000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe66d8000 0 0x40>; |
| + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 927>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <110>; |
| + status = "disabled"; |
| + }; |
| + |
| + i2c5: i2c@e66e0000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe66e0000 0 0x40>; |
| + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 919>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <110>; |
| + status = "disabled"; |
| + }; |
| + |
| + i2c6: i2c@e66e8000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + compatible = "renesas,i2c-r8a7796"; |
| + reg = <0 0xe66e8000 0 0x40>; |
| + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
| + clocks = <&cpg CPG_MOD 918>; |
| + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| + i2c-scl-internal-delay-ns = <6>; |
| + status = "disabled"; |
| + }; |
| + |
| scif2: serial@e6e88000 { |
| compatible = "renesas,scif-r8a7796", |
| "renesas,rcar-gen3-scif", "renesas,scif"; |