blob: b96d529cce7de3a39427301ebabd64e02200c9d0 [file] [log] [blame]
From 162cd921a7f0108629be8c9bd045e49fc72b5ac2 Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu, 11 Apr 2013 16:29:08 +0200
Subject: drm/i915: drop redundant vblank waits
Just blows through 50ms for naught, since the pipe is off.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 4667730163a6d0afb04cefae9805ca1cdad1df46)
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4edf527f1899..29675a78034e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4745,8 +4745,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
i9xx_set_pipeconf(intel_crtc);
- intel_wait_for_vblank(dev, pipe);
-
I915_WRITE(DSPCNTR(plane), dspcntr);
POSTING_READ(DSPCNTR(plane));
@@ -5716,8 +5714,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
ironlake_set_pipeconf(crtc, adjusted_mode, dither);
- intel_wait_for_vblank(dev, pipe);
-
/* Set up the display plane register */
I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
POSTING_READ(DSPCNTR(plane));
--
1.8.5.rc3