| From 0392902a59f13ae5b1bf023ee248a7f908df22d0 Mon Sep 17 00:00:00 2001 |
| From: Daniel Vetter <daniel.vetter@ffwll.ch> |
| Date: Fri, 19 Apr 2013 11:24:33 +0200 |
| Subject: drm/i915: fixup 12bpc hdmi dotclock handling |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| We need to multiply the hdmi port dotclock by 1.5x since it's not |
| really a dotclock, but the 10/8 encoding bitclock divided by 10. |
| |
| Also add correct limit checks for the dotclock and reject modes which |
| don't fit. HDMI 1.4 would allow more, but our hw doesn't support that |
| unfortunately :( |
| |
| Somehow I suspect 12bpc hdmi output never really worked - we really |
| need an i-g-t testcase to check all the different pixel modes and |
| outputs. |
| |
| v2: Fixup the adjusted port clock handling - we need to make sure that |
| the fdi link code still gets the real pixelclock. |
| |
| v3: g4x/vlv don't support 12bpc hdmi output so drop the bogus comment. |
| |
| Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| [danvet: Switch dotclock limit check to <= as suggested by Ville.] |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| |
| (cherry picked from commit 325b9d048810f7689ec644595061c0b700e64bce) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/intel_hdmi.c | 17 +++++++++++++++-- |
| 1 file changed, 15 insertions(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c |
| index 075b7d83d9f5..17e76478a8f5 100644 |
| --- a/drivers/gpu/drm/i915/intel_hdmi.c |
| +++ b/drivers/gpu/drm/i915/intel_hdmi.c |
| @@ -783,6 +783,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, |
| struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); |
| struct drm_device *dev = encoder->base.dev; |
| struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; |
| + int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2; |
| |
| if (intel_hdmi->color_range_auto) { |
| /* See CEA-861-E - 5.1 Default Encoding Parameters */ |
| @@ -802,16 +803,28 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, |
| /* |
| * HDMI is either 12 or 8, so if the display lets 10bpc sneak |
| * through, clamp it down. Note that g4x/vlv don't support 12bpc hdmi |
| - * outputs. |
| + * outputs. We also need to check that the higher clock still fits |
| + * within limits. |
| */ |
| - if (pipe_config->pipe_bpp > 8*3 && HAS_PCH_SPLIT(dev)) { |
| + if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= 225000 |
| + && HAS_PCH_SPLIT(dev)) { |
| DRM_DEBUG_KMS("forcing bpc to 12 for HDMI\n"); |
| pipe_config->pipe_bpp = 12*3; |
| + |
| + /* Need to adjust the port link by 1.5x for 12bpc. */ |
| + adjusted_mode->clock = clock_12bpc; |
| + pipe_config->pixel_target_clock = |
| + pipe_config->requested_mode.clock; |
| } else { |
| DRM_DEBUG_KMS("forcing bpc to 8 for HDMI\n"); |
| pipe_config->pipe_bpp = 8*3; |
| } |
| |
| + if (adjusted_mode->clock > 225000) { |
| + DRM_DEBUG_KMS("too high HDMI clock, rejecting mode\n"); |
| + return false; |
| + } |
| + |
| return true; |
| } |
| |
| -- |
| 1.8.5.rc3 |
| |