| From cd360890c9138ab0b281ea33b43f832a7a298393 Mon Sep 17 00:00:00 2001 |
| From: Daniel Vetter <daniel.vetter@ffwll.ch> |
| Date: Tue, 30 Apr 2013 14:01:40 +0200 |
| Subject: drm/i915: simplify DP/DDI port width macros |
| |
| If we ever leak a non-DP compliant port width through here, we have a |
| pretty serious issue. So just rip out all these WARNs - if we need |
| them it's probably better to have them at a central place where we |
| compute the dp lane count. |
| |
| Also use the new DDI width macro for FDI mode. |
| |
| Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| [danvet: fixup the embarrassing s/intel_dp->DP/temp/ mistake Paulo |
| spotted.] |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| |
| (cherry picked from commit 17aa6be9579eb204b426eeae146a43bf3dd05078) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/i915_reg.h | 11 ++--------- |
| drivers/gpu/drm/i915/intel_ddi.c | 34 ++-------------------------------- |
| drivers/gpu/drm/i915/intel_dp.c | 12 +----------- |
| 3 files changed, 5 insertions(+), 52 deletions(-) |
| |
| --- a/drivers/gpu/drm/i915/i915_reg.h |
| +++ b/drivers/gpu/drm/i915/i915_reg.h |
| @@ -2674,9 +2674,7 @@ |
| #define DP_PRE_EMPHASIS_SHIFT 22 |
| |
| /* How many wires to use. I guess 3 was too hard */ |
| -#define DP_PORT_WIDTH_1 (0 << 19) |
| -#define DP_PORT_WIDTH_2 (1 << 19) |
| -#define DP_PORT_WIDTH_4 (3 << 19) |
| +#define DP_PORT_WIDTH(width) (((width) - 1) << 19) |
| #define DP_PORT_WIDTH_MASK (7 << 19) |
| |
| /* Mystic DPCD version 1.1 special mode */ |
| @@ -4761,9 +4759,6 @@ |
| #define TRANS_DDI_EDP_INPUT_B_ONOFF (5<<12) |
| #define TRANS_DDI_EDP_INPUT_C_ONOFF (6<<12) |
| #define TRANS_DDI_BFI_ENABLE (1<<4) |
| -#define TRANS_DDI_PORT_WIDTH_X1 (0<<1) |
| -#define TRANS_DDI_PORT_WIDTH_X2 (1<<1) |
| -#define TRANS_DDI_PORT_WIDTH_X4 (3<<1) |
| |
| /* DisplayPort Transport Control */ |
| #define DP_TP_CTL_A 0x64040 |
| @@ -4807,9 +4802,7 @@ |
| #define DDI_BUF_PORT_REVERSAL (1<<16) |
| #define DDI_BUF_IS_IDLE (1<<7) |
| #define DDI_A_4_LANES (1<<4) |
| -#define DDI_PORT_WIDTH_X1 (0<<1) |
| -#define DDI_PORT_WIDTH_X2 (1<<1) |
| -#define DDI_PORT_WIDTH_X4 (3<<1) |
| +#define DDI_PORT_WIDTH(width) (((width) - 1) << 1) |
| #define DDI_INIT_DISPLAY_DETECTED (1<<0) |
| |
| /* DDI Buffer Translations */ |
| --- a/drivers/gpu/drm/i915/intel_ddi.c |
| +++ b/drivers/gpu/drm/i915/intel_ddi.c |
| @@ -687,22 +687,7 @@ static void intel_ddi_mode_set(struct dr |
| |
| intel_dp->DP = intel_dig_port->saved_port_bits | |
| DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW; |
| - switch (intel_dp->lane_count) { |
| - case 1: |
| - intel_dp->DP |= DDI_PORT_WIDTH_X1; |
| - break; |
| - case 2: |
| - intel_dp->DP |= DDI_PORT_WIDTH_X2; |
| - break; |
| - case 4: |
| - intel_dp->DP |= DDI_PORT_WIDTH_X4; |
| - break; |
| - default: |
| - intel_dp->DP |= DDI_PORT_WIDTH_X4; |
| - WARN(1, "Unexpected DP lane count %d\n", |
| - intel_dp->lane_count); |
| - break; |
| - } |
| + intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count); |
| |
| if (intel_dp->has_audio) { |
| DRM_DEBUG_DRIVER("DP audio on pipe %c on DDI\n", |
| @@ -1031,22 +1016,7 @@ void intel_ddi_enable_transcoder_func(st |
| |
| temp |= TRANS_DDI_MODE_SELECT_DP_SST; |
| |
| - switch (intel_dp->lane_count) { |
| - case 1: |
| - temp |= TRANS_DDI_PORT_WIDTH_X1; |
| - break; |
| - case 2: |
| - temp |= TRANS_DDI_PORT_WIDTH_X2; |
| - break; |
| - case 4: |
| - temp |= TRANS_DDI_PORT_WIDTH_X4; |
| - break; |
| - default: |
| - temp |= TRANS_DDI_PORT_WIDTH_X4; |
| - WARN(1, "Unsupported lane count %d\n", |
| - intel_dp->lane_count); |
| - } |
| - |
| + temp |= DDI_PORT_WIDTH(intel_dp->lane_count); |
| } else { |
| WARN(1, "Invalid encoder type %d for pipe %c\n", |
| intel_encoder->type, pipe_name(pipe)); |
| --- a/drivers/gpu/drm/i915/intel_dp.c |
| +++ b/drivers/gpu/drm/i915/intel_dp.c |
| @@ -901,18 +901,8 @@ intel_dp_mode_set(struct drm_encoder *en |
| |
| /* Handle DP bits in common between all three register formats */ |
| intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; |
| + intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count); |
| |
| - switch (intel_dp->lane_count) { |
| - case 1: |
| - intel_dp->DP |= DP_PORT_WIDTH_1; |
| - break; |
| - case 2: |
| - intel_dp->DP |= DP_PORT_WIDTH_2; |
| - break; |
| - case 4: |
| - intel_dp->DP |= DP_PORT_WIDTH_4; |
| - break; |
| - } |
| if (intel_dp->has_audio) { |
| DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n", |
| pipe_name(intel_crtc->pipe)); |